WO2006095776A1 - Semiconductor light modulator - Google Patents

Semiconductor light modulator Download PDF

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Publication number
WO2006095776A1
WO2006095776A1 PCT/JP2006/304482 JP2006304482W WO2006095776A1 WO 2006095776 A1 WO2006095776 A1 WO 2006095776A1 JP 2006304482 W JP2006304482 W JP 2006304482W WO 2006095776 A1 WO2006095776 A1 WO 2006095776A1
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WO
WIPO (PCT)
Prior art keywords
semiconductor
layer
type
clad layer
type semiconductor
Prior art date
Application number
PCT/JP2006/304482
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French (fr)
Japanese (ja)
Inventor
Ken Tsuzuki
Nobuhiro Kikuchi
Eiichi Yamada
Original Assignee
Nippon Telegraph And Telephone Corporation
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Telegraph And Telephone Corporation filed Critical Nippon Telegraph And Telephone Corporation
Priority to JP2007507153A priority Critical patent/JP4663712B2/en
Priority to EP06715402.1A priority patent/EP1857857B1/en
Priority to CN200680006437XA priority patent/CN101133355B/en
Priority to US11/817,312 priority patent/US7711214B2/en
Publication of WO2006095776A1 publication Critical patent/WO2006095776A1/en

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Classifications

    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/015Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on semiconductor elements with at least one potential jump barrier, e.g. PN, PIN junction
    • G02F1/025Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on semiconductor elements with at least one potential jump barrier, e.g. PN, PIN junction in an optical waveguide structure
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F2201/00Constructional arrangements not provided for in groups G02F1/00 - G02F7/00
    • G02F2201/07Constructional arrangements not provided for in groups G02F1/00 - G02F7/00 buffer layer
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F2202/00Materials and properties
    • G02F2202/10Materials and properties semiconductor
    • G02F2202/102In×P and alloy

Definitions

  • the present invention relates to a semiconductor optical modulator, and more particularly to a semiconductor optical modulator used in the fields of optical communication systems and optical information processing systems.
  • the mainstream of optical signal generation is a combination of a DC-operated light source and an external modulator.
  • the waveguide type light control device is one of the key elements of a high-speed optical communication system and an optical information processing system.
  • an optical modulator is an indispensable device for converting electrical signals such as sound and images into light intensity.
  • Optical modulators can be broadly divided into those using dielectrics such as LiNbO (LN), InP and GaAs.
  • a dielectric such as LiNbO (LN) is used.
  • LN modulator power that is widely used now. This operates using an electro-optic effect in which the refractive index of the medium is changed by applying an electric field having a frequency sufficiently lower than the direct current or optical frequency.
  • An optical modulator using such an electro-optic effect includes a phase modulator that modulates the phase of light by changing the refractive index of a dielectric having the electro-optic effect, and the phase modulator and Matsuhsanda.
  • a light intensity modulator combined with an interference system.
  • Matsuhatsu optical modulator Is a modulator suitable for ultra-high-speed long-distance transmission, which can theoretically reduce wavelength checking to zero.
  • the conventional LN modulator since the conventional LN modulator has a relatively long element length, the optical transmitter module becomes large, and a high driving voltage of about 3 to 5 V is required.
  • a separate control circuit since the drive conditions change due to DC drift (DC voltage drift) and temperature drift, a separate control circuit was required for stable operation. That is, there is a problem that a drive condition control mechanism is required due to the change of the drive condition.
  • the following two optical modulators using semiconductors are typical.
  • One is the long absorption edge by applying an electric field, such as the Franz-Keldysh effect in bulk semiconductors and the quantum confined stark effect (QCSE) in multiple quantum well structures.
  • This is an electroabsorption optical modulator (EA modulator) that uses the effect of shifting toward the wavelength side.
  • EA modulator electroabsorption optical modulator
  • EO modulator electro-optic modulator
  • Pockels effect electro-optic effect in which the refractive index changes when an electric field is applied.
  • An electroabsorption optical modulator is a small LiNbO modulator that consumes less power
  • electroabsorption optical modulators have a problem in that wavelength chasing occurs during modulation, and waveform degradation occurs after optical fiber transmission due to the chirping.
  • the optical signal spectrum after modulation is broadened compared to that before modulation by wavelength checking.
  • waveform degradation occurs due to the dispersion effect of the optical fiber medium, which further adversely affects transmission characteristics. This phenomenon of waveform deterioration becomes more prominent as the bit rate is higher and the transmission distance is longer.
  • an electro-optic modulator a phase modulator that modulates the phase of light by changing the refractive index and a phase modulator are combined to form a Matsuhsunder interferometer.
  • Matsuhsunder modulators for intensity modulation have been put into practical use.
  • the current optical communication uses a Mach-Zehnder modulator that modulates the intensity because it sends the signal according to the intensity of the light. This Matsuhsunder modulator can theoretically reduce wavelength checking to zero, and is expected to be a very high-speed long-distance communication modulator.
  • Non-Patent Document 1 discloses a lumped-constant type modulator having a pin structure. Since the optical modulator described in Non-Patent Document 1 has a pin structure, it is possible to efficiently apply an electric field to the core layer with a small leakage current.
  • Non-Patent Document 2 discloses a modulator using a Schottky electrode.
  • a wideband band is realized by using a traveling wave electrode structure as an electrode structure.
  • Patent Document 1 also studies an n-i-n structure semiconductor Mach-Zehnder modulator aiming at lower voltage, smaller size, and higher speed.
  • Patent Document 1 International Publication No. 2004Z081638 Pamphlet
  • Non-Patent Document 1 C. Rolland et al., “10 Gbit / s, 1.56 ⁇ m multiquantum well InP / InGaAsP Mach-Zehnder optical modulator,” Electron, Lett., Vol.29, no.5, pp.471- 472, 1993
  • Patent Document 2 R. Spickerman et al., "GaAs / AlGaAs electro-optic modulator with ban dwidth> 40GHz,” Electron, Lett., Vol.31, no.ll, pp.915-916, 1995
  • the resistance of the p-clad layer is high, so that the propagation loss of an electric signal is large and high-speed operation is difficult, and light absorption of the p-clad layer is also difficult. Due to the large size, it has been difficult to increase the element length in order to reduce the operating voltage. Further, the modulator described in Non-Patent Document 2 has a problem that the operating voltage is high.
  • an n ⁇ i ⁇ n structure is formed by sequentially stacking an n-type cladding layer, a core layer, and an n-type cladding layer, and an upper side that forms the n ⁇ i ⁇ n structure.
  • the n-type cladding layer is provided with electrodes.
  • FIG. 11 is a cross-sectional view of a conventional phase modulation waveguide of an optical modulator having an optical waveguide having an nin structure.
  • the substrate has a layer structure in which an n-type cladding layer 102, an optical waveguide core layer 103, a semi-insulating cladding layer 104, and an n-type cladding layer 105 are sequentially stacked. Electrodes 108 and 109 are connected to the n-type cladding layer 105 and the n-type cladding layer 102, respectively.
  • Non-Patent Document 1 As with the n structure, an electric field can be efficiently applied to the core layer, and since the n-type cladding layer is used, the electrical signal from the p cladding layer, which was a problem with the pin structure, and In addition, the propagation loss of light can be reduced, the operating voltage can be lowered, and a sufficiently stable output was obtained at that time.
  • further stability of the output of the optical modulator has been demanded.
  • the optical modulator having the phase modulation waveguide having the n-in structure such as Patent Document 1 has the following problems.
  • FIG. 12 is a diagram showing a waveguide band diagram of an optical modulator having an optical waveguide having an n-i-n structure.
  • the optical waveguide having the n-i-n structure there is a light absorption in the optical waveguide core layer 103 although it is small. Therefore, as shown in FIG. 12, the holes 106-1 generated by light absorption become accumulated holes 106-2 in the semi-insulating clad layer 104 that is a noria layer. When these holes accumulate, the barrier of the semi-insulating clad layer 104 against electrons falls on the band diagram, and a leak current flows from the n-type clad layer 105 to the n-type clad layer 102 (parasitic phototransistor). Effect).
  • the base is open and the hole concentration of the base is increased, the same situation occurs as when the emitter Z base junction is forward biased.
  • the voltage applied to the optical waveguide core layer 103 is also reduced by a voltage corresponding to the forward bias. Therefore, there has been a problem that the modulation characteristics change depending on the wavelength and light intensity of light input to the optical modulator. For example, if the wavelength changes, it is necessary to change the driving conditions of the optical modulator, so a control circuit is required. Also, since the modulation characteristics fluctuate and deteriorate as the light intensity increases, it is necessary to limit the light input level. In order to avoid the fluctuation and instability of this modulation characteristic, there has been a restriction that an optical modulator must be used within a wavelength and light intensity range in which fluctuation does not become a problem. As a result, the range that can be used as an optical modulator has been limited.
  • the parasitic phototransistor effect caused by the accumulation of holes in the semi-insulating clad layer 104 which is a noria layer, has a phase modulation waveguide with a nin structure. This is a problem that hinders the stable operation of the optical modulator.
  • One of the problems to be solved by the present invention is to suppress the hole accumulation and the parasitic phototransistor effect in the semi-insulating clad layer described above, and to suppress the fluctuation of the modulation characteristic caused by them, thereby controlling the modulator. It is to provide a structure that realizes the stable operation of the.
  • Another problem to be solved by the present invention is to provide a semiconductor optical modulation that is capable of stable operation and has an excellent withstand voltage against electric field while taking advantage of the features of the nn-structure semiconductor optical modulator. Is to provide a vessel.
  • the first aspect of the present invention includes a first n-type semiconductor cladding layer, a semiconductor core layer, a semiconductor cladding layer, and a second n-type semiconductor cladding. And a waveguide structure formed by sequentially stacking layers, wherein the semiconductor clad layer has an electron affinity smaller than that of the second n-type semiconductor clad layer.
  • the heterojunction between the semiconductor clad layer and the second n-type semiconductor clad layer may be of a type ⁇ type.
  • the potential energy for holes in the semiconductor clad layer may be smaller than the potential energy for holes in the semiconductor core layer.
  • the potential energy for holes is smaller between the semiconductor cladding layer and the second n-type semiconductor cladding layer than the semiconductor cladding layer. 3 n-type semiconductor cladding layers may be inserted.
  • a non-doped cladding layer may be inserted between the first n-type semiconductor cladding layer and the semiconductor core layer.
  • the semiconductor core layer and the semiconductor clad layer In addition, a non-doped cladding layer may be inserted.
  • the potential energy for holes in the semiconductor cladding layer may be smaller than the potential energy for holes in the non-doped cladding layer inserted between the semiconductor core layer and the semiconductor cladding layer.
  • the semiconductor clad layer may be InAlAs.
  • the semiconductor clad layer may be doped p-type.
  • the waveguide structure may be a high-mesa waveguide structure or a ridge waveguide structure.
  • branching means for branching input light into two and outputting two output end forces, respectively, each of the two output ends being a separate waveguide.
  • a branching means coupled to the input end of the structure and a multiplexing means coupled to the two waveguide structures respectively for combining and outputting the light output from the two waveguide structure forces. You may be prepared for.
  • the second aspect of the present invention includes a first n-type semiconductor clad layer made of n-type InP, a first non-doped clad layer made of non-doped InP, a non-doped semiconductor core layer, and a non-doped InP.
  • a semiconductor optical waveguide layer formed by sequentially laminating a second non-doped clad layer, a semiconductor clad layer comprising p-type InAlAs, and a second n-type semiconductor clad layer having n-type InP force. It is characterized by comprising a waveguide structure formed in this way.
  • a third aspect of the present invention includes a first n-type semiconductor clad layer made of n-type InP, a first non-doped clad layer made of non-doped InP, a non-doped semiconductor core layer, and a non-doped InP.
  • a waveguide structure formed by stacking is provided.
  • a first n-type semiconductor cladding layer, a semiconductor core layer, a semi-insulating semiconductor cladding layer, and a second n-type semiconductor cladding layer are sequentially stacked.
  • a semiconductor optical modulator having a formed waveguide structure which is a P-type semiconductor region that is a region having P-type conductivity, and has a certain length in the light traveling direction of the waveguide structure.
  • the p-type semiconductor region includes the second n-type semiconductor clad layer and the second n-type semiconductor clad having a certain length section in the light traveling direction of the waveguide structure. It may be formed on a part of the semiconductor cladding layer in contact with the pad layer.
  • the electrode is formed on the p-type semiconductor region and the second n-type semiconductor clad layer, and the p-type semiconductor region and the n-type semiconductor layer are formed.
  • the semiconductor clad layer may be electrically connected to the electrode in common.
  • the waveguide structure may be a high mesa waveguide structure or a ridge waveguide structure.
  • branching means for branching input light into two and outputting two output end forces, respectively, each of the two output ends being a separate waveguide.
  • a branching means coupled to the input end of the structure and a multiplexing means coupled to the two waveguide structures respectively for combining and outputting the light output from the two waveguide structure forces. You may be prepared for.
  • the semiconductor device further includes a second electrode formed on a region on the first n-type semiconductor clad layer where the semiconductor core layer is not formed.
  • the electrode may be formed on the p-type semiconductor region and the second n-type semiconductor clad layer, and the electrode and the second electrode may have a traveling wave electrode structure.
  • the semiconductor optical modulator according to the embodiment of the present invention can realize a semiconductor optical modulator that has low loss, excellent withstand voltage characteristics against an electric field, and operates stably at low voltage. That is, in one embodiment of the present invention, the electron affinity of the semiconductor cladding layer is Since it is set to be smaller than the electron affinity of the second n-type semiconductor clad layer, the semiconductor clad layer becomes a potential barrier against the electrons of the second n-type semiconductor clad layer. The frequency dispersion in intensity modulation is reduced or not generated.
  • a part of the second n-type semiconductor clad layer in contact with the semiconductor clad layer for example, a semi-insulating clad layer
  • the semiconductor clad layer for example, a semi-insulating clad layer
  • the semiconductor clad layer for example, a semi-insulating clad layer
  • the semiconductor clad layer for example, a semi-insulating clad layer
  • the semiconductor clad layer for example, a semi-insulating clad layer
  • the second n-type semiconductor clad layer By forming a part of the semiconductor clad layer as a p-type semiconductor region having p-type conductivity, holes generated by light absorption are extracted from the electrode through the p-type semiconductor region. This prevents or reduces the accumulation of holes in the semiconductor cladding layer, which is a noria layer. For this reason, it is possible to suppress the occurrence of leakage current and the decrease in voltage applied to the semiconductor core layer, suppress the fluctuation of modulation characteristics due to light absorption, and
  • a semiconductor electro-optic modulator (EO modulator) according to an embodiment of the present invention, holes are not accumulated or accumulated in a semiconductor cladding layer (eg, semi-insulating cladding layer) that is a barrier layer. Therefore, it is possible to suppress the occurrence of leakage current and the decrease in voltage applied to the core layer.
  • a semiconductor cladding layer eg, semi-insulating cladding layer
  • FIG. 1 is a band diagram of a type II heterojunction according to one embodiment of the present invention.
  • FIG. 2 is a diagram showing a cross-sectional view of a waveguide structure according to an embodiment of the present invention.
  • FIG. 3 is a diagram showing a band diagram of a waveguide according to an embodiment of the present invention.
  • FIG. 4 is a diagram showing a voltage-current characteristic when an inverse noise is applied to the waveguide structure according to one embodiment of the present invention.
  • FIG. 5 is a diagram showing an EZE high frequency response characteristic when the length of the phase modulation region of the Mach-Zehnder modulator is 3 mm according to one embodiment of the present invention.
  • Fig. 6 shows a push-pull operation of a Mach-Zehnder modulator according to an embodiment of the present invention. It is a figure which shows the eye diagram of the made 40GbitZs.
  • FIG. 7 is a diagram showing a band diagram of a waveguide according to an embodiment of the present invention.
  • Fig. 8 is a schematic diagram of a Matsuhonda optical modulator according to an embodiment of the present invention.
  • FIG. 9 is a diagram showing a waveguide structure of an optical modulator according to an embodiment of the present invention.
  • Fig. 10 is a structural diagram of a Matsuhazu modulator according to an embodiment of the present invention.
  • FIG. 11 is a cross-sectional view of a waveguide of a conventional optical modulator having an nn structure.
  • FIG. 12 is a waveguide layer band diagram of a conventional optical modulator having an nn structure.
  • One embodiment of the present invention includes a first n-type semiconductor cladding layer, a semiconductor optical waveguide layer having an electro-optic effect formed on the first n-type semiconductor cladding layer, and formed on the semiconductor optical waveguide layer
  • This is a semiconductor optical modulator having an n ⁇ n ⁇ n structure that also has a stacking force of the formed semiconductor clad layer and a second n-type semiconductor clad layer formed on the semiconductor clad layer.
  • the semiconductor clad layer is a noria layer (potential barrier layer) for electrons having the second n-type semiconductor clad layer force.
  • the barrier layer functions well. In other words, it is important to reduce the effect of holes generated by light absorption in the semiconductor waveguide layer on the barrier layer.
  • the generated holes may be accumulated in the noria layer, and when accumulated in the noria layer, the potential barrier against electrons may be pushed down. Therefore, depending on the intensity of light incident on the semiconductor waveguide layer, the modulation characteristics change, frequency dispersion occurs in the intensity modulation, and the first n-type semiconductor layer force increases due to the potential barrier degradation. In some cases, a leakage current toward the semiconductor layer may occur. Therefore, the Hall force generated in the semiconductor waveguide layer. The effect on the barrier layer by accumulating in the S barrier layer. By reducing the above, it is possible to provide a semiconductor optical modulator capable of suppressing a variation in modulation characteristics and capable of stable operation.
  • a first n-type semiconductor cladding layer, a semiconductor optical waveguide layer having an electro-optic effect, a semiconductor cladding layer, and a second n-type semiconductor cladding layer are sequentially stacked.
  • Such a stacked body has an n-i-n structure.
  • the semiconductor cladding layer and the second n-type semiconductor cladding layer are heterojunction, and the electron affinity of the semiconductor cladding layer is Designed to be smaller than the electron affinity of the n-type semiconductor cladding layer. By doing so, the semiconductor cladding layer becomes a potential barrier against the electrons of the second n-type semiconductor cladding layer.
  • the characteristics of semiconductor optical modulators with an n-i-n structure are more stable and withstand voltage characteristics against electric fields.
  • An excellent optical modulator can be realized.
  • FIG. 1 shows the band diagram for this type II heterojunction.
  • q x (q: elementary electron) is called the electron affinity
  • Eg is called the band gap and is the energy difference between the conductor and the valence band.
  • type II heterojunction means that the electron affinity of semiconductor 2 is smaller than that of semiconductor 1, and the sum of electron affinity and energy gap of semiconductor 2 (q% + Eg) and the force of semiconductor 1 Is also a small case.
  • FIG. 2 is a cross-sectional view of the waveguide structure of the semiconductor optical modulator according to the present embodiment
  • FIG. 3 is a view showing a band diagram of the waveguide structure shown in FIG.
  • an n InP cladding layer (first n-type semiconductor cladding layer) 11, a semiconductor optical waveguide layer 19, p-InAlAs are formed on a semi-insulating (SI) -InP substrate 10.
  • a layer (semiconductor cladding layer as a potential barrier layer) 15 and an n-InP cladding layer (second n-type semiconductor cladding layer) 16 are sequentially stacked.
  • a non-doped InP clad layer 12 a non-doped semiconductor core layer 13 having an electro-optic effect, and a non-dope InP clad layer 14 are laminated, and p-InAlAs is formed on the InP clad layer 14.
  • Layer 15 force S is to be stacked.
  • n-semiconductor and n-type semiconductor refer to an n-type doped semiconductor. Of course, the same applies to p-type doping.
  • the semiconductor core layer 13 includes, for example, a multiple quantum well layer and a band gap larger than that of the multiple quantum well layer above and below (on the InP clad layer 12 side and InP clad layer 14 side of the semiconductor core layer 13).
  • a structure having an optical confinement layer having a value smaller than that of the InP cladding layers 12 and 14 can be used.
  • the band gap wavelength of the multiple quantum well layer is set so that the electro-optic effect is effective and the light absorption is not a problem at the light wavelength used.
  • the waveguide structure according to the present embodiment has a high mesa waveguide structure as shown in FIG. 2 and applies a voltage to the semiconductor optical waveguide layer 19, so that the n-InP cladding layer 11 and Electrodes 17 and 18 are provided on the upper part of the n—InP clad layer 16, respectively.
  • a high mesa waveguide structure is used as the waveguide structure, but the present invention is not limited to this, and a ridge waveguide structure may be used.
  • the p-InAlAs layer 15 has more electrons than the n-InP cladding layer 16. Since the affinity is small, conduction band discontinuity occurs at the heterointerface between the two. That Therefore, a potential barrier against electrons in the n-InP cladding layer 16 is generated.
  • the p-In AlAs layer 15 is p-type and the n-InP clad layer 16 is n-type, a potential barrier due to a pn junction is generated in addition to a potential node caused by the heterojunction. Therefore, for the electrons injected from the n-InP clad layer 16, these two elements function as a total potential barrier.
  • the heterojunction between the p-InAlAs layer 15 and the n-InP clad layer 16 is a type in which electrons and holes are confined in spatially different locations. It has become.
  • the holes generated slightly due to light absorption in the semiconductor optical waveguide layer are easy to flow into the n-InP cladding layer 16 due to the non-doped InP cladding layer 14 side force.
  • the potential energy for the holes of the p-In AlAs layer 15 is smaller than the potential energy for the holes of the non-doped InP cladding layer 14.
  • the semiconductor optical waveguide layer at the junction between the semiconductor optical waveguide layer and the semiconductor clad layer as the potential barrier layer, it is preferable to reduce the potential energy for the holes of the semiconductor clad layer compared to the potential energy for the holes of the semiconductor optical waveguide layer.
  • the cladding layer in this embodiment, the non-doped InP cladding layer 14
  • the layer in contact with the semiconductor cladding layer of the semiconductor optical waveguide layer is the semiconductor core layer. It becomes.
  • the potential energy with respect to the holes in the semiconductor cladding layer should be made smaller than the potential energy with respect to the holes in the semiconductor core layer at the junction of the semiconductor core layer and the semiconductor cladding layer as the potential barrier layer.
  • the semiconductor optical modulator when the semiconductor optical modulator is operated, a slight force generates electrons and holes by light absorption in the semiconductor core layer 13, and these electrons easily reach the n-InP cladding layer 11. However, holes may accumulate near the p-InAlAs layer 15. This pushes down the potential NOR of the p-InAlAs layer 15. This corresponds to the reduction of the potential barrier due to the pn junction, which may prevent the breakdown voltage characteristics from being sufficiently maintained.
  • the conduction band discontinuity remains the same even when the potential barrier due to the pn junction as described above is reduced. Since it can function as a potential barrier, it is possible to provide a semiconductor optical modulator with excellent breakdown voltage characteristics.
  • the potential barrier due to the pn junction is reduced.
  • the electron affinity of the p-InAlAs layer 15 is expressed as n —The potential barrier due to the conduction band discontinuity generated by making the InP cladding layer 16 smaller than the electron affinity functions well. Therefore, the leakage current from the n-InP cladding layer 11 toward the n-InP cladding layer 16 can be reduced.
  • the potential barrier due to the conduction band discontinuity works well regardless of the intensity and wavelength of the incident light on the semiconductor core layer 13, so the potential barrier due to the pn junction depends on the intensity and wavelength of the incident light. Even if it fluctuates, stable modulation can be performed.
  • the electron affinity of the p-InAlAs layer 15 as the semiconductor cladding layer is made smaller than the electron affinity of the n-InP cladding layer 16 as the second n-type semiconductor cladding layer. is there.
  • the conduction band discontinuity between the p-InAlAs layer 15 and the InP clad 14 is sufficiently large (the reference value is 0.39 eV), and it is not necessary to take much thickness.
  • the p-InAlAs layer 15 has a thickness of 0.05 m, it can have a breakdown voltage of about 15V.
  • the p-InAlAs layer 15 is not made thicker than necessary, and the distance from the semiconductor core layer 13 is increased, that is, non-doped. It is possible to suppress loss due to light absorption by appropriately thickening the InP clad layer 14. As described above, in this embodiment, it is possible to realize a semiconductor optical modulator that has excellent breakdown voltage characteristics against an electric field without impairing the features of the semiconductor optical modulator having the nn structure, and that operates stably with low loss.
  • the force using a stacked body of the InP clad layer 12, the semiconductor core layer 13, and the InP clad layer 14 as the semiconductor waveguide layer is not limited to this. That is, semiconductor A structure in which either one or both of the force InP cladding layers 12 and 14 are provided, in which the non-doped InP cladding layers 12 and 14 are provided above and below the core layer 13, respectively. In this embodiment, it suffices if light can be guided.
  • the semiconductor waveguide layer either a semiconductor core layer alone or a non-dop cladding layer is provided on at least one of the upper and lower sides of the semiconductor core layer. Including.
  • the non-doped InP cladding layers 12 and 14 have a wider band gap than the semiconductor core layer 13. For example, you can use InGaAsP or InAlGaAs layers.
  • the materials of the semiconductor cladding layer and the second n-type semiconductor cladding layer are not limited to p-InAlAs and n-InP, respectively, but the semiconductor cladding layer and the second n-type semiconductor cladding layer.
  • the materials of the semiconductor cladding layer and the second n-type semiconductor cladding layer are made so that the electron affinity of the semiconductor cladding layer is smaller than the electron affinity of the second n-type semiconductor cladding layer.
  • the semiconductor clad layer does not need to be p-type doped if a potential barrier layer due to conduction band discontinuity can be formed.
  • the semiconductor optical waveguide layer InP clad layer 14 in FIG. 2
  • the potential barrier layer are used.
  • the electron affinity of the semiconductor clad layer is preferably smaller than the electron affinity of the semiconductor optical waveguide layer (InP clad layer 14 in FIG. 2).
  • a traveling wave electrode structure is useful for realizing a high-speed optical modulator. Therefore, traveling wave type electrodes may be applied to the electrodes 17 and 18.
  • impedance matching in the optical modulator and speed matching between light and electricity are important.
  • This impedance matching and velocity matching can be achieved by controlling the capacitance component of the optical waveguide of the optical modulator. In other words, it is important to appropriately design the total thickness and waveguide width of the semiconductor optical waveguide layer 19 (the semiconductor core 13 and the upper and lower non-doped InP cladding layers 12 and 14), which are non-doped layers.
  • an error of about 50 ⁇ to ⁇ 10 ⁇ which is the specific impedance of the external electric circuit, can be allowed.
  • the optical modulator since the optical modulator is required to be driven at a low voltage, it is preferable to make the total thickness of the non-doped layer as thin as possible unless the optical confinement factor of the non-doped layer becomes extremely small (by doing this, Capacity increases).
  • the characteristic impedance of the optical modulator is qualitatively inversely proportional to the square root of the capacitance, so if the non-doped layer is too thin, the characteristic impedance becomes too small.
  • One way to avoid this is to reduce the width of the semiconductor optical waveguide layer. However, if it is too thin, this may lead to an increase in light propagation loss and a decrease in yield.
  • C is the speed of light
  • n is the group refractive index
  • n is the refractive index of electricity
  • L is the electric power
  • the group index of refraction ⁇ of light is about 3.4 to 3.7, depending on the desired frequency band and electrode length.
  • the allowable range of electrical refractive index is determined. For example, if the band is 40 GHz and the electrode length is 3 mm, the difference between the group refractive index of light and the refractive index of electricity is about ⁇ 1.1. Qualitatively, when the capacitance of the semiconductor optical waveguide layer is increased, the speed of electricity is reduced, that is, the refractive index of electricity is increased. Considering that all of the above conditions are met, the optical waveguide width is 1.! It is preferable that the total thickness of the non-doped layer (semiconductor optical waveguide layer) is about 0.4 m to 2.0 ⁇ m.
  • InP was used for the first and second n-type semiconductor clad layers.
  • a p-type InAlAs layer (p — InAlAs layer 16) was used as the semiconductor cladding layer functioning as an electron potential barrier, and its layer thickness was 0.05 ⁇ m and the doping density was 1 ⁇ 10 18 cm 3 . Further, the total thickness of the semiconductor optical waveguide layer 19, that is, the non-doped layer was set to 0.9 m. The width of the semiconductor optical waveguide layer 19 was 1.6 m.
  • FIG. 4 is a diagram showing voltage-current characteristics when a negative voltage is applied to the electrode 18 (reverse bias) between the electrode 17 and the electrode 18. As can be seen from Fig. 4, it shows a sufficient breakdown voltage characteristic of 15V or higher!
  • Fig. 5 shows the EZE high-frequency response characteristics in which the length of the phase modulation region is 3 mm.
  • the frequency of 6 dB down which is the reference for the frequency band, is 40 GHz or more, and there is enough band for 40 GbitZs modulation.
  • Fig. 6 is a 40 GbitZs eye diagram that is actually push-pull operated at 1.3 Vpp. From Fig. 8, a clear eye opening can be confirmed. Thus, it can be seen that the Mach-Zehnder modulator according to this embodiment is useful as a high-speed optical modulator.
  • FIG. 7 is a diagram showing a band diagram of the waveguide structure of the semiconductor optical modulator according to the present embodiment.
  • the basic configuration of the semiconductor optical modulator according to this embodiment is the same as that of the first embodiment, and the description thereof is omitted.
  • the difference between this embodiment and the first embodiment is that the second n-type semiconductor cladding layer n-InP cladding layer 16 and the potential noria layer p-InAlAs layer 15 Compared to the n-InP clad layer 16 which is an n-type semiconductor clad layer, the potential energy for holes is small! / and the third n-type semiconductor clad layer 20 is inserted.
  • the third n-type semiconductor clad layer 20 can be formed by appropriately setting the composition of, for example, an InGaAsP layer or an InGaAlAs layer.
  • a Mach-Zehnder optical modulator using the waveguide structure (phase modulation waveguide) described in the first and second embodiments will be described.
  • the Matsuhazu optical modulator 40 has the waveguide structure described in the first and second embodiments.
  • two output ends of an MMI (Multi-Mode Interferencé) force bra 42a as means for branching the input light into two are respectively provided in the phase modulation waveguide according to the embodiment of the present invention.
  • 41a and 41b are linked.
  • the output ends of the phase modulation waveguides 41a and 41b are respectively connected to the two input ends of the MMI coupler 42b as means for multiplexing the two input lights.
  • an electrode 43 is provided in a predetermined region of the first n-type semiconductor clad layer formed on the substrate, and an electrode 44 is provided in a predetermined region on the phase modulation waveguides 41a and 41b.
  • the length L (phase modulation region) of the phase modulation waveguides 41a and 41b is 3 mm.
  • the input light when input light is input from one input end of the MMI coupler 42a, the input light is branched into two by the MMI coupler 42a, and each of the branched lights is phase-modulated. Guided to waveguides 4 la and 4 lb. At this time, the phase of the branched light that passes through the phase modulation waveguides 41a and 41b is modulated based on the voltage applied to the phase modulation regions of the phase modulation waveguides 41a and 41b by the electrodes 43 and 44. The modulated light is multiplexed by the MMI force coupler 42b and output from one output terminal of the MMI coupler 42b.
  • the optical modulation waveguide used in the optical modulator according to this embodiment is a part of the second n-type semiconductor clad layer in contact with the semi-insulating clad layer as the semiconductor clad layer (barrier layer), or the second Part of the n-type semiconductor clad layer and the semi-insulating clad layer (semiconductor clad layer) is a p-type semiconductor region with p-type conductivity.
  • a plurality of p-type semiconductor regions are repeatedly arranged in the light traveling direction of the light modulation waveguide. Holes generated by light absorption of input light in the semiconductor optical waveguide layer are extracted from the electrode common to the second n-type semiconductor clad layer through this p-type semiconductor region.
  • one of the objects of the present invention is to improve the problem that the modulation characteristics fluctuate depending on the wavelength and intensity of light input to the optical modulator, and realize stable operation of the modulator. It becomes possible to do.
  • FIG. 9 shows the structure of the waveguide of the semiconductor optical modulator configured according to this embodiment.
  • an n— InP cladding layer 52 (first n-type semiconductor cladding layer), a semiconductor core layer 53, a semi-insulating cladding layer (semiconductor cladding layer as a potential barrier layer) 54 and n— InP cladding layer (second n-type semiconductor cladding layer) 55-1 has a layered structure.
  • n-InP cladding layer 55-1 and a part of semi-insulating cladding layer 54 in contact with the semi-insulating cladding layer 54 in a section of a certain length in the light traveling direction are p-type. These are called P-type semiconductor regions 55-2a to 55-2d with the conductivity of.
  • An electrode 56 electrically connected in common with the p-type semiconductor regions 5552a to 55-2d and the n-InP cladding layer 55-1 is provided.
  • This p-type semiconductor region is repeatedly arranged in the light traveling direction over the entire light modulation waveguide. In FIG. 9, they are repeatedly arranged at regular intervals, but are not limited to regular intervals. That is, they may be arranged at random intervals. In FIG. 9, the number of p-type semiconductor regions is not limited to only four forces, which are described, but a large number of p-type semiconductor regions are repeatedly arranged over the entire optical modulation waveguide.
  • a high mesa waveguide structure is used as the waveguide structure, but the present invention is not limited to this, and a ridge waveguide structure may be used.
  • the p-type semiconductor regions 55-2a to 55-2d are formed, for example, after the layers from the n-InP cladding layer 52 to the n-InP cladding layer 55-1 are grown, and then the p-type semiconductor region 55- 2a ⁇ 55— The part corresponding to 2d is removed by etching! / And then, it can be formed by re-growing the p-type InP semiconductor region. It can also be formed by introducing a Be acceptor into a part of the n—InP clad layer 55-1 by ion implantation. However, it is desirable that the p-type semiconductor regions 55-2a to 55-2d do not penetrate into the semiconductor core layer 53.
  • the length of the p-type semiconductor region in the light traveling direction can be set to 50 m or less, for example. Also p-type half The interval between the conductor regions can be set to 200 m or less, for example.
  • an electrode 56 and electrodes 57a and 57b which are metal electrodes, are arranged, respectively.
  • a voltage is applied to the semiconductor core layer 53 with the electrode 56 having a negative polarity with respect to the electrodes 57a and 57b.
  • the electrode 56 makes a common electrical contact with both the n—InP cladding layer 55-1 and the p-type semiconductor regions 55-2a to 55-2d.
  • the above-described Hall force 3 ⁇ 4 type semiconductor region is used. It flows into the electrode 56 through 55-2a to 55-2d. As described above, since the holes flow into the electrode 56, holes are not accumulated in the semi-insulating clad layer 54, or accumulation can be reduced. Accordingly, accumulation in the semi-insulating clad layer 54 can be prevented or reduced, so that the potential barrier of the semi-insulating clad layer 54 can be maintained, or reduction in potential barrier can be reduced. You can.
  • the electrode 56 functions as a means for sucking holes in addition to functioning as a means for applying an electric signal by applying a voltage to the semiconductor core layer.
  • a path through which the holes pass between the semi-insulating clad layer 54 and the electrode 56 is necessary, and the p-type semiconductor region 55-2a to 55 — 2d serves as the path. That is, the holes in the semi-insulating clad layer 54 move to the outside of the semi-insulating clad layer 54 by the electrode 56 and the p-type semiconductor regions 55-2a to 55-2d.
  • the influence on the semiconductor clad layer (semi-insulated clad layer 54) as a layer can be reduced.
  • the p-type semiconductor region is directed from the semi-insulating clad layer 54 to the electrode 56.
  • the P-type semiconductor regions 55-2a to 55-2d and the electrode 56 are brought into contact with each other.
  • the p-type semiconductor regions 55-2a to 55-2d are also formed in part of the semi-insulating clad layer 54, but this is not restrictive. That is, in this embodiment, it is important to flow holes in the semi-insulating clad layer 54 to the electrode 56, and the p-type semiconductor regions 55-2a to 55-2d function as the above-described hole paths. That is important.
  • the p-type semiconductor region may be formed in contact with the semi-insulating clad layer 54 without forming the p-type semiconductor region up to a part of the ladder layer 54.
  • the p-type semiconductor region 55-2a to 55-2d may not be in contact with the semi-insulating clad layer 54 as long as the p-type semiconductor region 55-2a to 55-2d functions appropriately as the above-described hole path.
  • an electrode for applying an electric signal and an electrode for sucking and taking holes are made common.
  • the force that the electrode 56 has a function for applying an electric signal and a function for sucking out holes are made common.
  • the apparatus can be simplified and the manufacturing process can be simplified. This is preferable because it can be simplified.
  • the present invention is not limited to this, and an electrode for applying an electrical signal and an electrode for absorbing holes may be provided separately.
  • an electrode for absorbing and removing holes may be provided on the side surface of the n-InP clad layer 55-1 where the electrode 56 is formed.
  • the optical modulator is operated as described below.
  • Light is incident in a direction perpendicular to the cross section (end face) of the mesa structure shown in Fig. 9, and the light is propagated through the light modulation waveguide.
  • an electric signal is input to the electrode 56, and an electric signal voltage is applied between the n—InP cladding layer 52 and the n—InP cladding layer 55-1.
  • Fe atoms doped in the semi-insulating clad layer 54 act as acceptors at deep levels. For this reason, as explained in Fig. 12, it raises the energy of the valence band and acts as a potential barrier against electrons.
  • This potential barrier suppresses electron injection from the n-InP cladding layer 55-1. Therefore, it is possible to modulate the optical phase based on the electro-optical effect by applying the electric signal voltage to the semiconductor core layer 53 in a state where the leakage current flowing from the electrodes 57a and 57b is small.
  • the p-type semiconductor regions 55-2a to 55-2d electrically connected in common with the n-InP cladding layer 55-1 have the following operations.
  • the parasitic phototransistor effect occurs due to the holes accumulated by the light absorption of the semiconductor core layer 53.
  • the p-type semiconductor region 55-2a to 55-2d which is a characteristic part of this embodiment, is a noria layer.
  • a plurality of p-type semiconductor regions are arranged.
  • the present invention is not limited to this, and only one p-type semiconductor region may be arranged.
  • the p-type semiconductor regions 55-2a to 55-2d are formed in the n-InP cladding layer 55-1.
  • the hole in a region far away from a certain P-type semiconductor region force is sucked up by the P-type semiconductor region force next to the certain P-type semiconductor region, so that the entire optical modulation waveguide section is covered. Therefore, the hall can be sucked up evenly. Therefore, it is preferable to arrange a plurality of p-type semiconductor regions.
  • FIG. 10 is an overview of the semiconductor Mach-Zehnder modulator according to this embodiment.
  • Matsuno and Tunda modulators have two n-i-n optical waveguides. Some of the two optical waveguides include phase modulation waveguides 62a and 62b, respectively, and the semiconductor optical modulation paths having the structure shown in FIG. 9 are used for the phase modulation waveguides 62a and 62b. .
  • the phase modulation waveguides 62a and 62b are connected to optical multiplexers / demultiplexers 65a and 65b at two locations, respectively.
  • the optical multiplexer / demultiplexer 65 a is further connected to the input waveguide 61, and the other optical multiplexer / demultiplexer 65 b is further connected to the output waveguide 63. Input light is input to the input waveguide 61, and output light is output from the output waveguide 63 force.
  • the Mach-Zehnder interferometer configured as described above enables light intensity modulation.
  • the input light that has entered even one force of the input waveguide 61 is divided into two phase modulation waveguides 62a and 62b by the optical multiplexer / demultiplexer 65a.
  • Each phase modulation waveguide 62a, 6 After performing phase modulation in 2b, it is again synthesized by the optical multiplexer / demultiplexer 65b.
  • the phase of the optical signal in the waveguide is modulated by changing the refractive index of the phase modulation waveguides 62a and 62b by the electric signal that also receives the coplanar waveguide force.
  • the signal lights that have undergone phase modulation in the phase modulation waveguides 62a and 62b are interfered and synthesized by the optical multiplexer / demultiplexer 65b, and output as one output intensity-modulated output light in the output waveguide 63.
  • a structure of a coplanar waveguide 64 is adopted for an electrode to which a high-frequency electric field as a modulation signal is applied.
  • phase modulation waveguides 62a and 62b described above use the n-in structure light modulation waveguide having the P-type semiconductor region characteristic of the present invention described in the fourth embodiment.
  • the semiconductor phase modulation waveguides 62a and 62b according to the present embodiment holes are not accumulated or accumulated in the semi-insulating clad layer, which is a noria layer, by providing a P-type semiconductor region in a part of the optical waveguide. It is reduced. Therefore, the parasitic phototransistor effect does not occur or can be suppressed, and it is possible to suppress the generation of leakage current and the voltage drop across the optical waveguide core layer. As a result, it is possible to improve the problem that the modulation characteristics fluctuate depending on the wavelength and intensity of light input to the optical modulator, and to realize a stable operation of the modulator.

Abstract

There is provided a semiconductor light modulator capable of performing stable operation and having an excellent field resistance while exhibiting the characteristic of n-i-n structure semiconductor light modulator. The semiconductor light modulator includes a waveguide structure having an n-type InP clad layer (11), a semiconductor core layer (13) having the electro-optical effect, a p-InAlAs layer (15), and an n-type InP clad layer (16) which are successively overlaid. The electron affinity of the p-InAlAs layer (15) is smaller than the electron affinity of the n-type InP clad layer (16). In the waveguide structure having such a configuration, it is possible to arrange a non-dope InP clad layer (12) between the n-type InP clad layer (11) and the semiconductor core layer (13) and to arrange a non-dope InP clad layer (14) between the semiconductor core layer (13) and the p-InAlAs layer (15).

Description

明 細 書  Specification
半導体光変調器  Semiconductor optical modulator
技術分野  Technical field
[0001] 本発明は、半導体光変調器に関し、より詳細には、光通信システムや光情報処理 システムの分野に用いられる半導体光変調器に関するものである。  The present invention relates to a semiconductor optical modulator, and more particularly to a semiconductor optical modulator used in the fields of optical communication systems and optical information processing systems.
背景技術  Background art
[0002] 近年の高度情報化から、インターネット等のネットワークを伝送する情報の大容量 化が望まれており、大容量の情報を高速で伝送可能な通信システムとして、光通信 システムや光情報処理システムが注目されて 、る。  [0002] Due to the recent advancement of advanced information, it is desired to increase the capacity of information transmitted over networks such as the Internet. Optical communication systems and optical information processing systems have been proposed as communication systems capable of transmitting large amounts of information at high speed. Is attracting attention.
[0003] 近年の光通信システムや光情報処理システムは、上記要望に答えるべくますます 大容量ィ匕が進んで 、る。このような光通信システムや光情報処理システムにお 、て 高速で伝送距離を長くするためには、波形劣化の原因であるファイバの分散の影響 を受けに《するため、波長チヤ一ビングの少ない光信号を用いる必要がある。その ため、現在では、光信号の発生には、 DC動作の光源と外部変調器を組み合わせた 形態が主流を占めている。  [0003] In recent optical communication systems and optical information processing systems, the large-capacity storage is progressing to meet the above demand. In such an optical communication system and an optical information processing system, in order to increase the transmission distance at high speed, it is affected by the dispersion of the fiber that causes the waveform deterioration, so that there is little wavelength checking. It is necessary to use an optical signal. Therefore, at present, the mainstream of optical signal generation is a combination of a DC-operated light source and an external modulator.
[0004] ところで、導波路型光制御デバイスは、高速光通信システム、光情報処理システム のキーエレメントのひとつである。導波路型光制御デバイスの中でも、光変調器は音 声や画像などの電気信号を光の強弱に変換するために必要不可欠のデバイスであ る。光変調器は、大別して、 LiNbO (LN)等の誘電体を用いたものと、 InPや GaAs  [0004] By the way, the waveguide type light control device is one of the key elements of a high-speed optical communication system and an optical information processing system. Among waveguide-type light control devices, an optical modulator is an indispensable device for converting electrical signals such as sound and images into light intensity. Optical modulators can be broadly divided into those using dielectrics such as LiNbO (LN), InP and GaAs.
3  Three
の半導体を用いたものがある。  There are those using semiconductors.
[0005] 外部変調器 (光変調器)の代表的なものとしては、 LiNbO (LN)等の誘電体を用  [0005] As a typical external modulator (optical modulator), a dielectric such as LiNbO (LN) is used.
3  Three
いた LN変調器力 現在、広く用いられている。これは、直流、または光周波数に比 ベて十分低い周波数の電界を印加することによって媒質の屈折率が変化する電気 光学効果を用いて動作するものである。  LN modulator power that is widely used now. This operates using an electro-optic effect in which the refractive index of the medium is changed by applying an electric field having a frequency sufficiently lower than the direct current or optical frequency.
[0006] このような電気光学効果を用いた光変調器は、電気光学効果を有する誘電体を屈 折率変化させることにより光の位相を変調する位相変調器や、この位相変調器とマツ ハツヱンダ干渉系を組み合わせた光強度変調器がある。マツハツヱンダ型光変調器 は、原理的に波長チヤ一ビングを零にでき、超高速'長距離伝送に適した変調器で ある。 [0006] An optical modulator using such an electro-optic effect includes a phase modulator that modulates the phase of light by changing the refractive index of a dielectric having the electro-optic effect, and the phase modulator and Matsuhsanda. There is a light intensity modulator combined with an interference system. Matsuhatsu optical modulator Is a modulator suitable for ultra-high-speed long-distance transmission, which can theoretically reduce wavelength checking to zero.
[0007] し力しながら、従来の LN変調器は素子長が比較的長いため、光送信器モジュール が大きくなつてしまい、また、駆動電圧も 3〜5V程度の高い電圧が必要である。さら に、 DCドリフト(直流電圧ドリフト)や温度ドリフトによって駆動条件が変化してしまうた め、安定動作には、別途制御回路が必要であった。すなわち、上記駆動条件の変化 のため、駆動条件の制御機構が必要となる課題があった。  However, since the conventional LN modulator has a relatively long element length, the optical transmitter module becomes large, and a high driving voltage of about 3 to 5 V is required. In addition, since the drive conditions change due to DC drift (DC voltage drift) and temperature drift, a separate control circuit was required for stable operation. That is, there is a problem that a drive condition control mechanism is required due to the change of the drive condition.
[0008] 一方、半導体を用いた光変調器は、次の 2つが代表的なものである。一つは、バル ク半導体のフランツケルディッシュ効果 (Franz-Keldysh効果)や多重量子井戸構造 における量子閉じ込めシュタルク効果(Quantum Confined Stark Effect:QCSE)のよ うに、電界を印加することにより吸収端が長波長側へシフトする効果を利用した電界 吸収型光変調器 (EA変調器)である。もう一つは、電界を印加することにより屈折率 が変化する電気光学効果 (ポッケルス効果)を利用した電気光学変調器 (EO変調器 )である。  [0008] On the other hand, the following two optical modulators using semiconductors are typical. One is the long absorption edge by applying an electric field, such as the Franz-Keldysh effect in bulk semiconductors and the quantum confined stark effect (QCSE) in multiple quantum well structures. This is an electroabsorption optical modulator (EA modulator) that uses the effect of shifting toward the wavelength side. The other is an electro-optic modulator (EO modulator) that uses an electro-optic effect (Pockels effect) in which the refractive index changes when an electric field is applied.
[0009] 電界吸収型光変調器 (EA変調器)は、小型で消費電力が小さぐ LiNbO変調器  [0009] An electroabsorption optical modulator (EA modulator) is a small LiNbO modulator that consumes less power
3 にみられるような直流電圧によるドリフトも生じないことから有望視されている。しかし、 電界吸収型光変調器 (EA変調器)では変調時に波長チヤ一ビングが生じ、チヤーピ ングが原因で、光ファイバ伝送後に波形劣化が生じることが問題となっている。すな わち、波長チヤ一ビングにより、変調後の光信号スペクトルは変調前に比べて広がる 。このスペクトルが広がった光信号を光ファイバで伝送すると、光ファイバ媒質の分散 の効果による波形劣化が起こり、さらに伝送特性に好ましくない影響を及ぼす。この 波形劣化の現象は、ビットレートが高いほど、また、伝送距離が長いほど顕著となる。  This is considered promising because there is no drift due to DC voltage as seen in Fig. 3. However, electroabsorption optical modulators (EA modulators) have a problem in that wavelength chasing occurs during modulation, and waveform degradation occurs after optical fiber transmission due to the chirping. In other words, the optical signal spectrum after modulation is broadened compared to that before modulation by wavelength checking. When an optical signal having a broad spectrum is transmitted through an optical fiber, waveform degradation occurs due to the dispersion effect of the optical fiber medium, which further adversely affects transmission characteristics. This phenomenon of waveform deterioration becomes more prominent as the bit rate is higher and the transmission distance is longer.
[0010] 一方、電気光学変調器 (EO変調器)には、屈折率を変化させることにより光の位相 を変調させる位相変調器と、位相変調器とを組み合わせてマツハツヱンダ干渉計を 構成し光の強度変調を行うマツハツヱンダ変調器が実用化されて 、る。現在の光通 信は、光強度の強 ·弱によって信号を送るため、強度変調を行うマッハツ ンダ変調 器が主に用いられる。このマツハツヱンダ変調器は、原理的に波長チヤ一ビングを零 にすることができ、超高速'長距離通信用変調器として期待が大きい。半導体のマツ ハツエンダ変調器の例として、非特許文献 1には、 p— i-n構造を有した集中定数型 の変調器が開示されている。非特許文献 1に記載の光変調器では、 p— i— n構造を 有しているので、リーク電流が小さぐ効率良くコア層に電界を印加することが可能で ある。 [0010] On the other hand, in an electro-optic modulator (EO modulator), a phase modulator that modulates the phase of light by changing the refractive index and a phase modulator are combined to form a Matsuhsunder interferometer. Matsuhsunder modulators for intensity modulation have been put into practical use. The current optical communication uses a Mach-Zehnder modulator that modulates the intensity because it sends the signal according to the intensity of the light. This Matsuhsunder modulator can theoretically reduce wavelength checking to zero, and is expected to be a very high-speed long-distance communication modulator. Semiconductor pine As an example of a Hazenda modulator, Non-Patent Document 1 discloses a lumped-constant type modulator having a pin structure. Since the optical modulator described in Non-Patent Document 1 has a pin structure, it is possible to efficiently apply an electric field to the core layer with a small leakage current.
[0011] また、非特許文献 2では、ショットキー電極を用いた変調器が開示されている。非特 許文献 2に記載の変調器では、電極構造として進行波電極構造を用いることで広帯 域ィ匕を実現している。また、特許文献 1には、これらより更に低電圧化、小型化、高速 化を目指した n—i— n構造半導体マッハツエンダ変調器も検討されている。  [0011] Further, Non-Patent Document 2 discloses a modulator using a Schottky electrode. In the modulator described in Non-Patent Document 2, a wideband band is realized by using a traveling wave electrode structure as an electrode structure. Patent Document 1 also studies an n-i-n structure semiconductor Mach-Zehnder modulator aiming at lower voltage, smaller size, and higher speed.
[0012] 特許文献 1:国際公開第 2004Z081638号パンフレット  [0012] Patent Document 1: International Publication No. 2004Z081638 Pamphlet
非特許文献 1 : C.Rolland et al.,"10 Gbit/s, 1.56 μ m multiquantum well InP/InGaAsP Mach-Zehnder optical modulator," Electron, Lett., vol.29, no.5, pp.471- 472, 1993 特許文献 2 : R.Spickerman et al., "GaAs/AlGaAs electro-optic modulator with ban dwidth > 40GHz," Electron, Lett., vol.31, no.ll, pp.915- 916, 1995  Non-Patent Document 1: C. Rolland et al., “10 Gbit / s, 1.56 μm multiquantum well InP / InGaAsP Mach-Zehnder optical modulator,” Electron, Lett., Vol.29, no.5, pp.471- 472, 1993 Patent Document 2: R. Spickerman et al., "GaAs / AlGaAs electro-optic modulator with ban dwidth> 40GHz," Electron, Lett., Vol.31, no.ll, pp.915-916, 1995
発明の開示  Disclosure of the invention
[0013] し力しながら、非特許文献 1に記載の光変調器では、 pクラッド層の抵抗が高いこと により電気信号の伝搬ロスが大きぐ高速動作が難しい上、 pクラッド層の光吸収も大 きいため、低動作電圧化のため素子長を長くすることが困難であった。また、非特許 文献 2に記載の変調器にぉ 、ては、動作電圧が高!、と 、う問題があった。  [0013] However, in the optical modulator described in Non-Patent Document 1, the resistance of the p-clad layer is high, so that the propagation loss of an electric signal is large and high-speed operation is difficult, and light absorption of the p-clad layer is also difficult. Due to the large size, it has been difficult to increase the element length in order to reduce the operating voltage. Further, the modulator described in Non-Patent Document 2 has a problem that the operating voltage is high.
[0014] このような問題力も最近では、上述の特許文献 1に開示された、 n— i— n構造を有 する変調器が提案されている。特許文献 1に記載の変調器では、 n型クラッド層、コア 層、 n型クラッド層を順次積層することによって n—i— n構造を形成しており、 n— i— n 構造を形成する上側の n型クラッド層には電極が設けられて 、る。  [0014] Recently, a modulator having an n-i-n structure disclosed in Patent Document 1 described above has also been proposed. In the modulator described in Patent Document 1, an n−i−n structure is formed by sequentially stacking an n-type cladding layer, a core layer, and an n-type cladding layer, and an upper side that forms the n−i−n structure. The n-type cladding layer is provided with electrodes.
[0015] 図 11は、従来の、 n—i— n構造の光導波路を持つ光変調器の位相変調導波路の 断面図である。基板上に、 n型クラッド層 102と、光導波コア層 103と、半絶縁型クラッ ド層 104と、 n型クラッド層 105とが順次積層された層構造を持っている。 n型クラッド 層 105と n型クラッド層 102には、それぞれ、電極 108, 109が接続されている。  [0015] FIG. 11 is a cross-sectional view of a conventional phase modulation waveguide of an optical modulator having an optical waveguide having an nin structure. The substrate has a layer structure in which an n-type cladding layer 102, an optical waveguide core layer 103, a semi-insulating cladding layer 104, and an n-type cladding layer 105 are sequentially stacked. Electrodes 108 and 109 are connected to the n-type cladding layer 105 and the n-type cladding layer 102, respectively.
[0016] このような構成によって、 2つの n型クラッド層 102、 105間に設けられた光導波コア 層 103へ電圧を印加して動作させている。この構造では、非特許文献 1に係る p— i n構造と同様、効率よくコア層に電界印加が可能であり、また、クラッド層には n型を 用いているため、 p—i— n構造で問題であった pクラッド層による電気信号、及び、光 の伝搬ロスを低減でき、低動作電圧化が図れ、また、当時としては十分に安定な出 力を得ることができた。しかしながら、近年は、光通信システムの更なる発展に伴い、 光変調器の出力の更なる安定ィ匕が求められている。 With such a configuration, a voltage is applied to the optical waveguide core layer 103 provided between the two n-type cladding layers 102 and 105 to operate. In this structure, p-i according to Non-Patent Document 1 As with the n structure, an electric field can be efficiently applied to the core layer, and since the n-type cladding layer is used, the electrical signal from the p cladding layer, which was a problem with the pin structure, and In addition, the propagation loss of light can be reduced, the operating voltage can be lowered, and a sufficiently stable output was obtained at that time. However, in recent years, with the further development of the optical communication system, further stability of the output of the optical modulator has been demanded.
[0017] しかし、特許文献 1などの n— i— n構造の位相変調導波路を持つ光変調器におい ては、以下に述べるような問題点があった。  [0017] However, the optical modulator having the phase modulation waveguide having the n-in structure such as Patent Document 1 has the following problems.
[0018] 図 12は、 n-i-n構造の光導波路を持つ光変調器の導波路バンドダイヤグラムを 示す図である。 n-i-n構造の光導波路においては、少ないながらも光導波コア層 103において光吸収がある。したがって、図 12に示すように光吸収により発生したホ ール 106— 1は、ノリア層である半絶縁型クラッド層 104において、蓄積されたホー ル 106— 2となる。このホールが蓄積されると、バンドダイヤグラム上において、電子 に対する半絶縁型クラッド層 104のバリアが下がり、 n型クラッド層 105から n型クラッド 層 102へリーク電流が流れると 、う現象(寄生フォトトランジスタ効果)が発生する。す なわち、トランジスタ動作の場合で言えば、ベースが開放状態でベースのホール濃度 が上昇した場合に、ェミッタ Zベース接合が順バイアスされているのと同じ状態が発 生する。  FIG. 12 is a diagram showing a waveguide band diagram of an optical modulator having an optical waveguide having an n-i-n structure. In the optical waveguide having the n-i-n structure, there is a light absorption in the optical waveguide core layer 103 although it is small. Therefore, as shown in FIG. 12, the holes 106-1 generated by light absorption become accumulated holes 106-2 in the semi-insulating clad layer 104 that is a noria layer. When these holes accumulate, the barrier of the semi-insulating clad layer 104 against electrons falls on the band diagram, and a leak current flows from the n-type clad layer 105 to the n-type clad layer 102 (parasitic phototransistor). Effect). In other words, in the case of transistor operation, when the base is open and the hole concentration of the base is increased, the same situation occurs as when the emitter Z base junction is forward biased.
[0019] さらに、蓄積されたホール 106— 2により発生した上述の順バイアスの効果により、 光導波コア層 103にかかる電圧も、この順バイアス相当の電圧分だけ低下する。した がって、光変調器に入力される光の波長や光強度によって、変調特'性が変わってし まう問題が起こっていた。例えば、波長が変わると光変調器の駆動条件を変える必要 があるため、制御回路が必要となる。また、光強度が強くなると変調特性が変動劣化 するため、光入力レベルを制限する必要があった。この変調特性の変動と不安定さ を回避するために、変動が問題とならないような波長や光強度の範囲内で、光変調 器を使用しなくてはならないという制限が生じていた。結果的に、光変調器として利 用できる範囲は制限されて 、た。  Furthermore, due to the effect of the forward bias generated by the accumulated holes 106-2, the voltage applied to the optical waveguide core layer 103 is also reduced by a voltage corresponding to the forward bias. Therefore, there has been a problem that the modulation characteristics change depending on the wavelength and light intensity of light input to the optical modulator. For example, if the wavelength changes, it is necessary to change the driving conditions of the optical modulator, so a control circuit is required. Also, since the modulation characteristics fluctuate and deteriorate as the light intensity increases, it is necessary to limit the light input level. In order to avoid the fluctuation and instability of this modulation characteristic, there has been a restriction that an optical modulator must be used within a wavelength and light intensity range in which fluctuation does not become a problem. As a result, the range that can be used as an optical modulator has been limited.
[0020] 以上述べたように、ノリア層である半絶縁型クラッド層 104にホールが蓄積すること に起因する寄生フォトトランジスタ効果は、 n-i-n構造の位相変調導波路を持つ 光変調器の安定動作を妨げる問題となっていた。本発明が解決しょうとする課題の 1 つは、上に述べた半絶縁型クラッド層におけるホール蓄積と寄生フォトトランジスタ効 果を抑制し、これらに起因する変調特性の変動を抑制して、変調器の安定動作を実 現する構造を提供することにある。 [0020] As described above, the parasitic phototransistor effect caused by the accumulation of holes in the semi-insulating clad layer 104, which is a noria layer, has a phase modulation waveguide with a nin structure. This is a problem that hinders the stable operation of the optical modulator. One of the problems to be solved by the present invention is to suppress the hole accumulation and the parasitic phototransistor effect in the semi-insulating clad layer described above, and to suppress the fluctuation of the modulation characteristic caused by them, thereby controlling the modulator. It is to provide a structure that realizes the stable operation of the.
[0021] ところで、 n—i— n構造のコア層へ電界印加するためには、 n型クラッド層とコア層と の間に、電子の漏れ電流を抑制するための電子のポテンシャルバリアが必要である 力 特許文献 1に記載の変調器では、このポテンシャルバリアを形成するために Feド 一プの半絶縁層を上記電極が形成された n型クラッド層とコア層との間に設けて ヽる 。し力しながら、この構造では、変調強度に周波数分散を持ってしまい、現在求めら れて 、る出力の安定性への阻害要因に繋がって!/、た。  [0021] By the way, in order to apply an electric field to the core layer of the n-i-n structure, an electron potential barrier is required between the n-type cladding layer and the core layer to suppress electron leakage current. In the modulator described in Patent Document 1, in order to form this potential barrier, a Fe-doped semi-insulating layer is provided between the n-type cladding layer on which the electrode is formed and the core layer. . However, this structure has a frequency dispersion in the modulation intensity, which leads to an impediment to the stability of the output that is currently required!
[0022] 本発明が解決しょうとする別の課題は、 n—i— n構造半導体光変調器の特長を生 かしつつ、安定動作可能で、かつ、電界に対する耐圧特性の優れた半導体光変調 器を提供することにある。  [0022] Another problem to be solved by the present invention is to provide a semiconductor optical modulation that is capable of stable operation and has an excellent withstand voltage against electric field while taking advantage of the features of the nn-structure semiconductor optical modulator. Is to provide a vessel.
[0023] このような目的を達成するために、本発明の第 1の態様は、第 1の n型半導体クラッ ド層と、半導体コア層と、半導体クラッド層と、第 2の n型半導体クラッド層とを順次積 層して形成された導波路構造を備え、前記半導体クラッド層の電子親和力は、前記 第 2の n型半導体クラッド層の電子親和力よりも小さいことを特徴とする。  In order to achieve such an object, the first aspect of the present invention includes a first n-type semiconductor cladding layer, a semiconductor core layer, a semiconductor cladding layer, and a second n-type semiconductor cladding. And a waveguide structure formed by sequentially stacking layers, wherein the semiconductor clad layer has an electron affinity smaller than that of the second n-type semiconductor clad layer.
[0024] 上記第 1の態様において、前記半導体クラッド層と前記第 2の n型半導体クラッド層 とのへテロ接合はタイプ Π型であっても良い。  [0024] In the first aspect, the heterojunction between the semiconductor clad layer and the second n-type semiconductor clad layer may be of a type Π type.
[0025] 上記第 1の態様において、前記半導体クラッド層の正孔に対するポテンシャルエネ ルギ一は、前記半導体コア層の正孔に対するポテンシャルエネルギーに比べて小さ くても良い。  [0025] In the first aspect, the potential energy for holes in the semiconductor clad layer may be smaller than the potential energy for holes in the semiconductor core layer.
[0026] また、上記第 1の態様において、前記半導体クラッド層と前記第 2の n型半導体クラ ッド層との間に、前記半導体クラッド層に比べ、正孔に対するポテンシャルエネルギ 一が小さ 、第 3の n型半導体クラッド層が挿入されて 、ても良 、。  [0026] In the first aspect, the potential energy for holes is smaller between the semiconductor cladding layer and the second n-type semiconductor cladding layer than the semiconductor cladding layer. 3 n-type semiconductor cladding layers may be inserted.
[0027] また、上記第 1の態様において、前記第 1の n型半導体クラッド層と前記半導体コア 層との間に、ノンドープクラッド層が挿入されて 、ても良 、。  [0027] In the first aspect, a non-doped cladding layer may be inserted between the first n-type semiconductor cladding layer and the semiconductor core layer.
[0028] また、上記第 1の態様において、前記半導体コア層と前記半導体クラッド層との間 に、ノンドープクラッド層が挿入されていても良い。前記半導体クラッド層の正孔に対 するポテンシャルエネルギーは、前記半導体コア層と前記半導体クラッド層との間に 挿入されたノンドープクラッド層の正孔に対するポテンシャルエネルギーに比べて小 さくても良い。 [0028] In the first aspect, the semiconductor core layer and the semiconductor clad layer In addition, a non-doped cladding layer may be inserted. The potential energy for holes in the semiconductor cladding layer may be smaller than the potential energy for holes in the non-doped cladding layer inserted between the semiconductor core layer and the semiconductor cladding layer.
[0029] また、上記第 1の態様において、前記半導体クラッド層は InAlAsであっても良い。  [0029] In the first aspect, the semiconductor clad layer may be InAlAs.
[0030] また、上記第 1の態様において、前記半導体クラッド層は、 p型にドーピングされて いても良い。 [0030] In the first aspect, the semiconductor clad layer may be doped p-type.
[0031] また、上記第 1の態様において、前記導波路構造は、ハイメサ導波路構造またはリ ッジ導波路構造であっても良い。  [0031] In the first aspect, the waveguide structure may be a high-mesa waveguide structure or a ridge waveguide structure.
[0032] また、上記第 1の態様において、入力光を 2つに分岐して 2つの出力端力もそれぞ れ出力する分岐手段であって、前記 2つの出力端はそれぞれ、別個の前記導波路 構造の入力端に連結されて 、る分岐手段と、前記 2つの導波路構造にそれぞれ連 結され、該 2つの導波路構造力 出力された光を合波して出力する合波手段とをさら に備えても良い。  [0032] Further, in the first aspect, branching means for branching input light into two and outputting two output end forces, respectively, each of the two output ends being a separate waveguide. A branching means coupled to the input end of the structure and a multiplexing means coupled to the two waveguide structures respectively for combining and outputting the light output from the two waveguide structure forces. You may be prepared for.
[0033] また、上記第 1の態様において、前記第 1の n型半導体クラッド層上の領域であって 、前記半導体コア層が形成されていない領域上に形成された第 1の電極と、前記第 2 の半導体クラッド層上に形成された第 2の電極とをさらに備え、前記第 1の電極およ び第 2の電極は、進行波型電極構造であっても良い。  [0033] In the first aspect, the first electrode formed in a region on the first n-type semiconductor clad layer, in which the semiconductor core layer is not formed, And a second electrode formed on the second semiconductor clad layer, and the first electrode and the second electrode may have a traveling wave electrode structure.
[0034] 本発明の第 2の態様は、 n型 InPからなる第 1の n型半導体クラッド層と、ノンドープ の InPからなる第 1のノンドープクラッド層とノンドープの半導体コア層とノンドープの I nPからなる第 2のノンドープクラッド層とを順次積層して形成された半導体光導波層 と、 p型 InAlAsからなる半導体クラッド層と、 n型 InP力 なる第 2の n型半導体クラッド 層とを順次積層して形成された導波路構造を備えることを特徴とする。  [0034] The second aspect of the present invention includes a first n-type semiconductor clad layer made of n-type InP, a first non-doped clad layer made of non-doped InP, a non-doped semiconductor core layer, and a non-doped InP. A semiconductor optical waveguide layer formed by sequentially laminating a second non-doped clad layer, a semiconductor clad layer comprising p-type InAlAs, and a second n-type semiconductor clad layer having n-type InP force. It is characterized by comprising a waveguide structure formed in this way.
[0035] 本発明の第 3の態様は、 n型 InPからなる第 1の n型半導体クラッド層と、ノンドープ の InPからなる第 1のノンドープクラッド層とノンドープの半導体コア層とノンドープの I nPからなる第 2のノンドープクラッド層とを順次積層して形成された半導体光導波層 と、 p型 InAlAsからなる半導体クラッド層と、 n型 InP力 なる第 2の n型半導体クラッド 層と、 n型 InGaAsPまたは n型 InGaAlAsからなる第 3の n型半導体クラッド層を順次 積層して形成された導波路構造を備えることを特徴とする。 [0035] A third aspect of the present invention includes a first n-type semiconductor clad layer made of n-type InP, a first non-doped clad layer made of non-doped InP, a non-doped semiconductor core layer, and a non-doped InP. A semiconductor optical waveguide layer formed by sequentially laminating a second non-doped clad layer, a semiconductor clad layer made of p-type InAlAs, a second n-type semiconductor clad layer having n-type InP force, and an n-type InGaAsP Or a third n-type semiconductor cladding layer of n-type InGaAlAs A waveguide structure formed by stacking is provided.
[0036] 本発明の第 4の態様は、第 1の n型半導体クラッド層と、半導体コア層と、半絶縁型 の半導体クラッド層と、第 2の n型半導体クラッド層とを順次積層して形成された導波 路構造を備えた半導体光変調器であって、 P型の導電性を持つ領域である P型半導 体領域であって、前記導波路構造の光進行方向に一定長さ区間の、少なくとも前記 第 2の n型半導体クラッド層の一部またはすべてに形成された、少なくとも 1つの p型 半導体領域と、前記 P型半導体領域上に形成され、前記 P型半導体領域に電気的接 続された電極とを備えたことを特徴とする。  [0036] In a fourth aspect of the present invention, a first n-type semiconductor cladding layer, a semiconductor core layer, a semi-insulating semiconductor cladding layer, and a second n-type semiconductor cladding layer are sequentially stacked. A semiconductor optical modulator having a formed waveguide structure, which is a P-type semiconductor region that is a region having P-type conductivity, and has a certain length in the light traveling direction of the waveguide structure. At least one p-type semiconductor region formed on at least a part or all of the second n-type semiconductor cladding layer in the section, and formed on the P-type semiconductor region, and electrically connected to the P-type semiconductor region And a connected electrode.
[0037] 上記第 4の態様において、前記 p型半導体領域は、前記導波路構造の光進行方向 に一定長さ区間の、前記第 2の n型半導体クラッド層および前記第 2の n型半導体クラ ッド層に接する前記半導体クラッド層の一部に形成されて ヽても良 ヽ。  [0037] In the fourth aspect, the p-type semiconductor region includes the second n-type semiconductor clad layer and the second n-type semiconductor clad having a certain length section in the light traveling direction of the waveguide structure. It may be formed on a part of the semiconductor cladding layer in contact with the pad layer.
[0038] また、上記第 4の態様にぉ 、て、前記電極は、前記 p型半導体領域および前記第 2 の n型半導体クラッド層上に形成されており、前記 p型半導体領域および前記 n型半 導体クラッド層は、前記電極に共通に電気的接続されて ヽても良 ヽ。  [0038] Further, according to the fourth aspect, the electrode is formed on the p-type semiconductor region and the second n-type semiconductor clad layer, and the p-type semiconductor region and the n-type semiconductor layer are formed. The semiconductor clad layer may be electrically connected to the electrode in common.
[0039] また、上記第 4の態様にぉ 、て、前記導波路構造は、ハイメサ導波路構造またはリ ッジ導波路構造であっても良い。  [0039] Further, in the fourth aspect, the waveguide structure may be a high mesa waveguide structure or a ridge waveguide structure.
[0040] また、上記第 4の態様において、入力光を 2つに分岐して 2つの出力端力もそれぞ れ出力する分岐手段であって、前記 2つの出力端はそれぞれ、別個の前記導波路 構造の入力端に連結されて 、る分岐手段と、前記 2つの導波路構造にそれぞれ連 結され、該 2つの導波路構造力 出力された光を合波して出力する合波手段とをさら に備えても良い。  [0040] Further, in the fourth aspect, branching means for branching input light into two and outputting two output end forces, respectively, each of the two output ends being a separate waveguide. A branching means coupled to the input end of the structure and a multiplexing means coupled to the two waveguide structures respectively for combining and outputting the light output from the two waveguide structure forces. You may be prepared for.
[0041] また、上記第 4の態様において、前記第 1の n型半導体クラッド層上の領域であって 、前記半導体コア層が形成されていない領域上に形成された第 2の電極をさらに備 え、前記電極は、前記 p型半導体領域および前記第 2の n型半導体クラッド層上に形 成されており、前記電極および第 2の電極は、進行波型電極構造であっても良い。  [0041] Further, in the fourth aspect, the semiconductor device further includes a second electrode formed on a region on the first n-type semiconductor clad layer where the semiconductor core layer is not formed. In addition, the electrode may be formed on the p-type semiconductor region and the second n-type semiconductor clad layer, and the electrode and the second electrode may have a traveling wave electrode structure.
[0042] このように、本発明の一実施形態に係る半導体光変調器では、低損失で、電界に 対する耐圧特性に優れ、低電圧駆動で、安定動作する半導体光変調器を実現でき る。すなわち、本発明の一実施形態においては、半導体クラッド層の電子親和力が 第 2の n型半導体クラッド層の電子親和力よりも小さく設定されているため、半導体ク ラッド層が第 2の n型半導体クラッド層の電子に対してポテンシャルバリアとなるため、 電界に対する耐圧特性に優れ、強度変調における周波数分散が低減、ないしは生 じない。 As described above, the semiconductor optical modulator according to the embodiment of the present invention can realize a semiconductor optical modulator that has low loss, excellent withstand voltage characteristics against an electric field, and operates stably at low voltage. That is, in one embodiment of the present invention, the electron affinity of the semiconductor cladding layer is Since it is set to be smaller than the electron affinity of the second n-type semiconductor clad layer, the semiconductor clad layer becomes a potential barrier against the electrons of the second n-type semiconductor clad layer. The frequency dispersion in intensity modulation is reduced or not generated.
[0043] また、本発明の一実施形態によれば、半導体クラッド層(例えば、半絶縁型クラッド 層)に接する第 2の n型半導体クラッド層の一部または第 2の n型半導体クラッド層と、 半導体クラッド層の一部を p型の導電性を持つ p型半導体領域とすることで、光吸収 により発生したホールは p型半導体領域を介して、電極から引き抜かれる。これにより 、 ノリア層である半導体クラッド層にホールが蓄積することが防止な 、しは軽減される 。このため、リーク電流の発生や、半導体コア層に力かる電圧の低下を抑えられ、光 吸収による変調特性の変動を抑制し、変調器の安定動作を実現することが可能とな る。  [0043] According to one embodiment of the present invention, a part of the second n-type semiconductor clad layer in contact with the semiconductor clad layer (for example, a semi-insulating clad layer) or the second n-type semiconductor clad layer By forming a part of the semiconductor clad layer as a p-type semiconductor region having p-type conductivity, holes generated by light absorption are extracted from the electrode through the p-type semiconductor region. This prevents or reduces the accumulation of holes in the semiconductor cladding layer, which is a noria layer. For this reason, it is possible to suppress the occurrence of leakage current and the decrease in voltage applied to the semiconductor core layer, suppress the fluctuation of modulation characteristics due to light absorption, and realize stable operation of the modulator.
[0044] 本発明の一実施形態による半導体の電気光学変調器 (EO変調器)では、バリア層 である半導体クラッド層(例えば、半絶縁型クラッド層)にホールが蓄積しない、ないし はホールの蓄積を軽減できるため、リーク電流の発生や、コア層にかかる電圧の低下 を抑えることが可能となる。  [0044] In a semiconductor electro-optic modulator (EO modulator) according to an embodiment of the present invention, holes are not accumulated or accumulated in a semiconductor cladding layer (eg, semi-insulating cladding layer) that is a barrier layer. Therefore, it is possible to suppress the occurrence of leakage current and the decrease in voltage applied to the core layer.
[0045] このため、光波長や光強度によって光変調器の変調特性が変動してしまう従来の 問題点を改善し、変調器の安定動作を実現することが可能となる。  [0045] For this reason, it is possible to improve the conventional problem that the modulation characteristics of the optical modulator fluctuate depending on the light wavelength and light intensity, and to realize a stable operation of the modulator.
図面の簡単な説明  Brief Description of Drawings
[0046] [図 1]図 1は、本発明の一実施形態に係るタイプ II型へテロ接合のバンド図である。  [0046] FIG. 1 is a band diagram of a type II heterojunction according to one embodiment of the present invention.
[図 2]図 2は、本発明の一実施形態に係る導波路構造の断面図を示す図である。  FIG. 2 is a diagram showing a cross-sectional view of a waveguide structure according to an embodiment of the present invention.
[図 3]図 3は、本発明の一実施形態に係る導波路のバンドダイヤグラムを示す図であ る。  FIG. 3 is a diagram showing a band diagram of a waveguide according to an embodiment of the present invention.
[図 4]図 4は、本発明の一実施形態に係る、導波路構造に逆ノ ィァスを印加したとき の電圧 電流特性を示す図である。  FIG. 4 is a diagram showing a voltage-current characteristic when an inverse noise is applied to the waveguide structure according to one embodiment of the present invention.
[図 5]図 5は、本発明の一実施形態に係る、マッハツエンダ変調器の位相変調領域の 長さが 3mmのときの、 EZE高周波応答特性を示す図である。  FIG. 5 is a diagram showing an EZE high frequency response characteristic when the length of the phase modulation region of the Mach-Zehnder modulator is 3 mm according to one embodiment of the present invention.
[図 6]図 6は、本発明の一実施形態に係る、マッハツエンダ変調器をプッシュプル動 作させた 40GbitZsのアイダイヤグラムを示す図である。 [Fig. 6] Fig. 6 shows a push-pull operation of a Mach-Zehnder modulator according to an embodiment of the present invention. It is a figure which shows the eye diagram of the made 40GbitZs.
[図 7]図 7は、本発明の一実施形態に係る導波路のバンドダイヤグラムを示す図であ る。  FIG. 7 is a diagram showing a band diagram of a waveguide according to an embodiment of the present invention.
[図 8]図 8は、本発明の一実施形態に係るマツハツヱンダ型光変調器の概略図である  [Fig. 8] Fig. 8 is a schematic diagram of a Matsuhonda optical modulator according to an embodiment of the present invention.
[図 9]図 9は、本発明の一実施形態に係る光変調器の導波路構造を示す図である。 FIG. 9 is a diagram showing a waveguide structure of an optical modulator according to an embodiment of the present invention.
[図 10]図 10は、本発明の一実施形態に係るマツハツヱンダ変調器の構造図である。  [Fig. 10] Fig. 10 is a structural diagram of a Matsuhazu modulator according to an embodiment of the present invention.
[図 11]図 11は、従来の n—i— n構造の光変調器の導波路の断面図である。  [FIG. 11] FIG. 11 is a cross-sectional view of a waveguide of a conventional optical modulator having an nn structure.
[図 12]図 12は、従来の n—i— n構造の光変調器の導波層バンドダイヤグラムである。 発明を実施するための最良の形態  [FIG. 12] FIG. 12 is a waveguide layer band diagram of a conventional optical modulator having an nn structure. BEST MODE FOR CARRYING OUT THE INVENTION
[0047] 以下、図面を参照して本発明の実施形態を詳細に説明する。なお、以下で説明す る図面で、同一機能を有するものは同一符号を付け、その繰り返しの説明は省略す る。 Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. In the drawings described below, components having the same function are denoted by the same reference numerals, and repeated description thereof is omitted.
本発明の一実施形態は、第 1の n型半導体クラッド層と、第 1の n型半導体クラッド層 上に形成された、電気光学効果を有する半導体光導波層と、半導体光導波層上に 形成された半導体クラッド層と、半導体クラッド層上に形成された第 2の n型半導体ク ラッド層との積層体力もなる n—i— n構造を有する半導体光変調器である。上記半導 体クラッド層は、第 2の n型半導体クラッド層力 の電子に対するノリア層(ポテンシャ ルバリア層)である。  One embodiment of the present invention includes a first n-type semiconductor cladding layer, a semiconductor optical waveguide layer having an electro-optic effect formed on the first n-type semiconductor cladding layer, and formed on the semiconductor optical waveguide layer This is a semiconductor optical modulator having an n−n−n structure that also has a stacking force of the formed semiconductor clad layer and a second n-type semiconductor clad layer formed on the semiconductor clad layer. The semiconductor clad layer is a noria layer (potential barrier layer) for electrons having the second n-type semiconductor clad layer force.
[0048] 本発明の一実施形態では、上記バリア層を良好に機能させることが重要である。す なわち、半導体導波層での光吸収にて発生したホールの、バリア層への影響を軽減 することが重要なのである。  [0048] In one embodiment of the present invention, it is important that the barrier layer functions well. In other words, it is important to reduce the effect of holes generated by light absorption in the semiconductor waveguide layer on the barrier layer.
[0049] 上記発生したホールは、ノリア層に蓄積される可能性があり、ノリア層に蓄積される と、電子に対するポテンシャルバリアを押し下げることがある。よって、半導体導波層 に入射される光の強度に依存して変調特性が変わったり、強度変調における周波数 分散が生じたり、ポテンシャルバリアの低下により第 1の n型半導体層力 第 2の n型 半導体層に向かうリーク電流の発生などが起こってしまうことがある。そこで、半導体 導波層にて発生したホール力 Sバリア層に蓄積することによってバリア層に与える影響 を軽減することにより、変調特性の変動を抑え、安定動作が可能な半導体光変調器 を提供することができる。 [0049] The generated holes may be accumulated in the noria layer, and when accumulated in the noria layer, the potential barrier against electrons may be pushed down. Therefore, depending on the intensity of light incident on the semiconductor waveguide layer, the modulation characteristics change, frequency dispersion occurs in the intensity modulation, and the first n-type semiconductor layer force increases due to the potential barrier degradation. In some cases, a leakage current toward the semiconductor layer may occur. Therefore, the Hall force generated in the semiconductor waveguide layer. The effect on the barrier layer by accumulating in the S barrier layer. By reducing the above, it is possible to provide a semiconductor optical modulator capable of suppressing a variation in modulation characteristics and capable of stable operation.
[0050] 上記ホールのノリア層への影響を軽減するために、第 1〜3の実施形態では、ホー ルカ Sバリア層に蓄積しても、電子に対して良好なノリアとして機能するように、バリア 層としての半導体クラッド層と、第 2の n型半導体クラッド層との間に、電子親和力に 起因した伝導帯バンド不連続が生じるようにしている。また、第 4および 5の実施形態 では、上記ホールのノリア層への影響を軽減するために、光吸収にて発生したホー ルがバリア層に流れ込んできても、ポテンシャルバリアを維持、またはポテンシャルバ リアの低下を低減するようにして 、る。  [0050] In order to reduce the influence of the hole on the noria layer, in the first to third embodiments, even if it accumulates in the hole S barrier layer, it functions as a good noria for electrons. A conduction band discontinuity due to electron affinity occurs between the semiconductor clad layer as the barrier layer and the second n-type semiconductor clad layer. In the fourth and fifth embodiments, in order to reduce the influence of the hole on the noria layer, even if a hole generated by light absorption flows into the barrier layer, the potential barrier is maintained or the potential barrier is maintained. Try to reduce the rear drop.
[0051] (第 1の実施形態)  [0051] (First embodiment)
本実施形態に係る半導体光変調器では、第 1の n型半導体クラッド層、電気光学効 果を有する半導体光導波層、半導体クラッド層、第 2の n型半導体クラッド層が順次 積層されている。このような積層体は n—i— n構造であり、本実施形態では、半導体 クラッド層と第 2の n型半導体クラッド層とはへテロ接合となり、かつ半導体クラッド層の 電子親和力は、第 2の n型半導体クラッド層の電子親和力よりも小さく設計される。こ のようにすることで、半導体クラッド層が第 2の n型半導体クラッド層の電子に対してポ テンシャルバリアとなる。これにより、 n—i—n構造の半導体光変調器の特長(光の伝 播ロスの低減、低作動電圧化、小型化、高速ィ匕等)を損なうことなぐより安定で電界 に対する耐圧特性の優れた光変調器が実現できる。  In the semiconductor optical modulator according to the present embodiment, a first n-type semiconductor cladding layer, a semiconductor optical waveguide layer having an electro-optic effect, a semiconductor cladding layer, and a second n-type semiconductor cladding layer are sequentially stacked. Such a stacked body has an n-i-n structure. In this embodiment, the semiconductor cladding layer and the second n-type semiconductor cladding layer are heterojunction, and the electron affinity of the semiconductor cladding layer is Designed to be smaller than the electron affinity of the n-type semiconductor cladding layer. By doing so, the semiconductor cladding layer becomes a potential barrier against the electrons of the second n-type semiconductor cladding layer. As a result, the characteristics of semiconductor optical modulators with an n-i-n structure (reduction of light propagation loss, lower operating voltage, downsizing, high speed, etc.) are more stable and withstand voltage characteristics against electric fields. An excellent optical modulator can be realized.
[0052] さて、タイプ II型へテロ接合にっ 、て説明する。図 1は、このタイプ II型へテロ接合 のバンド図を示したものである。 q x (q :素電子)は、電子親和力と呼ばれ、伝導体の 底力も真空中に電子を取り出すために必要なエネルギーである。また、 Egとは、バン ドギャップと呼ばれ、伝導体と荷電子帯とのエネルギー差である。さて、タイプ II型へ テロ接合とは、半導体 2の電子親和力が半導体 1のそれよりも小さぐかつ、半導体 2 の電子親和力とエネルギーギャップの和(q % +Eg)と力 半導体 1のそれよりも小さ い場合をいう。ここで、半導体 1側から半導体 2側へ流れようとする伝導体の電子につ いて考えてみると、伝導体バンド不連続(A Ec = Ec -Ec )は、ポテンシャル障壁と  [0052] Now, a type II heterojunction will be described. Figure 1 shows the band diagram for this type II heterojunction. q x (q: elementary electron) is called the electron affinity, and the bottom force of the conductor is the energy required to extract electrons into the vacuum. Eg is called the band gap and is the energy difference between the conductor and the valence band. Now, type II heterojunction means that the electron affinity of semiconductor 2 is smaller than that of semiconductor 1, and the sum of electron affinity and energy gap of semiconductor 2 (q% + Eg) and the force of semiconductor 1 Is also a small case. Here, considering the electrons in the conductor that flows from the semiconductor 1 side to the semiconductor 2 side, the conductor band discontinuity (A Ec = Ec -Ec)
2 1  twenty one
なり、この障壁を乗り越えられるエネルギーを持つ電子しか半導体 2へは流れることは できない。言い換えれば、半導体 1側から半導体 2側へ流れる電子にとって、この接 合は高抵抗であり、伝導体バンド不連続を大きく取れば取るほど、その効果は大きく なり、耐圧特性の優れた特性を示すことになる。 And only electrons with energy that can overcome this barrier will flow to semiconductor 2. Can not. In other words, for the electrons flowing from the semiconductor 1 side to the semiconductor 2 side, this bond is high resistance, and the greater the conductor band discontinuity, the greater the effect, and the better the breakdown voltage characteristic. It will be.
[0053] 図 2は、本実施形態に係る半導体光変調器の導波路構造の断面図で、図 3は、図 2に示された導波路構造のバンドダイヤグラムを示した図である。  FIG. 2 is a cross-sectional view of the waveguide structure of the semiconductor optical modulator according to the present embodiment, and FIG. 3 is a view showing a band diagram of the waveguide structure shown in FIG.
本実施形態に係る半導体光変調器では、半絶縁性の(SI)—InP基板 10上に、 n InPクラッド層(第 1の n型半導体クラッド層) 11、半導体光導波層 19、 p-InAlAs 層(ポテンシャルバリア層としての半導体クラッド層) 15、 n— InPクラッド層(第 2の n型 半導体クラッド層) 16とが順次積層されている。半導体光導波層 19では、ノンドープ の InPクラッド層 12、電気光学効果を有する、ノンドープの半導体コア層 13、ノンドー プの InPクラッド層 14が積層されており、 InPクラッド層 14の上部に p— InAlAs層 15 力 S積層されること〖こなる。  In the semiconductor optical modulator according to the present embodiment, an n InP cladding layer (first n-type semiconductor cladding layer) 11, a semiconductor optical waveguide layer 19, p-InAlAs are formed on a semi-insulating (SI) -InP substrate 10. A layer (semiconductor cladding layer as a potential barrier layer) 15 and an n-InP cladding layer (second n-type semiconductor cladding layer) 16 are sequentially stacked. In the semiconductor optical waveguide layer 19, a non-doped InP clad layer 12, a non-doped semiconductor core layer 13 having an electro-optic effect, and a non-dope InP clad layer 14 are laminated, and p-InAlAs is formed on the InP clad layer 14. Layer 15 force S is to be stacked.
なお、本明細書では、「n—半導体」および「n型半導体」とは、 n型ドーピングされた 半導体のことを指す。もちろん、 p型ドーピングについても同様に表記する。  In this specification, “n-semiconductor” and “n-type semiconductor” refer to an n-type doped semiconductor. Of course, the same applies to p-type doping.
[0054] 半導体コア層 13には、たとえば、多重量子井戸層と、その上下(半導体コア層 13の InPクラッド層 12側および InPクラッド層 14側)にバンドギャップが多重量子井戸層よ りも大きぐかつ、 InPクラッド層 12および 14よりも小さい値を持つ、光閉じ込め層を 有する構造を用いることができる。また、多重量子井戸層のバンドギャップ波長は、使 用する光波長において、電気光学効果が有効に作用し、かつ、光吸収が問題となら ないように設定されている。  [0054] The semiconductor core layer 13 includes, for example, a multiple quantum well layer and a band gap larger than that of the multiple quantum well layer above and below (on the InP clad layer 12 side and InP clad layer 14 side of the semiconductor core layer 13). In addition, a structure having an optical confinement layer having a value smaller than that of the InP cladding layers 12 and 14 can be used. In addition, the band gap wavelength of the multiple quantum well layer is set so that the electro-optic effect is effective and the light absorption is not a problem at the light wavelength used.
[0055] また、本実施形態に係る導波路構造は、図 2に示すようにハイメサ導波路構造を有 し、半導体光導波層 19へ電圧印加を行うため、 n— InPクラッド層 11、及び、 n— InP クラッド層 16の上部に、それぞれ電極 17, 18が設けられている。  Further, the waveguide structure according to the present embodiment has a high mesa waveguide structure as shown in FIG. 2 and applies a voltage to the semiconductor optical waveguide layer 19, so that the n-InP cladding layer 11 and Electrodes 17 and 18 are provided on the upper part of the n—InP clad layer 16, respectively.
なお、本実施形態では、導波路構造として、ハイメサ導波路構造を用いているが、 これに限定されず、リッジ導波路構造を用いても良い。  In the present embodiment, a high mesa waveguide structure is used as the waveguide structure, but the present invention is not limited to this, and a ridge waveguide structure may be used.
[0056] さて、図 3に示す、本実施形態に係る半導体光変調器への電圧印加時のバンドダ ィャグラムから理解されるように、 p— InAlAs層 15は、 n— InPクラッド層 16よりも電子 親和力が小さいため、両者のへテロ界面では、伝導帯バンド不連続が生ずる。その ため、 n—InPクラッド層 16の電子に対するポテンシャルバリアが生じる。また、 p— In AlAs層 15が p型であり、 n— InPクラッド層 16が n型であるため、それらのヘテロ接合 に起因するポテンシャルノ《リアに加え、 pn接合によるポテンシャルバリアも生ずる。よ つて、 n— InPクラッド層 16から注入される電子に対しては、これら二つの要素がトー タルとしてポテンシャルバリアとして機能することになる。 Now, as can be understood from the band diagram when a voltage is applied to the semiconductor optical modulator according to the present embodiment shown in FIG. 3, the p-InAlAs layer 15 has more electrons than the n-InP cladding layer 16. Since the affinity is small, conduction band discontinuity occurs at the heterointerface between the two. That Therefore, a potential barrier against electrons in the n-InP cladding layer 16 is generated. In addition, since the p-In AlAs layer 15 is p-type and the n-InP clad layer 16 is n-type, a potential barrier due to a pn junction is generated in addition to a potential node caused by the heterojunction. Therefore, for the electrons injected from the n-InP clad layer 16, these two elements function as a total potential barrier.
[0057] 本実施形態では、図 3に示される通り、 p— InAlAs層 15と n— InPクラッド層 16との ヘテロ接合は、電子とホールとが空間的に異なる場所に閉じ込められるタイプ Π型と なっている。また、半導体光導波層の光吸収にてわずかに発生したホールがノンドー プ InPクラッド層 14側力も n— InPクラッド層 16へ流れ込みやす 、構造がよく、本実施 形態では、ノンドープ InPクラッド層 14と p—InAlAs層 15との接合において、 p—In AlAs層 15のホールに対するポテンシャルエネルギーは、ノンドープ InPクラッド層 14 のホールに対するポテンシャルエネルギーに比べて小さくなつている。すなわち、半 導体光導波層とポテンシャルバリア層としての半導体クラッド層との接合において、半 導体クラッド層のホールに対するポテンシャルエネルギーを半導体光導波層のホー ルに対するポテンシャルエネルギーに比べて小さくすることが好まし 、。半導体コア 層と半導体クラッド層との間にクラッド層(本実施形態では、ノンドープ InPクラッド層 1 4)を設けない場合は、半導体光導波層の、半導体クラッド層と接する層は、半導体コ ァ層となる。この場合は、半導体コア層とポテンシャルバリア層としての半導体クラッド 層との接合にぉ 、て、半導体クラッド層のホールに対するポテンシャルエネルギーを 半導体コア層のホールに対するポテンシャルエネルギーに比べて小さくすれば良い In the present embodiment, as shown in FIG. 3, the heterojunction between the p-InAlAs layer 15 and the n-InP clad layer 16 is a type in which electrons and holes are confined in spatially different locations. It has become. In addition, the holes generated slightly due to light absorption in the semiconductor optical waveguide layer are easy to flow into the n-InP cladding layer 16 due to the non-doped InP cladding layer 14 side force. In the junction with the p-InAlAs layer 15, the potential energy for the holes of the p-In AlAs layer 15 is smaller than the potential energy for the holes of the non-doped InP cladding layer 14. In other words, at the junction between the semiconductor optical waveguide layer and the semiconductor clad layer as the potential barrier layer, it is preferable to reduce the potential energy for the holes of the semiconductor clad layer compared to the potential energy for the holes of the semiconductor optical waveguide layer. ,. When the cladding layer (in this embodiment, the non-doped InP cladding layer 14) is not provided between the semiconductor core layer and the semiconductor cladding layer, the layer in contact with the semiconductor cladding layer of the semiconductor optical waveguide layer is the semiconductor core layer. It becomes. In this case, the potential energy with respect to the holes in the semiconductor cladding layer should be made smaller than the potential energy with respect to the holes in the semiconductor core layer at the junction of the semiconductor core layer and the semiconductor cladding layer as the potential barrier layer.
[0058] さて、半導体光変調器の動作時には、僅かである力 半導体コア層 13中での光吸 収によって電子とホールが生成され、その電子は、容易に n— InPクラッド層 11に到 達するが、一方、ホールは、 p— InAlAs層 15付近に蓄積してしまう可能性がある。こ れは、 p— InAlAs層 15のポテンシャルノ リアを押し下げる。このことは、 pn接合によ るポテンシャルバリアが小さくなることに対応しており、耐圧特性を十分保つことがで きない可能性がでてくる。しかしながら、本実施形態に係る構造では、上述のような p n接合によるポテンシャルバリアが小さくなつても、伝導帯バンド不連続が相変わらず ポテンシャルバリアとして機能することができるため、耐圧特性の優れた半導体光変 調器を提供することが可能である。 Now, when the semiconductor optical modulator is operated, a slight force generates electrons and holes by light absorption in the semiconductor core layer 13, and these electrons easily reach the n-InP cladding layer 11. However, holes may accumulate near the p-InAlAs layer 15. This pushes down the potential NOR of the p-InAlAs layer 15. This corresponds to the reduction of the potential barrier due to the pn junction, which may prevent the breakdown voltage characteristics from being sufficiently maintained. However, in the structure according to this embodiment, the conduction band discontinuity remains the same even when the potential barrier due to the pn junction as described above is reduced. Since it can function as a potential barrier, it is possible to provide a semiconductor optical modulator with excellent breakdown voltage characteristics.
[0059] すなわち、半導体コア層 13にて発生したホールがバリア層である p—InAlAs層 15 に蓄積しても、 pn接合によるポテンシャルバリアは小さくなる力 p— InAlAs層 15の 電子親和力を、 n—InPクラッド層 16の電子親和力よりも小さくすることによって生じた 伝導帯バンド不連続によるポテンシャルバリアは良好に機能することになる。よって、 n— InPクラッド層 11から n— InPクラッド層 16側に向かうリーク電流を低減することが できる。また、この伝導帯バンド不連続によるポテンシャルバリアは、半導体コア層 13 への入射光の強度や波長によらず、良好に機能するので、上記入射光の強度や波 長によって pn接合によるポテンシャルバリアが変動しても、安定に変調動作を行うこ とがでさる。  That is, even if holes generated in the semiconductor core layer 13 accumulate in the p-InAlAs layer 15 as a barrier layer, the potential barrier due to the pn junction is reduced. The electron affinity of the p-InAlAs layer 15 is expressed as n —The potential barrier due to the conduction band discontinuity generated by making the InP cladding layer 16 smaller than the electron affinity functions well. Therefore, the leakage current from the n-InP cladding layer 11 toward the n-InP cladding layer 16 can be reduced. In addition, the potential barrier due to the conduction band discontinuity works well regardless of the intensity and wavelength of the incident light on the semiconductor core layer 13, so the potential barrier due to the pn junction depends on the intensity and wavelength of the incident light. Even if it fluctuates, stable modulation can be performed.
[0060] このように本実施形態では、バリア層である p— InAlAs層(半導体クラッド層) 15に ホールが蓄積しても、該ホールの蓄積に影響されな 、ポテンシャルバリアを形成する ことが重要である。そのために、本実施形態では、半導体クラッド層としての p—InAl As層 15の電子親和力を、第 2の n型半導体クラッド層としての n—InPクラッド層 16の 電子親和力よりも小さくしているのである。  Thus, in this embodiment, even if holes accumulate in the p-InAlAs layer (semiconductor clad layer) 15 that is a barrier layer, it is important to form a potential barrier without being affected by the accumulation of holes. It is. Therefore, in this embodiment, the electron affinity of the p-InAlAs layer 15 as the semiconductor cladding layer is made smaller than the electron affinity of the n-InP cladding layer 16 as the second n-type semiconductor cladding layer. is there.
[0061] ところで、 p— InAlAs層 15を p型とすることで懸念されることは、価電子帯バンド間 遷移に起因する光吸収である。し力し、 p— InAlAs層 15と InPクラッド 14との間の伝 導帯バンド不連続値は十分大きく(文献値で 0. 39eV)、あまり層厚を取る必要がな い。たとえば、 p— InAlAs層 15の層厚として 0. 05 mもあれば、 15V程度の耐圧特 性を持つことが可能である。また、光吸収の大きさは、 p層の光閉じ込め係数に比例 するので、 p— InAlAs層 15を必要以上に厚くせず、かつ、半導体コア層 13との距離 を離すこと、すなわち、ノンドープの InPクラッド層 14を適当に厚くすることにより光吸 収によるロスを抑制することは可能である。このように、本実施形態では、 n—i—n構 造の半導体光変調器の特長を損なうことなぐ電界に対する耐圧特性の優れ、低損 失で安定動作する半導体光変調器を実現できる。  By the way, what is concerned about making the p-InAlAs layer 15 p-type is light absorption caused by valence band interband transition. However, the conduction band discontinuity between the p-InAlAs layer 15 and the InP clad 14 is sufficiently large (the reference value is 0.39 eV), and it is not necessary to take much thickness. For example, if the p-InAlAs layer 15 has a thickness of 0.05 m, it can have a breakdown voltage of about 15V. In addition, since the magnitude of light absorption is proportional to the optical confinement factor of the p-layer, the p-InAlAs layer 15 is not made thicker than necessary, and the distance from the semiconductor core layer 13 is increased, that is, non-doped. It is possible to suppress loss due to light absorption by appropriately thickening the InP clad layer 14. As described above, in this embodiment, it is possible to realize a semiconductor optical modulator that has excellent breakdown voltage characteristics against an electric field without impairing the features of the semiconductor optical modulator having the nn structure, and that operates stably with low loss.
[0062] なお、本実施形態では、半導体導波層として、 InPクラッド層 12、半導体コア層 13、 InPクラッド層 14の積層体を用いている力 これに限定されない。すなわち、半導体 コア層 13の上下に、ノンドープの InPクラッド層 12および 14が設けられている力 In Pクラッド層 12および 14のどちらか一方、あるいは、その両方がない構造でも構わな い。本実施形態では、光を導波させることができれば良いのであって、半導体導波層 として、半導体コア層のみの形態、半導体コア層の上下の少なくとも一方にノンドー プのクラッド層を設ける形態のいずれも含む。また、ノンドープの InPクラッド層 12およ び 14は、半導体コア層 13よりもバンドギャップが広く設定されている。たとえば、 InG aAsP層や InAlGaAs層などで形成しても、もちろん構わな!/、。 In this embodiment, the force using a stacked body of the InP clad layer 12, the semiconductor core layer 13, and the InP clad layer 14 as the semiconductor waveguide layer is not limited to this. That is, semiconductor A structure in which either one or both of the force InP cladding layers 12 and 14 are provided, in which the non-doped InP cladding layers 12 and 14 are provided above and below the core layer 13, respectively. In this embodiment, it suffices if light can be guided. As the semiconductor waveguide layer, either a semiconductor core layer alone or a non-dop cladding layer is provided on at least one of the upper and lower sides of the semiconductor core layer. Including. The non-doped InP cladding layers 12 and 14 have a wider band gap than the semiconductor core layer 13. For example, you can use InGaAsP or InAlGaAs layers.
[0063] なお、本実施形態において重要なことは、半導体光導波層と第 2の n型半導体クラ ッド層との間に、伝導帯バンド不連続によるポテンシャルバリア層を設けることである。 よって、本実施形態では、半導体クラッド層および第 2の n型半導体クラッド層の材料 はそれぞれ、 p—InAlAs、 n—InPに限定されず、半導体クラッド層と第 2の n型半導 体クラッド層とがへテロ接合し、かつ半導体クラッド層の電子親和力が第 2の n型半導 体クラッド層の電子親和力よりも小さくなるように、半導体クラッド層および第 2の n型 半導体クラッド層の材料を選べばよい。また、半導体クラッド層について、伝導帯バン ド不連続によるポテンシャルバリア層を形成できるのであれば、 p型ドーピングしなくて も良い。 [0063] Note that in the present embodiment, it is important to provide a potential barrier layer due to conduction band discontinuity between the semiconductor optical waveguide layer and the second n-type semiconductor cladding layer. Therefore, in this embodiment, the materials of the semiconductor cladding layer and the second n-type semiconductor cladding layer are not limited to p-InAlAs and n-InP, respectively, but the semiconductor cladding layer and the second n-type semiconductor cladding layer The materials of the semiconductor cladding layer and the second n-type semiconductor cladding layer are made so that the electron affinity of the semiconductor cladding layer is smaller than the electron affinity of the second n-type semiconductor cladding layer. Just choose. In addition, the semiconductor clad layer does not need to be p-type doped if a potential barrier layer due to conduction band discontinuity can be formed.
[0064] また、本実施形態に係る導波路構造に印加される電圧は逆バイアスであることを考 慮すると、半導体光導波層(図 2では、 InPクラッド層 14)とポテンシャルバリア層とし ての半導体クラッド層とについて特に制限は無いが、半導体クラッド層の電子親和力 は半導体光導波層(図 2では、 InPクラッド層 14)の電子親和力よりも小さいことが好 ましい。  [0064] Considering that the voltage applied to the waveguide structure according to the present embodiment is a reverse bias, the semiconductor optical waveguide layer (InP clad layer 14 in FIG. 2) and the potential barrier layer are used. Although there is no particular limitation on the semiconductor clad layer, the electron affinity of the semiconductor clad layer is preferably smaller than the electron affinity of the semiconductor optical waveguide layer (InP clad layer 14 in FIG. 2).
[0065] さて、高速な光変調器実現には、進行波型電極構造が有用である。よって、電極 1 7、 18には進行波型電極を適用しても良い。この進行波型電極構造では、光変調器 におけるインピーダンス整合や光と電気の速度整合が重要となる。このインピーダン ス整合や速度整合は、光変調器の光導波路の容量成分を制御することにより可能で ある。すなわち、ノンドープ層である半導体光導波路層 19 (半導体コア 13とその上下 のノンドープ InPクラッド層 12、 14)の総厚と導波路幅とを適切に設計することが大切 となってくる。 [0066] 具体的なインピーダンス整合条件としては、外部電気回路の特定インピーダンスで ある 50 Ωから ± 10 Ω程度の誤差が許容できる。一般に、光変調器は低電圧で駆動 できることが求められているため、ノンドープ層の光閉じ込め係数が極端に小さくなら ない限り、ノンドープ層の総厚はできるだけ薄くすることが好ましい(こうすることにより 、容量が大きくなる)。ところが、光変調器の特性インピーダンスは、定性的に容量の 平方根に反比例するため、ノンドープ層があまり薄すぎると特性インピーダンスが小さ くなり過ぎてしまう。それを回避する一つの方法は、半導体光導波路層の幅を細くす ることだが、あまり細くし過ぎると、今度は光伝播損失の増大や歩留まり低下を招くお それがある。 A traveling wave electrode structure is useful for realizing a high-speed optical modulator. Therefore, traveling wave type electrodes may be applied to the electrodes 17 and 18. In this traveling-wave electrode structure, impedance matching in the optical modulator and speed matching between light and electricity are important. This impedance matching and velocity matching can be achieved by controlling the capacitance component of the optical waveguide of the optical modulator. In other words, it is important to appropriately design the total thickness and waveguide width of the semiconductor optical waveguide layer 19 (the semiconductor core 13 and the upper and lower non-doped InP cladding layers 12 and 14), which are non-doped layers. [0066] As specific impedance matching conditions, an error of about 50 Ω to ± 10 Ω, which is the specific impedance of the external electric circuit, can be allowed. In general, since the optical modulator is required to be driven at a low voltage, it is preferable to make the total thickness of the non-doped layer as thin as possible unless the optical confinement factor of the non-doped layer becomes extremely small (by doing this, Capacity increases). However, the characteristic impedance of the optical modulator is qualitatively inversely proportional to the square root of the capacitance, so if the non-doped layer is too thin, the characteristic impedance becomes too small. One way to avoid this is to reduce the width of the semiconductor optical waveguide layer. However, if it is too thin, this may lead to an increase in light propagation loss and a decrease in yield.
[0067] 一方、速度整合の度合いによる周波数帯域は、次式で表される。  On the other hand, the frequency band depending on the degree of speed matching is expressed by the following equation.
[0068] [数 1] [0068] [Equation 1]
Δ f 1 . 4 C / I n o p E - n ^ I L Δ f 1.4 C / I n op E -n ^ IL
[0069] ここで、 Cは光速であり、 n は群屈折率であり、 n は電気の屈折率であり、 Lは電  [0069] where C is the speed of light, n is the group refractive index, n is the refractive index of electricity, and L is the electric power.
β  β
極長である。  Extremely long.
[0070] 光の群屈折率 η は、 3. 4〜3. 7程度であり、所望の周波数帯域と電極長とにより  [0070] The group index of refraction η of light is about 3.4 to 3.7, depending on the desired frequency band and electrode length.
opt  opt
許容される電気の屈折率の範囲は決定される。例えば、帯域を 40GHzで電極長 3m mとすると、光の群屈折率と電気の屈折率との差は、 ± 1. 1程度となる。なお、定性 的に半導体光導波層の容量を大きくすると、電気の速度は遅くなる、すなわち、電気 の屈折率は大きくなる。これら上記に挙げた全ての条件を満たすことを考えると、光 導波路幅は、 1. !〜 2. 程度であり、ノンドープ層(半導体光導波層)の総 厚は、 0. 4 m〜2. 0 μ m程度であることが好ましい。  The allowable range of electrical refractive index is determined. For example, if the band is 40 GHz and the electrode length is 3 mm, the difference between the group refractive index of light and the refractive index of electricity is about ± 1.1. Qualitatively, when the capacitance of the semiconductor optical waveguide layer is increased, the speed of electricity is reduced, that is, the refractive index of electricity is increased. Considering that all of the above conditions are met, the optical waveguide width is 1.! It is preferable that the total thickness of the non-doped layer (semiconductor optical waveguide layer) is about 0.4 m to 2.0 μm.
[0071] (実施例) [0071] (Example)
以下に示す実施例では、第 1および第 2の n型半導体クラッド層には InPを用いた。 電子のポテンシャルバリアとして機能する半導体クラッド層には、 p型の InAlAs層(p — InAlAs層 16)を用い、その層厚を 0. 05 μ m、ドーピング密度を 1 X 1018cm 3とし た。また、半導体光導波路層 19、すなわち、ノンドープ層の総厚は、 0. 9 mとした。 また、半導体光導波路層 19の幅は、 1. 6 mとした。 In the following examples, InP was used for the first and second n-type semiconductor clad layers. A p-type InAlAs layer (p — InAlAs layer 16) was used as the semiconductor cladding layer functioning as an electron potential barrier, and its layer thickness was 0.05 μm and the doping density was 1 × 10 18 cm 3 . Further, the total thickness of the semiconductor optical waveguide layer 19, that is, the non-doped layer was set to 0.9 m. The width of the semiconductor optical waveguide layer 19 was 1.6 m.
[0072] 図 4〜図 6は、上記パラメータを用いて作製したマッハツエンダ変調器の特性を示し ている。図 4は、電極 17と電極 18との間において、電極 18に負電圧を掛けた場合( 逆バイアス)の電圧—電流特性を示す図である。図 4から分かるように、 15V以上の 十分な耐圧特性を示して!/ヽることが分かる。 [0072] Figures 4 to 6 show the characteristics of a Mach-Zehnder modulator fabricated using the above parameters. ing. FIG. 4 is a diagram showing voltage-current characteristics when a negative voltage is applied to the electrode 18 (reverse bias) between the electrode 17 and the electrode 18. As can be seen from Fig. 4, it shows a sufficient breakdown voltage characteristic of 15V or higher!
[0073] また、図 5は、位相変調領域の長さが 3mmの EZE高周波応答特性を示して 、る。 [0073] Fig. 5 shows the EZE high-frequency response characteristics in which the length of the phase modulation region is 3 mm.
図 5より、周波数帯域の基準となる 6dBダウンの周波数は 40GHz以上であり、 40Gbi tZsの変調に十分な帯域があることが分かる。  From Fig. 5, it can be seen that the frequency of 6 dB down, which is the reference for the frequency band, is 40 GHz or more, and there is enough band for 40 GbitZs modulation.
[0074] さらに、図 6は、実際に 1. 3Vppでプッシュプル動作させた 40GbitZsのアイダイヤ グラムである。図 8から、明瞭なアイ開口が確認することができる。このように、本実施 例に係るマッハツエンダ変調器が高速光変調器として有用なことが分かる。 [0074] Furthermore, Fig. 6 is a 40 GbitZs eye diagram that is actually push-pull operated at 1.3 Vpp. From Fig. 8, a clear eye opening can be confirmed. Thus, it can be seen that the Mach-Zehnder modulator according to this embodiment is useful as a high-speed optical modulator.
[0075] (第 2の実施形態) [0075] (Second Embodiment)
図 7は、本実施形態に係る半導体光変調器の導波路構造のバンドダイヤグラムを 示した図である。  FIG. 7 is a diagram showing a band diagram of the waveguide structure of the semiconductor optical modulator according to the present embodiment.
本実施形態に係る半導体光変調器の基本構成は、第 1の実施形態と同じでありそ の説明は省略する。本実施形態と第 1の実施形態との異なる点は、第 2の n型半導体 クラッド層である n— InPクラッド層 16とポテンシャルノリア層である p— InAlAs層 15 との間に、第 2の n型半導体クラッド層である n—InPクラッド層 16に比べ、正孔に対 するポテンシャルエネルギーが小さ!/、第 3の n型半導体クラッド層 20が挿入されて ヽ ることである。この第 3の n型半導体クラッド層 20は、たとえば、 InGaAsP層や InGaA lAs層などで組成を適当に設定することで形成することができる。  The basic configuration of the semiconductor optical modulator according to this embodiment is the same as that of the first embodiment, and the description thereof is omitted. The difference between this embodiment and the first embodiment is that the second n-type semiconductor cladding layer n-InP cladding layer 16 and the potential noria layer p-InAlAs layer 15 Compared to the n-InP clad layer 16 which is an n-type semiconductor clad layer, the potential energy for holes is small! / and the third n-type semiconductor clad layer 20 is inserted. The third n-type semiconductor clad layer 20 can be formed by appropriately setting the composition of, for example, an InGaAsP layer or an InGaAlAs layer.
[0076] これにより、半導体コア層 13における、動作時に僅かではある力 光吸収で生じる 正孔は、 p— InAlAs層 15に蓄積されることなぐ第 2の n型半導体クラッド層 20へ落 ち込む。落ち込んだ正孔は、第 3の n型半導体クラッド層 20内の電子とすみやかに再 結合することが可能であるため、正孔の蓄積によるポテンシャルバリアの低下を抑制 することができる。すなわち、この構成によって、より電界に対する耐圧特性の優れ、 安定動作する半導体光変調器を提供することができる。  [0076] Thereby, holes generated by slight optical absorption in the semiconductor core layer 13 during operation fall into the second n-type semiconductor cladding layer 20 without being accumulated in the p-InAlAs layer 15. . The fallen holes can quickly recombine with the electrons in the third n-type semiconductor clad layer 20, so that the potential barrier can be prevented from lowering due to the accumulation of holes. That is, with this configuration, it is possible to provide a semiconductor optical modulator that is more excellent in breakdown voltage characteristics against an electric field and operates stably.
[0077] (第 3の実施形態)  [0077] (Third embodiment)
本実施形態では、第 1および第 2の実施形態にて説明した導波路構造 (位相変調 導波路)を用いたマッハツエンダ型光変調器について説明する。本実施形態に係る マツハツヱンダ型光変調器 40は、第 1および第 2の実施形態にて説明した導波路構 造を備えている。 In the present embodiment, a Mach-Zehnder optical modulator using the waveguide structure (phase modulation waveguide) described in the first and second embodiments will be described. According to this embodiment The Matsuhazu optical modulator 40 has the waveguide structure described in the first and second embodiments.
[0078] 図 8において、入力光を 2つに分岐する手段としての MMI (Multi- Mode Interferenc e)力ブラ 42aの 2つの出力端にはそれぞれ、本発明の一実施形態に係る位相変調 導波路 41aおよび 41bが連結されている。位相変調導波路 41aおよび 41bの出力端 はそれぞれ、 2つの入力光を合波する手段としての MMIカプラ 42bの 2つの入力端 のそれぞれに連結されている。また、基板上に形成された第 1の n型半導体クラッド層 の所定の領域に電極 43が設けられ、位相変調導波路 41aおよび 41b上の所定の領 域に電極 44が設けられている。本実施形態では、位相変調導波路 41aおよび 41b の長さ L (位相変調領域)は、 3mmとしている。  [0078] In Fig. 8, two output ends of an MMI (Multi-Mode Interferencé) force bra 42a as means for branching the input light into two are respectively provided in the phase modulation waveguide according to the embodiment of the present invention. 41a and 41b are linked. The output ends of the phase modulation waveguides 41a and 41b are respectively connected to the two input ends of the MMI coupler 42b as means for multiplexing the two input lights. Further, an electrode 43 is provided in a predetermined region of the first n-type semiconductor clad layer formed on the substrate, and an electrode 44 is provided in a predetermined region on the phase modulation waveguides 41a and 41b. In this embodiment, the length L (phase modulation region) of the phase modulation waveguides 41a and 41b is 3 mm.
[0079] このような構成において、 MMIカプラ 42aの一方の入力端から入力光が入力される と、該入力光は MMIカプラ 42aにて 2つに分岐され、分岐光のそれぞれは、位相変 調導波路 4 laおよび 4 lbに導かれる。このとき、電極 43および 44により位相変調導 波路 41aおよび 41bの位相変調領域に印加された電圧に基づ ヽて、位相変調導波 路 41a、および 41bを通過する分岐光の位相を変調する。変調された光は、 MMI力 プラ 42bにて合波され、 MMIカプラ 42bの一方の出力端から出力される。  In such a configuration, when input light is input from one input end of the MMI coupler 42a, the input light is branched into two by the MMI coupler 42a, and each of the branched lights is phase-modulated. Guided to waveguides 4 la and 4 lb. At this time, the phase of the branched light that passes through the phase modulation waveguides 41a and 41b is modulated based on the voltage applied to the phase modulation regions of the phase modulation waveguides 41a and 41b by the electrodes 43 and 44. The modulated light is multiplexed by the MMI force coupler 42b and output from one output terminal of the MMI coupler 42b.
[0080] 本実施形態によれば、 n— i n構造の半導体光変調器の特長を損なうことなぐ電 界に対する耐圧特性の優れ、安定動作するマッハツエンダ型光変調器を提供するこ とがでさる。  [0080] According to the present embodiment, it is possible to provide a Mach-Zehnder type optical modulator that has excellent breakdown voltage characteristics against an electric field without impairing the features of the semiconductor optical modulator having the n-in structure and operates stably.
[0081] (第 4の実施形態)  [0081] (Fourth embodiment)
本実施形態による、光変調器に用いられる光変調導波路は、半導体クラッド層(バ リア層)としての半絶縁型クラッド層に接する第 2の n型半導体クラッド層の一部、また は第 2の n型半導体クラッド層と半絶縁型クラッド層(半導体クラッド層)の一部を、 p型 の導電性を持つ P型半導体領域とする。この p型半導体領域は、光変調導波路の光 進行方向に繰り返し複数配置される。入力光が半導体光導波層にお 、て光吸収さ れて発生したホールは、この p型半導体領域を介して、第 2の n型半導体クラッド層と 共通の電極から引き抜かれる。これにより、ノ リア層である半絶縁型クラッド層に、ホ ールが蓄積することを防止な 、しは軽減することができる。ホールの蓄積が起こらな い、ないしはホールの蓄積を軽減することができるため、リーク電流の発生や、光導 波コア層に印加される電圧の低下を抑えることが可能となる。 The optical modulation waveguide used in the optical modulator according to this embodiment is a part of the second n-type semiconductor clad layer in contact with the semi-insulating clad layer as the semiconductor clad layer (barrier layer), or the second Part of the n-type semiconductor clad layer and the semi-insulating clad layer (semiconductor clad layer) is a p-type semiconductor region with p-type conductivity. A plurality of p-type semiconductor regions are repeatedly arranged in the light traveling direction of the light modulation waveguide. Holes generated by light absorption of input light in the semiconductor optical waveguide layer are extracted from the electrode common to the second n-type semiconductor clad layer through this p-type semiconductor region. Thereby, it is possible to prevent or reduce the accumulation of holes in the semi-insulating clad layer which is the NOR layer. Hall accumulation doesn't happen As a result, the accumulation of holes or the accumulation of holes can be reduced, so that it is possible to suppress the occurrence of leakage current and the decrease in the voltage applied to the optical wave core layer.
[0082] 従って、本発明の目的の一つである、光変調器へ入力される光の波長や光強度に よって変調特性が変動してしまう問題点を改善し、変調器の安定動作を実現すること が可能となる。  Therefore, one of the objects of the present invention is to improve the problem that the modulation characteristics fluctuate depending on the wavelength and intensity of light input to the optical modulator, and realize stable operation of the modulator. It becomes possible to do.
[0083] 図 9は、本実施形態によって構成された半導体光変調器の導波路の構造である。  FIG. 9 shows the structure of the waveguide of the semiconductor optical modulator configured according to this embodiment.
半絶縁 InP基板 51上に、 n— InPクラッド層 52 (第 1の n型半導体クラッド層)、半導体 コア層 53、半絶縁型クラッド層(ポテンシャルバリア層としての半導体クラッド層) 54お よび n— InPクラッド層(第 2の n型半導体クラッド層) 55— 1を順次積層した層構造を 有する。光変調導波路部において、光進行方向に一定長さの区間の、半絶縁型クラ ッド層 54に接する n— InPクラッド層 55— 1と半絶縁型クラッド層 54の一部を、 p型の 導電性を持つ P型半導体領域 55— 2a〜55— 2dとして ヽる。この p型半導体領域 55 2a〜55— 2dおよび n— InPクラッド層 55— 1と電気的に共通に接続された電極 56 を設けている。この p型半導体領域は、光変調導波路の全体にわたって、光進行方 向に、繰り返し配置される。図 9においては、一定間隔で繰り返し配置されているが、 一定間隔の配置には限られない。すなわち、ランダムの間隔で配置しても良い。また 、図 9においては、 p型半導体領域は 4つのみ記載されている力 4つのみに限定さ れるわけではなぐ光変調導波路全体にわたって、繰り返し多数の p型半導体領域が 配置される。  On a semi-insulating InP substrate 51, an n— InP cladding layer 52 (first n-type semiconductor cladding layer), a semiconductor core layer 53, a semi-insulating cladding layer (semiconductor cladding layer as a potential barrier layer) 54 and n— InP cladding layer (second n-type semiconductor cladding layer) 55-1 has a layered structure. In the optical modulation waveguide part, n-InP cladding layer 55-1 and a part of semi-insulating cladding layer 54 in contact with the semi-insulating cladding layer 54 in a section of a certain length in the light traveling direction are p-type. These are called P-type semiconductor regions 55-2a to 55-2d with the conductivity of. An electrode 56 electrically connected in common with the p-type semiconductor regions 5552a to 55-2d and the n-InP cladding layer 55-1 is provided. This p-type semiconductor region is repeatedly arranged in the light traveling direction over the entire light modulation waveguide. In FIG. 9, they are repeatedly arranged at regular intervals, but are not limited to regular intervals. That is, they may be arranged at random intervals. In FIG. 9, the number of p-type semiconductor regions is not limited to only four forces, which are described, but a large number of p-type semiconductor regions are repeatedly arranged over the entire optical modulation waveguide.
[0084] なお、本実施形態では、導波路構造として、ハイメサ導波路構造を用いているが、 これに限定されず、リッジ導波路構造を用いても良い。  In the present embodiment, a high mesa waveguide structure is used as the waveguide structure, but the present invention is not limited to this, and a ridge waveguide structure may be used.
[0085] この p型半導体領域 55— 2a〜55— 2dは、例えば、 n— InPクラッド層 52から n— In Pクラッド層 55— 1までの層を成長させた後に、 p型半導体領域 55— 2a〜55— 2dに 相当する部分をエッチングで取り除!/ヽて、 p型 InP半導体領域を再成長させることで 形成できる。また、 n— InPクラッド層 55— 1の一部にイオン注入法で Beァクセプタを 導入することによつても形成できる。ただし、 p型半導体領域 55— 2a〜55— 2dは、 半導体コア層 53にまで突き抜けな 、ようにすることが望ま 、。この p型半導体領域 の、光進行方向の長さとしては、例えば 50 m以下とすることができる。また、 p型半 導体領域同士の間隔は、例えば、 200 m以下とすることができる。 [0085] The p-type semiconductor regions 55-2a to 55-2d are formed, for example, after the layers from the n-InP cladding layer 52 to the n-InP cladding layer 55-1 are grown, and then the p-type semiconductor region 55- 2a ~ 55— The part corresponding to 2d is removed by etching! / And then, it can be formed by re-growing the p-type InP semiconductor region. It can also be formed by introducing a Be acceptor into a part of the n—InP clad layer 55-1 by ion implantation. However, it is desirable that the p-type semiconductor regions 55-2a to 55-2d do not penetrate into the semiconductor core layer 53. The length of the p-type semiconductor region in the light traveling direction can be set to 50 m or less, for example. Also p-type half The interval between the conductor regions can be set to 200 m or less, for example.
[0086] n— InPクラッド層 55— 1と n— InPクラッド層 52の上には、それぞれ金属電極である 電極 56と電極 57a、 57bが配置される。電極 57a、 57bに対して電極 56を負の極性 として、半導体コア層 53に電圧を印加する。電極 56は、 n— InPクラッド層 55— 1と p 型半導体領域 55— 2a〜55— 2dの両方に、共通の電気的な接触を取る。 [0086] On the n-InP cladding layer 55-1 and the n-InP cladding layer 52, an electrode 56 and electrodes 57a and 57b, which are metal electrodes, are arranged, respectively. A voltage is applied to the semiconductor core layer 53 with the electrode 56 having a negative polarity with respect to the electrodes 57a and 57b. The electrode 56 makes a common electrical contact with both the n—InP cladding layer 55-1 and the p-type semiconductor regions 55-2a to 55-2d.
[0087] 本実施形態では、半導体コア層 53での光吸収にて発生したホールの、バリア層で ある半絶縁型クラッド層 54への影響を軽減するために、上記ホール力 ¾型半導体領 域 55— 2a〜55— 2dを介して電極 56へと流れ込むようにしている。このように、上記 ホールが電極 56へと流れ込むので、半絶縁型クラッド層 54にホールが蓄積しなくな る、または蓄積を軽減することができる。よって、半絶縁型クラッド層 54への蓄積を防 止する、ないしは軽減することができるので、半絶縁型クラッド層 54のポテンシャルバ リアを維持することができる、ないしはポテンシャルバリアの低下を低減することができ る。 In this embodiment, in order to reduce the influence of holes generated by light absorption in the semiconductor core layer 53 on the semi-insulating clad layer 54 that is a barrier layer, the above-described Hall force ¾ type semiconductor region is used. It flows into the electrode 56 through 55-2a to 55-2d. As described above, since the holes flow into the electrode 56, holes are not accumulated in the semi-insulating clad layer 54, or accumulation can be reduced. Accordingly, accumulation in the semi-insulating clad layer 54 can be prevented or reduced, so that the potential barrier of the semi-insulating clad layer 54 can be maintained, or reduction in potential barrier can be reduced. You can.
[0088] 本実施形態では、電極 56が、半導体コア層に電圧を印加することによって電気信 号を印加する手段として機能することに加えて、ホールを吸い取る手段として機能す る。このとき、電極 56がホールを吸い取るように機能するためには、半絶縁型クラッド 層 54と電極 56との間にホールが通過する経路が必要であり、 p型半導体領域 55— 2 a〜55— 2dがその経路として機能するのである。すなわち、電極 56と p型半導体領 域 55— 2a〜55— 2dとにより、半絶縁型クラッド層 54にあるホールは、半絶縁型クラ ッド層 54の外部へと移動するので、ホールのバリア層としての半導体クラッド層(半絶 縁型クラッド層 54)への影響を軽減することができる。  In the present embodiment, the electrode 56 functions as a means for sucking holes in addition to functioning as a means for applying an electric signal by applying a voltage to the semiconductor core layer. At this time, in order for the electrode 56 to function so as to absorb the holes, a path through which the holes pass between the semi-insulating clad layer 54 and the electrode 56 is necessary, and the p-type semiconductor region 55-2a to 55 — 2d serves as the path. That is, the holes in the semi-insulating clad layer 54 move to the outside of the semi-insulating clad layer 54 by the electrode 56 and the p-type semiconductor regions 55-2a to 55-2d. The influence on the semiconductor clad layer (semi-insulated clad layer 54) as a layer can be reduced.
[0089] なお、 p型半導体領域を、半絶縁型クラッド層 54から電極 56に向力 ホールの経路  [0089] Note that the p-type semiconductor region is directed from the semi-insulating clad layer 54 to the electrode 56.
(半絶縁型クラッド層 54からホールを取り出すための経路)として機能させるために、 P型半導体領域 55— 2a〜55— 2dと電極 56とを接触させることが好ましい。また、図 9では、 p型半導体領域 55— 2a〜55— 2dは、半絶縁型クラッド層 54の一部にも形 成されているが、これに限らない。すなわち、本実施形態では、半絶縁型クラッド層 5 4内のホールを電極 56へと流すことが重要であり、 p型半導体領域 55— 2a〜55— 2 dを上述のホールの経路として機能させることが重要なのである。よって、半絶縁型ク ラッド層 54の一部にまで p型半導体領域を形成せずに、 p型半導体領域を半絶縁型 クラッド層 54に接するように形成しても良い。また、 p型半導体領域 55— 2a〜55— 2 dが上述のホールの経路として適切に機能するのであれば、 p型半導体領域は、半 絶縁型クラッド層 54に接して 、なくても良い。 In order to function as a (path for extracting holes from the semi-insulating clad layer 54), it is preferable that the P-type semiconductor regions 55-2a to 55-2d and the electrode 56 are brought into contact with each other. In FIG. 9, the p-type semiconductor regions 55-2a to 55-2d are also formed in part of the semi-insulating clad layer 54, but this is not restrictive. That is, in this embodiment, it is important to flow holes in the semi-insulating clad layer 54 to the electrode 56, and the p-type semiconductor regions 55-2a to 55-2d function as the above-described hole paths. That is important. Therefore, semi-insulated type The p-type semiconductor region may be formed in contact with the semi-insulating clad layer 54 without forming the p-type semiconductor region up to a part of the ladder layer 54. In addition, the p-type semiconductor region 55-2a to 55-2d may not be in contact with the semi-insulating clad layer 54 as long as the p-type semiconductor region 55-2a to 55-2d functions appropriately as the above-described hole path.
[0090] また、本実施形態では、電気信号を印加するための電極と、ホールを吸 、取るため の電極とを共通にしている。すなわち、電極 56が、電気信号を印加するための機能 と、ホールを吸い取るための機能とを有している力 このように電極を共通にすること によって、装置を簡略化でき、また製造プロセスも簡略ィ匕できるので好ましい。しかし ながら、これに限定されず、電気信号を印加するための電極と、ホールを吸い取るた めの電極とを別個に設けるようにしても良い。例えば、 n— InPクラッド層 55— 1の、電 極 56が形成されて ヽな 、側面に、ホールを吸 、取るための電極を設けるようにしても 良い。 In this embodiment, an electrode for applying an electric signal and an electrode for sucking and taking holes are made common. In other words, the force that the electrode 56 has a function for applying an electric signal and a function for sucking out holes. Thus, by making the electrodes common, the apparatus can be simplified and the manufacturing process can be simplified. This is preferable because it can be simplified. However, the present invention is not limited to this, and an electrode for applying an electrical signal and an electrode for absorbing holes may be provided separately. For example, an electrode for absorbing and removing holes may be provided on the side surface of the n-InP clad layer 55-1 where the electrode 56 is formed.
[0091] 上に述べた構造の光導波路を光変調導波路として使用して、以下に述べるように 光変調器を動作させる。図 9に示したメサ構造の断面 (端面)に対して垂直方向に光 を入射させ、光変調導波路に光を伝搬させる。この状態で、電極 56に電気信号を入 力し、 n— InPクラッド層 52と n— InPクラッド層 55— 1間に電気信号電圧を印加する。 半絶縁型クラッド層 54内にドープされた Fe原子は、深い準位でのァクセプタとして働 く。このため、図 12でも説明したように、価電子バンドのエネルギーを持ち上げ、電子 に対するポテンシャルバリアとして働く。このポテンシャルバリアにより、 n— InPクラッ ド層 55— 1からの電子注入が抑制される。よって、電極 57a、 57bから流れ込むリーク 電流の発生が少ない状態で、半導体コア層 53に電気信号電圧を印加して、電気光 学効果に基づく光位相の変調を行うことができる。  [0091] Using the optical waveguide having the structure described above as an optical modulation waveguide, the optical modulator is operated as described below. Light is incident in a direction perpendicular to the cross section (end face) of the mesa structure shown in Fig. 9, and the light is propagated through the light modulation waveguide. In this state, an electric signal is input to the electrode 56, and an electric signal voltage is applied between the n—InP cladding layer 52 and the n—InP cladding layer 55-1. Fe atoms doped in the semi-insulating clad layer 54 act as acceptors at deep levels. For this reason, as explained in Fig. 12, it raises the energy of the valence band and acts as a potential barrier against electrons. This potential barrier suppresses electron injection from the n-InP cladding layer 55-1. Therefore, it is possible to modulate the optical phase based on the electro-optical effect by applying the electric signal voltage to the semiconductor core layer 53 in a state where the leakage current flowing from the electrodes 57a and 57b is small.
[0092] 次に、本実施形態に特有の効果を示す p型半導体領域 55— 2a〜55— 2dの動作 を説明する。 n-InPクラッド層 55— 1と共通に電気的に接続された p型半導体領域 5 5— 2a〜55— 2dは、以下の様な作用を持つ。すなわち、従来の光変調導波路構造 においては、図 12において述べた様に、半導体コア層 53の光吸収によって蓄積し たホールが原因で、寄生フォトトランジスタ効果が発生してしまう。しかし、本実施形態 に特徴的な部分である p型半導体領域 55— 2a〜55— 2dによって、ノリア層である 半絶縁型クラッド層 54から p型半導体領域 55— 2a〜55— 2dへ、ホールが流れこみ 、 ノリア層である半絶縁型クラッド層 54におけるホールの蓄積を抑制することができ る。したがって、前述した寄生フォトトランジスタ効果は抑制され、光変調器の変調特 性の変動を抑えることができる。 Next, the operation of the p-type semiconductor regions 55-2a to 55-2d showing effects peculiar to the present embodiment will be described. The p-type semiconductor regions 5 5-2 a to 55-2 d electrically connected in common with the n-InP cladding layer 55-1 have the following operations. In other words, in the conventional light modulation waveguide structure, as described in FIG. 12, the parasitic phototransistor effect occurs due to the holes accumulated by the light absorption of the semiconductor core layer 53. However, the p-type semiconductor region 55-2a to 55-2d, which is a characteristic part of this embodiment, is a noria layer. Holes flow from the semi-insulating clad layer 54 into the p-type semiconductor regions 55-2a to 55-2d, and accumulation of holes in the semi-insulating clad layer 54, which is a noria layer, can be suppressed. Therefore, the parasitic phototransistor effect described above is suppressed, and fluctuations in the modulation characteristics of the optical modulator can be suppressed.
[0093] なお、本実施形態では、 p型半導体領域を複数配置して ヽるが、これに限定されず 、 p型半導体領域を 1つだけ配置するようにしても良い。本実施形態では、絶縁型クラ ッド層(半導体クラッド層)力 電極へとホールが流れるための経路を確立することが 重要であるので、上記経路が確立できれば、 p型半導体領域の数は本質ではないの である。すなわち、本実施形態では、 p型半導体領域を少なくとも 1つ配置すれば良 いのである。 In the present embodiment, a plurality of p-type semiconductor regions are arranged. However, the present invention is not limited to this, and only one p-type semiconductor region may be arranged. In this embodiment, it is important to establish a path for holes to flow to the insulating clad layer (semiconductor clad layer) force electrode. If the above path can be established, the number of p-type semiconductor regions is essential. It is not. In other words, in this embodiment, it is sufficient to arrange at least one p-type semiconductor region.
[0094] し力しながら、図 9のように、 p型半導体領域を複数配置すると、 n—InPクラッド層 5 5 - 1における、 p型半導体領域 55— 2a〜55— 2dが形成されて!、な!/、領域につ ヽ て、ある P型半導体領域力 遠い領域にあるホールは、上記ある P型半導体領域の隣 の P型半導体領域力 吸い上げられるので、光変調導波路部全体に亘つて均一にホ ールを吸い上げることができる。よって、 p型半導体領域を複数配置することは好まし い形態である。  [0094] However, when a plurality of p-type semiconductor regions are arranged as shown in FIG. 9, the p-type semiconductor regions 55-2a to 55-2d are formed in the n-InP cladding layer 55-1. As for the region, the hole in a region far away from a certain P-type semiconductor region force is sucked up by the P-type semiconductor region force next to the certain P-type semiconductor region, so that the entire optical modulation waveguide section is covered. Therefore, the hall can be sucked up evenly. Therefore, it is preferable to arrange a plurality of p-type semiconductor regions.
[0095] (第 5の実施形態)  [0095] (Fifth embodiment)
図 10は、本実施形態に係る半導体マッハツエンダ変調器の概観図である。マツノ、 ツ ンダ変調器は、 2本の n—i— n構造の光導波路を有している。 2本の光導波路の 一部は、それぞれ、位相変調導波路 62a、 62bを含んでおり、この位相変調導波路 6 2a、 62bに図 9に示した構造の半導体光変調路が使用されている。位相変調導波路 62a, 62bは、それぞれ 2ケ所で光合分波器 65a、 65bと接続されている。光合分波 器 65aは、さらに入力導波路 61に接続され、もう一つの光合分波器 65bは、さらに出 力導波路 63に接続される。入力導波路 61へは入力光が入力され、出力導波路 63 力らは、出力光が出力される。  FIG. 10 is an overview of the semiconductor Mach-Zehnder modulator according to this embodiment. Matsuno and Tunda modulators have two n-i-n optical waveguides. Some of the two optical waveguides include phase modulation waveguides 62a and 62b, respectively, and the semiconductor optical modulation paths having the structure shown in FIG. 9 are used for the phase modulation waveguides 62a and 62b. . The phase modulation waveguides 62a and 62b are connected to optical multiplexers / demultiplexers 65a and 65b at two locations, respectively. The optical multiplexer / demultiplexer 65 a is further connected to the input waveguide 61, and the other optical multiplexer / demultiplexer 65 b is further connected to the output waveguide 63. Input light is input to the input waveguide 61, and output light is output from the output waveguide 63 force.
[0096] 上記のような構成のマッハツ ンダ干渉計によって、光の強度変調が可能になる。  [0096] The Mach-Zehnder interferometer configured as described above enables light intensity modulation.
すなわち、入力導波路 61の一つ力も入射した入力光は、光合分波器 65aによって、 2本の位相変調導波路 62a、 62bへ分けられる。それぞれの位相変調導波路 62a、 6 2bにおいて位相変調を行った後、再び光合分波器 65bにより合成される。コプレー ナ導波路力も入力される電気信号によって、位相変調導波路 62a、 62bの屈折率を 変動させて、導波路中の光信号の位相が変調される。位相変調導波路 62a、 62bで 、位相変調されたそれぞれの信号光は、光合分波器 65bで干渉'合成されて、出力 導波路 63の一つ力 強度変調された出力光として出力される。高速で光変調を行う ために、変調信号である高周波電界を印加する電極には、コプレーナ導波路 64の 構造が採用されている。 That is, the input light that has entered even one force of the input waveguide 61 is divided into two phase modulation waveguides 62a and 62b by the optical multiplexer / demultiplexer 65a. Each phase modulation waveguide 62a, 6 After performing phase modulation in 2b, it is again synthesized by the optical multiplexer / demultiplexer 65b. The phase of the optical signal in the waveguide is modulated by changing the refractive index of the phase modulation waveguides 62a and 62b by the electric signal that also receives the coplanar waveguide force. The signal lights that have undergone phase modulation in the phase modulation waveguides 62a and 62b are interfered and synthesized by the optical multiplexer / demultiplexer 65b, and output as one output intensity-modulated output light in the output waveguide 63. In order to perform optical modulation at high speed, a structure of a coplanar waveguide 64 is adopted for an electrode to which a high-frequency electric field as a modulation signal is applied.
上で述べた位相変調導波路 62a、 62bには、第 4の実施形態で説明した本発明に 特徴的な P型半導体領域を持った n— i n構造の光変調導波路が使用されている。 本実施形態による半導体位相変調導波路 62a、 62bにおいては、光導波路の一部 に P型半導体領域を備えることによって、ノリア層である半絶縁型クラッド層にホール が蓄積しない、もしくはホールの蓄積が軽減される。したがって、寄生フォトトランジス タ効果は発生しない、もしくは発生を抑制でき、リーク電流の発生や、光導波コア層 にカゝかる電圧の低下を抑えることが可能となる。この結果、光変調器に入力される光 の波長や光強度によって、変調特性が変動してしまう問題点を改善し、変調器の安 定動作を実現することができる。  The phase modulation waveguides 62a and 62b described above use the n-in structure light modulation waveguide having the P-type semiconductor region characteristic of the present invention described in the fourth embodiment. In the semiconductor phase modulation waveguides 62a and 62b according to the present embodiment, holes are not accumulated or accumulated in the semi-insulating clad layer, which is a noria layer, by providing a P-type semiconductor region in a part of the optical waveguide. It is reduced. Therefore, the parasitic phototransistor effect does not occur or can be suppressed, and it is possible to suppress the generation of leakage current and the voltage drop across the optical waveguide core layer. As a result, it is possible to improve the problem that the modulation characteristics fluctuate depending on the wavelength and intensity of light input to the optical modulator, and to realize a stable operation of the modulator.

Claims

請求の範囲 The scope of the claims
[I] 第 1の n型半導体クラッド層と、半導体コア層と、半導体クラッド層と、第 2の n型半導 体クラッド層とを順次積層して形成された導波路構造を備え、  [I] comprises a waveguide structure formed by sequentially laminating a first n-type semiconductor clad layer, a semiconductor core layer, a semiconductor clad layer, and a second n-type semiconductor clad layer,
前記半導体クラッド層の電子親和力は、前記第 2の n型半導体クラッド層の電子親 和力よりも小さいことを特徴とする半導体光変調器。  A semiconductor optical modulator, wherein an electron affinity of the semiconductor clad layer is smaller than an electron affinity of the second n-type semiconductor clad layer.
[2] 前記半導体クラッド層と前記第 2の n型半導体クラッド層とのヘテロ接合はタイプ II 型であることを特徴とする請求項 1記載の半導体光変調器。 2. The semiconductor optical modulator according to claim 1, wherein a heterojunction between the semiconductor clad layer and the second n-type semiconductor clad layer is a type II type.
[3] 前記半導体クラッド層の正孔に対するポテンシャルエネルギーは、前記半導体コア 層の正孔に対するポテンシャルエネルギーに比べて小さいことを特徴とする請求項 1 記載の半導体光変調器。 3. The semiconductor optical modulator according to claim 1, wherein the potential energy with respect to holes in the semiconductor clad layer is smaller than the potential energy with respect to holes in the semiconductor core layer.
[4] 前記半導体クラッド層と前記第 2の n型半導体クラッド層との間に、前記半導体クラ ッド層に比べ、正孔に対するポテンシャルエネルギーが小さ 、第 3の n型半導体クラ ッド層が挿入されていることを特徴とする請求項 1記載の半導体光変調器。 [4] Between the semiconductor clad layer and the second n-type semiconductor clad layer, the potential energy for holes is smaller than that of the semiconductor clad layer, and the third n-type semiconductor clad layer 2. The semiconductor optical modulator according to claim 1, wherein the semiconductor optical modulator is inserted.
[5] 前記第 1の n型半導体クラッド層と前記半導体コア層との間に、ノンドープクラッド層 が挿入されていることを特徴とする請求項 1記載の半導体光変調器。 5. The semiconductor optical modulator according to claim 1, wherein a non-doped cladding layer is inserted between the first n-type semiconductor cladding layer and the semiconductor core layer.
[6] 前記半導体コア層と前記半導体クラッド層との間に、ノンドープクラッド層が挿入さ れていることを特徴とする請求項 1記載の半導体光変調器。 6. The semiconductor optical modulator according to claim 1, wherein a non-doped cladding layer is inserted between the semiconductor core layer and the semiconductor cladding layer.
[7] 前記半導体クラッド層の正孔に対するポテンシャルエネルギーは、前記ノンドープ クラッド層の正孔に対するポテンシャルエネルギーに比べて小さいことを特徴とする 請求項 6記載の半導体光変調器。 7. The semiconductor optical modulator according to claim 6, wherein the potential energy for holes in the semiconductor clad layer is smaller than the potential energy for holes in the non-doped clad layer.
[8] 前記半導体クラッド層は InAlAsであることを特徴とする請求項 1記載の半導体光変 調^。 8. The semiconductor optical modulation according to claim 1, wherein the semiconductor clad layer is InAlAs.
[9] 前記半導体クラッド層は、 p型にドーピングされていることを特徴とする請求項 1記載 の半導体光変調器。  9. The semiconductor optical modulator according to claim 1, wherein the semiconductor clad layer is doped p-type.
[10] 前記導波路構造は、ハイメサ導波路構造またはリッジ導波路構造であることを特徴 とする請求項 1記載の半導体光変調器。  10. The semiconductor optical modulator according to claim 1, wherein the waveguide structure is a high mesa waveguide structure or a ridge waveguide structure.
[II] 入力光を 2つに分岐して 2つの出力端力もそれぞれ出力する分岐手段であって、前 記 2つの出力端はそれぞれ、別個の前記導波路構造の入力端に連結されている分 岐手段と、 [II] A branching means for splitting the input light into two and outputting the two output end forces, respectively. The two output ends are connected to the input ends of the separate waveguide structures, respectively. And
前記 2つの導波路構造にそれぞれ連結され、該 2つの導波路構造力 出力された 光を合波して出力する合波手段と  Coupling means coupled to the two waveguide structures, respectively, for combining the two waveguide structure forces and outputting the output light;
をさらに備えることを特徴とする請求項 1記載の半導体光変調器。  The semiconductor optical modulator according to claim 1, further comprising:
[12] 前記第 1の n型半導体クラッド層上の領域であって、前記半導体コア層が形成され て ヽな 、領域上に形成された第 1の電極と、  [12] A region on the first n-type semiconductor clad layer, the first electrode formed on the region, the semiconductor core layer being formed, and
前記第 2の半導体クラッド層上に形成された第 2の電極とをさらに備え、 前記第 1の電極および第 2の電極は、進行波型電極構造であることを特徴とする請 求項 1記載の半導体光変調器。  The second electrode formed on the second semiconductor clad layer, wherein the first electrode and the second electrode have a traveling wave type electrode structure. Semiconductor light modulator.
[13] n型 InPからなる第 1の n型半導体クラッド層と、ノンドープの InPカゝらなる第 1のノンド ープクラッド層とノンドープの半導体コア層とノンドープの InPからなる第 2のノンドー プクラッド層とを順次積層して形成された半導体光導波層と、 p型 InAlAsからなる半 導体クラッド層と、 n型 InPからなる第 2の n型半導体クラッド層とを順次積層して形成 された導波路構造を備えることを特徴とする半導体光変調器。  [13] a first n-type semiconductor cladding layer made of n-type InP, a first non-doped cladding layer made of non-doped InP, a non-doped semiconductor core layer, and a second non-doped cladding layer made of non-doped InP Waveguide structure formed by sequentially laminating a semiconductor optical waveguide layer formed by sequentially laminating semiconductor layers, a semiconductor clad layer composed of p-type InAlAs, and a second n-type semiconductor clad layer composed of n-type InP A semiconductor optical modulator comprising:
[14] n型 InPからなる第 1の n型半導体クラッド層と、ノンドープの InPカゝらなる第 1のノンド ープクラッド層とノンドープの半導体コア層とノンドープの InPからなる第 2のノンドー プクラッド層とを順次積層して形成された半導体光導波層と、 p型 InAlAsからなる半 導体クラッド層と、 n型 InPからなる第 2の n型半導体クラッド層と、 n型 InGaAsPまた は n型 InGaAlAsからなる第 3の n型半導体クラッド層を順次積層して形成された導 波路構造を備えることを特徴とする半導体光変調器。  [14] a first n-type semiconductor cladding layer made of n-type InP, a first non-doped cladding layer made of non-doped InP, a non-doped semiconductor core layer, and a second non-doped cladding layer made of non-doped InP A semiconductor optical waveguide layer formed by sequentially stacking, a semiconductor clad layer made of p-type InAlAs, a second n-type semiconductor clad layer made of n-type InP, and an n-type InGaAsP or n-type InGaAlAs A semiconductor optical modulator comprising a waveguide structure formed by sequentially laminating a third n-type semiconductor clad layer.
[15] 第 1の n型半導体クラッド層と、半導体コア層と、半絶縁型の半導体クラッド層と、第 2の n型半導体クラッド層とを順次積層して形成された導波路構造を備えた半導体光 変調器であって、  [15] A waveguide structure formed by sequentially laminating a first n-type semiconductor clad layer, a semiconductor core layer, a semi-insulating semiconductor clad layer, and a second n-type semiconductor clad layer A semiconductor optical modulator,
p型の導電性を持つ領域である p型半導体領域であって、前記導波路構造の光進 行方向に一定長さ区間の、少なくとも前記第 2の n型半導体クラッド層の一部または すべてに形成された、少なくとも 1つの p型半導体領域と、  A p-type semiconductor region, which is a region having p-type conductivity, and is formed in at least a part or all of the second n-type semiconductor cladding layer in a certain length section in the light traveling direction of the waveguide structure. And at least one p-type semiconductor region,
前記 P型半導体領域上に形成され、前記 p型半導体領域に電気的接続された電極 と を備えたことを特徴とする半導体光変調器。 An electrode formed on the P-type semiconductor region and electrically connected to the p-type semiconductor region; A semiconductor optical modulator comprising:
[16] 前記 p型半導体領域は、前記導波路構造の光進行方向に一定長さ区間の、前記 第 2の n型半導体クラッド層および前記第 2の n型半導体クラッド層に接する前記半導 体クラッド層の一部に形成されていることを特徴とする請求項 15記載の半導体光変 調^。  [16] The p-type semiconductor region is in contact with the second n-type semiconductor cladding layer and the second n-type semiconductor cladding layer in a certain length section in the light traveling direction of the waveguide structure. 16. The semiconductor optical modulation according to claim 15, wherein the semiconductor optical modulation is formed in a part of the cladding layer.
[17] 前記電極は、前記 p型半導体領域および前記第 2の n型半導体クラッド層上に形成 されており、前記 p型半導体領域および前記 n型半導体クラッド層は、前記電極に共 通に電気的接続されていることを特徴とする請求項 15記載の半導体光変調器。  [17] The electrode is formed on the p-type semiconductor region and the second n-type semiconductor clad layer, and the p-type semiconductor region and the n-type semiconductor clad layer are electrically connected to the electrode. 16. The semiconductor optical modulator according to claim 15, wherein the optical modulators are connected to each other.
[18] 前記導波路構造は、ハイメサ導波路構造またはリッジ導波路構造であることを特徴 とする請求項 15記載の半導体光変調器。  18. The semiconductor optical modulator according to claim 15, wherein the waveguide structure is a high mesa waveguide structure or a ridge waveguide structure.
[19] 入力光を 2つに分岐して 2つの出力端力もそれぞれ出力する分岐手段であって、前 記 2つの出力端はそれぞれ、別個の前記導波路構造の入力端に連結されている分 岐手段と、  [19] Branch means for branching the input light into two and outputting the two output end forces, respectively. The two output ends are connected to the input ends of the separate waveguide structures, respectively. And
前記 2つの導波路構造にそれぞれ連結され、該 2つの導波路構造力 出力された 光を合波して出力する合波手段と  Coupling means coupled to the two waveguide structures, respectively, for combining the two waveguide structure forces and outputting the output light;
をさらに備えることを特徴とする請求項 15記載の半導体光変調器。  16. The semiconductor optical modulator according to claim 15, further comprising:
[20] 前記第 1の n型半導体クラッド層上の領域であって、前記半導体コア層が形成され ていない領域上に形成された第 2の電極をさらに備え、 [20] The method further comprises a second electrode formed on a region on the first n-type semiconductor clad layer where the semiconductor core layer is not formed,
前記電極は、前記 p型半導体領域および前記第 2の n型半導体クラッド層上に形成 されており、  The electrode is formed on the p-type semiconductor region and the second n-type semiconductor cladding layer,
前記電極および第 2の電極は、進行波型電極構造であることを特徴とする請求項 1 5記載の半導体光変調器。  16. The semiconductor optical modulator according to claim 15, wherein the electrode and the second electrode have a traveling wave type electrode structure.
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