Classifications

• • H—ELECTRICITY
  • H04—ELECTRIC COMMUNICATION TECHNIQUE
  • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
  • H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
  • H04N19/85—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using pre-processing or post-processing specially adapted for video compression
  • H04N19/86—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using pre-processing or post-processing specially adapted for video compression involving reduction of coding artifacts, e.g. of blockiness
• • H—ELECTRICITY
  • H04—ELECTRIC COMMUNICATION TECHNIQUE
  • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
  • H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
  • H04N19/10—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding
  • H04N19/102—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding characterised by the element, parameter or selection affected or controlled by the adaptive coding
  • H04N19/117—Filters, e.g. for pre-processing or post-processing
• • H—ELECTRICITY
  • H04—ELECTRIC COMMUNICATION TECHNIQUE
  • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
  • H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
  • H04N19/10—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding
  • H04N19/134—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding characterised by the element, parameter or criterion affecting or controlling the adaptive coding
  • H04N19/136—Incoming video signal characteristics or properties
• • H—ELECTRICITY
  • H04—ELECTRIC COMMUNICATION TECHNIQUE
  • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
  • H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
  • H04N19/10—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding
  • H04N19/169—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding characterised by the coding unit, i.e. the structural portion or semantic portion of the video signal being the object or the subject of the adaptive coding
  • H04N19/17—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding characterised by the coding unit, i.e. the structural portion or semantic portion of the video signal being the object or the subject of the adaptive coding the unit being an image region, e.g. an object
  • H04N19/176—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding characterised by the coding unit, i.e. the structural portion or semantic portion of the video signal being the object or the subject of the adaptive coding the unit being an image region, e.g. an object the region being a block, e.g. a macroblock
• • H—ELECTRICITY
  • H04—ELECTRIC COMMUNICATION TECHNIQUE
  • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
  • H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
  • H04N19/60—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using transform coding
  • H04N19/61—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using transform coding in combination with predictive coding
• • H—ELECTRICITY
  • H04—ELECTRIC COMMUNICATION TECHNIQUE
  • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
  • H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
  • H04N19/80—Details of filtering operations specially adapted for video compression, e.g. for pixel interpolation
• • H—ELECTRICITY
  • H04—ELECTRIC COMMUNICATION TECHNIQUE
  • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
  • H04N5/00—Details of television systems
  • H04N5/14—Picture signal circuitry for video frequency region
  • H04N5/21—Circuitry for suppressing or minimising disturbance, e.g. moiré or halo

Definitions

• the present invention relates generally to video processing, and more particularly, to an algorithm for reducing both block artifacts and ringing artifacts in decoded video.
• Digital video compression exploits spatial and temporal correlation or redundancy in image data to reduce the amount of data required to represent video signals.
• lossless compression after decoding, the compressed data is identical to the uncompressed data. In that case, the quality is fixed and the amount of data required to transmit the compressed information will vary. In most consumer applications (e.g. DVD, digital broadcast, etc,) the average bit rate is fixed. Hence, the quality will vary depending on the complexity of the video sequence. This is an example of the "lossy" encoding schemes.
• artifacts include blocking, ringing, and mosquito noise.
• Blocking artifacts result from the image being divided into blocks of 8 lines by 8 pixels prior to encoding. Since the blocks are encoded individually, a coarse quantization utilized to reduce the bit rate will lead to the visibility of the block structure. As a result, a significant part of the image is lost. The reduction of coding artifacts is important for image enhancement. Algorithms do exist that reduce such artifacts. Algorithms that reduce blocking artifacts generally depend on the ability to first detect the edges of the blocks and then measure the degree of blockiness.
• the present invention is directed to a method of processing a video signal.
• the method includes the video signal being split into a low frequency signal and a high frequency signal. The low frequency signal is processed to reduce ringing artifacts.
• the low frequency processing may include low pass filtering or another suitable technique.
• the high frequency signal is processed to reduce blocking artifacts.
• the high frequency processing may include median filtering, low pass filtering, temporal low pass filtering, spatial low pass filtering or another suitable technique.
• the low frequency signal and high frequency signal are then combined to form an output signal.
• the method further includes a flat area being detected in the video signal.
• the high and low frequency processing only is enabled for the flat area detected.
• a flat area is detected by a number of steps. Such steps include a reference pixel and a predetermined number of neighboring pixels being selected. The difference between values of the reference pixel and each of the neighboring pixels is calculated.
• Figure 1 is a diagram showing one example of an algorithm according to the present invention
• Figure 2 is a diagram showing another example of an algorithm according to the present invention
• Figure 3 is a diagram illustrating one example of detecting flat areas according to the present invention
• Figure 4 is a diagram showing one example of a device according to the present invention.
• the present invention is directed to an algorithm that reduces both block artifacts and ringing artifacts in decoded video.
• the input signal Yin is a video signal that has been decoded by any block based coding scheme such as JPEG, MPEG-1, MPEG-2, MPEG-4 or H.264. As can be seen from Figure 1, the input signal Yin is input into a band-splitter 2.
• the band-splitter 2 will divide the input signal into a low frequency signal and a high frequency signal so that these signals may be separately processed.
• the present invention is not limited to any specific frequency range for the low and high frequency signals. However, for a standard definition (SD) signal of 5 MHZ, anything below 2 MHZ could be in the low frequency signal and anything above 2 MHZ could be in the high frequency signal. For a high definition signal of 10-20 MHZ, anything below 5 MHZ could be in the low frequency signal and anything above 5 MHZ could be in the high frequency signal.
• SD standard definition
• 10-20 MHZ anything below 5 MHZ could be in the low frequency signal and anything above 5 MHZ could be in the high frequency signal.
• the outputs of the band-splitter 2 are provided to a low frequency processor 4 and a high frequency processor 6.
• the low frequency processor 4 processes the low frequency signal in order to reduce ringing artifacts.
• the high frequency processor 6 processes the high frequency signal to reduce blocking artifacts.
• the low frequency processor 4 may be embodied by a low pass filter or any other suitable technique.
• the high frequency processor 6 may be embodied by a median filter, low pass filter, temporal low pass filter, spatial low pass filter or any other suitable technique.
• the outputs of the low and high frequency processors 4,6 are provided to an adder 8.
• the adder 8 combines the low and high frequency signals that were previously separately processed into an output video signal Yout. Further, the adder 8 will also limit the values of the output signal Yout.
• the band-splitter 2 is implemented by a 2-D low pass filter and an adder 12. As previously described, the band-splitter 2 divides the input signal into a low frequency signal and a high frequency signal so that these signals may be separately processed.
• the low pass filter 10 will filter the input signal Yin to produce the low frequency signal.
• the adder 12 than adds the negative value of the low frequency signal to the input signal Yin to produce the high frequency signal.
• the low pass filter 10 may be implemented by a nine tap 2-D filter with filter coefficients of 1/16, 1/16, 1/16, 1/16, 1/2, 1/16, 1/16, 1/16 and 1/16.
• the band splitter 2 may be implemented by a 2D-high pass filter instead of the low pass filter.
• the high pass filter will produce the high frequency signal from the input signal and the low frequency signal will be produced by subtracting the high frequency signal from the input signal.
• the low frequency processor 4 is implemented by a 2-D low pass filter.
• the low frequency processor 4 processes the low frequency signal in order to reduce ringing artifacts.
• the low pass filter 4 will filter the low frequency signal in order to reduce ringing artifacts.
• the low pass filter 4 may be implemented by a nine tap 2-D filter with filter coefficients of 1/16, 1/8, 1/16, 1/8, 1/4, 1/8, 1/16, 1/8 and 1/16.
• the degree of ringing in the input signal could be determined or known, it would be possible to use different filters for a different degrees of ringing.
• a nine tap 2-D filter with filter coefficients of 1/16, 1/16, 1/16, 1/16, 1/2, 1/16, 1/16, 1/16 and 1/16 may be used if the degree of ringing is small.
• the high frequency processor 6 is implemented by a median filter. As previously described, the high frequency processor 6 processes the high frequency signal to reduce blocking artifacts. Thus, during operation, the median filter 6 will process the high frequency in order to reduce the blocking artifacts.
• the median filter processing consists of looking at pixels in both the horizontal and vertical direction and picking the pixels with the middle value. In a three tap median filter, a reference pixel and two neighboring pixels are ranked and the reference pixel takes the value that is in the middle.
• a flat area detector 16 is included to selectively enable the low pass filter 4 and median filter 6 to only process pixels associated with flat areas.
• another low pass filter 14 is included to filter the input signal Yin.
• the low pass filter 14 removes any noise or disturbances before the input signal reaches the flat area detector 16.
• the low pass filter 4 may be implemented by a nine tap 2-D filter with filter coefficients of 1/16, 1/8, 1/16, 1/8, 1/4, 1/8, 1/16, 1/8 and 1/16.
• the flat area detector 16 detects flat areas in the input signal Yin. A flat area corresponds to an area where the difference between neighboring pixels is low. During operation, if a flat area is detected, the flat area detector 16 will provide an enabling signal (Fad_on) in order to enable the low pass filter 4 and median filter 6. Thus, the low pass filter 4 and median filter 6 will process the pixels associated with the flat area detected.
• AvSumDev SumDev / 4 (3)
• the average of the deviations AvSumDev is a value that represents the probability an area is a flat area.
• the AvSumDev is then compared to a threshold. If the AvSumDev is below the threshold, then it is a flat area. If the AvSumDev is above the threshold, then it is not a flat area. In one example, the value six (6) was used as a threshold. However, if a noise estimator is available, the output of the noise estimator to control this threshold.
• the device may represent a television, a set-top box, a personal computer, a printer or an optical recording device such as a digital video recorder or a DVD as well as portions or combinations of these and other devices.
• the device includes a processor 18, a memory 20, a bus 22 and one or more input/output devices 24.
• the device In case of the device being a television or a computer, it would also include a display 26.
• the input/output devices 24, processor 18 and memory 20 communicate over the bus 22.
• the input video signal input signal is processed in accordance with one or more software programs stored in memory 20 and executed by processor 18 in order to generate an output video signal. This output video signal can be shown on the display device 26.
• the software programs stored in the memory 14 may include a decoder.
• the decoder stored in memory may be a JPEG, MPEG-1, MPEG-2, MPEG-4, H.261, H.263 or H.264 decoder.
• the software programs in the memory 20 would also include the algorithm that reduces both block artifacts and ringing artifacts as previously described and shown in Figure 1 or 2. In this embodiment, these algorithms are implemented by computer readable code stored in the memory 20 and executed by the processor 18. In other embodiments, hardware circuitry may be used in place of, or in combination with, software instructions to implement the invention. While the present invention has been described above in terms of specific examples, it is to be understood that the invention is not intended to be confined or limited to the examples disclosed herein. Therefore, the present invention is intended to cover various structures and modifications thereof included within the spirit and scope of the appended claims.

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• Engineering & Computer Science (AREA)
• Multimedia (AREA)
• Signal Processing (AREA)
• Picture Signal Circuits (AREA)
• Compression Or Coding Systems Of Tv Signals (AREA)

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• 2005
  • 2005-05-16 JP JP2007517556A patent/JP2007538451A/ja active Pending
  • 2005-05-16 KR KR1020067024121A patent/KR20070026507A/ko not_active Application Discontinuation
  • 2005-05-16 US US11/578,757 patent/US20070274397A1/en not_active Abandoned
  • 2005-05-16 EP EP05735168A patent/EP1751983A1/de not_active Withdrawn
  • 2005-05-16 WO PCT/IB2005/051586 patent/WO2005112469A1/en not_active Application Discontinuation
  • 2005-05-16 CN CNA2005800158226A patent/CN1954615A/zh active Pending

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