WO2005071739A3 - Plasmaangeregtes chemisches gasphasenabscheide-verfahren, silizium-sauerstoff-stickstoff-haltiges material und schicht-anordnung - Google Patents
Plasmaangeregtes chemisches gasphasenabscheide-verfahren, silizium-sauerstoff-stickstoff-haltiges material und schicht-anordnung Download PDFInfo
- Publication number
- WO2005071739A3 WO2005071739A3 PCT/DE2005/000088 DE2005000088W WO2005071739A3 WO 2005071739 A3 WO2005071739 A3 WO 2005071739A3 DE 2005000088 W DE2005000088 W DE 2005000088W WO 2005071739 A3 WO2005071739 A3 WO 2005071739A3
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- WO
- WIPO (PCT)
- Prior art keywords
- silicon
- nitrogen
- oxygen
- plasma
- vapor deposition
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- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
- C23C16/22—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of inorganic material, other than metallic material
- C23C16/30—Deposition of compounds, mixtures or solid solutions, e.g. borides, carbides, nitrides
- C23C16/308—Oxynitrides
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- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
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- H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
- H01L21/02126—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC
- H01L21/0214—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC the material being a silicon oxynitride, e.g. SiON or SiON:H
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- H01L21/02164—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon oxide, e.g. SiO2
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- H01L21/02263—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
- H01L21/02271—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
- H01L21/02274—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition in the presence of a plasma [PECVD]
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- H01L21/02318—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment
- H01L21/02362—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment formation of intermediate layers, e.g. capping layers or diffusion barriers
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- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/314—Inorganic layers
- H01L21/3143—Inorganic layers composed of alternated layers or of mixtures of nitrides and oxides or of oxinitrides, e.g. formation of oxinitride by oxidation of nitride layers
- H01L21/3145—Inorganic layers composed of alternated layers or of mixtures of nitrides and oxides or of oxinitrides, e.g. formation of oxinitride by oxidation of nitride layers formed by deposition from a gas or vapour
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
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- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
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- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/7682—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing the dielectric comprising air gaps
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- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/5222—Capacitive arrangements or effects of, or between wiring layers
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- H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
- H01L21/0217—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon nitride not containing oxygen, e.g. SixNy or SixByNz
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- H01L21/022—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being a laminate, i.e. composed of sublayers, e.g. stacks of alternating high-k metal oxides
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
- H01L21/76807—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics for dual damascene structures
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- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
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- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/12—Passive devices, e.g. 2 terminal devices
- H01L2924/1204—Optical Diode
- H01L2924/12044—OLED
Abstract
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US10/586,788 US7755160B2 (en) | 2004-01-22 | 2005-01-22 | Plasma excited chemical vapor deposition method silicon/oxygen/nitrogen-containing-material and layered assembly |
EP05714893A EP1706902A2 (de) | 2004-01-22 | 2005-01-22 | Plasmaangeregtes chemisches gasphasenabscheide-verfahren, silizium-sauerstoff-stickstoff-haltiges material und schicht-anordnung |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE102004003337.4 | 2004-01-22 | ||
DE102004003337A DE102004003337A1 (de) | 2004-01-22 | 2004-01-22 | Plasmaangeregtes chemisches Gasphasenabscheide-Verfahren, Silizium-Sauerstoff-Stickstoff-haltiges Material und Schicht-Anordnung |
Publications (2)
Publication Number | Publication Date |
---|---|
WO2005071739A2 WO2005071739A2 (de) | 2005-08-04 |
WO2005071739A3 true WO2005071739A3 (de) | 2006-03-02 |
Family
ID=34800906
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/DE2005/000088 WO2005071739A2 (de) | 2004-01-22 | 2005-01-22 | Plasmaangeregtes chemisches gasphasenabscheide-verfahren, silizium-sauerstoff-stickstoff-haltiges material und schicht-anordnung |
Country Status (5)
Country | Link |
---|---|
US (1) | US7755160B2 (de) |
EP (1) | EP1706902A2 (de) |
KR (1) | KR100813591B1 (de) |
DE (1) | DE102004003337A1 (de) |
WO (1) | WO2005071739A2 (de) |
Families Citing this family (14)
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DE102004050391B4 (de) * | 2004-10-15 | 2007-02-08 | Infineon Technologies Ag | Verfahren zum Herstellen einer Schicht-Anordnung und Schicht-Anordnung |
EP2005468A1 (de) | 2006-03-30 | 2008-12-24 | Koninklijke Philips Electronics N.V. | Verbesserung der kontrolle einer lokalisierten luftspaltbildung in einem verbindungsstapel |
US7863150B2 (en) * | 2006-09-11 | 2011-01-04 | International Business Machines Corporation | Method to generate airgaps with a template first scheme and a self aligned blockout mask |
US20090041952A1 (en) * | 2007-08-10 | 2009-02-12 | Asm Genitech Korea Ltd. | Method of depositing silicon oxide films |
DE102009010845B4 (de) * | 2009-02-27 | 2016-10-13 | Advanced Micro Devices, Inc. | Verfahren zur Herstellung eines Mikrostrukturbauelements mit einer Metallisierungsstruktur mit selbstjustierten Luftspalten und wieder aufgefüllten Luftspaltausschließungszonen |
CN103459321B (zh) | 2011-04-14 | 2016-09-21 | 户田工业株式会社 | Li-Ni复合氧化物颗粒粉末及其制造方法、以及非水电解质二次电池 |
US10211146B2 (en) * | 2016-05-12 | 2019-02-19 | Globalfoundries Inc. | Air gap over transistor gate and related method |
US10157777B2 (en) | 2016-05-12 | 2018-12-18 | Globalfoundries Inc. | Air gap over transistor gate and related method |
US9859151B1 (en) | 2016-07-08 | 2018-01-02 | Asm Ip Holding B.V. | Selective film deposition method to form air gaps |
CN110880475B (zh) * | 2018-09-06 | 2023-06-16 | 长鑫存储技术有限公司 | 空气隙形成方法 |
US10985051B2 (en) * | 2019-07-24 | 2021-04-20 | Nanya Technology Corporation | Semiconductor device with air spacer and method for forming the same |
US11450601B2 (en) * | 2019-09-18 | 2022-09-20 | Micron Technology, Inc. | Assemblies comprising memory cells and select gates |
US11127678B2 (en) * | 2019-12-10 | 2021-09-21 | Globalfoundries U.S. Inc. | Dual dielectric layer for closing seam in air gap structure |
US20240008252A1 (en) * | 2022-06-29 | 2024-01-04 | Nanya Technology Corporation | Semiconductor structure having air gap |
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2004
- 2004-01-22 DE DE102004003337A patent/DE102004003337A1/de not_active Withdrawn
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2005
- 2005-01-22 EP EP05714893A patent/EP1706902A2/de not_active Withdrawn
- 2005-01-22 KR KR1020067016880A patent/KR100813591B1/ko active IP Right Grant
- 2005-01-22 US US10/586,788 patent/US7755160B2/en not_active Expired - Fee Related
- 2005-01-22 WO PCT/DE2005/000088 patent/WO2005071739A2/de active Application Filing
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DE4118165A1 (de) * | 1990-06-05 | 1991-12-12 | Mitsubishi Electric Corp | Halbleitereinrichtung mit schutzisolierschicht und herstellungsverfahren fuer dieselbe |
JPH06216122A (ja) * | 1993-01-13 | 1994-08-05 | Kawasaki Steel Corp | 半導体装置の製造方法 |
US6211057B1 (en) * | 1999-09-03 | 2001-04-03 | Taiwan Semiconductor Manufacturing Company | Method for manufacturing arch air gap in multilevel interconnection |
US6445072B1 (en) * | 2000-07-17 | 2002-09-03 | Advanced Micro Devices, Inc. | Deliberate void in innerlayer dielectric gapfill to reduce dielectric constant |
DE10125019A1 (de) * | 2001-05-22 | 2002-12-05 | Infineon Technologies Ag | Hohlraumstruktur, Mehrfach-Hohlraumstruktur und Verfahren zum Herstellen einer Hohlraumstruktur |
WO2003019649A2 (de) * | 2001-08-20 | 2003-03-06 | Infineon Technolgies Ag | Leiterbahnanordnung und verfahren zum herstellen einer leiterbahnanordnung |
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Also Published As
Publication number | Publication date |
---|---|
US7755160B2 (en) | 2010-07-13 |
WO2005071739A2 (de) | 2005-08-04 |
DE102004003337A1 (de) | 2005-08-18 |
US20080308898A1 (en) | 2008-12-18 |
KR100813591B1 (ko) | 2008-03-17 |
EP1706902A2 (de) | 2006-10-04 |
KR20060123572A (ko) | 2006-12-01 |
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