WO2005057545A1 - Circuit d'attaque pour dispositif d'affichage - Google Patents

Circuit d'attaque pour dispositif d'affichage Download PDF

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Publication number
WO2005057545A1
WO2005057545A1 PCT/IB2004/052662 IB2004052662W WO2005057545A1 WO 2005057545 A1 WO2005057545 A1 WO 2005057545A1 IB 2004052662 W IB2004052662 W IB 2004052662W WO 2005057545 A1 WO2005057545 A1 WO 2005057545A1
Authority
WO
WIPO (PCT)
Prior art keywords
driving signal
driving
driving circuit
voltage
capacitive load
Prior art date
Application number
PCT/IB2004/052662
Other languages
English (en)
Inventor
Shuji Hagino
Martin Rudolf Herrmann
Marko Radovic
Eckart Rzittka
Original Assignee
Koninklijke Philips Electronics N.V.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Koninklijke Philips Electronics N.V. filed Critical Koninklijke Philips Electronics N.V.
Priority to US10/596,131 priority Critical patent/US20070097152A1/en
Priority to JP2006542106A priority patent/JP2007515673A/ja
Priority to EP04801461A priority patent/EP1695333A1/fr
Publication of WO2005057545A1 publication Critical patent/WO2005057545A1/fr

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Classifications

    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/2007—Display of intermediate tones
    • G09G3/2011—Display of intermediate tones by amplitude modulation
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3685—Details of drivers for data electrodes
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0243—Details of the generation of driving signals
    • G09G2310/0248—Precharge or discharge of column electrodes before or after applying exact column voltages
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0264—Details of driving circuits
    • G09G2310/0267—Details of drivers for scan electrodes, other than drivers for liquid crystal, plasma or OLED displays
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0264—Details of driving circuits
    • G09G2310/027—Details of drivers for data electrodes, the drivers handling digital grey scale data, e.g. use of D/A converters
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0264—Details of driving circuits
    • G09G2310/0291—Details of output amplifiers or buffers arranged for use in a driving circuit
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/02—Improving the quality of display appearance
    • G09G2320/0252—Improving the response speed
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2330/00—Aspects of power supply; Aspects of display protection and defect management
    • G09G2330/02—Details of power systems and of start or stop of display operation
    • G09G2330/021—Power management, e.g. power saving
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3685—Details of drivers for data electrodes
    • G09G3/3688—Details of drivers for data electrodes suitable for active matrices only

Definitions

  • the present invention widely relates to a driving circuit of a display device.
  • the present invention relates to a driving circuit for supplying a target voltage signal to a capacitive load in a display device, and more specifically, to a display driving circuit for applying voltages corresponding to pixel information signals to column electrodes of a display device such as a liquid crystal display panel.
  • Background Art
  • Patent Document 1 describes such a type of driving circuit.
  • This driving circuit is arranged to switch on a pre-charge switching element in a buffer amplification section in advance at the time the common voltage is inverted on a horizontal period basis so as to pre-charge an output terminal to a power supply potential or ground potential, and then the potential is made decreased or increased to the intermediate potential by operating a selection switching element.
  • the output voltage is pulled to the intermediate potential after being pre-charged to the power supply potential or ground potential, it is possible to faster apply the desired voltage to a liquid crystal capacitance when a target voltage is near the intermediate potential.
  • a driving circuit for driving a capacitive load of a display device, comprising: driving signal supplying means for supplying a driving signal having a target voltage to be applied; an amplifying stage for receiving the driving signal and selectively outputting the driving signal to the capacitive load; and a pair of current sources for selectively supplying a positive current and a negative current to the capacitive load, respectively during their on-states, the driving circuit repeating a repetitive operation including a pre-operation where any one of the current sources is switched ON in accordance with the driving signal and then switched OFF and a post- operation where the amplifying stage is switched to a state for outputting the driving signal to the capacitive load after the pre-operation.
  • a duration length of an ON period of the relevant current source and / or a current supply rate of the relevant current source during the pre-operation may be made variable in accordance with a value of the driving signal in a repetition period of the repetitive operation. It is thereby possible to make the output substantially equal to the target voltage based on a predetermine reference voltage after the pre-operation is finished, the amplifying stage is thus only required to operate to output the subsequent stable voltage, and it is thereby possible to suppress the useless power consumption in the amplifying stage as much as possible.
  • a duration length of an ON period of the relevant current source and/or a current supply rate of the relevant current source during the pre-operation may be made variable in accordance with a value of the driving signal in a repetition period of the repetitive operation and a value of the driving signal in another repetition period previous to said repetition period. In this way, without using the reference voltage, it is possible to make the output substantially equal to the target voltage after finishing the pre-operation.
  • a driving circuit for driving a capacitive load of a display device, comprising: driving signal supplying means for supplying a driving signal having a target voltage to be applied; an amplifying stage for receiving the driving signal and selectively outputting the driving signal to the capacitive load; a pair of power sources for selectively performing charging and discharging to the capacitive load, respectively; and comparing means having one input receiving a voltage value of the driving signal and the other input receiving a voltage value on an output line coupled to the capacitive load, the driving circuit repeating a repetitive operation including a pre-operation where charging or discharging is performed by any one of the power sources and then stopped and a post-operation where the amplifying stage is switched to a state for outputting the driving signal to the capacitive load after the pre-operation, the charging and discharging operation performed by the pair of the power sources being controlled based on a comparison output of the comparing means during the pre-operation.
  • This aspect may take the following manner: a discharging operation is performed if the comparison output indicates that the voltage value on the output line is greater than the voltage value of the driving signal, an a charging operation is performed if the comparison output indicates that the voltage value on the output line is smaller than the voltage value of the driving signal; and in addition, one of the charging and discharging operations is continued until the comparison output indicates that the voltage value on the output line reaches the voltage value of the driving signal.
  • the target voltage may be a grayscale voltage
  • the capacitive load may be a liquid crystal cell
  • the driving signal supplying means may include analog to digital converting means. It is thus possible to take full advantages described above in a display device.
  • the present invention also provides a display device making use of features of the driving circuit described above.
  • the amplifying stage is only required to take a form of outputting the driving signal selectively, and therefore it should be understood that the stage includes a form without having an amplifier, as described below. Description of Drawings
  • FIG. 1 is a block diagram illustrating a schematic configuration of a driving circuit according to a first embodiment of the present invention
  • Fig. 2 is a time chart illustrating the operation in the driving circuit as illustrated in Fig. 1;
  • FIG. 3 is a block diagram illustrating a schematic configuration of a driving circuit according to a second embodiment of the present invention.
  • Fig. 4 is a time chart illustrating the operation in the driving circuit as illustrated in Fig. 3;
  • FIG. 5 is a block diagram illustrating a schematic configuration of a driving circuit of a modification complying with the present invention
  • FIG. 6 is a block diagram illustrating a configuration upstream from the driving circuit, which includes a control signal generating circuit applied to each embodiment;
  • Fig. 7 is a table showing a data storage state in a look-up table memory in the control signal generating circuit
  • Fig. 8 is a conceptual view showing a relationship between grayscale levels and driving voltage levels
  • FIG. 9 is a block diagram illustrating a schematic configuration of a driving circuit according to a third embodiment 3 of the present invention
  • FIG. 10 is a time chart illustrating the operation in the driving circuit as illustrated in Fig. 9;
  • FIG. 11 is a block diagram illustrating a schematic configuration of a driving circuit according to one modification of the present invention.
  • Fig. 12 is a time chart illustrating the operation in the driving circuit as illustrated in Fig. 11 ;
  • Fig. 13 is a block diagram illustrating a schematic configuration of a driving circuit according to another modification of the present invention. Best Mode
  • FIG. 1 illustrates a schematic configuration of a driving circuit according to a first embodiment of the present invention.
  • the driving circuit is to drive a capacitive load of a display device, and in this embodiment, is a driving circuit for supplying a pixel information signal to each column electrode of a passive or active matrix type liquid crystal display panel.
  • the driving circuit has at its first stage a gray-scale voltage generating circuit 10 which serves as driving signal supplying means for supplying a driving signal with the target voltage to be applied, the generating circuit 10 having a function of digital to analog conversion.
  • the gray-scale voltage generating circuit 10 has a voltage dividing circuit formed of a plurality of resistance elements connected in series to each other. As shown in Fig. 1, the voltage dividing circuit 10 is coupled at its one end to a positive power supply voltage Vdd, while being coupled at the other end to a negative power supply voltage Vss.
  • the voltage dividing circuit 10 divides a voltage between Vdd and Vss, and generates a plurality of gray-scale voltages that have stepwise increasing or decreasing gradient.
  • Common connection points of the resistance elements are connected to one ends of switching elements, respectively.
  • the other ends of the switching elements are all commonly connected and led out as an output end of the gray-scale voltage generating circuit 10.
  • the switching elements can individually be controlled, and any one of the switching elements is switched ON in accordance with an input pixel information signal Vdata. In this way, only a switching element having been switched ON relays a gray-scale voltage corresponding to a gray-scale level indicated by the pixel information signal Vdata among various gray-scale voltages made in the dividing circuit, and a driving signal Vin with the relayed grayscale voltage is outputted.
  • the driving circuit further has an amplifying stage 20 that receives the driving signal Vin.
  • the amplifying stage 20 has an amplifier 21 with signal input and output terminals and positive and negative power supply terminals, and a pair of switching elements SW-A and SW-A coupled to the positive power supply terminal and signal output terminal of the amplifier 21, respectively.
  • One of the switching elements, SW-A is connected at one end to the positive power supply terminal of the amplifier 21, while being connected at the other end to the positive power supply voltage Vdd.
  • the other one of the switching elements, SW-A is connected at one end to the signal output terminal of the amplifier 21, while being connected at the other end to an output line 40.
  • the pair of switches SW-A and SW-A are synchronized with each other in ON/OFF operation, and are ON or OFF simultaneously in response to a common control signal C .
  • the pair of switches SW-A and SW-A are ON, the driving signal Vin from the gray-scale voltage generating circuit 10 is outputted to the output line 40 via the activated amplifier 21.
  • the amplifier 21 is not powered by the supply and are isolated from the output line 40, so that the amplifier 21 does not involve power consumption. It is noted that the embodiment is intended to use a configuration based on a pair of switches, i.e., two switches, SW-A and SW-A as means for controlling the driving signal Vin about whether or not to relay to the output line 40.
  • the driving circuit further has an output stage 30 downstream from the amplifying stage 20.
  • the output stage 30 has, as basic structural elements, a current source Ipcp (preferably, stabilized) which is coupled to the positive power supply voltage Vdd and generates a current with a positive polarity (current that flows into the output line 40), and a current source Ipcn (preferably, stabilized) which is coupled to the negative power supply voltage Vss and generates a current with a negative polarity (current that flows from the output line 40).
  • the output stage 30 further has switches SW-B and SW-C that are connected between the current source Ipcp and the output line 40, and between the current source Ipcn and the output line 40, respectively.
  • the switches SW- B and SW-C are to control conduction out-of-conduction between the current source Ipcp, Ipcn and the output line 40, and are capable of being individually controlled to ON or OFF separately in accordance with a control signal C B , C C .
  • the switch SW-B is ON, the current with the positive polarity from the current source Ipcp is supplied to the output line 40 via the switch SW-B.
  • the output line 40 is connected to a column electrode extending longitudinally in a liquid crystal display panel.
  • the column electrode is to specify one potential to determine an optical state of a pixel of the liquid crystal medium in the liquid crystal display panel, and applies the voltage locally to the liquid crystal medium in cooperation with, for example, a so-called common electrode 50 that specifies another potential.
  • the column electrode and liquid crystal medium can be regarded as an equivalent capacitance Ccol sandwiched between the output line 40 and the common electrode 50.
  • the driving circuit supplies the driving signal to the equivalent capacitance Ccol as a capacitive load.
  • this Embodiment may cover a configuration where an active element such as a TFT (Thin Film Transistor) is provided for each pixel and the one potential is given via the active element to the pixel in accordance with a driving signal supplied to the column electrode, and may cover a configuration where the common electrode 50 is replaced with row electrodes extending longitudinally and crossing the column electrodes.
  • TFT Thin Film Transistor
  • the driving circuit performs a basic operation including a pre-operation in the output stage 30 based on the current sources and a post-operation where the amplifying stage 20 ultimately stabilizes the output line 40 at a potential of the driving signal Vin after the pre-operation.
  • the switch SW-C is switched OFF, and the switches SW-A and SW-A are switched ON. Accordingly, the discharging of the equivalent capacitance Ccol due to the cu ⁇ ent source Ipcn is stopped while an output of the amplifier 21 is supplied to the output line 40. Therefore, in the horizontal scanning period, the amplifier 21 relays to the output line 40 the driving signal Vin having a target gray-scale voltage designated by the pixel information signal Vdata, and the output line 40 converges to the driving signal level (see t4- in Vout (1)).
  • the driving circuit repeats the repetitive operation, while alternating the driving polarities every horizontal scanning period, including the pre-operation (pre-charge period) where only any one of the current sources Ipcp and Ipcn is switched ON in accordance with the driving signal Vin and then switched OFF, and the post-operation where the amplifying stage 20 is switched to a state for outputting the driving signal Vin to the equivalent capacitance Ccol as the capacitive load after the pre-operation is carried out.
  • the pre-charge periods of the current sources Ipcp and Ipcn are set to time periods T and T according to the driving signal Vin in the horizontal scanning period (i.e., time periods required for charging/discharging up to the target voltage), and the switches SW-A , SW-A , SW-B and SW-C are controlled in co ⁇ espondence with the periods T and T , whereby the voltage varies without useless transitions as compared to the case where the periods are set to the constant time period (T ). In this way, it is possible to suppress the loss in driving the equivalent capacitance as much as possible and to limit the power consumption in the amplifier 21 to a required minimum level.
  • the embodiment adopts a so-called alternating-current driving system, wherein the target voltage with the positive polarity and the target voltage with a negative polarity with respect to the reference potential applied to the common electrode 50 are outputted in alternation on a horizontal scanning period basis
  • the present invention is not confined to such an alternating-current driving form.
  • the switch SW-B may be switched ON in the current horizontal scanning period to use the current source Ipcp enabling the charging.
  • the switch SW-C may be switched ON in the current horizontal scanning period to use the current source Ipcn enabling the discharging.
  • the switch SW-C may be switched ON in the current horizontal scanning period to use the current source Ipcn enabling the discharging.
  • Fig. 3 illustrates a variable current supply rate type driving circuit, where variable rate type of power sources Ipcpv and Ipcnv are adopted, instead of the constant rate type of current sources Ipcp and Ipcn, and control signals CI B and CI C are inputted to the current sources Ipcpv and Ipcnv to designate the respective rates appropriate to them.
  • Fig. 4 illustrates the operation in the variable current rate type driving circuit, where with the pre-charge period kept being a constant time period T , the current supply rates of the current sources Ipcpv and Ipcnv are set at values required for the output line 40 to reach a target voltage within the constant time period T in accordance with a value of driving signal Vin. Accordingly, as distinct from the case of setting current supply rates at fixed values as shown by the dotted lines in Nout' in Fig. 4, it is possible to perform control such that the output voltage almost reaches a target voltage every time after the constant time period T has elapsed, even when the pre-charge period is fixed.
  • the configuration in Fig. 3 is applicable to the case of making both length of period and rate of the pre-charging variable.
  • the control signals C and C C for the switches SW-B and SW-C and the rate control signals CI B and CI C may be determined so as to set both of the pre-charging period length and rate at appropriate values in accordance with the value of the driving signal Vin.
  • Fig. 6 illustrates a configuration upstream from the driving circuit, which includes a circuit for generating control signals C , C and C .
  • a digital image signal D y supplied from a signal system, not shown, is once stored in a 2-line memory 110, while an output of readout from the memory 110 is transferred to a decoder 120.
  • the memory 110 is capable of storing the image data corresponding to two horizontal scanning periods.
  • the stored image data indicate an absolute value of a gray-scale level of each pixel in form of six bits per pixel, and further indicate a polarity of the gray-scale level of each pixel using one additional bit.
  • the decoder 120 decodes the transferred data to determine which of the switching elements in the gray-scale voltage generating circuit 10 should be turned ON, and generates the pixel information signal Vdata according to the decoding result.
  • the gray-scale voltage generating circuit 10 switches ON a switch corresponding to the gray-scale level according to the pixel information signal Vdata, and thus supplies the corresponding driving signal Vin to the later stage of circuit.
  • the output of the memory 110 is also transferred to a control signal generating circuit 130.
  • the control signal generating circuit 130 comprises a Look-Up Table (LUT) memory 131 which receives the previous data, as well as the current data, namely which also receives data of a horizontal scanning period immediately before the horizontal scanning period to be presently subjected to displaying, and generates control signals C B and C C based on the current and last data.
  • LUT Look-Up Table
  • Fig. 7 conceptually illustrates the data stored in the LUT memory 131.
  • kinds of the previous pixel data are indicated in rows
  • kinds of the current pixel data are indicated in columns
  • each section where the associated row and column cross each other indicates a value to be currently set for the control signals C B and C C .
  • the previous pixel data indicates a value of '2' in negative polarity
  • the cu ⁇ ent pixel data indicates a value of '1' in positive polarity
  • a section of 'N2P1' stores data indicative of how to set the control signals C B and C C .
  • values of the control signals C B and C C are not changed, and sections in such cases indicate '0'.
  • the sections of '0' form a diagonal line from the upper left-hand corner to the bottom right-hand corner of the table. Sections above the diagonal line co ⁇ espond to the cases of selecting the switch SW-B in a horizontal scanning period, while sections under the diagonal line correspond to the case of selecting the switch SW-C in a horizontal scanning period.
  • data indicative of the setting on the control signals C B and C C to store data indicative of a duration length of a pre-charge period is used in an embodiment for varying the pre-charge period, or data indicative of a pre-charge rate is used in an embodiment for varying the pre-charge rate.
  • the LUT memory 131 in the configuration in Fig. 6 outputs the control sig °nals CI B and CI C .
  • the duration length of a period or the charge rate indicated in a section of 'N0N2' is greater than that indicated in a section of 'N0N1'. This is because the voltage level needs to be varied larger in the case of changing the most black level in a negative polarity to a black level close to white by two steps (N0N2) than in the case of changing the most black level in a negative polarity to a black level close to white by one step (N0N1), as shown in Fig. 8.
  • control signals C B and C C (or CI B and CI C ) so as to indicate thus determined duration length of pre-charge period and/or pre-charge rate, it is possible to achieve the control of appropriate pre-charge of the cu ⁇ ent sources.
  • a configuration as illustrated in Fig. 9 may be used as an example of simplifying the control of pre-charge.
  • an additional pair of switches are further provided downstream from the output stage 30 in the configuration illustrated in Fig. 3.
  • This pair of switches are composed of a switch SW-D to connect the positive power supply voltage Vdd and output line 40 and a switch SW-E to connect the negative power supply voltage Vss and output line 40.
  • the switch SW-D is ON first for a predetermined time period T ' in accordance with the driving signal Vin if it is directed to positive driving, or the switch SW-E is ON first for a predetermined time period T ' in accordance with the driving signal Vin if it is directed to negative driving, so that the output voltage is once pulled up to the maximum level Vdd or pulled down to the minimum level Vss of the power supply voltage, respectively.
  • the switch SW-B or SW-C is controlled to be ON in accordance with the driving signal Vin in the horizontal scanning period.
  • control of pre-charge to the target voltage may be based on the duration length of a pre-charge period using the control signals C B and C C , or may be based on the pre-charge rate using the control signals CI B and CI C .
  • FIGs. 9 and 10 The embodiment shown in Figs. 9 and 10 is intended to compare the present value of the driving signal Vin with a reference value to define a duration length or rate of pre-charge, where the positive and negative maximum possible values are set as the reference value. If the former is larger than the latter, pre-charging is performed such that the output voltage Vout is increased as in the period Tp . If the former is smaller than the latter, pre-charging is performed such that the output Vout is reduced as in the period Tp . Thus, such comparison of the present value can lead to definition of charging mode.
  • FIG. 11 shows a general configuration of a driving circuit according to the modification.
  • Fig. 11 there are provided comparators 61 and 62 that receive the driving signal Vin at their first inputs, respectively and receive the output voltage Vout at their second inputs, respectively.
  • a comparison output of the comparator 61 becomes a control signal for the switch SW-B
  • a comparison output of the comparator 62 becomes a control signal for the switch SW-C.
  • the comparator 61 compares the voltage value of the driving signal Vin with a value of the output value Vout, and generates an output of a high level for turning on the switch SW-B only when the voltage value of the driving signal Vin is greater than it.
  • the comparator 62 compares the voltage value of the driving signal Vin with a value of the output value Vout, and generates an output of a high level for turning on the switch SW-C only when the voltage value of the driving signal Vin is smaller than it.
  • Fig. 12 is a time chart representing the operation of this driving circuit, wherein the driving signal Vin makes its voltage changes of v , v , v each time the horizontal scanning period is changed, as an example.
  • the comparator 61 compares the drive signal Vin with the output voltage Vout, in which its comparison output is held at a low level during a preceding period T because the driving signal Vin as well as the output voltage Vout remains having a voltage value v .
  • the comparator 61 makes a comparison output of a high level because the driving signal Vin is switched to a higher voltage value v than the voltage value v .
  • the high level output of the comparator 61 causes the switch SW-B to be turned on, so that the cu ⁇ ent from the cu ⁇ ent source Ipcp is provided to the output line 40 through the switch SW-B.
  • the value of the output voltage Vout is gradually increased as shown in the Figure, but when the voltage value v of the driving signal Vin is not determined to be greater than the value of the output voltage Vout, or equivalently, when the value of the output voltage Vout is equal to or greater than the value of the driving signal Vin (time t2), the comparator 61 can not make a high level comparison output any more to change its comparison output to a low level.
  • the switch SW-B is terned off and the switches SW-A , SW-A are turned on.
  • the output voltage Vout stops rising, and the output voltage Vout is held at the voltage value vl of the driving signal Vin on the output line 40 on the basis of the operation of the amplifier 21 until the driving signal Vin is updated in the next horizontal scanning period.
  • the comparator 62 compares the driving signal Vin with the output voltage Vout, and holds its comparison output at a low level during the preceding period T because the driving signal Vin as well as the output voltage Vout has still the voltage value v .
  • the comparator 62 makes a comparison output of a high level because the driving signal Vin is switched to a lower voltage value v than the voltage value v .
  • the high level output of the comparator 62 causes the switch SW-C to be turned on, so that the negative cu ⁇ ent from the cu ⁇ ent source Ipcn is provided on the output line 40 through the switch SW-C. Accordingly, the value of the output voltage Vout is gradually decreased as shown in the Figure, but when the voltage value v of the driving signal Vin is not determined to be smaller than the value of the output voltage Vout, namely, when the value of the output voltage Vout is equal to or smaller than the value of the driving signal Vin (time t4), the comparator 61 can not make a high level comparison output any more to change a comparison output to a low level. In response to this, the switch SW-C is turned off and the switches SW-A , SW-A are turned on.
  • the output voltage Vout stops falling, and the output voltage Vout is held at the voltage value v2 of the driving signal Vin on the output line 40 on the basis of the operation of the amplifier 21 until the driving signal Vin is updated in the next horizontal scanning period.
  • comparison of the present value (Vin) and previous value (Vout) of the driving signal is performed, and when the former is greater than the latter, pre- charging is made such that the output voltage Vout is increased as in the period T , on one hand, or when the former is smaller than the latter, pre-charging is made such that the output voltage Vout is decreased as in the period T , on the other hand.
  • This modification also has an advantage in that a length of a charging/discharging period T , T can be automatically obtained by the comparison of the present and previous values each time.
  • a pre-charge mode of alternative voltage sources may be defined based on the comparison result.
  • Fig. 13 shows a configuration of causing a pair of voltage sources to pre-charge the output line 40. Difference from Fig. 11 is that the switch SW-B makes switching of connection between a positive constant voltage Vdd and the output line 40 and the switch SW-C makes switching of connection between a negative constant voltage Vss and the output line 40.
  • the comparators 61 and 62 turn on the switches SW-B, SW- C so as to perform a necessary charging/discharging operation for a necessary length of duration for the output line 40 to the extent that the output value (Vout) of the driving signal reaches the present value (Vin).
  • a charging/discharging operation relies on the constant voltage sources, so that change of the output voltage Vout shown in a period co ⁇ esponding to the period T , T of Fig. 12 follows a curve mainly determined by a time constant of the charging/discharging circuit formed.
  • the on-timing of the switch SW-A , SW-A may be implemented by a circuit that causes the control signal C to be active in response to the off-operation of the switch SW-B, SW-C.
  • the off- timing of the switch SW-A , SW-A may be defined based on a horizontal synchronizing signal of the driving signal Vin, for example.
  • the present invention is applicable to a driving circuit for supplying a target voltage signal to a capacitive load and to an apparatus using such a driving circuit.

Abstract

L'invention concerne un circuit d'attaque apte à réduire la puissance absorbée dans un amplificateur pour fournir une tension cible. Ce circuit d'attaque permettant de commander une charge capacitive (Ccol) d'un dispositif d'affichage comporte: des moyens de fourniture de signal d'attaque (10) permettant de fournir un signal d'attaque (Vin) présentant une tension cible à appliquer; un étage amplificateur (20) permettant de recevoir ce signal d'attaque (Vin) et de le délivrer sélectivement à la charge capacitive (Ccol); et une paire de sources de courant (Ipcp, Ipcn) permettant de fournir sélectivement un courant positif et un courant négatif à la charge capacitive (Ccol), respectivement pendant leur état passant. Ce circuit d'attaque réitère un fonctionnement répétitif comprenant un fonctionnement préalable au cours duquel une quelconque des sources de courant (Ipcp, Ipcn) est rendue passante selon le signal d'attaque (Vin) et est ensuite rendue non passante, et un fonctionnement ultérieur au cours duquel l'étage amplificateur (20) est commuté sur un état lui permettant de délivrer le signal d'attaque (Vin) à la charge capacitive (Ccol) après ce fonctionnement préalable.
PCT/IB2004/052662 2003-12-08 2004-12-06 Circuit d'attaque pour dispositif d'affichage WO2005057545A1 (fr)

Priority Applications (3)

Application Number Priority Date Filing Date Title
US10/596,131 US20070097152A1 (en) 2003-12-08 2004-12-06 Display device driving circuit
JP2006542106A JP2007515673A (ja) 2003-12-08 2004-12-06 表示デバイス駆動回路
EP04801461A EP1695333A1 (fr) 2003-12-08 2004-12-06 Circuit d'attaque pour dispositif d'affichage

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
IBPCT/IB03/05846 2003-12-08
IB0305846 2003-12-08

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WO2005057545A1 true WO2005057545A1 (fr) 2005-06-23

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EP (1) EP1695333A1 (fr)
JP (1) JP2007515673A (fr)
CN (1) CN1890706A (fr)
TW (1) TW200530981A (fr)
WO (1) WO2005057545A1 (fr)

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EP1553551A2 (fr) * 2004-01-10 2005-07-13 Lg Electronics Inc. Appareil et méthode de commande d'un panneau plat d'affichage
WO2007034353A2 (fr) * 2005-09-19 2007-03-29 Koninklijke Philips Electronics N.V. Dispositifs d'affichage a matrice active et leurs procedes de commande
JP2007093996A (ja) * 2005-09-28 2007-04-12 Sharp Corp 表示装置の駆動回路、表示装置および表示装置の駆動方法
WO2007057801A1 (fr) * 2005-11-18 2007-05-24 Nxp B.V. Appareil pour piloter un afficheur a cristaux liquides avec une consommation d'energie reduite
KR100765514B1 (ko) 2006-01-09 2007-10-10 엘지전자 주식회사 액정 디스플레이 패널 구동 회로.
US20080316163A1 (en) * 2005-03-02 2008-12-25 Koninklijke Philips Electronics, N.V. Active Matrix Display Devices and Methods of Driving the Same
US7486264B2 (en) 2004-03-04 2009-02-03 Sharp Kabushiki Kaisha Liquid crystal display and liquid crystal display driving method
WO2014077200A1 (fr) * 2012-11-13 2014-05-22 ソニー株式会社 Dispositif d'affichage, procédé d'entraînement de dispositif d'affichage et circuit de sortie de signaux
EP2743914A2 (fr) * 2012-12-14 2014-06-18 Boe Technology Group Co. Ltd. Circuit de commande et dispositif d'affichage

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TWI408663B (zh) * 2009-07-09 2013-09-11 Raydium Semiconductor Corportation 驅動電路及包含該驅動電路之液晶顯示系統
JP2012032520A (ja) * 2010-07-29 2012-02-16 On Semiconductor Trading Ltd 液晶駆動回路
TWI464721B (zh) * 2012-03-27 2014-12-11 Novatek Microelectronics Corp 顯示驅動優化方法與顯示驅動器
CN103366670A (zh) * 2012-04-06 2013-10-23 联咏科技股份有限公司 显示驱动优化方法与显示驱动器
CN103903574A (zh) * 2012-12-26 2014-07-02 联咏科技股份有限公司 显示器驱动方法以及驱动电路
JP6390078B2 (ja) * 2013-08-17 2018-09-19 セイコーエプソン株式会社 データ線ドライバー、半導体集積回路装置、及び、電子機器
US10102792B2 (en) * 2016-03-30 2018-10-16 Novatek Microelectronics Corp. Driving circuit of display panel and display apparatus using the same

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EP1274067A2 (fr) * 2001-07-06 2003-01-08 Nec Corporation Circuit d'attaque

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US6127997A (en) * 1997-07-28 2000-10-03 Nec Corporation Driver for liquid crystal display apparatus with no operational amplifier
US20020021606A1 (en) * 2000-08-10 2002-02-21 Hiroshi Tsuchi Driving circuit, charge/discharge circuit and the like
EP1274067A2 (fr) * 2001-07-06 2003-01-08 Nec Corporation Circuit d'attaque

Cited By (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2005196218A (ja) * 2004-01-10 2005-07-21 Lg Electronics Inc 平板ディスプレイパネル駆動装置及び方法
EP1553551A2 (fr) * 2004-01-10 2005-07-13 Lg Electronics Inc. Appareil et méthode de commande d'un panneau plat d'affichage
US7486264B2 (en) 2004-03-04 2009-02-03 Sharp Kabushiki Kaisha Liquid crystal display and liquid crystal display driving method
US20080316163A1 (en) * 2005-03-02 2008-12-25 Koninklijke Philips Electronics, N.V. Active Matrix Display Devices and Methods of Driving the Same
US8780142B2 (en) * 2005-03-02 2014-07-15 Innolux Corporation Active matrix display devices and methods of driving the same
WO2007034353A2 (fr) * 2005-09-19 2007-03-29 Koninklijke Philips Electronics N.V. Dispositifs d'affichage a matrice active et leurs procedes de commande
WO2007034353A3 (fr) * 2005-09-19 2008-01-03 Koninkl Philips Electronics Nv Dispositifs d'affichage a matrice active et leurs procedes de commande
JP2007093996A (ja) * 2005-09-28 2007-04-12 Sharp Corp 表示装置の駆動回路、表示装置および表示装置の駆動方法
WO2007057801A1 (fr) * 2005-11-18 2007-05-24 Nxp B.V. Appareil pour piloter un afficheur a cristaux liquides avec une consommation d'energie reduite
KR100765514B1 (ko) 2006-01-09 2007-10-10 엘지전자 주식회사 액정 디스플레이 패널 구동 회로.
WO2014077200A1 (fr) * 2012-11-13 2014-05-22 ソニー株式会社 Dispositif d'affichage, procédé d'entraînement de dispositif d'affichage et circuit de sortie de signaux
EP2743914A2 (fr) * 2012-12-14 2014-06-18 Boe Technology Group Co. Ltd. Circuit de commande et dispositif d'affichage
EP2743914A3 (fr) * 2012-12-14 2014-09-03 Boe Technology Group Co. Ltd. Circuit de commande et dispositif d'affichage
US9330626B2 (en) 2012-12-14 2016-05-03 Boe Technology Group Co., Ltd. Driving circuit and display panel

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CN1890706A (zh) 2007-01-03
JP2007515673A (ja) 2007-06-14
TW200530981A (en) 2005-09-16
EP1695333A1 (fr) 2006-08-30

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