WO2007034353A2 - Dispositifs d'affichage a matrice active et leurs procedes de commande - Google Patents

Dispositifs d'affichage a matrice active et leurs procedes de commande Download PDF

Info

Publication number
WO2007034353A2
WO2007034353A2 PCT/IB2006/053209 IB2006053209W WO2007034353A2 WO 2007034353 A2 WO2007034353 A2 WO 2007034353A2 IB 2006053209 W IB2006053209 W IB 2006053209W WO 2007034353 A2 WO2007034353 A2 WO 2007034353A2
Authority
WO
WIPO (PCT)
Prior art keywords
voltage
source
output
circuit
current
Prior art date
Application number
PCT/IB2006/053209
Other languages
English (en)
Other versions
WO2007034353A3 (fr
Inventor
Hendrik J. Bergveld
Johannes A. T. M. Van Den Homberg
Franciscus A. C. M. Schoofs
Original Assignee
Koninklijke Philips Electronics N.V.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Koninklijke Philips Electronics N.V. filed Critical Koninklijke Philips Electronics N.V.
Publication of WO2007034353A2 publication Critical patent/WO2007034353A2/fr
Publication of WO2007034353A3 publication Critical patent/WO2007034353A3/fr

Links

Classifications

    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3685—Details of drivers for data electrodes
    • G09G3/3688—Details of drivers for data electrodes suitable for active matrices only
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0243—Details of the generation of driving signals
    • G09G2310/0251—Precharge or discharge of pixel before applying new pixel voltage
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0243—Details of the generation of driving signals
    • G09G2310/0259—Details of the generation of driving signals with use of an analog or digital ramp generator in the column driver or in the pixel circuit
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0264—Details of driving circuits
    • G09G2310/027—Details of drivers for data electrodes, the drivers handling digital grey scale data, e.g. use of D/A converters
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/02—Improving the quality of display appearance
    • G09G2320/0252—Improving the response speed
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/06—Adjustment of display parameters
    • G09G2320/0673—Adjustment of display parameters for control of gamma adjustment, e.g. selecting another gamma curve
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3614—Control of polarity reversal in general

Definitions

  • This invention relates to active-matrix display devices, and particularly to display devices in which an alternative driving scheme is employed, for example Active- Matrix Liquid Crystal Displays (AMLCDs).
  • AMLCDs Active- Matrix Liquid Crystal Displays
  • the invention relates in particular to the integrated driver circuits for such devices.
  • AMLCDs consist of a large number of liquid crystal pixels, the voltage across which determines their transmittance of light.
  • the pixels are arranged in columns and rows.
  • AMLCDs have on-glass Thin-Film Transistors (TFTs) that form a switch between each LCD pixel and its corresponding column line.
  • TFTs Thin-Film Transistors
  • the gates of these TFTs are connected together horizontally, so that a gate driver IC can "enable" the rows in a sequential order.
  • the time during which an individual row is selected is referred to as the line-addressing time.
  • a source driver IC applies voltages to the columns that correspond to the desired transmittance of each pixel in the selected row.
  • each output of the source driver IC is a buffered DAC output.
  • FIG. 1 The basic concept of an AMLCD including gate and source driver IC is illustrated in Fig. 1 for a screen resolution of N rows and M columns with an n-bit color depth. This implies that each LC pixel can be driven to one out of 2 n transmittance levels. As an example, the rows are driven sequentially from top to bottom. Alternative orders are possible depending on the applied scanning algorithm. When all rows have been addressed and all pixels have reached the desired transmittance level, a complete frame has been written and the selection of rows repeats for writing the next frame. Depending on the size/resolution of the LCD screen, several gate driver ICs and several source driver ICs are applied in practical realizations.
  • the achieved transmittance of the LCD pixel is determined by the voltage across the capacitance labeled 'LC in Fig. 1.
  • the bottom plates of these LCD pixels are connected to the common electrode with potential V CO m.
  • Non- idealities in the outputs of the source driver ICs such as variations in output level between two adjacent columns with identical digital input, will lead to image artefacts and should be minimized.
  • an additional capacitor is used in parallel to the LC liquid crystal pixel capacitance for stabilization of the pixel voltage.
  • the bottom plate of this capacitor can be either connected to V CO m, a separate electrode or an adjacent row-line. This capacitor has been omitted in Fig. 1 for simplicity.
  • a prerequisite for any LCD driving scheme is that each pixel is driven with an
  • the source driver IC should address the pixel with a voltage of +V g reyievei during one frame and with a voltage of-V grey ievei during the next frame. This is commonly referred to as frame inversion.
  • the transmittance of the LCD pixel is not sensitive to the sign of the applied voltage.
  • a polarity signal is used in addition to the digital transmittance level signals to determine the sign of the analogue voltage at the outputs of the source driver IC. This signal will toggle between positive and negative from frame to frame for each pixel.
  • the translation of the desired transmittance of the LCD pixel into an output voltage of the source driver IC occurs through a so-called gamma curve.
  • This gamma curve is highly non- linear. Since AC drive is required and the complete effective gamma curve is usually asymmetrical (for example caused by the asymmetric signal injection via the gate electrodes of the TFTs), separate gamma curves are used for positive and negative driver output voltages, respectively.
  • the gamma curves should be programmable in a practical device.
  • a common way of implementing the DAC function in the source driver IC is by using resistor ladders and a selection matrix.
  • a tap is selected from the ladder implementing the positive gamma curve or the negative gamma curve. This is shown in Fig. 2 for one row and one column. As can be seen in Fig. 2, both the positive (20) and negative ladder (22) have
  • each selection matrix (24) selects one of these levels from either the positive or negative ladder, so 2 n+1 lines are fed from the ladders to the selection matrix.
  • the ladders are placed centrally on the IC, whereas the 2 n+1 lines are fed over the entire IC, with one selection matrix being used for pairs of columns, because hardware can be shared between adjacent columns when they have opposite polarities (26).
  • the color depth for the display is implemented in the voltage domain. This means that when the color depth is increased, the number of voltage levels is increased with a factor of 2 for each additional bit. As a consequence, the size of the selection matrices doubles for each extra bit. This is a disadvantage of this set-up.
  • a corresponding "gray-scale voltage selecting circuit" 32 provides a ramp voltage on the drains of all TFTs in that line. This means that the TFT is now used to sample the correct voltage level on the liquid crystal cell by means of using the corresponding pulse-width for driving the gate of the TFT. Therefore, the voltage on the pixel tracks the ramp voltage until the TFT switch is opened by the pulse-width signal, after which the voltage remains stable until the new voltage is written in the next frame. Since the gamma curve is non- linear, the ramp voltage does not need to be a linear ramp, but can be any sort of curve.
  • Fig. 4 shows a pixel circuit for using a ramp voltage, which is tracked by the pixel and then sampled. In series with the regular TFT (40), which conducts during the complete line-addressing time, an additional TFT (42) is used to sample the wanted value of a ramp voltage on the pixel.
  • the sampling switch has been moved into the source driver IC 50 in the form of a transmission gate 52 (NMOS and PMOS switches in parallel), because the additional sampling TFT in Fig. 4 leads to a decrease in light throughput when placed in each pixel and the TFT has poor performance compared to transistors realized in IC-technology silicon.
  • the pixel configuration is then the same as in Fig. 1.
  • the silicon area of these source driver ICs tends to become unacceptably high using existing topologies/architectures and driving schemes, like the driving method using resistor ladders shown in Fig. 2.
  • the silicon area needed to implement a color depth of the LCD screen of n bits scales with 2 n . This means that for each additional bit the number of resistor taps doubles, as do the number of switches in the selection matrices, each having a track connected to it that is routed over the entire IC. Since this is inherent to any driving architecture using resistor ladders, this architecture is fundamentally unsuitable for realization of low silicon-area driver ICs.
  • a voltage signal with a certain waveform is offered to each column that includes all values to which the column should be charged to cover all possible transmittance values of the addressed pixel.
  • An example of such a waveform is a ramp voltage.
  • the density in the used time grid increases with a factor of two, but this can be realized in silicon without scaling the area with a factor of two.
  • a problem associated with different methods of implementing color depth in the time domain is that additional time is required to bring the column to the desired voltage. These addressing schemes are therefore slower than addressing schemes where the end voltage is applied as a step-wise function directly at the beginning of the line-addressing time, as in traditional source driver ICs.
  • the pixels for which the resistance between pixel and driver output is substantial may not be charged to the desired voltage level. This is caused by the RC time constant associated with the column, TFT and addressed pixel.
  • a column driver circuit for providing pixel drive signals to the columns of pixels of an active-matrix display device, wherein the column driver circuit comprises: a level-generation circuit for generating an output voltage which ramps, wherein a desired voltage dependent on the pixel drive signal during a pixel addressing period is obtained from the ramp; and means for coupling the column of pixels to an overdrive source during the period when the output voltage of the level-generation circuit is ramped.
  • the overdrive source can comprise an overdrive voltage source. This overdrive voltage can be used to make the output reach the desired end voltage more quickly than if the output voltage is connected to the voltage ramp.
  • the circuit may have a plurality of level-generation circuits and associated overdrive switches (the coupling means), each for a respective column of pixels.
  • the level-generation circuit can comprise a current-source circuit.
  • a column driver circuit for providing pixel drive signals to the columns of pixels of an active-matrix display device, wherein the column driver circuit output voltage ramps to a desired end value dependent on the pixel drive signal during a pixel addressing period; wherein the column driver circuit comprises an array of current-source circuits, a respective current-source circuit being provided for each column of pixels, wherein each current-source circuit comprises a current source (70) for charging a capacitor to a desired voltage, the desired voltage being applied to a column of pixels, and wherein the current-source circuit is adapted to comprise a current surge to the capacitor in a first portion of the pixel addressing period and a current dip to the capacitor in a second portion of the pixel addressing period, the additional charge introduced by the current surge compared to a uniform average current output level being equal to the charge deficit resulting from the current dip compared to the uniform average current output level.
  • a column driver circuit for providing pixel drive signals to the columns of pixels of an active-matrix display device, wherein the column driver circuit output voltage ramps to a desired end value dependent on the pixel drive signal during a pixel addressing period; wherein the column driver circuit comprises an array of current-source circuits, a respective current-source circuit being provided for each column of pixels, wherein each current-source circuit comprises a current source for charging a capacitor to a desired voltage, the desired voltage being applied to a column of pixels, and wherein a charging resistor is provided in series with the capacitor thereby to provide a voltage step at the output of the column driver circuit during the pixel addressing period.
  • This circuit again provides an output voltage which is a capacitor charging characteristic. To reduce the time for the output voltage to reach its desired level, and overdrive scheme is employed which involves charging the capacitor through a series resistance, which provides a temporary step voltage boost at the output.
  • each current-source circuit may comprise an output driver, a storage capacitor connected to the output of the output driver and a supply switch for controlling the time during which the current source supplies current to or drains current from the storage capacitor, thereby determining the output voltage of the output driver.
  • This output driver arrangement makes the output of the circuit independent of the load of the column of pixels.
  • a look-up table can be used for deriving from a pixel drive level a digital value which represents a time period for the control of the supply switch of each current- source circuit, and this can implement a single mapping function for use in providing the digital values for all current-source circuits.
  • Each current-source circuit can comprise a precharge switch connected to the output of the output driver for connecting the output of the output driver to a reference voltage. Furthermore, a second precharge switch can be used for connecting the column of pixels to a pre-charge voltage while the output of the output driver is connected to the reference voltage.
  • the current source of each current-source circuit can comprises a unipolar or bipolar current source.
  • the overdrive source can comprise an overdrive voltage which is greater in magnitude than the desired end voltage, in order to accelerate the charging of the column of pixels towards the desired end value.
  • a first overdrive switch can be provided for coupling the column of pixels to a first voltage source for a first polarity pixel drive level
  • a second overdrive switch can be provided for coupling the column of pixels to a second voltage source for a second polarity pixel drive level.
  • the overdrive voltage(s) may be applied only for a portion of the period when the output voltage of the level-generation circuit is ramped.
  • the column driver circuit can be used in an active-matrix liquid crystal display, comprising an array of pixels arranged in rows and columns.
  • the invention also provides a method of driving the pixels of an active-matrix display device comprising an array of pixels arranged in rows and columns, the method comprising, for each column of pixels: generating an output voltage of a level-generation circuit which ramps; obtaining a desired voltage dependent on the pixel drive signal during a pixel addressing period from the ramp; and coupling the column of pixels to an overdrive source during the period when the output voltage of the level-generation circuit is ramped.
  • Fig. 1 shows a known AMLCD screen with a resolution of N rows and M columns;
  • Fig. 2 shows the known use of resistor ladders to implement the DAC function in a source driver IC
  • Fig. 3 shows a pixel configuration and driving circuit for a driving scheme of US 6,567,062;
  • Fig. 4 shows a block diagram of another known pixel arrangement
  • Fig. 5 shows a block diagram of another known pixel arrangement
  • Fig. 6 is used to explain the principles underlying a proposed drive scheme of the applicant
  • Fig. 7 is used to explain the principles underlying a second proposed drive scheme of the applicant
  • Fig. 8 shows a first embodiment of the invention in which an output driver input is altered to provide an overdrive function
  • Fig. 9 shows a second embodiment of the invention in which an output driver output is altered to provide an overdrive function
  • Fig. 10 shows one alternative way to implement a drive scheme similar to that of Fig. 8;
  • Fig. 11 shows a first detailed implementation of drive scheme as explained with reference to Fig. 9;
  • Fig. 12 shows a second detailed implementation of drive scheme as explained with reference to Fig. 9;
  • Fig. 13 shows a third detailed implementation of drive scheme as explained with reference to Fig. 9;
  • Fig. 14 shows an additional refinement to the drive scheme of Fig. 9;
  • Fig. 15 shows a fourth detailed implementation of drive scheme as explained with reference to Fig. 9.
  • Figs. 16A and 16B show alternative ways to provide precharging.
  • This invention relates generally to addressing schemes in which the pixel drive level is determined using a time domain method.
  • the invention will be described in connection with one particular example of time domain method which has been devised by the applicant, and which addresses a number of other issues with known addressing schemes.
  • a current-source circuit is used to provide charge to each column for a selected time period. This time period gives rise to an amount of charge which in turn leads to a desired end voltage on the column
  • a look-up table (LUT) is shared by all columns, and individual counters are present at each column for the conversion of a digital value from the LUT to time.
  • the current-source circuits can, however, be individually calibrated.
  • Fig. 6 shows in schematic form the manner in which columns of pixels are driven.
  • Fig. 6 shows a single current-source circuit 60 (which functions as a column driver) having a current source 62 and a supply switch 64 for controlling the time during which the current source supplies current to or drains current from the column.
  • the bidirectional current source 62 and switch 64 are of course merely a schematic representation of the function, and they may also be implemented by two unipolar current sources each having a switch.
  • the switch function is not necessarily implemented as a series switch with the current source but can be implemented as part of the output interface of the current source.
  • a digital value representing time is derived from a pixel drive level, and a common mapping is used for all columns in obtaining the digital values from the pixel drive levels. This digital data is converted locally into a time period using a local counter (not shown in Fig. 6).
  • Each column-driver 60 has to drive a capacitive load of column and pixel and the voltage value to which this load capacitance C load must be driven corresponds to a certain amount of charge stored in C load -
  • the desired voltage end value across the capacitor can be reached.
  • Time t ⁇ y depends on the desired transmittance level.
  • the capacitor starts with a known charge due to a pre-charge (Pc) to a precharge voltage level Vpr e - c h a rg e that is applied at the beginning of the line-addressing time.
  • the current source lin t can either sink or source current, as shown schematically in Fig. 6.
  • a constant value current source is shown in Fig. 6, leading to a ramp voltage on the capacitor, as shown in the lower part of Fig. 6, both for charging and discharging the capacitance.
  • the scheme is not, however, limited to a constant current.
  • the main advantage compared to the resistor-ladder architecture of Fig. 2 is that the color depth is not implemented in the voltage domain, which means that the silicon area does not scale with 2 N . Both I ⁇ t and t ⁇ y determine the charge on C load - This means that color depth can be implemented in the current and/or time domain. For varying values of lin t the voltage on C load will have a different shape than shown in Fig. 6.
  • An additional advantage is that multiple ladder-tap voltages no longer need to be transported from IC to IC in case of cascaded ICs.
  • a simple digital LUT can be used in each IC, translating the desired transmittance level of a pixel into a combination of lin t and tgr ey . This enhances the programmability of the gamma curves.
  • the digital LUT may instead be provided off-chip as a central resource which provides functionality to all column driver ICs. One current source is also used for each column, so that there is no common ramp signal.
  • Local calibration loops can be used to make sure that the voltage waveform spanning all gamma voltages, generated by integrating I mt in the column and pixel capacitance C load , reaches a single (or multiple) defined intermediate value(s) during the line- addressing time.
  • Fig. 1 with one common electrode.
  • the approach can of course be applied to other active- matrix LCD panel configurations as well.
  • the current source 62 is used during a fixed amount of time tgr ey . This means that even when the switch and column have series resistance (which is always the case), the correct amount of charge is fed to the column and pixel.
  • This drive scheme requires only the value of the capacitance of column and pixel (C load ) to be known to achieve the correct transmittance of the pixel.
  • the value of t ⁇ y can be determined from the values of I mt , C loa d and the desired end voltage on the pixel V en d, which depends on the desired transmittance level via the non-linear gamma curve, according to:
  • C load - Q oad represents the capacitive load of the column and addressed pixel as seen from the driver output, and this makes the method dependent on the characteristics of the connected LCD screen.
  • This works well for LCD screens where this load capacitance can be described accurately enough in the system.
  • the capacitance of a liquid crystal is voltage-dependent, making it a non- linear device.
  • the capacitance C load which is the sum of the column and pixel capacitance, may also become voltage-dependent, i.e. a non- linear capacitance.
  • the numerator in equation (1) changes to the voltage-dependent charge on the load capacitance to obtain end voltage Vend, i-e. Q(Vend)-
  • This possible non-linearity has to be taken into account in the lookup table determining the value for tgr ey for each transmission level.
  • the look-up table translates a desired transmittance level into a desired end voltage V end via the non- linear gamma curve.
  • Voltage V end is in turn translated into a t ⁇ y value, assuming a fixed and known value for Ijnt, or into an integrated charge value Iinttgrey
  • Iinttgrey For the latter translation step, information on the screen characteristics in terms of the possibly voltage-dependent capacitive load is needed.
  • C load may become increasingly non- linear, e.g. due to cross-talk problems, making it more elaborate to describe the relation Q(V end ) accurately in a look-up table.
  • Variations in temperature will increasingly induce variations in C load across the increasingly large LCD screen. This may imply that C load , as seen at a single driver output connected to a single column, may also become different for different addressed rows.
  • the use of calibration schemes to address all of these issues becomes increasingly complex.
  • the driving method is made independent of the LCD screen characteristics by integrating the output current of a driver output in an on-chip capacitor Csi, instead of integrating charge on the column and pixel capacitance C load - Since the capacitance Csi is realized on the driver IC, with close control over its value, the integration time tgr ey can now be determined according to equation (1) without the need to include any information on the LCD screen characteristics, i.e. Csi replaces C load - In fact, the output of the driver becomes a voltage with an end value V en d, which is the result of storing a charge Iinttgrey on the on-chip capacitor Csi.
  • the circuit comprises a current source 70 and supply switch 78 for controlling the coupling of the current source 70 to an output driver 71.
  • the output driver has a feedback path including a storage capacitor 72 (CsO as we U as a precharge switch 74 in parallel with the storage capacitor 74.
  • the current source 70 is selectively coupled by the switch 78 to the inverting input of the output driver 71, and the non- inverting input is connected to a reference voltage V re f.
  • the output of the output driver is connected to the column, represented as the load capacitance C loa d to the common voltage V CO m.
  • the pre-charge of the capacitor 72 is needed to start off from a known charge at the start of the integration time.
  • the output driver circuit 71 ensures equal voltages at its non inverting '+' and inverting '-' inputs.
  • the capacitor can be precharged using a short-circuiting method, and the resulting output voltage Vc then starts from V re f at the beginning of each line-addressing time tun e - This is the simplest pre-charging method, but other methods of pre-charging may also be used. In fact, the value of the charge to which the capacitor is pre-charged is irrelevant, as long as its value is defined.
  • the output voltage of the output driver is kept constant at value V end -
  • the polarity of the end voltage is determined by the direction of the current source, which can either sink or source current out of or into the capacitor 72. Which current direction is used depends on the polarity signal that is used to determine the voltage polarity of the addressed pixel.
  • a constant current source lin t has been assumed for simplicity, leading to a ramp voltage at the output driver output.
  • current lin t may be made variable during the line-addressing time, for instance to implement part of the depth-depth/ transmission- level resolution.
  • the charge on Csi (Iin t tgr ey ) is the accuracy-determining variable, and the level-depth/transmission- level resolution can therefore be implemented both in the amplitude domain (Ijn t ) and in the time domain (tgr ey ).
  • the approach of this proposal is to apply a voltage to the columns using output driver circuitry in the form of a buffer, rather than applying a current to the columns of the LCD screen.
  • This use of an output driver circuit to provide a voltage to the columns of the display is essentially the same as existing voltage-addressed architectures.
  • the approach of Fig. 7 provides all of the advantages outlined above in connection with Fig. 6.
  • the circuitry of Fig. 7 does not scale with a factor 2 in silicon area for each additional bit in level depth.
  • the output driver 71 maintains its inputs at virtual ground. This means that rail-to-rail inputs are not required, which makes the output driver circuitry simpler than buffer circuitry used in voltage-addressing schemes.
  • the output driver 71 can thus be realized in a smaller silicon area.
  • the reference voltage V re f may be chosen at a convenient level for optimum DC settings. Since the DC voltage at the '-' input of the output driver is at V re f, it can be chosen such that the realization of the current source becomes as simple as possible, allowing enough voltage headroom.
  • the buffers need to be able to handle all gamma voltages, both of the positive and negative gamma curve, and this requires the buffer input circuitry to be rail-to-rail.
  • This proposed drive scheme avoids the use of a common ramp signal, thereby enabling the implementation of any inversion scheme and local calibration loops.
  • the present invention builds on this proposal, and concerns the addressing time required.
  • the invention relates to the use of overdrive schemes, which for enhancing the type of circuit of Fig. 7, can either be applied at the output driver input or at the output driver output.
  • Fig. 8 shows a first drive scheme of the invention, and implemented as an overdrive scheme at the output driver input.
  • the aim of this approach is to influence the voltage waveform at the output driver output, making it steeper at the beginning of the line-addressing time to force the pixel and column to the end voltage in a faster way.
  • This can be achieved by modulating the charge on capacitor 72 (CsO by first adding extra charge to Csi and later removing the same amount of charge. This implies that the net amount of charge integrated in Csi during the line- addressing time remains the same, and hence that the end voltage V end remains the same.
  • a possible way of implementing this is by modulating the value of lin t .
  • the basic principle of this concept is depicted in Fig. 8.
  • FIG. 8 A more detailed model of the driver load has been used in Fig. 8 for illustration purposes.
  • Column resistance 80 (Rcoi) and column capacitance 82 (C co i) represent the column load, whereas the pixel load is represented by pixel capacitance 84 C p and TFT resistance 86 (R TFT ), which is infinite except when the pixel is addressed, in which case it equals the on-resistance of the TFT.
  • the load capacitance C load represents the total capacitance of column and pixel, as described above.
  • the graph in Fig. 8 shows the output driver output voltage Vc with overdrive scheme as 90 and without overdrive scheme as 92 and shows the pixel voltage with overdrive scheme as 94 and without overdrive scheme as 96.
  • the pixel voltage Vp has been assumed equal to the pre-charge voltage V re f during the pre-charge period Pc in Fig. 8 for simplicity.
  • the pixel voltage during at least part of the pre-charge period will correspond to the transmittance level of the previous frame.
  • the column will be pre-charged again (to V re f in the chosen example, although other pre-charge levels can also be used) and the pixel voltage will remain at V end until the pixel is addressed again in the next frame.
  • V re f in the chosen example, although other pre-charge levels can also be used
  • the current value lin t is increased from the regular value l ave to Ip 1US during time period ti at the beginning of the line time.
  • An optional input capacitor Cj n (88) shown in Fig. 8 can be used to limit the input voltage of the output driver when steep transients occur at the output driver output.
  • An advantage of applying overdrive schemes at the output driver input is that the additional circuitry can be realized in low- voltage circuitry, which enables realization in relatively low silicon area.
  • a disadvantage of the set-up is that the output driver needs to be designed for high speed, for example in the form of a large slew rate value and a large output current. This translates into large area and power consumption of the output driver. It depends on the application whether implementation of overdrive at the output driver input is an optimum solution in terms of area and power.
  • Fig. 9 shows a second drive scheme of the invention, and implemented as an overdrive scheme at the output driver output.
  • overdrive circuitry is implemented with high-voltage circuitry at the output driver output.
  • accuracy is achieved with low-voltage electronics in the form of integrating Ijn t in Csi during tgr ey and speed is achieved in high- voltage electronics, where accuracy is not an issue.
  • the main advantage of implementing overdrive in this way is that this relaxes the demands on and hence the complexity of the output driver circuitry. This entails smaller area and lower power consumption of the output driver. This may become beneficial when considerable overdrive is needed.
  • the approach can be implemented by connecting the column and addressed pixel to an overdrive voltage V Od during an overdrive time period t Od , starting at the beginning of the line-addressing time.
  • current lin t is integrated in the on-chip capacitor Csi during time period tgr ey to reach the desired charge level of Iinttgrey on Csi.
  • V O d By connecting the column and addressed pixel to V O d, the column and pixel charge towards V Od in the fastest possible way. This can be seen as coarse charging of the column and pixel in the right direction.
  • the column and pixel are connected to the output driver output again.
  • a first switch 100 is provided at the output driver output to enable it to be isolated from the pixel, and a second switch 102 enables the overdrive voltage to be coupled to the column.
  • the basic waveforms are shown in Fig. 9 for illustration purposes, and the same reference numerals are used as in Fig. 8 to show the characteristics with and without overdrive.
  • switch 102 remains open-circuit, whereas switch 100 conducts continuously.
  • Plots 90 and 92 now represent the voltage Vc as applied to the top of the column at the driver output and the plots 94 and 96 again denote the pixel voltage V p .
  • the pixel voltage Vp represented by the red curves, has been assumed equal to the pre-charge voltage V re f again during the pre-charge period Pc for simplicity.
  • Switch 102 conducts during time period t Od , starting at the beginning of the line-addressing time with duration tun e , whereas switch 100 conducts during the remainder of the time, which means during the time period that switch 102 does not conduct, which is reflected by the control time signal t S3 in Fig. 9.
  • t Od has been chosen equal to tgr ey for illustration purposes. Other possibilities exist, depending on the desired voltage waveform on the column and pixel. This will be discussed below when describing the various possible embodiments.
  • the pixel voltage can be seen to rise relatively slowly with an RC-time determined by the column and TFT on-resistance and column and pixel capacitance, and the voltage at the output driver output rises with a slope determined by lint and Csi.
  • a constant value of lint has been assumed for simplicity, but a variable value may also be used.
  • capacitor Csi is charged to charge level Iinttgrey during time interval tgr ey .
  • t Od and tgr ey have been chosen identical for illustration purposes.
  • switch 102 stops conducting, whereas switch 100 starts conducting again.
  • the column and pixel load is now connected to the output of the output driver, where the desired end voltage V end is available. Therefore, the column and pixel capacitances settle towards this end voltage with the same RC-time as mentioned earlier.
  • tun e the column will be pre-charged to V re f again, whereas the pixel TFT is switched off, leading to an infinite value of RTFT and the voltage V en d being maintained on the pixel. This is not shown in the Figure.
  • the pixel voltage value at the end of the line-time period is indeed equal to Vend- This has to be ensured by choosing appropriate values for V O d and t O d, as will be discussed below.
  • the optional input capacitor 88 (Cj n ) can again be used to limit the input voltage of the output driver when steep transients occur at the output driver output.
  • the main idea of applying overdrive at the output driver output is to connect the column and addressed pixel to an overdrive voltage during (part of) the time period in which the on-chip capacitor is charged to the desired end voltage. This allows optimum coarse charging of column and pixel to a voltage near the desired end voltage. Subsequently, the column and addressed pixel are connected to the output driver output to apply the desired end voltage for fine charging.
  • the main advantage is that the peak current at the start of charging column and pixel to the correct voltage level is now delivered by switch 102, instead of by the output driver circuit.
  • the additional circuitry used in the arrangement depicted in Fig. 9 is realized using some high-voltage switches. These high-voltage switches at the output are only used to speed up the process, no accuracy is needed since these switches are only used for coarse charging. The accuracy is realized by means of low- voltage electronics at the output driver input. Current lin t can remain the same as without overdrive and no additional circuitry at the input is needed.
  • high- voltage circuits deliver power, for which they are better suited than low- voltage circuits
  • low- voltage circuits implement accuracy, for which they are better suited than high-voltage circuits.
  • Fig. 10 shows a resistor 110 (R od ) added in series with the capacitor Csi.
  • the voltage waveform at the output of the output driver is also indicated in the Figure, showing that the output driver output instantly steps to a higher output voltage than V re f and steps back to the correct end voltage at the end of time period tgr ey .
  • this will also lead to a coarse charge of the pixel when I ⁇ t flows and a fine settling to the correct end voltage in the remainder of the line-addressing time.
  • the resistor tuneable/selectable e.g. a function of the desired transmittance or time, the settling behavior can be made ideal for each individual grey level.
  • the invention can be implemented for unipolar or bipolar current sources and hence also take into account the polarity of the output driver output voltage.
  • Fig. 11 shows one possible embodiment using a unipolar current source and with control at the output driver output.
  • the current source current lin t flows in the upward direction, but of course the downward direction is also possible.
  • lin t can be either constant or variable.
  • the transmittance of the addressed pixel on row 'x' and column 'y' is translated into a time period tgr ey , y using a look-up table 120 which contains the complete gamma curve, including the positive (P) and negative (N) gamma curve.
  • the translation can be based on a constant-cycle-time clock, or based on a variable-cycle-time clock.
  • the overdrive is implemented at the output driver output as two overdrive voltages, V O d,N for the negative polarity, and V O d,p for the positive polarity.
  • a switch 122 is for coupling the positive overdrive voltage to the output and a switch 124 is for coupling the negative overdrive voltage to the output. These are controlled to operate during the overdrive time period t Od and when the polarity control signal has the appropriate value. As shown, this is essentially an AND operation.
  • the switch 100 at the output driver output isolates the output driver from the column when either overdrive switch is closed, and this can again be implemented as an AND function.
  • Switch 78 conducts during the time period tgr ey , y in order to store charge Iinttgrey.y on capacitor Csi. Capacitance Csi is pre-charged by means of short-circuiting with switch 74 as above.
  • the duration of time period t O d depends on the embodiment. It can be chosen equal to tgr ey , y as shown in Fig. 11 for illustration purposes. Other durations are possible as described below.
  • the voltage levels have been depicted on the top right-hand side of Fig. 11.
  • the negative gamma curve extends from V N , O (corresponding to maximum black for a 'normally- white' LCD screen) to V CO m, i.e. the voltage applied to the common electrode to which the bottom plates of all liquid crystal capacitors are connected.
  • the positive gamma curve extends from V CO m to Vp )0 (corresponding to maximum black for a 'normally- white' LCD screen).
  • the voltage range at the output driver output should at least include the range from V N , O to Vp )0 during each line-addressing time. Therefore, the reference voltage V re f should be chosen ⁇ V N , O in the embodiment shown, as indicated in the Figure.
  • V re f should be chosen ⁇ Vp )0)
  • V O d,p should be chosen ⁇ V CO m and V O d,N should be chosen ⁇ V N , O -
  • Fig. 12 shows a possible embodiment with a bipolar current source 126. It is similar to the embodiment with a unipolar current source in Fig. 11, and Fig. 12 shows the same features as Fig. 11. The differences are:
  • the overdrive voltage for negative polarity has changed to V 0 d,N ⁇ VN,o. This is in line with the fact that for longer time periods tgr ey , y at negative polarities, the column and pixel need to be charged to voltages closer to V N , O - Therefore, overdrive in the direction of V N , O is needed.
  • the pre- charge level V co m can be an intermediate level, in the middle between the negative and positive gamma curves. This is more efficient, especially for positive gamma voltages, since the capacitor no longer needs to be charged starting from voltage Vpre-charge lower than V N , O - A time grid that is a factor of two coarser compared to the time grid required for a unipolar source can also be used.
  • the column and addressed pixel may also be pre-charged to a different level that is for example advantageous for power savings or additional speed improvement, for example pre-charging to a voltage value closer to the desired end value.
  • the output switch 100 can be used for separate pre-charge of the column.
  • the column pre-charge level may also be made dependent on the voltage value to which the column has been driven during the previous line-addressing time period to prevent superfluous charging and discharging of the column. This also means that the column pre- charge scheme can be made dependent on the applied inversion scheme. This can be simply implemented by adding a switch to the top of the column to an additional pre-charge level Vpr e - c h a rg e or to the adjacent column. In the latter case, charge redistribution is applied after each line-addressing time.
  • Fig. 13 shows an additional pre-charge switch 130 (S 6 ) and changed drive logic of switch 100 (S 4 ) compared to the embodiment of Fig. 12.
  • the additional pre-charge switch 130 conducts when the first pre-charge switch 74 (S 2 ) conducts, namely during pre- charge.
  • the output switch 100 is left open-circuit, which is a difference with the embodiments above.
  • the column and addressed pixel are connected to voltage Vpre-charge or the adjacent column during the pre-charge time period Pc.
  • the overdrive time period t Od has been taken equal to tgr ey for illustration purposes. As is shown schematically in Fig. 9, this can lead to considerable overshoot in the pixel voltage.
  • overdrive time period t Od can be made ⁇ tgr ey .
  • An advantage of this is that the overshoot in the pixel voltage can be reduced.
  • the main concept of reducing t Od is illustrated in Fig. 14 for two different values of tgr ey .
  • Plots 140 are the output driver output voltage with this partial application of the overdrive voltage, and plots 142 are the pixel voltages.
  • t O d,2 is chosen such that the pixel voltage equals the desired end voltage V end at the end of time period t ⁇ y .
  • this value is just an illustration.
  • the preferred ratio will result from careful tuning of t Od for a certain value of t ⁇ y for a given LCD screen, so for a given RC time.
  • the overshoot in pixel voltage has been reduced considerably, as is illustrated by the Figure.
  • the overshoot in pixel voltage can be reduced, whilst still meeting the speed requirements, by reducing the overdrive time t Od with respect to integration time period tgr ey .
  • a simpler method of reducing the overshoot in the pixel voltage while still meeting the speed requirements is to place a resistor between the overdrive voltage source and the top of the column. The value of this resistor can be determined by the RC time of the LCD screen.
  • the source driver IC can be easily programmed for optimum performance with a given LCD screen. Tuning can be performed in the factory for a given LCD screen and can simply occur electronically in a control loop.
  • the actual voltage waveform at the driver output when connected to a column may be compared to the desired voltage waveform in this control loop and the value of the resistor may be changed until there is no more difference between measured and desired voltage values.
  • the resistor may be tuned based on front-of-screen performance in a similar control loop.
  • a selectable resistor to the basic diagram of Fig. 9 is illustrated in Fig. 15.
  • an overdrive control unit 150 controls a bank of switches 152 for providing a variable resistance from the overdrive voltage supply to the column.
  • a selectable resistor arrangement will be added to both positive and negative overdrive branches, and Fig. 15 illustrates the basic idea.
  • Fig. 15 also shows voltage waveforms at the top of the column (Vc) as plots 154,156,158, and at the pixel (V p ) as plots 160,162,164, for three different tgr ey values and hence three different desired end voltages V en d-
  • the voltage waveforms shown are for one selected value of the resistor.
  • Overdrive times t Od have been chosen equal to the integration time periods tgr ey .
  • the dashed slope indicates the output driver output voltage due to integration of lin t in Csi.
  • the overdrive control block 150 drives any combination of the switches S RI in the bank 152 during overdrive time t Od such that an optimum value of series resistance between voltage V Od and Vc exists, depending on the connected LCD screen. Tuning may e.g. occur during manufacturing of the LCD module as described above, using the indicated input R control in a control loop. As in earlier embodiments, output switch 100 (S 4 ) conducts when none of the switches S RI conducts.
  • t Od is chosen again equal to tgr ey for illustration purposes, voltage Vc shows the same RC-like curve from the beginning of the line- addressing time tun e onwards. Depending on the value of tgr ey , Vc drops again at the end of overdrive. Tuning of the resistance between V Od and Vc determines the voltage waveforms of the pixel voltages.
  • the situation shown in Fig. 15 holds for one value of selected resistance by the bank 152.
  • the resistance may be chosen such that for the maximum achievable value of V end the pixel voltage reaches the end voltage with the required accuracy, also taking at least into account environmental variables such as temperature and spread of LCD screen behavior.
  • the overshoot on the pixels for lower end voltage values is minimum, as indicated.
  • the resistance selected by the controller 150 may also be made dependent on the value of tgr ey to optimize the pixel voltage waveform under all conditions, but this implies a more complex implementation.
  • a series resistor is used in the overdrive voltage path to control overshoot.
  • This resistance can be chosen such that the pixel voltage waveform fulfils the speed requirements for all possible end voltage values with minimum overshoot.
  • this resistor may be made selectable or tuneable.
  • regulating the current in the overdrive branch for example using a transistor or current source, etc., to control the overshoot is claimed as well.
  • overdrive can be achieved by dumping a coarse amount of energy in the column. This energy is then first stored in either a capacitive storage medium (one or more capacitors) or in an inductive storage medium (one or more coils) using a couple of switches. After storage, the energy is released into the column at the beginning of the line-addressing time. The energy can be stored in the column using a current source.
  • the output switch at the output driver output to disconnect the output driver output from the column when the overdrive voltage is applied, may not be necessary. This depends on the design of the output driver circuit. As mentioned above, the peak current to charge column and pixel is supplied by the overdrive circuitry. This relaxes the speed requirements and hence the demands on the output current of the output driver circuit. In case the maximum output current of the output driver circuit is limited, the output driver output may remain connected to the column during overdrive.
  • the input current source lin t needs to withstand the voltage step at the minus input of the output driver circuit when the output driver output is connected to V Od during overdrive.
  • an optional input capacitor may be used to limit the input voltage to the output driver circuit.
  • the invention can be implemented as low- voltage circuits at the output driver input, or as high- voltage circuits at the output driver output to improve the speed of charging a connected LCD column and pixel.
  • overdrive circuitry is used at the input, the output driver circuit needs to be sufficiently fast to enable steep transients in the output driver output voltages. If the speed of the output driver becomes an issue, overdrive circuitry may be implemented at the output of the output driver.
  • the high- voltage circuitry used at the output driver output should deliver power, for which it is better suited in terms of needed area than low-voltage electronics. Accuracy is not needed, since only coarse charging is achieved by the high- voltage circuitry. Accuracy is implemented in low-voltage electronics, but since the demands on speed of the associated output driver circuit are much lower, this is beneficial for the needed silicon area.
  • the LUT in the embodiments above can actually include two sub-LUTs, one implementing the negative gamma curve and one implementing the positive gamma curve. Which sub-LUT is used for a certain frame depends on the desired polarity, hence on the value of V po i.
  • the value of the current source lin t can also be made variable. In this way, any voltage waveform can be generated.
  • the LUT is then used to translate the desired transmittance level into a combination of lin t and tgr ey .
  • a single mapping operation can still be provided for all column driver current-source circuits.
  • the charging capacitor does not have to be charged by a pure current source, and the current source can be implemented as a voltage source with a series impedance, providing the series resistance does not become dominant or significant compared to the load capacitance.
  • the output driver can be implemented with either low output impedance (for example an operational amplifier (opamp)) or with high output impedance (for example and operational transconductance amplifier (OTA)).
  • the gain should be high enough to guarantee a virtual ground at the inverting input and a correct output voltage irrespective of the load impedance, when the load is within the expected range of possible output loads to be experienced in operation of the circuit.
  • the output of the driver is a voltage, and the voltage level is determined by the current integration step.
  • the output driver provides isolation between the pixel columns and the circuit providing the output drive level.
  • each current-source circuit comprises a precharge switch for connecting the output driver output to the reference voltage, to define the starting point from which each column voltage is charged (or discharged) by the current-source circuit.
  • the output driver output could be connected to the common voltage V CO m (in case the current source is bi-directional), with the non- inverting input of the output driver still at V re f.
  • This approach can be implemented with a feedback loop including a voltage comparator.
  • the any pre-charge method can be used which sets the output voltage of the output driver to a predefined voltage, such that the capacitor is pre-charged.
  • the use of a shorting switch across the capacitor, as shown in the detailed examples above, is merely one example, and which sets the starting point at V re f.
  • Fig. 16 shows in simplified form two examples of alternative ways to provide precharging.
  • an operational amplifier is used in the feedback path as a voltage comparator.
  • the amplifier is turned on (for example using the bias currents)
  • the reference voltage V R results at the inverting input of the output driver 71, and a corresponding charge is held on the capacitor.
  • an operational transconductance amplifier (OTA) is used in the feedback path. This delivers a current 160 to the capacitor until the output of the driver is at the common voltage Vcom supplied to the OTA.
  • Vcom common voltage supplied to the OTA.
  • a look up table is used for deriving time values from the pixel values. Mathematical expressions may instead be used for this purpose, for describing the non- linear relation between transmission level and voltage of a liquid crystal.
  • overdrive scheme relate to circuit implementations in which each column is provided with a respective level generation circuit.
  • the principle of applying an overdrive voltage before a ramp voltage has reached the desired level can also be applied to (known) circuit implementations in which a common ramp signal (for all columns) is sampled at a particular instant in time. In this case, there is a ramping output voltage, and before that ramp has reached the desired level and is to be sampled, the overdrive voltage is routed to the output in the same manner as explained above.
  • a selectable resistor 152 is provided in series between the overdrive voltage source (V Od ) and the output (Vc) of the circuit.
  • the combination of a resistance and switch may of course be implemented by a single transistor of appropriate size to have the desired resistance.
  • the combination of a current source 70 and a switch 78 is used to create a current profile of known amplitude and duration. These elements could instead be replaced by a controllable current source that can provide the same output current profile, or other suitable current profile to provide the desired charge flow.
  • the current source does not need to be a constant current source. There are therefore various ways to implement the generation and coupling of the desired current profile.
  • the invention is of particular advantage for source driver ICs for AMLCD panels, and enables production of simple, small- silicon-area source drivers for displays with moderate level depths.
  • the invention can also be used to realize higher level depths, without the dramatic increase in silicon area..
  • Various other modifications will be apparent to those skilled in the art.

Abstract

L'invention concerne un circuit de commande de colonnes permettant de fournir des signaux de commande de pixel aux colonnes de pixels d'un dispositif d'affichage à matrice active. Ce circuit de commande de colonnes comprend au moins un circuit (71, 71, 74) permettant de produire une rampe de tension de sortie, une tension désirée dépendant du signal de commande de pixel durant une période d'adressage des pixels étant obtenue à partir de cette rampe de tension. Dans un exemple, les colonnes de pixels sont couplées à une source de surcharge (VOd) durant la période (tgrey) de rampe de tension de sortie. Dans un autre exemple, la rampe présente une augmentation de courant dans une première partie (ti) de la période d'adressage des pixels et une baisse de courant (98) dans une seconde partie (t2) de la période d'adressage des pixels. Dans un autre mode de réalisation, une résistance de charge est utilisée pour obtenir un plateau dans la rampe durant la période d'adressage des pixels.
PCT/IB2006/053209 2005-09-19 2006-09-11 Dispositifs d'affichage a matrice active et leurs procedes de commande WO2007034353A2 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
EP05108608.0 2005-09-19
EP05108608 2005-09-19

Publications (2)

Publication Number Publication Date
WO2007034353A2 true WO2007034353A2 (fr) 2007-03-29
WO2007034353A3 WO2007034353A3 (fr) 2008-01-03

Family

ID=37745888

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/IB2006/053209 WO2007034353A2 (fr) 2005-09-19 2006-09-11 Dispositifs d'affichage a matrice active et leurs procedes de commande

Country Status (1)

Country Link
WO (1) WO2007034353A2 (fr)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20140198087A1 (en) * 2013-01-15 2014-07-17 Synaptics Incorporated Method and circuit to optimize n-line lcd power consumption
US8941640B2 (en) 2012-06-08 2015-01-27 Apple Inc. Differential VCOM resistance or capacitance tuning for improved image quality

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0598308A1 (fr) * 1992-11-16 1994-05-25 RCA Thomson Licensing Corporation Circuit comparateur différentiel
US5319381A (en) * 1989-12-28 1994-06-07 Thomson Consumer Electronics Method for addressing each column of a matrix type LCD panel
US20010040548A1 (en) * 1999-12-28 2001-11-15 Nec Corp LCD and method for driving same
US20020105492A1 (en) * 2001-02-02 2002-08-08 Nec Corporation Signal line driving circuit and signal line driving method for liquid crystal display
WO2005057545A1 (fr) * 2003-12-08 2005-06-23 Koninklijke Philips Electronics N.V. Circuit d'attaque pour dispositif d'affichage

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5319381A (en) * 1989-12-28 1994-06-07 Thomson Consumer Electronics Method for addressing each column of a matrix type LCD panel
EP0598308A1 (fr) * 1992-11-16 1994-05-25 RCA Thomson Licensing Corporation Circuit comparateur différentiel
US20010040548A1 (en) * 1999-12-28 2001-11-15 Nec Corp LCD and method for driving same
US20020105492A1 (en) * 2001-02-02 2002-08-08 Nec Corporation Signal line driving circuit and signal line driving method for liquid crystal display
WO2005057545A1 (fr) * 2003-12-08 2005-06-23 Koninklijke Philips Electronics N.V. Circuit d'attaque pour dispositif d'affichage

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8941640B2 (en) 2012-06-08 2015-01-27 Apple Inc. Differential VCOM resistance or capacitance tuning for improved image quality
US20140198087A1 (en) * 2013-01-15 2014-07-17 Synaptics Incorporated Method and circuit to optimize n-line lcd power consumption
US9128713B2 (en) 2013-01-15 2015-09-08 Synaptics Incorporated Method and circuit to optimize N-line LCD power consumption

Also Published As

Publication number Publication date
WO2007034353A3 (fr) 2008-01-03

Similar Documents

Publication Publication Date Title
US8780142B2 (en) Active matrix display devices and methods of driving the same
KR100471623B1 (ko) 계조 표시용 전압 발생 장치, 및 그것을 포함하는 계조표시 장치
TWI282078B (en) Driver for driving a display device
US6556162B2 (en) Digital-to-analog converter and active matrix liquid crystal display
US6271783B1 (en) Digital-to-analogue converters with multiple step movement
US20070132696A1 (en) Display device and driving circuit for capacitance load thereof
KR20100018322A (ko) 액정 표시 장치 및 그것의 제어 방법
KR101070125B1 (ko) 디스플레이 장치 및 그 제어 방법
KR20170000023A (ko) 표시 장치 및 이의 구동 방법
KR100589566B1 (ko) 액정 구동 장치
CN113056702A (zh) 相位调制装置以及相位调制方法
US6466189B1 (en) Digitally controlled current integrator for reflective liquid crystal displays
WO2007034353A2 (fr) Dispositifs d'affichage a matrice active et leurs procedes de commande
US7548227B2 (en) Display apparatus, device for driving the display apparatus, and method of driving the display apparatus
US6496173B1 (en) RLCD transconductance sample and hold column buffer
JP4014955B2 (ja) 液晶表示装置
WO2007034360A2 (fr) Ecrans a matrice active et leurs procedes d'excitation
KR101232162B1 (ko) 데이터 구동장치 및 구동방법
Yoo et al. 54.4: A High Accurate Analog Buffer Circuit using Low Temperature Poly‐Si TFT
KR100329463B1 (ko) 액정표시장치의 구동 시스템 및 액정패널 구동 방법
KR101097585B1 (ko) 액정표시장치용 전압 발생 회로 및 이를 이용한액정표시장치
KR100611533B1 (ko) 액정표시장치
KR20060020495A (ko) 액정표시장치 및 그 구동방법
JPH10161082A (ja) 液晶駆動装置
WO2004107302A1 (fr) Dispositif d'affichage a matrice active

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application
NENP Non-entry into the national phase in:

Ref country code: DE

122 Ep: pct application non-entry in european phase

Ref document number: 06809279

Country of ref document: EP

Kind code of ref document: A2