WO2005055320A1 - Boitier de circuit integre et cadre de montage - Google Patents

Boitier de circuit integre et cadre de montage Download PDF

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Publication number
WO2005055320A1
WO2005055320A1 PCT/IB2004/052513 IB2004052513W WO2005055320A1 WO 2005055320 A1 WO2005055320 A1 WO 2005055320A1 IB 2004052513 W IB2004052513 W IB 2004052513W WO 2005055320 A1 WO2005055320 A1 WO 2005055320A1
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WO
WIPO (PCT)
Prior art keywords
package
integrated circuit
carrier
protrusions
main body
Prior art date
Application number
PCT/IB2004/052513
Other languages
English (en)
Inventor
Peter A. J. Dirks
Erik U. G. De Hoog
Original Assignee
Koninklijke Philips Electronics N.V.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Koninklijke Philips Electronics N.V. filed Critical Koninklijke Philips Electronics N.V.
Publication of WO2005055320A1 publication Critical patent/WO2005055320A1/fr

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    • H—ELECTRICITY
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    • H01L23/00—Details of semiconductor or other solid state devices
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    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
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    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
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    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
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Definitions

  • the present invention relates to an integrated circuit package comprising: an electrically conductive integrated circuit carrier that has a main body that comprises protrusions that extend from the main body along a plane of the first surface; an integrated circuit that is attached to the integrated circuit carrier and that has at least one electrical connection to the integrated circuit carrier.
  • the present invention also relates to an electronic apparatus comprising an integrated circuit package as described in the opening paragraph.
  • the present invention also relates to a leadframe for an integrated circuit package that comprises an electrically conductive integrated circuit carrier that has a main body that comprises protrusions that extend from the main body along a plane of the first surface.
  • US Patent Application 2002/0084518 illustrates an example of an IC package of the kind described in the opening paragraph wherein, at least one electrical connection is made between an IC and an IC carrier, onto which the IC is physically attached.
  • Another such demand is to increase the power handling capabilities of packaged ICs, which requires good thermal conductivity to its external environment.
  • IC packages such as Small Outline Non-Leaded (SON) and Quad Flat Non-Leaded (QFN) packages are commonly used.
  • Another demand is to increase the quality and, more specifically, decrease the Moisture Sensitivity Level ('MSL') of IC packages. More and more lead-free soldering is required, thereby increasing the demand on the MSL. The smaller the area of the IC carrier, the smaller the MSL will be. A lower MSL also results in a better quality and lower handling costs.
  • the carrier of an IC package needs a mechanical connection to the package.
  • the tiebars and the half etched area's at the edge of the carrier provide for such a mechanical connection or locking. It has been shown that it is very difficult to wirebond on those half etched area's.
  • the area of packages such as that disclosed in said US Patent Application 2002/0084518 are disadvantageously limited, in part, by the dimensions of the IC plus, typically, 0.25mm ⁇ d ⁇ 3.0mm on each side, depending upon the wire bonding techniques employed.
  • such state-of-the-art packages have a relatively large distance d, or margin, between the outer edges of an IC and its associated carrier, which is a direct result of the need to electrically connect the IC, via bond wires, to the carrier.
  • An object of the present invention is to enable relatively small dimensions to be achieved.
  • the object is achieved in that at least one electrical connection to an IC carrier is realized on at least one protrusion.
  • a relatively large margin i.e. a distance between the outer edges of the IC and its associated carrier, for making an electrical connection: taking into account the space, i.e. margin, required for the operating clearances necessary for the correct operation of a bonding machine and its associated capillary tool. Therefore, according to the present invention, the dimensions of the carrier maybe substantially smaller.
  • at least one protrusion may be a tie-bar.
  • At least one of the protrusions is situated alongside of the main body.
  • at least one protrusion comprises a support, which may extend towards a plane of a second surface of an IC carrier, for supporting the least one protrusion during bonding.
  • the IC has an area substantially equal to that of its associated carrier.
  • it is free of any leads that extend from the package.
  • the object is achieved by an electronic apparatus that comprises a printed circuit board having an IC package as described above in connection with the first object of the present invention.
  • the object is achieved in that at least one protrusion includes a support, which extends towards a plane of a second surface of an IC carrier.
  • the supported tiebar(s) can be used as (a) pin(s) for electrical connection to the outer world. This enables the use of PCB technologies that cannot have via's under the soldered exposed diepad. It also enables the use of thermally well conducting but electrically non-conducting glue under the carrier.
  • Fig. 1 illustrates a plan view of a partly encapsulated IC package according to the present invention
  • Fig. 2a illustrates a cross-sectional view along A- A' in Fig. 1
  • Fig.2b illustrates a partial cross-sectional view along A-A' of an alternative embodiment of Fig. 1
  • Fig. 2c illustrates a partial cross-sectional view along A-A' of another alternative embodiment of Fig. 1
  • Fig. 3 illustrates a cross-sectional view along B-B' in Fig. 1
  • FIG. 4 illustrates an apparatus comprising a printed circuit board an IC package according to the present invention.
  • Fig. 5 illustrates a plan view of an alternative embodiment of a partly encapsulated IC package according to the present invention; and
  • Fig. 6 illustrates a cross-sectional view along C-C in Fig. 5.
  • Identical reference numbers refer to similar components.
  • FIGs. 1, 2a-2c and 3 there is illustrated an integrated circuit (IC) package 10 having a mounting surface 12.
  • the IC package 10 comprises an electrically conductive IC carrier 14, commonly referred to as a die-attach pad, that has a main body 16.
  • the main body 16 comprises a first 18 and a second 20 surface, said second surface 20 forming part of the mounting surface 12.
  • the IC carrier 14 also comprises protrusions 22 ⁇ - 22 4 that extend from the main body 16 along a plane of the first surface 18.
  • An IC 24 is attached, typically by means of an adhesive 39, to the first surface 18 of the IC carrier 14 and has at least one electrical connection 26 to the IC carrier 14.
  • the IC package 10 also comprises a plurality of package connections 28 ⁇ -28 tone that are disposed about the IC carrier 14, said plurality of package connections 28 ⁇ -28 n having respective first surfaces 30 that have electrical connections 31 to the IC 24 and respective second surfaces 32 that form part of the mounting surface 12.
  • the at least one electrical connection 26 to the IC carrier 14 is realized on at least one of the protrusions 22.
  • Each of the package bond-pads 28 ⁇ -28 n are, before any electrical connections, i.e. wire-bonds, are made, electrically isolated from each other and from the IC carrier 14.
  • the outer extremities of the second surface 20 of the IC carrier's main body 16 and the inner extremities of the second surfaces 32 of the package bond-pads 28 ⁇ -28 n may have respective interlocking lips as indicated in Fig. 1 by the dashed lines. These interlocking lips allow an encapsulate material 40, typically plastic resin, to flow underneath a portion of the IC carrier 14 and the package bond-pads 28 ⁇ -28 formula during the encapsulating phase of the package 10 production so as to securely engage the respective IC carrier 14 and package bond-pads 28 ⁇ -28 n to the encapsulate material 40.
  • an encapsulate material 40 typically plastic resin
  • the protrusions 22]-22 which in this particular example are illustrated as tie- bars, extend from the corners of the main body 16, in, or substantially in, a plane of its first surface 18, out to the corners of the package 10.
  • the respective protrusions 22 ⁇ -22 4 are illustrated as 'multi-functional' protrusions that extend out to the corners of the IC package 10 between package bond-pads 28, they could, as an alternative also be 'mono- functional' protrusions.
  • These mono-functional protrusions may extend out as, or in a similar type of manner as, illustrated to other suitable locations of the package 10, as indeed could the multi-functional protrusions: such alternatives being readily appreciated by those skilled in the art.
  • the tie-bars which have the functions of supporting the main body 16 during the package 10 manufacturing process and enabling the objective of the present invention to be achieved, are advantageously used.
  • mono-functional protrusions may alternatively be employed: that is to say, protrusions that have a single function which is to extend out from the main body 16 in accordance with the objective of the present invention.
  • electrical connections 26 between the IC 24 and the IC carrier 14 are realized between appropriate IC bond pads 25 and the tie-bar protrusions 22.
  • the distance d' i.e.
  • the margin, between the outer edge of the IC 24 and that of the IC carrier 14 may, according to the present invention, be advantageously reduced over prior art IC packages. Therefore, electrically connecting the IC 24 to the IC carrier 14 as herein illustrated allows the respective areas of the IC carrier 14 and IC 24 to be better matched, thus enabling a smaller carrier area and a better MSL (quality) of the IC package 10, to be realized.
  • the smaller carrier area enables a smaller package and a smaller footprint.
  • the present embodiment of the invention takes advantage of the fact that in such IC package technology, the tie-bar protrusions 22 extend out from the main body 16 in between the package connections 28 ⁇ -28 n .
  • the IC 24 is designed in such a manner that the IC bond pads 25, to which an electrical connection 26 is to be made between the IC 24 and the tie-bars 22, are situated in the vicinity of the tie-bars 22, wherever the latter may be situated.
  • Such design considerations can readily be achieved during the appropriate IC/Package 24/10 design phases.
  • the tie-bar protrusions 22, in this particular example are effectively extensions of the interlocking lip: these protrusions 22 could also be thicker, thinner or alternatively shaped from those illustrated. Fig.
  • tie-bars 22 are usually thinner than the main body 16 of the IC carrier 14, it may then be preferable to appropriately support the tie-bars 22 when making the respective wire-bonds 26.
  • One means of supporting these tie-bars 22 is to include, in the construction of the tie-bar 22, a support 34, such as a pillar for example, that extends from the tie-bar 22 in a direction towards the mounting surface 12 of the package 10.
  • Such a support 34 can be readily incorporated as part of the leadframe design, as will be discussed in further detail below.
  • the support 34 may be placed at any suitable point along the length of the tie-bar 22, as illustrated in Fig. 2b, and may take many different forms from that illustrated, provided that it appropriately supports the tie-bar 22 during wire-bonding.
  • the support 34 may alternatively be placed at the free end of the tie bar 22, as illustrated in Fig. 2c.
  • the bottom side of the support 34 may act as an electrical contact between the IC carrier 14 and the environment external to the package 10, i.e. the bottom of the support 34 may also act as a package connection 28.
  • a typical design flow for a leadframe 16, 22, 28 design is summarized as follows.
  • an appropriately dimensioned metallic, typically copper, strip is provided.
  • a first, appropriately pattered mask is used to etch both upper and lower surfaces of the strip, thus providing the basic definition of the leadframe 16, 22, 28.
  • a second appropriately patterned mask may then be used to half etch the lower surfaces of the strip, thus defining the interlocking lips and, according to one aspect of the present invention, the support 34.
  • the appropriately patterned strip may then be plated with, for example, with a nickel-palladium NiPd protective layer.
  • the patterned strip, i.e. leadframe 16, 22, 28, is then attach to a support tape.
  • an IC package can now be produced wherein: the IC 24 is attached to the carrier 14; the appropriate wire bonds 26, 31 are made; the encapsulate 40 is appropriately moulded around the leadframe 16, 22, 28 and IC 24; and finally the resultant plurality of packaged ICs are singulated from the strip and tape.
  • Fig. 3 this again highlights the relatively small distance d' that can be achieved between the outer edge of the IC 24 and that of the IC carrier 14 when the IC to IC carrier bond- wires 26 are made, according to the present invention, at the tie-bar protrusion 22.
  • FIG. 4 illustrates an apparatus 36, such as a mobile phone, personal organizer, laptop computer etc., that comprises a system 38, such as a 'motherboard' for example.
  • the system 38 itself comprises an IC package 10 according to the present invention.
  • Fig. 5 illustrates a plan view of an alternative embodiment of a partly encapsulated IC package according to the present invention.
  • the IC carrier 14 comprises protrusions 22s-22 9 that extend from the main body 16. Unlike the protrusions 22 ⁇ -22 of Figs.
  • the protrusions 22s-22 9 do not extend out to the corners of the package 10, but are situated alongside of the main body 16.
  • the protrusions allow bonding directly on the main body 16 - also referred to as die pad.
  • This embodiment reduces the size of the package with approximately 4%.
  • An additional effect is an improvement of the locking of the main body 16 to the encapsulate 40.
  • one or more protrusions 22 ⁇ -22 4 may be present, if desired.
  • more than five protrusions 225-229 may be present. Such a increased number of protrusions, and corresponding bond wires, lead to an improved RF behaviour.
  • FIG. 6 illustrates a partial cross-sectional view along C-C in Fig. 5.
  • Fig. 6 highlights the reduced distance d" that can be achieved between the outer edge of the IC 24 and that of the IC carrier 14 when the IC to IC carrier bond-wires 26 are made at the protrusions 225-22g.
  • shortening of the bond wires is preferred. This shortening is achieved by extending the package connections 28 - also known as leads - in the direction of the main body 16.
  • the extended leads 28 may be provided with a first portion that is half etched, and a second portion that is not half etched and is exposed at the surface of the encapsulate. It is preferred that a second portion is present at the inner end of the lead, i.e. the end near the main body, at which the bond wire is connected. This provides stability.
  • a disadvantage is however, that a solder mask is needed on the bottom of the package or on a circuit board so as to cover the exposed portion of the lead.
  • Second portions are furthermore present at the outer end, i.e. near or at the edge of the encapsulate 40.
  • substantially the complete extended lead 28 is embodied as a non-etched second portion.
  • any reference signs placed in parentheses shall not be construed as limiting the claims.
  • the word “comprising” and “comprises”, and the like, does not exclude the presence of elements or steps other than those listed in any claim or the specification as a whole.
  • the singular reference of an element does not exclude the plural reference of such elements and vice-versa.
  • the term 'half-etching' as used in the context of the application generally refers to an etching treatment in which between approximately 40 and 85 % of the thickness is removed, and preferably between 45 and 55 %.

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Geometry (AREA)
  • Lead Frames For Integrated Circuits (AREA)

Abstract

Boîtier de circuit intégré (10) comportant un support de circuit intégré conducteur (14) doté d'éléments en saillie (221-224). Le circuit intégré est fixé au support (14), au moins une connexion électrique (26) avec le support (14) étant réalisée sur au moins l'un des éléments en saillie (22). L'invention concerne également un cadre de montage (16, 22, 28) qui comporte un support conducteur (14) présentant un corps principal (16). Le support (14) comporte en outre des éléments en saillie (221-224) qui s'étendent à partir du corps principal (16) le long d'un plan d'une première surface (18) du support (14). Ledit ou lesdits éléments en saillie (22) comprennent en outre une base (34). Par ailleurs, un appareil électronique comportant un boîtier de circuit intégré (10) tel que décrit ci-dessus est également prévu.
PCT/IB2004/052513 2003-12-03 2004-11-23 Boitier de circuit integre et cadre de montage WO2005055320A1 (fr)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
EP03104525.5 2003-12-03
EP03104525 2003-12-03
EP04103853.0 2004-08-10
EP04103853 2004-08-10

Publications (1)

Publication Number Publication Date
WO2005055320A1 true WO2005055320A1 (fr) 2005-06-16

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Application Number Title Priority Date Filing Date
PCT/IB2004/052513 WO2005055320A1 (fr) 2003-12-03 2004-11-23 Boitier de circuit integre et cadre de montage

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TW (1) TW200525722A (fr)
WO (1) WO2005055320A1 (fr)

Cited By (1)

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Publication number Priority date Publication date Assignee Title
US8258611B2 (en) 2007-07-23 2012-09-04 Nxp B.V. Leadframe structure for electronic packages

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Publication number Priority date Publication date Assignee Title
TWI489607B (zh) * 2010-11-23 2015-06-21 登豐微電子股份有限公司 封裝結構

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US5161304A (en) * 1990-06-06 1992-11-10 Sgs-Thomson Microelectronics, Inc. Method for packaging an electronic circuit device
US5347429A (en) * 1990-11-14 1994-09-13 Hitachi, Ltd. Plastic-molded-type semiconductor device
JP2000299423A (ja) * 1999-04-16 2000-10-24 Hitachi Ltd リードフレームおよびそれを用いた半導体装置ならびにその製造方法
EP1187202A2 (fr) * 2000-09-04 2002-03-13 Dainippon Printing Co., Ltd. Empaquetage semi-conducteur
US20020084518A1 (en) * 2000-12-28 2002-07-04 Hajime Hasebe Semiconductor device
WO2002069400A1 (fr) * 2001-02-27 2002-09-06 Chippac, Inc. Boitier plastique de semiconducteur
EP1328023A2 (fr) * 2002-01-09 2003-07-16 Matsushita Electric Industrial Co., Ltd. Grille de connexion, procédé pour sa fabrication, dispositif semi-conducteur encapsulé dans une résine et procédé pour sa fabrication

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Publication number Priority date Publication date Assignee Title
US5161304A (en) * 1990-06-06 1992-11-10 Sgs-Thomson Microelectronics, Inc. Method for packaging an electronic circuit device
US5347429A (en) * 1990-11-14 1994-09-13 Hitachi, Ltd. Plastic-molded-type semiconductor device
JP2000299423A (ja) * 1999-04-16 2000-10-24 Hitachi Ltd リードフレームおよびそれを用いた半導体装置ならびにその製造方法
EP1187202A2 (fr) * 2000-09-04 2002-03-13 Dainippon Printing Co., Ltd. Empaquetage semi-conducteur
US20020084518A1 (en) * 2000-12-28 2002-07-04 Hajime Hasebe Semiconductor device
WO2002069400A1 (fr) * 2001-02-27 2002-09-06 Chippac, Inc. Boitier plastique de semiconducteur
EP1328023A2 (fr) * 2002-01-09 2003-07-16 Matsushita Electric Industrial Co., Ltd. Grille de connexion, procédé pour sa fabrication, dispositif semi-conducteur encapsulé dans une résine et procédé pour sa fabrication

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8258611B2 (en) 2007-07-23 2012-09-04 Nxp B.V. Leadframe structure for electronic packages

Also Published As

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