WO2005045758A1 - 平均維持補間演算回路、画素補間回路、平均維持補間演算方法、及び画素補間方法 - Google Patents

平均維持補間演算回路、画素補間回路、平均維持補間演算方法、及び画素補間方法 Download PDF

Info

Publication number
WO2005045758A1
WO2005045758A1 PCT/JP2004/008608 JP2004008608W WO2005045758A1 WO 2005045758 A1 WO2005045758 A1 WO 2005045758A1 JP 2004008608 W JP2004008608 W JP 2004008608W WO 2005045758 A1 WO2005045758 A1 WO 2005045758A1
Authority
WO
WIPO (PCT)
Prior art keywords
pixel
interpolation
missing
circuit
pixels
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/JP2004/008608
Other languages
English (en)
French (fr)
Japanese (ja)
Inventor
Satoshi Yamanaka
Yoshiaki Okuno
Jun Someya
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to EP04746110A priority Critical patent/EP1686529A4/en
Priority to US10/578,686 priority patent/US7738738B2/en
Publication of WO2005045758A1 publication Critical patent/WO2005045758A1/ja
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06TIMAGE DATA PROCESSING OR GENERATION, IN GENERAL
    • G06T3/00Geometric image transformations in the plane of the image
    • G06T3/40Scaling of whole images or parts thereof, e.g. expanding or contracting
    • G06T3/4007Scaling of whole images or parts thereof, e.g. expanding or contracting based on interpolation, e.g. bilinear interpolation
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06TIMAGE DATA PROCESSING OR GENERATION, IN GENERAL
    • G06T5/00Image enhancement or restoration
    • G06T5/20Image enhancement or restoration using local operators
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06TIMAGE DATA PROCESSING OR GENERATION, IN GENERAL
    • G06T5/00Image enhancement or restoration
    • G06T5/77Retouching; Inpainting; Scratch removal
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N1/00Scanning, transmission or reproduction of documents or the like, e.g. facsimile transmission; Details thereof
    • H04N1/40Picture signal circuits
    • H04N1/401Compensating positionally unequal response of the pick-up or reproducing head

Definitions

  • the present invention relates to an interpolation operation circuit for interpolating missing pixels in a digital image, a pixel interpolation circuit, an interpolation operation method, and a pixel interpolation method.
  • Landscape technology for interpolating missing pixels in a digital image, a pixel interpolation circuit, an interpolation operation method, and a pixel interpolation method.
  • a method of using an average value of pixels adjacent to a missing pixel as interpolation data, a regression line of a pixel adjacent to the missing pixel using a least squares method, and the regression line Calculate interpolation data for missing pixels using a method of calculating interpolation data from a straight line, a method of calculating a quartic curve from four pixels adjacent to the missing pixel, and calculating the quartic force interpolation data (e.g., And Patent Document 1).
  • Patent Document 1 Japanese Patent Application Laid-Open No. 2003-101724 (Paragraphs 0040 to 0066, FIGS. 3 to 5)
  • interpolation is performed using linear interpolation or a higher-order function. Therefore, when a highly periodic image in which some pixels are missing is interpolated, an error increases.
  • the present invention has been made to solve the above-described problem, and has an interpolation operation circuit and a pixel interpolation circuit capable of appropriately interpolating missing pixels included in a highly periodic image.
  • an average value of a plurality of pixels forming a set of pixels including a missing pixel is equal to an average value of a plurality of pixels forming a set of pixels not including a missing pixel.
  • the average value and the missing value of the pixel row including the missing pixel are determined. Since the interpolation data of the missing pixel is calculated so that the average value of the pixel row that does not include the pixel is equal, the average value of the pixel value of the pixel row including the missing pixel is equal to the average value of the pixel value of the pixel row that does not include the missing pixel. Data such as periodic data can be appropriately interpolated.
  • FIG. 1 is a block diagram showing a configuration of an interpolation operation circuit according to a first embodiment.
  • FIG. 2 is a diagram showing a pixel row processed by an interpolation calculation circuit according to the first embodiment.
  • FIG. 3 is a waveform chart showing an example of pixel data processed by the interpolation calculation circuit according to the first embodiment.
  • FIG. 4 is a waveform chart showing an example of pixel data processed by the interpolation calculation circuit according to the first embodiment.
  • FIG. 5 is a waveform chart showing an example of pixel data processed by the interpolation calculation circuit according to the first embodiment.
  • FIG. 6 is a block diagram illustrating a configuration example of a pixel interpolation circuit including a cycle detection circuit.
  • FIG. 7 is a diagram showing a pixel column processed by an interpolation operation circuit according to the second embodiment.
  • FIG. 8 is a waveform chart showing an example of pixel data processed by the interpolation arithmetic circuit according to the second embodiment.
  • FIG. 9 is a waveform chart showing an example of pixel data processed by the interpolation operation circuit according to the second embodiment.
  • FIG. 10 is a block diagram showing a configuration of an interpolation operation circuit according to a third embodiment.
  • FIG. 11 is a diagram showing a pixel column processed by an interpolation operation circuit according to a third embodiment.
  • FIG. 12 is a diagram showing a set of pixels divided into a plurality of rows, which is processed by the interpolation operation circuit according to the third embodiment.
  • FIG. 13 is a diagram showing pixel columns located in a plurality of rows, which are processed by the interpolation operation circuit of the present invention.
  • FIG. 14 is a waveform chart showing an example of pixel data processed by the interpolation calculation circuit according to the third embodiment.
  • FIG. 15 is a block diagram illustrating a configuration example of a missing portion total calculation circuit including a plurality of missing portion addition circuits.
  • FIG. 16 is a block diagram showing a configuration example of an average maintaining interpolation operation circuit.
  • FIG. 17 is a block diagram showing a configuration of a pixel interpolation circuit according to a fourth embodiment.
  • FIG. 18 is a diagram illustrating a relationship between a pixel cycle and an interpolation error of the pixel interpolation circuit according to the fourth embodiment.
  • FIGS. 19 (a) to (e) are diagrams showing a relationship between a pixel cycle and an interpolation error for each parameter k of the pixel interpolation circuit according to the fourth embodiment.
  • FIGS. 20 (a) to (c) are diagrams showing a relationship between a pixel cycle and an interpolation error for each parameter k of the pixel interpolation circuit according to the fourth embodiment.
  • FIG. 21 is a block diagram showing a configuration of a pixel interpolation circuit according to a fourth embodiment.
  • FIG. 22 (a) to (d) are waveform diagrams showing the operation of the left-right average interpolation circuit of the pixel interpolation circuit according to the fourth embodiment.
  • FIG. 23 is a diagram illustrating a relationship between a pixel cycle and an interpolation error of a left-right average interpolation calculation circuit of the pixel interpolation circuit according to the fourth embodiment.
  • FIGS. 24 (a) to (c) are diagrams showing a relationship between a pixel cycle and an interpolation error of each interpolation operation circuit of the pixel interpolation circuit according to the fourth embodiment.
  • FIG. 25 is a diagram illustrating a relationship between a parameter k and an interpolation error of the pixel interpolation calculation circuit according to the fourth embodiment.
  • FIGS. 26 (a) to (c) are diagrams showing the relationship between a meter k and an interpolation error in a pixel interpolation calculation circuit according to a fourth embodiment.
  • FIGS. 27 (a) to (c) are diagrams showing a pixel column processed by a pixel interpolation circuit according to a fourth embodiment.
  • FIGS. 28 (a) to (c) are diagrams showing ranges in which each of a plurality of average maintaining interpolation calculation circuits of a pixel interpolation circuit provides good results in the fourth embodiment.
  • FIG. 29 is a block diagram showing a configuration of a pixel interpolation circuit according to a sixth embodiment.
  • FIG. 30 (a) and (b) are diagrams showing a pixel column and a set of pixels processed in the sixth embodiment.
  • FIG. 6 is a diagram showing evaluation results of the respective interpolation operation circuits.
  • FIG. 32 is a diagram showing a comprehensive evaluation result of each interpolation operation circuit of the pixel interpolation circuit according to the sixth embodiment.
  • FIG. 33 is a block diagram showing a specific example of a pixel interpolation circuit according to a sixth embodiment.
  • FIG. 34 (a) is a waveform diagram showing an example of pixel data processed by the pixel interpolation circuit according to the sixth embodiment
  • FIG. 34 (b) is a diagram showing a missing pixel and a test pixel located in the vicinity thereof.
  • FIG. 35] (a) to (c) are diagrams showing pixel columns processed by a pixel interpolation circuit according to a sixth embodiment.
  • FIGS. 36 (a) to (e) are diagrams showing missing pixels in a series of pixels processed by the pixel interpolation circuit of the sixth embodiment and test pixels located near the missing pixels.
  • FIGS. 37 (a) to (e) are diagrams showing missing pixels in a series of pixels processed by the pixel interpolation circuit according to the sixth embodiment and test pixels located in the vicinity thereof.
  • FIGS. 38 (a) to (e) are diagrams showing missing pixels in a series of pixels processed by the pixel interpolation circuit according to the sixth embodiment and test pixels located near the missing pixels.
  • FIG. 39 is a diagram showing an evaluation result of each interpolation arithmetic circuit when interpolation is performed on a plurality of test pixels by the pixel interpolation circuit according to the sixth embodiment.
  • FIG. 40 is a diagram showing a comprehensive evaluation result of each interpolation operation circuit of the pixel interpolation circuit according to the sixth embodiment.
  • FIG. 41 (a) is a waveform diagram showing an example of pixel data processed by the pixel interpolation circuit according to the sixth embodiment
  • FIG. 41 (b) is a diagram showing a missing pixel and a test pixel located in the vicinity thereof.
  • FIG. 42 is a diagram showing an evaluation result of each interpolation operation circuit when interpolation is performed on a plurality of test pixels by the pixel interpolation circuit according to the sixth embodiment.
  • FIG. 43 is a diagram showing a comprehensive evaluation result of each interpolation operation circuit of the pixel interpolation circuit according to the sixth embodiment.
  • FIG. 44 (a) is a waveform diagram showing an example of pixel data processed by the pixel interpolation circuit according to Embodiment 6, and FIG. 44 (b) is a diagram showing a missing pixel and a test pixel located in the vicinity thereof.
  • FIG. 45 is a diagram showing evaluation results of each interpolation operation circuit when interpolation is performed on a plurality of test pixels by the pixel interpolation circuit according to the sixth embodiment.
  • FIG. 46 is a diagram showing a comprehensive evaluation result of each interpolation operation circuit of the pixel interpolation circuit according to the sixth embodiment.
  • FIG. 47 is a block diagram showing a configuration of an interpolation operation circuit according to a seventh embodiment.
  • FIG. 48 is a diagram showing a pixel column processed by the interpolation operation circuit according to the seventh embodiment.
  • FIG. 49 is a block diagram showing a configuration of an interpolation calculation circuit according to a seventh embodiment.
  • FIG. 50 is a waveform chart showing an example of pixel data processed by the interpolation operation circuit of the seventh embodiment.
  • FIG. 51 is a flowchart showing a processing procedure in a pixel interpolation method according to the eighth embodiment.
  • FIG. 52 is a flowchart showing a processing procedure in a pixel interpolation method according to the ninth embodiment. Explanation of symbols
  • 1 missing portion adding circuit 1 (1) first missing portion adding circuit, 1 (2) second missing portion adding circuit, 2 non-missing portion adding circuit, 2 (1) first non-missing portion Partial adder circuit, 2 (2) Second non-missing part adder circuit, 3 Difference circuit, 4 Average circuit, 5 Output circuit, 6 (0) Left / Right average interpolation arithmetic circuit, 6 (1) First average maintaining interpolation Arithmetic circuit, 6 (2) 2nd average sustain interpolation arithmetic circuit, 6 (nl) n-1st average sustain interpolation arithmetic circuit, 6 (n) nth average sustain interpolation arithmetic circuit, 6 (m_l) mth -1 average sustain interpolation circuit, 7 management circuit, 8 scoring circuit, 9 selection signal generator, 10 output range generator circuit, 11 limit circuit, 12 average sustain interpolation circuit, 13 output limiter, 15 period detection circuit, 1 7 Non-missing part total calculation circuit, 18 average circuit, 19 missing part total calculating circuit, 20 control circuit, 21 image data memory.
  • a target to be processed is a series of pixels whose positions of missing pixels are known in advance.
  • An example of such a series of pixels is, for example, a pixel obtained when image information is read by an image sensor in which a plurality of chips are linearly arranged, as disclosed in Patent Document 1 described above. If the distance between image sensors adjacent to each other across the boundary between adjacent chips is larger than the distance between image sensors in the same chip (one pitch), for example, if there is about two pitches, it is assumed that there is a missing pixel. An interpolation process is performed. If the position of the missing pixel is not known in advance, it is good to add a circuit for detecting the position of the missing pixel.
  • Some of the embodiments of the present invention are effective when used when a series of pixels has periodicity.
  • the best effect can be obtained by assuming that the cycle is known in advance and setting parameters in accordance with the cycle.
  • a circuit for detecting the period may be added.
  • FIG. 1 is a diagram showing a configuration of an interpolation operation circuit according to the present invention.
  • the interpolation operation circuit includes a missing portion adding circuit 1, a non-missing portion adding circuit 2, and a difference circuit 3.
  • the missing portion addition circuit 1 calculates the sum (SL) of the values of the pixels other than the missing pixel among the k pixels constituting the pixel set including the missing pixel in the series of pixels. Ask.
  • the non-missing portion addition circuit 2 calculates the sum of the values of the k pixels forming the pixel set that does not include the missing pixel.
  • the difference circuit 3 obtains interpolation data (L) of a missing pixel by subtracting the output (SA) of the non-missing portion adding circuit 2 and the output (SL) of the missing portion adding circuit 1.
  • FIG. 2 is a diagram showing a part of the input image DI, and shows a positional relationship between two pixel columns for calculating an average value in the interpolation operation circuit according to the present invention.
  • indicates a real pixel (non-missing pixel)
  • X indicates a missing pixel.
  • the symbols LC and NA each denote a pixel column consisting of k one-dimensionally continuous pixels that are part of a series of pixels.
  • the pixel system IJLC and the pixel array NA do not overlap.
  • Pixel column LC contains missing pixels, and pixel column NA does not contain missing pixels.
  • the interpolation calculation circuit interpolates the missing pixel L such that the average value of the pixel array LC including the missing pixel L and the average value of the pixel array NA not including the missing pixel L are equal.
  • the input image DI is input to the missing portion adding circuit 1 and the non-missing portion adding circuit 2.
  • k in the present invention Is a parameter indicating the number of pixels for which the average value is calculated in the interpolation arithmetic circuit, and indicates the number of pixels forming the pixel column LC and the pixel column NA. Input to the missing part adding circuit 1 and the non-missing part adding circuit 2.
  • the missing portion addition circuit 1 calculates the sum of the k pixels (LC [1], LC [2] —LC [kl], L) included in the pixel system ULC, except for the missing pixel L, as partial sum data SL Is output as The partial sum data SL is
  • the partial sum data SL is input to the difference circuit 3.
  • the non-missing portion addition circuit 2 outputs the sum of k pixels (NA [1] -NA [k]) included in the pixel array NA as partial sum data SA.
  • Partial sum data SA is
  • the partial sum data SA is input to the difference circuit 3.
  • the difference circuit 3 creates an equation based on the partial sum data SL and SA so that the average value of the pixels IJLC and NA becomes equal, and obtains interpolation data of the missing pixel L.
  • the equation is
  • the interpolation operation circuit is configured to perform the missing pixel processing on the image data having the characteristic that the average value of the pixel array LC including the missing pixel L and the average value of the pixel array NA not including the missing pixel L are equal. Can be appropriately interpolated.
  • the interpolation calculation circuit calculates the interpolation data of the missing pixel such that the average value of the pixel values of the pixel row including the missing pixel and the pixel row not including the missing pixel is equal. Therefore, in the present specification, the interpolation arithmetic circuit according to the present embodiment is hereinafter referred to as an average maintaining interpolation arithmetic circuit.
  • the “average value of the pixels in the pixel row” may be referred to as the “average value of the pixel row” for simplicity.
  • "sum of pixels” and “sum of pixels” are sometimes referred to as "sum of pixel values” and "sum of pixel values”.
  • FIG. 3 is a diagram showing an example of image data having periodicity.
  • the horizontal axis X indicates the pixel position
  • the vertical axis D represents the density value.
  • the image data in Fig. 3 is data obtained by discretizing data Dorg that repeats a constant change at a constant period Pd for each sampling period Ps.
  • Pd 5Ps
  • the pixel cycle Pp indicates the number of samplings per cycle. That is, the pixel cycle is a cycle of a pixel change represented by the number of pixels.
  • the data value repeats 100, 143, 126, 74, and 57 for each data period Pd.
  • FIG. 4 is a diagram showing image data when the pixel L of the image data in FIG. 3 is missing.
  • the positional relationship between the pixels IJLC and NA for calculating the average value in the average maintaining interpolation arithmetic circuit with k 5 (see FIG. 4).
  • the correspondence with 2) is shown.
  • the missing portion addition circuit 1 outputs the sum of the five pixels (LC [1] -LC [4], L) included in the pixel system IJLC other than the missing pixel L as partial sum data SL.
  • the difference circuit 3 creates an equation based on the partial sum data SL and SA so that the average value of the pixels IJLC and NA is equal, and obtains interpolation data of the missing pixel L.
  • the original data of the missing pixel L is 126
  • FIG. 5 is a diagram showing image data when the pixel L of the image data of FIG. 3 is missing.
  • Figure 3 shows the correspondence between the pixel positions IJLC and NA used to calculate the average value in the mean-maintenance interpolation arithmetic circuit of Fig. 2 (Fig. 2).
  • the difference circuit 3 creates an equation based on the partial sum data SL and SA so that the average value of the pixels IJLC and NA becomes equal, and obtains interpolation data of the missing pixel L.
  • the original data of the missing pixel L is 126
  • N * (100 + 143 + 126 + 74 + 57) / N * 5 100
  • N is a positive integer
  • the mean value of the pixel line LC including missing pixels and the mean value of the pixel line NA not including missing pixels are both 100, which can be used to properly obtain the interpolation data of the missing pixel by the equation of the difference circuit 3.
  • a cycle detection circuit 15 for detecting the pixel cycle Pp in response to the DI may be added to determine the parameter k based on the detected pixel cycle Pp.
  • the position of the missing pixel is assumed in advance, but if the position of the missing pixel is unknown, a circuit for detecting the position of the missing pixel is added. Is also good.
  • a circuit for example, a known error correction circuit can be used.
  • the missing pixel can be appropriately interpolated.
  • the average of the pixel system including the missing pixel and the pixel column not including the missing pixel is similarly calculated. The values become equal, and the interpolation data of the missing pixel can be appropriately obtained by the equation of the difference circuit 3.
  • each of the pixel column LC including the missing pixel L and the pixel column NA including the missing pixel L is configured to include k pixels
  • the missing portion addition circuit 1 calculates the sum of the values of the pixels other than the missing pixel L in the pixel system IjLC including the missing pixel L
  • the non-missing portion addition circuit 2 forms the pixel row NA that does not include the missing pixel L.
  • FIG. 7 is a diagram showing a part of the input image DI similarly to FIG. 2, and shows a positional relationship between two pixel rows for calculating an average value in the average maintaining interpolation operation circuit.
  • the symbols LC and NA denote a pixel row consisting of k one-dimensionally continuous pixels, each of which is part of a series of pixels. Pixel row LC and pixel row NA overlap by i pixels. Pixel row LC is missing The pixel row NA does not include missing pixels.
  • the code area indicates a region or a portion of the pixel array NA that does not overlap the pixel array IJLC, the code area indicates a portion that does not overlap the pixel array NA, and the code AD indicates the pixel array NA and the pixel. Indicates overlapping parts of column LC.
  • the missing pixel L is not included in the overlapping part AD.
  • Configuration of the interpolation operation circuit ⁇ Operation is the configuration shown in FIGS. 1 and 2. .
  • the interpolation operation circuit performs the pixel row including the missing pixel and the pixel row not including the missing pixel described in the first embodiment.
  • the average value of the pixel array LC including the missing pixels and the average value of the pixel array NA not including the missing pixels become equal, and the missing pixels can be appropriately interpolated.
  • the partial sum data SL of the pixel system IJLC is obtained from the partial sum data SL of the pixel system and the partial sum data SAD of the pixel column AD.
  • the partial sum data SA of the pixel column NA is obtained from the partial sum data SA 'of the pixel column NA' and the partial sum data SAD of the pixel column AD.
  • the average maintaining interpolation arithmetic circuit operates such that the average values of the pixel rows NA 'and LC' become equal. Can be appropriately interpolated even for image data having.
  • FIG. 8 is a diagram showing image data when the pixel L of the image data of FIG. 3 is missing.
  • the pixel row including the missing pixel and the pixel row not including the missing pixel overlap by 4 pixels, and the average data of k 9 is obtained.
  • the relationship between the pixel system IJLC for calculating the average value and the positional relationship between the NA and NA (Fig. 7) is shown in Fig. 7.
  • the missing portion addition circuit 1 is a portion of the sum of the nine pixels (AD [1] —AD [4], L, LC [1] -LC [4]) included in the pixel array LC other than the missing pixel L Output as sum data SL.
  • the non-missing portion addition circuit 2 outputs the sum of nine pixels (NA [1] NA [5], AD [1] -AD [4]) included in the pixel array NA as partial sum data SA.
  • the difference circuit 3 creates an equation based on the partial sum data SL and SA so that the average value of the pixels IJLC and NA becomes equal, and obtains interpolation data of the missing pixel L.
  • the original data of the missing pixel L is 126, and the pixel row including the missing pixel and the pixel row not including the missing pixel overlap by 4 pixels.
  • Figure 7 shows the correspondence between the pixel system for calculating the average value in the interpolation circuit and the positional relationship between JLC and NA ( Figure 7).
  • the missing portion addition circuit 1 is a portion of the sum of the nine pixels (AD [1] —AD [5], L, LC [1] -LC [3]) included in the pixel array LC other than the missing pixel L Output as sum data SL.
  • the non-missing portion addition circuit 2 outputs the sum of nine pixels (NA [1] —NA [4], AD [1] -AD [5]) included in the pixel array NA as partial sum data SA.
  • the difference circuit 3 creates an equation based on the partial sum data SL and SA so that the average value of the pixels IJLC and NA becomes equal, and obtains interpolation data of the missing pixel L.
  • the missing pixel L is
  • the original data of the missing pixel L is 126, and the pixel row including the missing pixel and the pixel row not including the missing pixel overlap with each other by 5 pixels.
  • the interpolation operation circuit performs the pixel row including the missing pixel and the pixel row not including the missing pixel described in Embodiment 1.
  • the missing pixel can be appropriately interpolated.
  • the difference circuit 3 can appropriately determine the interpolation data of the missing pixel.
  • the k 9 average maintaining interpolation operation circuit in which the pixel row including the missing pixel and the pixel row not including the missing pixel in FIG. 9 overlap by 5 pixels, the pixel row including the missing pixel and the missing pixel are not included. Since the number of pixels where the pixel columns do not overlap is not an integral multiple of the pixel period Pp, the interpolation data of the missing pixels has an error.
  • the missing pixel is appropriately interpolated.
  • a pixel row including a missing pixel is similarly provided. Therefore, the average value of the portion where the pixel row not including the missing pixel does not overlap becomes equal, and the missing pixel can be appropriately interpolated.
  • the average maintaining interpolation operation circuit reduces the error in the interpolation data when the number of non-overlapping pixels (k-i) is substantially equal to the pixel period Pp or an integer multiple thereof.
  • a cycle detection circuit 15 that receives the image data DI and detects the pixel cycle Pp is added, and the parameters k and i are determined based on the detected pixel cycle Pp. Is also good.
  • FIG. 10 is a diagram showing a configuration of an average maintaining interpolation arithmetic circuit that performs interpolation of missing pixels so that the average value of a pixel row including missing pixels and the average value of two pixel rows not including missing pixels are equalized.
  • the average maintaining interpolation operation circuit includes a missing section adding circuit 1 and a first non-missing section adding circuit.
  • FIG. 11 shows a part of the input image DI similarly to FIG. 2, and shows a positional relationship between three pixel columns for calculating an average value in the average maintaining interpolation operation circuit.
  • Each of the pixel rows LC, NA, and NB is a pixel row in which k pixels are arranged in one dimension, and the pixel row LC and the pixel row NA, and the pixel row LC and the pixel row NB each overlap i pixels.
  • Pixel row LC contains missing pixels, and pixel rows NA and NB do not contain missing pixels.
  • the symbol “NA” indicates a portion that overlaps with LC in NA, and the symbol indicates a portion that does not overlap with the pixel system 1JLC in the pixel column ⁇ .
  • the portion that does not overlap with the pixel column ⁇ ⁇ is shown, and the portion that does not overlap with the pixel column ⁇ ⁇ ⁇ ⁇ in the pixel system IJLC is shown.
  • the symbol AD indicates a portion where the pixel sequence ⁇ and the pixel system IJLC overlap
  • the symbol BD indicates a portion where the pixel sequence ⁇ and the pixel sequence LC overlap.
  • a pixel column LC including missing pixels and pixel columns NA and NB not including missing pixels may be set two-dimensionally.
  • a series of pixels is divided into a plurality of rows and arranged in a matrix, and each of them forms a part of a plurality of rows, and includes a plurality of pixels which are continuous with each other in each row.
  • a set of pixels may be configured by a pixel column. In this case, the above pixel column Instead, the average value between the pixel sets is made equal to each other. 2 and 11 can be considered as examples in which the number of pixel rows constituting a pixel set is one.
  • a plurality of pixel rows that do not include a missing pixel may be set.
  • a pixel column that does not include a missing pixel may be shifted from a pixel column that includes a missing pixel. That is, a plurality of non-missing pixel columns (NA, NB, NC) may be composed of pixels in different rows.
  • the non-missing portion adding circuit (the non-missing portion adding circuit 2 (1 ), 2 (similar to (2)), and calculate the average of their outputs.
  • the average maintaining interpolation arithmetic circuit does not include the average value of the pixel row LC including the missing pixel L and the missing pixel L
  • the missing pixel L is interpolated so that the average values of the pixel rows NA and NB are equal.
  • the input image DI is input to the missing portion adding circuit 1, the first non-missing portion adding circuit 2 (1), and the second non-missing portion adding circuit 2 (2).
  • k is a parameter indicating the number of pixels for which the average value is calculated in the average maintaining interpolation arithmetic circuit, as in FIG.
  • the missing portion addition circuit 1 is configured to include k pixels (AD [1] —AD [i], LC [1] -LC [k-1 2i ⁇ 1], BD [1] —BD [ i]), the sum other than the missing pixel L is output as partial sum data SL.
  • the partial sum data SL is
  • the partial sum data SL is input to the difference circuit 3.
  • the first non-missing portion addition circuit 2 (1) includes k pixels (NA [1] NA
  • the sum of [k-i], AD [1] AD [i]) is output as partial sum data SA.
  • the partial sum data S A is
  • the second non-missing portion addition circuit 2 (2) calculates the sum of k pixels (BD [1] —BD [i], NB [1] —NB [k_i]) included in the pixel sequence NB. Output as partial sum data SB.
  • the partial sum data SB is
  • the partial sum data SB is input to the averaging circuit 4.
  • the averaging circuit 4 outputs the average value of the partial sum data SA and SB of the two pixel columns that do not include the missing pixel as the average data AN.
  • the average data AN is
  • the difference circuit 3 creates an equation based on the partial sum data SL and the average data AN so that the average values of the pixels 1JLC, NA and NB are equal, and obtains interpolation data of the missing pixel L.
  • the equation is
  • the average maintaining interpolation operation circuit includes a pixel row LC including the missing pixel and two pixel rows not including the missing pixel. Interpolation can be appropriately performed on image data having characteristics such that the average values of NA and NB become equal. Further, similarly to the average maintaining interpolation calculation circuit in the case where the pixel system IJ including the missing pixel and the pixel column not including the missing pixel described in the second embodiment overlap, the pixel column including the missing pixel and the missing pixel are not included.
  • FIG. 14 is a diagram showing image data when the pixel L of the image data in FIG. 3 is missing, and shows a case where the average value of the pixel column including the missing pixel is equal to the average value of two pixel columns not including the missing pixel.
  • FIG. 11 shows the correspondence between the pixel rows LC, NA, and NB for calculating the average value in the average maintaining interpolation calculation circuit of FIG. 9 (FIG. 11). LC and NA and LC and NB overlap by 4 pixels each.
  • the first non-missing portion addition circuit 2 (1) includes nine pixels (NA [1] -NA
  • AD [1] The sum of AD [4]) is output as partial sum data SA.
  • the second non-missing part addition circuit 2 (2) is a partial sum of the nine pixels (BD [1] BD [4], NB [1] NB [5]) included in the pixel column NB. Output as data SB.
  • the averaging circuit 4 outputs the average value of the partial sum data SA and SB as the average data AN.
  • Average data AN
  • the difference circuit 3 creates an equation based on the partial sum data SL and the average data AN so that the average values of the pixels IJLC, NA and NB are equal, and obtains interpolation data of the missing pixel L.
  • the equation is
  • the original data of the missing pixel L is 126, and the pixel row including the missing pixel and the two pixel rows not including the missing pixel overlap each other by 4 pixels.
  • the error of the interpolation data of the interpolation arithmetic circuit is 0 with respect to the original data.
  • the pixel row including the missing pixel and the pixel row including the missing pixel, the pixel power S of the portion where the two pixel rows do not overlap, and an integral multiple of the pixel period Pp (K_i N * Pp) It is possible to appropriately interpolate missing pixels in the image data satisfying ()).
  • the noise is generated by the averaging circuit 4. Since the components are also averaged, it is possible to reduce the interpolation error due to noise etc. and increase the interpolation accuracy.
  • the first and second non-missing portion addition circuits 2 (1) and 2 (2) and the averaging circuit 4 form a pixel column that does not include a missing pixel.
  • a non-missing portion total calculating circuit 17 for calculating the sum of the values of the pixels is configured.
  • non-missing portion total calculating circuit 17 is constituted only by the non-missing portion adding circuit 2.
  • a missing portion addition circuit 19 instead of the missing portion addition circuit 1, as shown in FIG. 15, a plurality of missing portion addition circuits 1 (1) and 1 (2) and an averaging circuit for averaging their outputs are provided. 18 may be provided to configure a missing portion total calculation circuit 19 that obtains the total SL of the values of pixels other than the missing pixel among the k pixels constituting the pixel row including the missing pixel. In the configurations of FIG. 1 and FIG. 10, it can be considered that such a missing portion total calculation circuit 19 is configured only by the missing portion addition circuit 1. Therefore, when the configurations of FIGS. 1 and 10 are generalized and drawn, they are as shown in FIG.
  • FIG. 17 is a diagram showing a configuration of a pixel interpolation circuit according to the fourth embodiment.
  • This pixel interpolation circuit includes a plurality of average sustain interpolation circuits 6 (1) to 6 (n ⁇ 1), that is, a first average sustain interpolation circuit 6 (1) and a second average sustain interpolation circuit 6 (1). 2),..., The (n ⁇ 1) th average maintaining interpolation arithmetic circuit 6 (nD) is provided.
  • the value obtained by subtracting i from the parameter k or the parameter k (k-i) is set to different values.
  • the output circuit 5 selects one of the interpolation data output from each of the plurality of average maintaining interpolation arithmetic circuits 6 (1) to 6 (n-1) based on, for example, the selection signal C, and sets the selected data as data of a missing pixel. Output.
  • the horizontal axis Pp indicates the pixel period of the periodic image data, and the vertical axis E indicates the interpolation error.
  • FIG. 9 is a diagram showing a range of a pixel period Pp that each average maintaining interpolation arithmetic circuit is good at (can perform interpolation with a relatively small error).
  • FIG. 20 (a) shows a graph in which the five graphs of FIG. 19 (a) and FIG. 19 (e) are superimposed on one coordinate axis.
  • FIG. 20 (b) is a diagram showing a range in which the interpolation error of each average maintaining interpolation calculation circuit is minimized.
  • the range in which the interpolation error of each average maintenance interpolation arithmetic circuit is the smallest is the range of the pixel period Pp that each average maintenance interpolation arithmetic circuit is good at. .
  • the input image DI is input to the first average maintaining interpolation circuit 6 (1) —the (n ⁇ 1) th average maintaining interpolation circuit 6 (n ⁇ 1).
  • the complement data D1—Dn—1 is input to the output circuit 5.
  • a selection signal C generated as described later is input to the output circuit 5.
  • the output circuit 5 selects one of the interpolation data D1 to Dn-1 based on the selection signal C and outputs it as interpolation data DO of the missing pixel.
  • the pixel interpolation circuit shown in FIG. 17 includes a plurality of average maintaining interpolation arithmetic circuits having different parameters. Since the characteristics of the interpolation error shown in Fig. 20 (b) can be realized by providing the number of pixels, as shown in Fig. 20 (c), it can be applied to a wide range from image data with a small cycle to image data with a large cycle. it can.
  • FIG. 21 shows a configuration of a pixel interpolation circuit according to the fifth embodiment.
  • This pixel interpolation circuit includes a left-right average interpolation calculation circuit 6 (0) in addition to the configuration of FIG.
  • the average maintaining interpolation arithmetic circuits 6 (1) to 6 (m-1) are the same as the average maintaining interpolation arithmetic circuits 6 (1) to 6 (n-1) in FIG. Have been.
  • This m may be the same value as n in the configuration of FIG. 17, but may be smaller than n as described later. In other words, when the left-right average interpolation arithmetic circuit 6 (0) is provided, the number of average maintaining interpolation arithmetic circuits can be reduced.
  • the left / right average interpolation operation circuit 6 (0) generates an average value of values of adjacent pixels located on the left and right of the missing pixel as interpolation data.
  • “left and right” here means that when a series of pixels are drawn in a horizontal direction, they are located to the left and right of the missing pixel. Corresponds to this.
  • the output circuit 5 outputs, for example, based on the selection signal (C), the interpolation data output by the plurality of average maintaining interpolation calculation circuits 6 (1) to 6 (m-1) and the left / right average interpolation calculation circuit 6 (0). Is selected and output as missing pixel data.
  • FIG. 22 shows a case where a local maximum value (a peak value in each cycle) of a pixel that changes periodically is interpolated.
  • the error becomes maximum in the case of the interpolation of the maximum value as shown in the figure. Therefore, when the error is considered for the local maximum value, the maximum error is considered.
  • L indicates a missing pixel to be interpolated
  • LL indicates a pixel adjacent to the left of the missing pixel L
  • LR indicates a pixel adjacent to the right of the missing pixel L
  • LA indicates a pixel adjacent to the missing pixel L.
  • the interpolation data generated by the left-right average interpolation calculation circuit is shown
  • E2-En indicates the error between the interpolation data and the original data, respectively.
  • the left / right average interpolation circuit calculates the average value of the pixel LL adjacent to the missing pixel L and the pixel LR adjacent to the missing pixel L to the interpolation of the missing pixel L.
  • Data is LA.
  • LA (LL + LR) / 2
  • FIG. 23 shows the relationship between the pixel period and the interpolation error in the left-right average interpolation calculation circuit.
  • FIG. 24A is a graph showing the relationship between the pixel cycle and the interpolation error in the left-right average interpolation calculation circuit shown in FIG.
  • Ep indicates the upper limit of the visually permissible error.
  • the left-right average interpolation calculation circuit can be used for interpolation of missing pixels.
  • the pixel interpolation circuit including the left-right average interpolation calculation circuit and the plurality of interpolation calculation circuits has an interpolation error characteristic as shown in FIG.
  • the interpolation errors of the arithmetic circuits are respectively minimized.
  • Rave the interpolation error of the left-right average interpolation calculation circuit is minimized.
  • 6 is a graph showing a relationship between a pixel cycle Pp and an interpolation error.
  • the average maintaining interpolation calculation circuit determines that the parameter k is equal to the pixel period Pp.
  • the interpolation error E is 0 or the minimum, and the pixel of the image data to be interpolated
  • FIG. 27 shows a pixel row LC including missing pixels and a pixel row LC not including missing pixels in the average maintaining interpolation arithmetic circuit using two pixel rows including a pixel row including missing pixels and a pixel row including no missing pixels described in the third embodiment.
  • FIG. 3 is a diagram illustrating an example of a positional relationship between pixel arrays NA and NB.
  • the pixel row including the missing pixel and the pixel row not including the missing pixel shown in FIG. 27 overlap (kn ⁇ 1) / 2 pixels.
  • FIG. 28 is an average sustain interpolation arithmetic circuit in which the pixel row including missing pixels and the two pixel rows not including missing pixels illustrated in FIG. 27 overlap each other.
  • FIG. 3 is a diagram illustrating a range of a pixel cycle Pp.
  • the left-right average interpolation arithmetic circuit is added to the plurality of average maintaining interpolation arithmetic circuits, and among the interpolation data generated by them, the one with the smallest interpolation error is selected, regardless of the pixel cycle. Interpolation data with a small interpolation error can always be output.
  • FIG. 29 is a diagram showing a configuration of a pixel interpolation circuit according to the sixth embodiment.
  • the pixel interpolation circuit according to the sixth embodiment is different from the pixel interpolation circuit shown in FIG.
  • the image data memory 21 temporarily stores the input image data DI, and repeatedly outputs the same image data in accordance with an instruction from the control circuit 20.
  • the selection signal generation unit 9 is based on the original data of the pixel in the vicinity of the missing pixel and the interpolation data obtained by obtaining the interpolation data of the missing pixel for the pixel in the vicinity of the missing pixel. And a selection signal C for selecting one of the interpolation data from the plurality of interpolation arithmetic circuits.
  • the illustrated selection signal generation unit 9 includes a management circuit 7 and a scoring circuit 8. It is assumed that each of the plurality of average maintaining interpolation arithmetic circuits 6 (1) to 6 (n) is configured as shown in FIG. 16, for example, and more specifically as shown in FIG.
  • the control circuit 20 sends a test non-existence in the vicinity of the missing pixel to each of the plurality of average maintaining interpolation calculation circuits 6 (1) to 6 (n), for example, the missing portion total calculation circuit 19 (FIG. 16).
  • the missing portion total calculation circuit 19 (FIG. 16)
  • pixels other than the non-missing pixel for test are input and the sum SL of the values is obtained, and the non-missing portion of each of the plurality of interpolation arithmetic circuits is calculated.
  • a total calculation circuit 17 inputs k pixels constituting a set of pixels that do not include a missing pixel for test, and causes the sum of the values to be obtained. Then, by subtracting the output of the missing portion total calculating circuit 19 from the output of the non-missing portion calculating circuit 17, interpolation data of the non-missing pixel for test is obtained.
  • the control circuit 20 further inputs the pixels located on the left and right of the non-missing test pixel in the vicinity of the missing pixel to the left / right average interpolation arithmetic circuit 6 (0), calculates the average of the values, and uses this for the test. Output as interpolation data of non-missing pixels.
  • the control circuit 20 causes such processing to be performed for a plurality of non-missing test pixels that are different from each other.
  • the selection signal generation unit 9 evaluates the interpolation calculation circuit based on the interpolation data of the non-missing test pixel obtained by each of the plurality of interpolation calculation circuits and the original data of the non-missing test pixel. , The content of the selection signal is determined so as to select the interpolation operation circuit having the best evaluation.
  • the control circuit 20 calculates the total missing part of the plurality of average maintaining interpolation arithmetic circuits 6 (1) to 6 (n). Input the pixels that make up the pixel set including missing pixels to the circuit 19, and input the pixels that make up the pixel set that does not include the missing pixels to the total non-missing portion calculation circuit, and calculate the average maintaining interpolation for each missing pixel.
  • the left and right average interpolation calculation circuit 6 (0) is made to input a pixel adjacent to the missing pixel to perform the left and right average interpolation calculation for the missing pixel, and the output circuit 9 determines the content as described above. Based on the selection signal C, one of the interpolation data from the plurality of interpolation arithmetic circuits 6 (0) to 6 (n) is selected and output.
  • the pixel interpolation circuit in FIG. 29 performs the following two processes each time input image data is supplied.
  • the first process is also called an evaluation process, in which a plurality of interpolation calculation circuits are evaluated using pixels other than the missing pixels in the supplied input image data, and which interpolation calculation circuit is the best.
  • the content of the selection signal C is determined according to whether the evaluation has been made.
  • the second process is also called an interpolation execution process, and generates interpolation data for interpolating missing pixels in the supplied input image data based on the content of the selection signal C to perform interpolation.
  • the input image data DI is temporarily stored in the image data memory 21 and thereafter repeatedly read out by the control circuit 20 according to an instruction.
  • the interpolation calculation in the evaluation process and the interpolation calculation in the interpolation execution process may be performed simultaneously in parallel, or the interpolation calculation in the interpolation execution process may be performed after the interpolation calculation in the evaluation process is completed.
  • the outline will be described assuming that the interpolation calculation in the evaluation process and the interpolation calculation in the interpolation execution process are performed simultaneously in parallel, and thereafter, the interpolation calculation in the evaluation process is completed and the interpolation calculation in the force interpolation execution process is performed. The case will be described in more detail.
  • the input image DI includes a left / right average interpolation circuit 6 (0) and n average sustain interpolation circuits (first average sustain interpolation circuit 6 (1), second average sustain interpolation circuit 6 (2), .., And is input to the n-th average maintaining interpolation arithmetic circuit 6 (n)) and the scoring circuit 8.
  • the left / right average interpolation arithmetic circuit 6 (0) calculates the interpolation data (test interpolation data) for a plurality of non-missing pixels for testing (test pixels) based on the input image DI.
  • test interpolation data TD0 [T1] [Tm] output from the left / right average interpolation arithmetic circuit 6 (0) is input to the scoring circuit 8, and the interpolation data D1D0 is input to the output circuit 5.
  • the test interpolation data TD1 [T1] — [Tm] output from the first average maintaining interpolation arithmetic circuit 6 (1) is input to the scoring circuit 8, and the interpolation data D1 is input to the output circuit 5.
  • the second average sustain interpolation circuit 6 (2) The test interpolation data TD2 [T1] — [Tm] —TDn [Tl] — [Tm] output from the n-th average sustain interpolation circuit 6 (n) The data is input to the scoring circuit 8 and the interpolation data D2—Dn is input to the output circuit 5.
  • the scoring circuit 8 scores the test interpolation data TD0 output from the left-right average interpolation arithmetic circuit 6 (0) based on the input image DI, and outputs the result as scoring data M0.
  • the scoring data M0 output from the scoring circuit 8 is input to the management circuit 7.
  • the scoring circuit 8 is composed of a first average maintaining interpolation calculating circuit 6 (1) —test interpolation data TD1 [T1] [Tm] output from the n-th average maintaining interpolation calculating circuit 6 (n) — TDn [Tl] — [Tm] is similarly scored based on the input image DI, and each result is output as scoring data M1 ⁇ Mn.
  • the scoring data Ml Mn output from the scoring circuit 8 is input to the management circuit 7.
  • the management circuit 7 evaluates the scoring data M0 Mn output from the scoring circuit 8, for example, as described later, and outputs a selection signal C based on the evaluation result. Output from management circuit 7 The selected signal C is input to the output circuit 5.
  • the output circuit 5 is based on the selection signal C output from the management circuit 7 and is based on the left-right average interpolation circuit 6 (0) and the first average sustain interpolation circuit 6 (1) the first n-th average sustain interpolation circuit One of the interpolation data DO—Dn output from the circuit 6 (n) is selected and output as the output data DO.
  • FIG. 30 (a) is a diagram showing an input image DI, and shows the positional relationship between a missing pixel and a non-missing test pixel (test pixel).
  • indicates a real pixel
  • X indicates a missing pixel.
  • a real pixel (non-missing pixel) located near the missing pixel L, indicated by T1 ⁇ Tm, is determined as a test pixel (m 2k).
  • a test pixel is a pixel that generates interpolation data by considering it virtually a missing pixel in the vicinity of the missing pixel.
  • FIG. 30 (a) shows an example in which k test pixels are set on the left and right sides one-dimensionally with the missing pixel L as the center.
  • test pixels may be set unequally to the left and right with respect to the missing pixels, or may be set to only one of the left and right. In addition, it may be set two-dimensionally as shown in FIG.
  • the scoring circuit 8 calculates the absolute value of the difference between the data DI [T1] of the input image DI at the position of the test pixel T1 and the test interpolation data TD0 [T1] and outputs the result as scoring data M0 [T1]. To do. Scoring data MO [Tl]
  • the scoring data MO [Tl] When the scoring data MO [Tl] is small, it indicates that the test interpolation data is close to the input image, that is, the calculation method of the left-right average interpolation calculation circuit 6 (0) is appropriate for the test pixel T1. Conversely, if the scoring data ⁇ [ ⁇ 1] is large, it indicates that the calculation method of the left-right average interpolation calculation circuit 6 (0) in the test pixel T1 is inappropriate. That is, the scoring data M 0 [T1] indicates the suitability of the left-right average interpolation operation circuit 6 (0) for the test pixel T1.
  • the left-right average interpolation arithmetic circuit 6 (0) similarly outputs test interpolation data TD0 [T2] for the test pixel # 2 when it is considered that the test pixel # 2 is virtually missing.
  • the scoring circuit 8 calculates the absolute value of the difference between the input image DI [T2] at the position of the test pixel T2 and the test interpolation data T D0 [T2] and outputs the result as scoring data M0 [T2]. Scoring data M0 [T2]
  • the scoring data M0 [T2] indicates the suitability of the left-right average interpolation operation circuit 6 (0) for the test pixel T2.
  • the left / right average interpolation arithmetic circuit 6 (0) similarly outputs test interpolation data TD0 [T3] —TDO [Tm] for the remaining test pixels T3—Tm.
  • the scoring circuit 8 calculates the absolute value of the difference between the test interpolation data TD0 [T3] —TDO [Tm] and the data DI [T3] —DI [Tm] of the input image DI corresponding to each test interpolation data, Output as scoring data MO [T3] – MO [T m]. Scoring data MO [T3] MO [Tm]
  • MO [T3] — MO [Tm] indicates the suitability of the left-right average interpolation circuit 6 (0) for the test pixel T3 Tm.
  • the scoring data corresponding to the test interpolation data output by the left / right average interpolation calculation circuit 6 (0) at the test pixel T1 ⁇ Tm is obtained.
  • the first average maintaining interpolation arithmetic circuit 6 (1) is located at the position of the test pixel T1.
  • the test interpolation data TD1 [Tl] is output when the test pixel Tl is virtually missing.
  • the scoring circuit 8 obtains the absolute value of the difference between the data DI [T1] of the input image DI at the position of the test pixel T1 and the test interpolation data TD1 [T1], and outputs the result as scoring data Ml [T1]. Scoring data Ml [T1]
  • the scoring data Ml [T1] indicates the suitability of the first average maintaining interpolation operation circuit 6 (1) for the test pixel T1.
  • the first average maintaining interpolation arithmetic circuit 6 (1) similarly outputs test interpolation data TD1 [T2] to TD1 [Tm] for the remaining test pixels T2 to Tm.
  • the scoring circuit 8 calculates the absolute value of the difference between the test interpolation data TD1 [T2] and TD1 [Tm] and the data DI [T2] DI [Tm] of the input image DI corresponding to each test interpolation data. Output as Ml [T2] -Ml [Tm]. Scoring data Ml [T2]-Ml [Tm]
  • the scoring data M1 [T2] —Ml [Tm] indicates the suitability of the first average sustain interpolation circuit 6 (1) for the test pixels T2—Tm.
  • the second average maintaining interpolation arithmetic circuit 6 (2) the test interpolation data TD2 [T1] ⁇ ⁇ -TD2 [Tm] at the test pixel T1 to Tm for the n-th interpolation arithmetic circuit 6 (n)
  • One TDn [T1] ••• TDn [Tm] is output, and the scoring circuit 8 is based on the test interpolation data TD2 [T1] “'02 [13 ⁇ 4] one TDn [T1] ⁇ ⁇ -TDn [Tm] Re, scoring data M2 [T1] ... M2 [Tm]-Mn [T1] ⁇ ⁇ -Mn [Tm] is output.
  • the average sustaining interpolation circuit 6 (0) and the first average sustaining interpolation circuit 6 (1) -the n-th average sustaining interpolation circuit 6 ( The suitability of each interpolation operation circuit in n) is required.
  • FIG. 31 is a table summarizing the scoring data of each interpolation operation circuit in the test pixel T1 ⁇ Tm.
  • the management circuit 7 adds the scoring data M0 [T1] M0 [Tm] to the left-right average interpolation calculation circuit 6 (1).
  • FIG. 32 is a table summarizing the evaluation data SO—Sn.
  • An interpolation operation circuit with smaller evaluation data can appropriately compensate for a pixel in the vicinity of a missing pixel, so it can be inferred that interpolation can be appropriately performed even for a missing pixel.
  • the management circuit 7 determines the content of the selection signal C so as to select the interpolation data output from the interpolation arithmetic circuit having the smallest evaluation data among the evaluation data SO Sn.
  • the selection signal C whose content is thus determined is used in the output circuit 5 in the subsequent interpolation execution processing.
  • the scoring circuit 8 does not operate. Further, the management circuit 7 does not perform any operation other than continuing to output the selection signal C whose content is determined in the evaluation processing.
  • the operation of the interpolation operation circuit 6 (0) to 6 (n) in the interpolation execution processing is the same as that described with reference to FIG. That is, the control circuit 20 inputs the pixels constituting the pixel set including the missing pixel to the missing portion total calculating circuit of each of the average maintaining interpolation arithmetic circuits 6 (1) to 6 (n), and outputs the non-missing portion.
  • the pixels that constitute the pixel set that does not include the missing pixels are input to the sum calculation circuit, and interpolation calculation is performed for each pixel, and each of them outputs the interpolation data D1 Dn.
  • the control circuit 20 further inputs a pixel adjacent to the missing pixel to the left / right average interpolation calculation circuit 6 (0), performs a left / right average interpolation calculation on the missing pixel, and outputs interpolation data DO.
  • the output circuit 5 selects and outputs one of the interpolation data from the plurality of interpolation arithmetic circuits (6 (0) to 6 (n)). Therefore, based on the selection signal C output from the management circuit 7, the output circuit 5 outputs the left-right average interpolating circuit 6 (0) and the first average maintaining interpolating circuit 6 (1).
  • One of the interpolation data DO—Dn output from the circuit 6 (n) is selected and output as the output data DO.
  • the pixel interpolation circuit shown in Fig. 29 performs the left-right average interpolation calculation circuit 6 (0) and the first average maintenance interpolation calculation circuit 6 (1) for the pixels near the missing pixel.
  • Arithmetic circuit 6 (n) scores the test interpolation data output, evaluates the results, and infers the appropriate interpolation operation at the missing pixel by performing interpolation calculation suitable for the image near the missing pixel. Can be interpolated.
  • the pixel interpolation circuit according to the specific example of FIG. 33 includes an output circuit 5, a left-right average interpolation arithmetic circuit 6 (0) A first average maintaining interpolation circuit 6 (1), a second average maintaining interpolation circuit 6 (2), a management circuit 7, and a scoring circuit 8.
  • the same components as those of the control circuit 20 and the image data memory 21 shown in FIG. 29 are omitted.
  • the input image DI is input to the left / right average interpolation circuit 6 (0), the first average sustain interpolation circuit 6 (1), the second average sustain interpolation circuit 6 (2), and the scoring circuit 8. .
  • the left-right average interpolation circuit 6 (0) outputs test interpolation data TD0 and interpolation data DO based on the input image DI.
  • the test interpolation data TD 0 output from the left / right average interpolation calculation circuit 6 (0) is input to the scoring circuit 8, and the interpolation data DO is input to the output circuit 5.
  • the test interpolation data TD1 output from the first average maintaining interpolation arithmetic circuit 6 (1) is input to the scoring circuit 8, and the interpolation data D1 is input to the output circuit 5.
  • the test interpolation data TD2 output from the second average maintaining interpolation arithmetic circuit 6 (2) is input to the scoring circuit 8, and the interpolation data D2 is input to the output circuit 5.
  • the scoring circuit 8 scores the test interpolation data TD0 output from the left-right average interpolation operation circuit 6 (0) based on the input image DI, and outputs the result as scoring data M0.
  • the scoring circuit 8 scoring the test interpolation data TD1 output from the first average maintaining interpolation arithmetic circuit 6 (1) based on the input image DI, and outputs the result as scoring data Ml.
  • the scoring circuit 8 scores the test interpolation data TD2 output from the second average maintaining interpolation arithmetic circuit 6 (2) based on the input image DI, and outputs the result as scoring data M2.
  • the scoring data M0-M2 output from the scoring circuit 8 is input to the management circuit 7.
  • the management circuit 7 outputs the selection signal C based on the scoring data M0 M2 output from the scoring circuit 8.
  • the selection signal C output from the management circuit 7 is input to the output circuit 5.
  • the output circuit 5 is based on the selection signal C output from the management circuit 7 and is based on the left-right average interpolation circuit 6 (0), the first average sustain interpolation circuit 6 (1), and the second average sustain interpolation circuit.
  • One of the interpolation data DO-D2 output from the circuit 6 (2) is selected and output as the output data DO.
  • FIG. 34 is a diagram showing an example of image data having periodicity.
  • Fig. 34 (b) shows the positional relationship between the missing pixel and the test pixel. Also, two test pixels T1 and T4 corresponding to the missing pixel L are set one-dimensionally on the left and right sides of the missing pixel L.
  • FIG. 35 is a diagram for explaining a test interpolation method of the mean keeping interpolation calculation.
  • FIG. 35 (a) is a diagram illustrating a pixel including a missing pixel in the average maintaining interpolation operation circuit in the case where the pixel row including the missing pixel and the two pixel rows not including the missing pixel described in Embodiment 3 overlap.
  • the positional relationship between IJLC and pixel columns NA and NB that do not include missing pixels is shown.
  • Figure 35 (b) shows the position of the pixel IJTB that does not include the test pixel when the test pixel T is regarded as a missing pixel and that does not include the test pixel when the test pixel T is regarded as a missing pixel. Is shown.
  • FIG. 35 (c) shows the position of the pixel column TA, which does not include the test pixel when the missing pixel is not included in the pixel system IjTC including the test pixel.
  • test interpolation When the average maintaining interpolation arithmetic circuit performs test interpolation on pixels near the missing pixel, it is necessary to change the interpolation method depending on the position of the missing pixel. Also, in test interpolation, only one of the two pixel columns, which does not include the test pixel, is used.
  • the average maintaining interpolation arithmetic circuit needs to create an equation in consideration of the missing pixel L. Therefore, the pixel system including the test pixel T is set to include the missing pixel L, and the pixel system IJTC including the test pixel T and the pixel system IJTB including no test pixel include the missing pixel. As a result, the missing pixels are canceled out in the equation, and it is possible to appropriately obtain the test interpolation data of the test pixel T.
  • the equation is
  • T ( ⁇ [1] ⁇ —— hTB [k-i]) _ (TC [l] + ⁇ + TC [k-i-l])
  • test pixel T is
  • T (TA [l] + to + TA [k—i]) _ (TC [l] + to + TC [k—i—1])
  • each average maintaining interpolation operation circuit can be appropriately scored.
  • FIG. 36 is a diagram for explaining the operation of the left-right average interpolation calculation circuit 6 (0) and the scoring circuit 8 for the test pixels T1 to T4 and the missing pixel L.
  • FIG. 36 (a) is a diagram showing a case where test interpolation data of the left / right average interpolation calculation circuit 6 (0) at T1 is calculated
  • FIG. 36 (b) is a test of the left / right average interpolation calculation circuit 6 (0) at T2.
  • FIG. 36 (c) is a diagram showing a case where the interpolation data is calculated
  • FIG. 36 (c) is a diagram showing a case where the test interpolation data of the left / right average interpolation arithmetic circuit 6 (0) at T3 is calculated.
  • FIG. 36 is a diagram showing a case where test interpolation data of the left-right average interpolation calculation circuit 6 (0) in T4 is calculated, and Fig. 36 (e) shows the interpolation data of the left-right average interpolation calculation circuit 6 (0) for the missing pixel L. It is a figure showing the case of calculating
  • the left / right average interpolation operation circuit 6 (0) outputs the average value of the pixels T1L and T1R as test interpolation data TD0 [T1] of the test pixel T1.
  • FIG. 37 is a diagram for explaining the operation of the first average sustaining interpolation calculation circuit 6 (1) and the scoring circuit 8 for the test pixels T1 to T4 and the missing pixel L.
  • FIG. 37 (a) is a diagram showing a case where the test interpolation data of the first average maintaining interpolation calculation circuit 6 (1) in T1 is calculated
  • FIG. 37 (b) is a diagram illustrating the first average maintaining interpolation calculation circuit in T2.
  • FIG. 37 (c) shows a case where test interpolation data of arithmetic circuit 6 (1) is calculated
  • FIG. 37 (c) calculates test interpolation data of first average maintaining interpolation calculation circuit 6 (1) at T3.
  • FIG. 37 (a) is a diagram showing a case where the test interpolation data of the first average maintaining interpolation calculation circuit 6 (1) in T1 is calculated
  • FIG. 37 (b) is a diagram illustrating the first average maintaining interpolation calculation circuit in T2.
  • FIG. 37 (c) shows a case where test interpolation data of
  • FIG. 37 (d) is a diagram showing a case where the test interpolation data of the first average maintaining interpolation arithmetic circuit 6 (1) at T4 is calculated, and FIG. 37 (e) is a missing data.
  • FIG. 9 is a diagram illustrating a case where interpolation data of a first average maintaining interpolation calculation circuit 6 (1) in a pixel L is calculated.
  • the first average maintaining interpolation arithmetic circuit 6 (1) makes the average value of the pixel system IJT1C including the test pixel T1 equal to the average value of the pixel system 1JT1B not including the test pixel T1.
  • the test interpolation data TD1 [T1] of the test pixel T1 is obtained. Therefore, the equation
  • the first average maintaining interpolation calculation circuit 6 (1) calculates the average value of the pixel system IJT2C including the test pixel T2 and the average value of the pixel system 1JT2B not including the test pixel T2.
  • the test interpolation data TD1 [T2] of the test pixel T2 is determined so that the values of E and E become equal. Therefore, the equation
  • TD1 [T2] ( ⁇ 2 ⁇ [1] + ⁇ 2 ⁇ [2] + T2B [3]) _ (T2C [1] + T2C [2])
  • the first average maintaining interpolation calculation circuit 6 (1) calculates the average value of the pixel system IJT3C including the test pixel T3 and the average value of the pixel system 1JT3A not including the test pixel T3.
  • the test interpolation data TD1 [T3] of the test pixel T3 is determined so that is equal. Therefore, the equation
  • TD1 [T3] (T3A [1] + T3A [2] + T3A [3]) _ (T3C [1] + T3C [2])
  • the first average maintaining interpolation calculation circuit 6 (1) calculates the average value of the pixel array T4C including the test pixel T4 and the average value of the pixel 1JT4A not including the test pixel T4.
  • the test interpolation data TD1 [T4] of the test pixel T4 is determined so that the values become equal. Therefore, the equation
  • TD1 [T4] ( ⁇ 4 ⁇ [1] + ⁇ 4 ⁇ [2] + T4A [3])-(T4C [1] + T4C [2])
  • T4A [2] c
  • the first average maintaining interpolation arithmetic circuit 6 (1) includes the average value of the pixel IJLC including the missing pixel L and the pixel rows NA and NB not including the missing pixel L.
  • the interpolation data D1 of the missing pixel L is determined so that the average values of are equal. Therefore, the equation (AD [l] + AD [2] + Dl + BD [l] + BD [2]) / 5
  • FIG. 38 is a diagram for explaining the operation of the second average sustaining interpolation calculation circuit 6 (2) and the scoring circuit 8 for the test pixel Tl-T4 and the missing pixel L.
  • FIG. 38 (a) is a diagram showing a case where the test interpolation data of the second average maintaining interpolation calculation circuit 6 (2) in T1 is calculated
  • FIG. 38 (b) is a diagram showing the second average maintaining interpolation calculation circuit in T2.
  • FIG. 38 (c) is a diagram showing a case where test interpolation data of arithmetic circuit 6 (2) is calculated
  • FIG. 38 (c) calculates test interpolation data of second average maintaining interpolation arithmetic circuit 6 (2) at T3.
  • FIG. 38 (a) is a diagram showing a case where the test interpolation data of the second average maintaining interpolation arithmetic circuit 6 (2) in T1 is calculated
  • FIG. 38 (b) is a diagram showing the second average maintaining interpolation calculation circuit in T2.
  • FIG. 38 (c)
  • FIG. 38 (d) is a diagram showing the case of calculating the test interpolation data of the second average maintaining interpolation arithmetic circuit 6 (2) at T4, and FIG. 38 (e) is a missing data.
  • FIG. 10 is a diagram illustrating a case where interpolation data of a second average maintaining interpolation calculation circuit 6 (2) in a pixel L is calculated.
  • the second average maintaining interpolation operation circuit 6 (2) makes the average value of the pixel system IJT1C including the test pixel T1 equal to the average value of the pixel system 1JT1B not including the test pixel T1.
  • the test interpolation data TD2 [T1] of the test pixel T1 is obtained.
  • TD2 [T1] (T1B [1] + T1B [2] + T1B [3] + T1B [4])
  • the second average maintaining interpolation operation circuit 6 (2) makes the average value of the pixel IJT2C including the test pixel T2 equal to the average value of the pixel IJT2B not including the test pixel T1.
  • the test interpolation data TD2 [T2] of the test pixel T2 is obtained. Therefore, the equation
  • TD2 [T2] (T2B [1] + T2B [2] + T2B [3] + T2B [4])
  • the second average maintaining interpolation arithmetic circuit 6 (2) calculates the average value of the pixel system IJT3C including the test pixel T3 and the average value of the pixel system IJT3A not including the test pixel T3.
  • the test interpolation data TD2 [T3] of the test pixel T3 is determined so that is equal. Therefore, the equation
  • TD2 [T3] (T3A [1] + T3A [2] + T3A [3] + T3 [4])
  • the second average maintaining interpolation arithmetic circuit 6 (2) calculates the average value of the pixel line T4C including the test pixel T4 and the average value of the pixel line T4A not including the test pixel T3.
  • the test interpolation data TD2 [T4] of the test pixel T4 is determined so that is equal. Therefore, the equation
  • TD2 [T4] (T4A [1] + T4A [2] + T4A [3] + T4A [4])
  • the second average maintaining interpolation arithmetic circuit 6 (2) includes the average value of the pixel IJLC including the missing pixel L and the pixel rows NA and NB not including the missing pixel L.
  • the interpolation data of the missing pixel L is determined so that the average value of is equal. Therefore, the equation
  • D1 ((NA [1] + NA [2] + NA [3] + NA [4] + AD [1] + AD [2] + AD [3])
  • FIG. 39 is a table summarizing the scoring data MO-M2 for the test pixels Tl-T4.
  • the management circuit 7 generates, as the evaluation data SO, a value obtained by adding the scoring data MO [T1] -MO [T4] of the left-right average interpolation arithmetic circuit 6 (0).
  • FIG. 40 summarizes the evaluation data SO—S2 of the left / right average interpolation circuit 6 (0), the first average maintenance interpolation circuit 6 (1), and the second average maintenance interpolation circuit 6 (2). It is a table.
  • An interpolation operation circuit with smaller evaluation data can appropriately interpolate in the vicinity of a missing pixel, so it can be inferred that interpolation can be appropriately performed even in a missing pixel.
  • the pixel interpolation circuit according to the configuration example shown in Fig. 33 generates test interpolation data of three interpolation arithmetic circuits in the test pixels T1 and T4 near the missing pixel L, and scores and evaluates the data. Select an interpolation calculation circuit suitable for the image content from the three interpolation calculation circuits Therefore, missing pixels can be appropriately interpolated.
  • FIG. 41 is a diagram showing an example of image data having periodicity.
  • FIG. 38 (b) shows the positional relationship between the missing pixel and the test pixel.
  • two test pixels T1 and T4 corresponding to the missing pixel L are set one-dimensionally on each side of the missing pixel L.
  • test pixels T1 and T4 in Fig. 41 (b) are tested using the left-right average interpolation circuit 6 (0), the first average interpolation circuit 6 (1), and the second average maintenance interpolation circuit.
  • the method of interpolation is the same as the method shown in FIGS.
  • FIG. 42 is a table summarizing the scoring data M0-M2 for the test pixels T1 and T4.
  • the management circuit 7 generates, as the evaluation data SO, a value obtained by adding the scoring data M0 [T1] -M0 [T4] of the left-right average interpolation arithmetic circuit 6 (0).
  • Fig. 43 is a table summarizing the evaluation data SO S2 of the left / right average interpolation circuit 6 (0), the first average sustain interpolation circuit 6 (1), and the second average sustain interpolation circuit 6 (2). It is.
  • An interpolation operation circuit with smaller evaluation data can appropriately interpolate in the vicinity of a missing pixel, so it can be inferred that interpolation can be appropriately performed even in a missing pixel.
  • the pixel interpolation circuit according to the configuration example shown in Fig. 33 generates test interpolation data of three interpolation calculation circuits in the test pixels T1 and T4 near the missing pixel L, and scores and evaluates them. Since the interpolation calculation circuit suitable for the image content is selected from the three interpolation calculation circuits, the missing pixels can be appropriately interpolated also in the data of FIG.
  • FIG. 44 is a diagram showing an example of image data having periodicity.
  • FIG. 44 (b) shows the positional relationship between the missing pixel and the test pixel. Also, two test pixels T1 and T4 corresponding to the missing pixel L are set one-dimensionally left and right with respect to the missing pixel L.
  • test pixels T1 and T4 in Fig. 44 (b) are tested using the left-right average interpolation arithmetic circuit 6 (0), the first average interpolation arithmetic circuit 6 (1), and the second average maintenance interpolation arithmetic circuit.
  • the method of interpolation is the same as the method shown in FIGS.
  • Fig. 45 is a table summarizing the scoring data M0-M2 for the test pixels T1-T4.
  • the management circuit 7 calculates the scoring data MO [T1] -MO [T4] of the left-right average interpolation arithmetic circuit 6 (0).
  • Fig. 46 summarizes the evaluation data SO-S2 of the left-right average interpolation circuit 6 (0), the first average sustain interpolation circuit 6 (1), and the second average sustain interpolation circuit 6 (2). It is a table.
  • An interpolation operation circuit with smaller evaluation data can appropriately interpolate in the vicinity of a missing pixel, so it can be inferred that interpolation can be appropriately performed even in a missing pixel.
  • the pixel interpolation circuit according to the configuration example shown in Fig. 33 generates test interpolation data of three interpolation calculation circuits in the test pixels T1 to T4 near the missing pixel L, and scores and evaluates the data. By doing so, an interpolation calculation circuit suitable for the image content is selected from the three interpolation calculation circuits, so that the missing pixels can be appropriately interpolated also in the data of FIG.
  • the selection signal generation unit 9 including the management circuit 7 and the scoring circuit 8 can generate a selection signal for selecting interpolation data by an appropriate interpolation calculation circuit according to image data.
  • the interpolation error can be minimized regardless of the periodicity of the image data.
  • an interpolation operation circuit used for interpolation data of a missing pixel for example, a missing portion total calculating circuit
  • the left-right average interpolation calculation circuit 6 (0) may be omitted.
  • the average maintaining interpolation calculation circuits 6 (1) to 6 (n) are evaluated, and one of the outputs is selected.
  • FIG. 47 is a diagram showing a configuration of the interpolation operation circuit according to the seventh embodiment.
  • the interpolation arithmetic circuit according to the sixth embodiment has a configuration in which an output limiting unit 13 for limiting the output of the average maintenance interpolation arithmetic circuit is added to the average maintenance interpolation arithmetic circuit shown in the embodiments 13 to 13.
  • the output limiting unit 13 includes an output range generating circuit 10 and a limiting circuit 11, and limits an interpolation error of the average maintaining interpolation calculation circuit generated due to noise or the like.
  • FIG. 48 shows a part of the input image DI, showing the positional relationship between the missing pixel and the reference data range.
  • the interpolation arithmetic circuit includes an output range generation circuit 10, a limiting circuit 11, and an average maintaining interpolation arithmetic circuit 12.
  • the input image DI is input to the output range generation circuit 10 and the average maintaining interpolation calculation circuit 12.
  • the parameter k is input to the average maintaining interpolation operation circuit 12.
  • the average maintaining interpolation operation circuit outputs the unrestricted data Da based on the input image DI and the parameter k.
  • the pre-restriction data Da is input to the restriction circuit 11.
  • Data specifying the reference data range r supplied from the outside is input to the output range generation circuit 10.
  • the output range generation circuit 10 determines the right r pixels of the missing pixels in the input image DI. Generate the maximum output value Lmax and minimum output value Lmin based on the element and the left r pixels.
  • the maximum output value Lmax is
  • Lmax max (M [l], ⁇ , M [r], M [r + 1], ⁇ , M [2r]
  • max (M [l], ⁇ ⁇ ⁇ , M [r], M [r + 1], ⁇ ⁇ ⁇ , M [2r]) is the pixel M [l], ⁇ ⁇ ⁇ , M [r], A function to find the maximum value of M [r + 1], ⁇ ⁇ ⁇ , M [2r].
  • the maximum output value Lmax is input to the limiting circuit 11.
  • min (M [l], ⁇ ⁇ ⁇ , M [r, M [r + 1, ⁇ ⁇ , M [2r]) is the pixel M [l], ⁇ ⁇ ⁇ , M [r], A function to find the minimum value of M [r + 1], ⁇ ⁇ ⁇ , M [2r].
  • the minimum output value Lmin is input to the limiting circuit 11.
  • the limiting circuit 11 limits the pre-restriction data Da based on the maximum output value Lmax and the minimum output value Lmin, and outputs it as post-restriction data Db. Data after restriction Db
  • the interpolation arithmetic circuit according to Embodiment 7 can limit the output of the average maintaining interpolation arithmetic circuit to a range of 2r density values in the vicinity of the missing pixel.
  • FIG. 49 shows the configuration of an interpolation operation circuit according to a specific example.
  • the input image DI is input to the average maintaining interpolation calculation circuit and the output range generation circuit.
  • the average maintaining interpolation operation circuit 12 obtains interpolation data of the missing pixel L so that the average value of the pixel system JLC including the missing pixel and the average value of the two pixel arrays NA and NB not including the missing pixel are equal.
  • the equation is (AD [1] + AD [2] + AD [3] + AD [4] + L
  • the interpolation data L of the missing pixel is defined as the pre-limit data Da.
  • the pre-restriction data Da is input to the restriction circuit 11.
  • the output range generation circuit 10 outputs the maximum values of the 9 right and 9 left pixels of the missing pixel L in the input image DI as the output maximum value Lmax.
  • the maximum output value Lmax is
  • the output maximum value Lmax is input to the limiting circuit.
  • the output range generation circuit 10 outputs the minimum values of the 9 right and 9 left pixels of the missing pixel L in the input image DI as the output minimum value Lmin.
  • the output minimum value Lmin is
  • the minimum output value Lmin is input to the limiting circuit 11.
  • the limiting circuit 11 corrects the pre-restriction data Da based on the output maximum value Lmax and the output minimum value Lmin, and outputs the corrected data Da as the post-restriction data Db.
  • the original data of the missing pixel L is 143
  • 143-143 I 0.
  • the error of the unrestricted data is I 153-143
  • 10.
  • the error can be reduced by / J.
  • Embodiments 13 to 13 the description has been given of the configuration of the interpolation operation circuit that compensates for the missing pixel by the average maintaining interpolation operation using hardware.
  • the missing pixel can be interpolated by software. Note that software and hardware may be used together.
  • FIG. 51 is a flowchart illustrating an operation (interpolation calculation method) of interpolating missing pixels by software processing.
  • step si partial sum data (corresponding to SL in the first embodiment) of the pixel system IJLC including the missing pixel is generated.
  • step s2 partial sum data (corresponding to SA in the first embodiment) of the pixel array NA that does not include a missing pixel is generated.
  • Step s3 When there are a plurality of pixel columns that do not include missing pixels as shown in Fig. 13, the process returns to step s2 to generate partial sum data for each of the pixel columns. (Step s3)
  • step s4 based on the partial sum data (data corresponding to SA) generated in step si and the partial sum data (data corresponding to SL) generated in step s2, a pixel sequence including missing pixels is provided. So that the average value of the pixel row and the average value of the Make a formula.
  • step s5 the equation created in step s4 is solved (for example, the data corresponding to the data power SL corresponding to SA is subtracted) to obtain the interpolation data of the missing pixel.
  • the configuration of the pixel interpolating circuit that interpolates missing pixels using hardware in combination with the average maintaining interpolation operation and the left-right average interpolation operation has been described.
  • the missing pixels can be interpolated by software. Note that software and hardware may be used together.
  • FIG. 52 is a flowchart illustrating an operation (pixel interpolation method) of interpolating missing pixels by software processing.
  • test interpolation data (corresponding to TDO [T1] in the sixth embodiment) of the left-right average interpolation calculation method in the test pixel T1 is generated.
  • step s2 the absolute value of the difference between the data of the input image DI at the position of the test pixel T1 (corresponding to DI [T1] in the sixth embodiment) and the test interpolation data generated in step si is calculated as scoring data ( It is generated as M0 [T1] in the sixth embodiment.
  • test interpolation data (corresponding to TDO [T2] of the sixth embodiment) of the left-right average interpolation calculation method at the test pixel T2 is generated.
  • step s2 the absolute value of the difference between the data of the input image DI at the position of the test pixel T2 (corresponding to DI [T2] in the sixth embodiment) and the test interpolation data generated in step si is calculated as scoring data ( It is generated as M0 [T2] in the sixth embodiment.
  • step si and step s2 are similarly repeated for the test pixel T3 Tm (step s3). In this way, the scoring data of the left-right average interpolation calculation method for all test pixels T1 and Tm is obtained.
  • step s4 interpolation data of the left-right average interpolation calculation method for the missing pixel L is generated.
  • test interpolation data (corresponding to TD1 [T1] in the sixth embodiment) of the first average maintaining interpolation calculation method in the test pixel T1 is generated.
  • step s2 the absolute value of the difference between the data of the input image DI at the position of the test pixel T1 (corresponding to DI [T1] in the sixth embodiment) and the test interpolation data generated in step si is calculated as scoring data ( It is generated as Ml [T1] in the sixth embodiment).
  • test interpolation data (corresponding to TD1 [T2] of the first embodiment) of the first average sustaining interpolation calculation method at the test pixel T2 is generated.
  • step s2 the absolute value of the difference between the data of the input image DI at the position of the test pixel T2 (corresponding to DI [T2] in the sixth embodiment) and the test interpolation data generated in step si is calculated as scoring data ( (Corresponding to Ml [T2] in the sixth embodiment).
  • step si and step s2 are similarly repeated for the test pixel T3 Tm (step s3). In this way, the scoring data of the first average maintaining interpolation calculation method for all the test pixels T1 to Tm is obtained.
  • step s4 interpolation data of the first average maintaining interpolation calculation method for the missing pixel L is generated.
  • step o The second average sustaining interpolation calculation method-The procedure of step si—step s4 is similarly repeated for the n-th average sustaining interpolation calculation method (step o). For each of the left-right average interpolation calculation method and the first average maintenance interpolation calculation method—the n-th average maintenance interpolation calculation method, the scoring data for all test pixels T1 and Tm and the interpolation data for the missing pixel L are obtained.
  • step s6 the scoring data is added for each interpolation calculation method, and the evaluation data of the left-right average interpolation calculation circuit and the first average maintenance interpolation calculation method—the n-th average maintenance interpolation calculation method (Embodiment 6) Of SO Sn).
  • step s7 interpolation data for interpolating missing pixels is selected based on the evaluation data generated in step s6.
  • the pixels are arranged in the horizontal direction, and in the left-right average interpolation calculation, the interpolation data is generated by calculating the average of the left and right neighboring pixels of the missing pixel and the non-missing test pixel.
  • interpolation data is generated by calculating the average of the adjacent pixels above and below the missing pixel and the non-missing test pixel.
  • Such a left-right average interpolation operation and a vertical average interpolation operation are collectively referred to as a P-pixel average interpolation operation.

Landscapes

  • Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Television Systems (AREA)
  • Transforming Light Signals Into Electric Signals (AREA)
  • Image Processing (AREA)
  • Facsimile Image Signal Circuits (AREA)
  • Color Television Image Signal Generators (AREA)
  • Image Input (AREA)
  • Picture Signal Circuits (AREA)
PCT/JP2004/008608 2003-11-10 2004-06-18 平均維持補間演算回路、画素補間回路、平均維持補間演算方法、及び画素補間方法 Ceased WO2005045758A1 (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
EP04746110A EP1686529A4 (en) 2003-11-10 2004-06-18 SERVICE INTEREST INTERPOLATION OPERATION CIRCUIT, PIXEL INTERPRETATION CIRCUIT, AVERAGE VALUE MAINTENANCE INTERPOLATION OPERATION, PIXEL INTERPOLATION PROCEDURE
US10/578,686 US7738738B2 (en) 2003-11-10 2004-06-18 Mean preserving interpolation calculation circuit, pixel interpolation circuit, mean preserving interpolation method, and pixel interpolation method

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2003379414A JP3810404B2 (ja) 2003-11-10 2003-11-10 画素補間回路、及び画素補間方法
JP2003-379414 2003-11-10

Publications (1)

Publication Number Publication Date
WO2005045758A1 true WO2005045758A1 (ja) 2005-05-19

Family

ID=34567208

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2004/008608 Ceased WO2005045758A1 (ja) 2003-11-10 2004-06-18 平均維持補間演算回路、画素補間回路、平均維持補間演算方法、及び画素補間方法

Country Status (6)

Country Link
US (1) US7738738B2 (enExample)
EP (1) EP1686529A4 (enExample)
JP (1) JP3810404B2 (enExample)
CN (1) CN100590651C (enExample)
TW (1) TWI271647B (enExample)
WO (1) WO2005045758A1 (enExample)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN115486864A (zh) * 2022-10-26 2022-12-20 赛诺威盛科技(北京)股份有限公司 Ct用硅基探测器模块的组装结构及死区数据补全方法
US11748852B2 (en) 2018-06-27 2023-09-05 Mitsubishi Electric Corporation Pixel interpolation device and pixel interpolation method, and image processing device, and program and recording medium

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2005236770A (ja) * 2004-02-20 2005-09-02 Mitsubishi Electric Corp 画素補間回路、画像読取装置、および画素補間方法
JP4772754B2 (ja) 2007-06-25 2011-09-14 三菱電機株式会社 画像補間装置及び方法、並びに画像読取装置
JP2010061565A (ja) * 2008-09-05 2010-03-18 Konica Minolta Business Technologies Inc 画素補間装置、画素補間方法および画像読取装置
JP4958056B2 (ja) * 2009-05-12 2012-06-20 東芝ディーエムエス株式会社 画像補間装置および画像補間プログラム
JP4803288B2 (ja) * 2009-08-12 2011-10-26 コニカミノルタビジネステクノロジーズ株式会社 画素補間装置、画素補間方法および画像読取装置
JP5741007B2 (ja) * 2011-01-21 2015-07-01 株式会社リコー 画像処理装置、画素補間方法およびプログラム
JP5741011B2 (ja) * 2011-01-26 2015-07-01 株式会社リコー 画像処理装置、画素補間方法およびプログラム
CN103810675B (zh) * 2013-09-09 2016-09-21 深圳市华星光电技术有限公司 图像超分辨率重构系统及方法
JP2015222895A (ja) * 2014-05-23 2015-12-10 株式会社沖データ 画像補間装置、画像補間プログラム及び画像読取装置
CN114757589B (zh) * 2022-06-14 2022-10-11 深圳市拓安信计控仪表有限公司 数据处理方法、服务器及存储介质

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002247352A (ja) * 2001-02-20 2002-08-30 Ricoh Co Ltd 画像処理装置
JP2003037777A (ja) * 2001-07-23 2003-02-07 Canon Inc 放射線画像処理装置、画像処理システム、放射線画像処理方法、記憶媒体及びプログラム

Family Cites Families (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CA2090696C (en) * 1992-03-20 2001-08-21 Werner Boie Method and apparatus for direction related interpolation
JP3125124B2 (ja) * 1994-06-06 2001-01-15 松下電器産業株式会社 欠陥画素傷補正回路
MY117289A (en) * 1996-01-17 2004-06-30 Sharp Kk Image data interpolating apparatus
JP3503372B2 (ja) * 1996-11-26 2004-03-02 ミノルタ株式会社 画素補間装置及びその画素補間方法
JPH11122626A (ja) * 1997-10-17 1999-04-30 Nikon Corp 画像処理方法及び装置並びに画像処理プログラムを記録した記録媒体
ATE304726T1 (de) * 1998-09-15 2005-09-15 Phase One As System und verfahren zur verarbeitung von bildern
JP4097815B2 (ja) * 1998-11-24 2008-06-11 株式会社リコー 画像処理装置および画像処理方法
JP2000196835A (ja) 1998-12-25 2000-07-14 Mitsubishi Electric Corp マルチチップイメ―ジセンサ
JP3644874B2 (ja) * 1999-07-15 2005-05-11 シャープ株式会社 画像補間装置
EP1221256A1 (en) * 1999-09-16 2002-07-10 Applied Science Fiction, Inc. Method and system for altering defects in a digital image
US6768512B1 (en) * 2000-07-12 2004-07-27 Vanguard International Semiconductor Corp. Method of bad pixel correction
JP4485087B2 (ja) * 2001-03-01 2010-06-16 株式会社半導体エネルギー研究所 半導体装置の動作方法
US20020167602A1 (en) * 2001-03-20 2002-11-14 Truong-Thao Nguyen System and method for asymmetrically demosaicing raw data images using color discontinuity equalization
US7142705B2 (en) 2001-05-01 2006-11-28 Canon Kabushiki Kaisha Radiation image processing apparatus, image processing system, radiation image processing method, storage medium, and program
JP2003101724A (ja) 2001-09-25 2003-04-04 Konica Corp 画像読取装置及び画像形成装置
JP4451044B2 (ja) * 2002-02-21 2010-04-14 株式会社メガチップス 混成画素補間装置および混成画素補間方法
US7136541B2 (en) * 2002-10-18 2006-11-14 Sony Corporation Method of performing sub-pixel based edge-directed image interpolation
US7242435B2 (en) * 2003-04-18 2007-07-10 Silicon Integrated Systems Corp. Method for motion pixel detection with adaptive thresholds
JP2005236770A (ja) * 2004-02-20 2005-09-02 Mitsubishi Electric Corp 画素補間回路、画像読取装置、および画素補間方法

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002247352A (ja) * 2001-02-20 2002-08-30 Ricoh Co Ltd 画像処理装置
JP2003037777A (ja) * 2001-07-23 2003-02-07 Canon Inc 放射線画像処理装置、画像処理システム、放射線画像処理方法、記憶媒体及びプログラム

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11748852B2 (en) 2018-06-27 2023-09-05 Mitsubishi Electric Corporation Pixel interpolation device and pixel interpolation method, and image processing device, and program and recording medium
CN115486864A (zh) * 2022-10-26 2022-12-20 赛诺威盛科技(北京)股份有限公司 Ct用硅基探测器模块的组装结构及死区数据补全方法
CN115486864B (zh) * 2022-10-26 2023-04-18 赛诺威盛科技(北京)股份有限公司 Ct用硅基探测器模块的组装结构及死区数据补全方法

Also Published As

Publication number Publication date
US20070092156A1 (en) 2007-04-26
TWI271647B (en) 2007-01-21
TW200516482A (en) 2005-05-16
JP3810404B2 (ja) 2006-08-16
EP1686529A4 (en) 2011-01-26
JP2005141611A (ja) 2005-06-02
EP1686529A1 (en) 2006-08-02
CN1879126A (zh) 2006-12-13
US7738738B2 (en) 2010-06-15
CN100590651C (zh) 2010-02-17

Similar Documents

Publication Publication Date Title
WO2005045758A1 (ja) 平均維持補間演算回路、画素補間回路、平均維持補間演算方法、及び画素補間方法
EP0687106B1 (en) Defective pixel correction circuit
EP2161914B1 (en) Device and method for interpolating image, and image scanner
EP0369031A1 (en) Absolute position encoder
WO2005081513A1 (ja) 画像読取装置、および信号処理方法
JP4317624B2 (ja) 画像処理装置
US20090147110A1 (en) Video Processing Device
JP3767593B2 (ja) 画素補間回路及び画素補間方法
JP4199784B2 (ja) 画素補間回路、画像読取装置、および画素補間方法
JP6422428B2 (ja) 画像処理装置、画像処理方法、画像読取装置、及びプログラム
CN105100669A (zh) 数字图像转换方法和装置
JP5078394B2 (ja) 画像処理装置及び方法
JP4885630B2 (ja) 二次元エンコーダ、及び、そのスケール
JP6052389B2 (ja) 画像処理装置及び画像処理方法
JP2017098775A (ja) 撮像装置
US6278395B1 (en) Folding and interpolation analog-to-digital converter
JP6056659B2 (ja) 映像信号処理装置及び方法
KR100853083B1 (ko) 다분할 읽어내기 ccd의 보정 근사 직선군 정보 생성 방법 및 생성 장치, 다분할 읽어내기 ccd의 보정 처리 장치 제조 방법 및 제조 장치
JP2005217592A (ja) 画素補間フィルタ生成装置および画素補間装置
JPH04227184A (ja) 動きベクトル評価装置
JP6932260B2 (ja) 画素補間装置及び画素補間方法、並びに画像処理装置、並びにプログラム及び記録媒体
KR20070012129A (ko) 이미지 센서의 결함픽셀 보간 방법 및 장치
KR100975516B1 (ko) 불량 픽셀 보정 방법
JP2006074222A (ja) 画像解像度変換装置
JP2009159193A (ja) 画像読取装置

Legal Events

Date Code Title Description
WWE Wipo information: entry into national phase

Ref document number: 200480033136.7

Country of ref document: CN

AK Designated states

Kind code of ref document: A1

Designated state(s): AE AG AL AM AT AU AZ BA BB BG BR BW BY BZ CA CH CN CO CR CU CZ DE DK DM DZ EC EE EG ES FI GB GD GE GH GM HR HU ID IL IN IS JP KE KG KP KR KZ LC LK LR LS LT LU LV MA MD MG MK MN MW MX MZ NA NI NO NZ OM PG PH PL PT RO RU SC SD SE SG SK SL SY TJ TM TN TR TT TZ UA UG US UZ VC VN YU ZA ZM ZW

AL Designated countries for regional patents

Kind code of ref document: A1

Designated state(s): BW GH GM KE LS MW MZ NA SD SL SZ TZ UG ZM ZW AM AZ BY KG KZ MD RU TJ TM AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HU IE IT LU MC NL PL PT RO SE SI SK TR BF BJ CF CG CI CM GA GN GQ GW ML MR NE SN TD TG

121 Ep: the epo has been informed by wipo that ep was designated in this application
WWE Wipo information: entry into national phase

Ref document number: 2004746110

Country of ref document: EP

WWE Wipo information: entry into national phase

Ref document number: 2007092156

Country of ref document: US

Ref document number: 10578686

Country of ref document: US

WWP Wipo information: published in national office

Ref document number: 2004746110

Country of ref document: EP

WWP Wipo information: published in national office

Ref document number: 10578686

Country of ref document: US

NENP Non-entry into the national phase

Ref country code: JP