Classifications

• • G—PHYSICS
  • G02—OPTICS
  • G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
  • G02B1/00—Optical elements characterised by the material of which they are made; Optical coatings for optical elements
  • G02B1/10—Optical coatings produced by application to, or surface treatment of, optical elements
  • G02B1/11—Anti-reflection coatings
  • G02B1/118—Anti-reflection coatings having sub-optical wavelength surface structures designed to provide an enhanced transmittance, e.g. moth-eye structures
• • B—PERFORMING OPERATIONS; TRANSPORTING
  • B81—MICROSTRUCTURAL TECHNOLOGY
  • B81B—MICROSTRUCTURAL DEVICES OR SYSTEMS, e.g. MICROMECHANICAL DEVICES
  • B81B7/00—Microstructural systems; Auxiliary parts of microstructural devices or systems

Definitions

• This invention relates to integrated circuit fabrication, and more particularly, to a system and method for circuit component lids etched with sub-wavelength structures.
• MEMS Microelectromechanical systems
• Some MEMS devices may be fabricated using standard integrated circuit batch processing tecliniques and have a variety of applications including sensing controlling and actuating on a micro scale.
• MEMS devices may function individually or in arrays to generate effects on a macro scale.
• MEMS devices require a vacuum environment in order to obtain maximum performance.
• the vacuum package also provides protection in an optimal operating environment for the MEMS device.
• MEMS devices are infrared MEMS such as bolometers, hi addition to the necessity of a vacuum or otherwise controlled environment for an infrared bolometer, infrared MEMS devices may require an optically-transparent cover, or lid structure.
• These device wafer lids are often coated with an anti-reflective coating to reduce the reflective properties and increase the optical transmission properties of the device wafer lid.
• the anti-reflective coating is patterned with a liftoff method that requires a thick photoresist, which is hard to remove after the anti-reflective coating is deposited on the device wafer lid. This is due primarily to the extremely high temperatures at which the anti-reflective coating must be deposited on the device wafer lid.
• the present invention addresses the problem of the difficulty in depositing an anti-reflective coating on a device wafer lid.
• an improved method for increasing the optical transmission characteristics of a device wafer lid is provided, which substantially reduces the disadvantages and problems associated with previously disclosed methods of MEMS 019469.0256
• a method for etching sub-wavelength structures on one or both surfaces of a device wafer lid prior to mating a lid wafer with a device wafer is provided.
• sub-wavelength structures may be etched onto the surface of a device wafer lid simultaneously with the sealing surfaces, lid cavities, solder excess uptake trenches, and any other structure required to be etched onto the surface of the device wafer lid.
• Creating the sub-wavelength structure on the device wafer lid prior to the separation of the individual vacuum packaged MEMS devices also saves time and resources.
• etching sub-wavelength structures to increase the optical transmission properties of a device wafer lid obviates the need for the difficult process of applying an anti-reflective coating on the device wafer lid.
• Other advantages may be readily ascertainable by those of ordinary skill in the art.
• FIGURE 1 is a top view of a device wafer in accordance with an embodiment of the present invention.
• FIGURE 2 is a cross section of a single MEMS device according to an embodiment of the present invention
• FIGURE 3 is a top view of a pattern side of a lid wafer in accordance with an embodiment of the present invention
• FIGURE 4 is an enlarged view of a portion of a lid wafer with a lid cavity in accordance with an embodiment of the present invention
• FIGURE 4 A is an exterior view of a portion of the lid wafer in FIGURE 4;
• FIGURE 5 is a partial cross-sectional view of the lid wafer illustrated by FIGURE
• FIGURE 6 is an example of a pattern for sub-wavelength structures in accordance with an embodiment of the present invention.
• FIGURE 7 is a partial cross-sectional view of sub-wavelength structures etched on one surface of a lid wafer in accordance with an embodiment of the present invention
• FIGURE 8 is a partial cross-sectional view of a window wafer bonded to a lid wafer in accordance with an embodiment of the present invention.
• MEMS devices may require a vacuum, or other suitably manipulated environment, to obtain maximum performance.
• infrared micro bolometers require an operating pressure of less than 10 millitorr to minimize thermal transfer from the detector elements to the substrate and packaging walls.
• infrared micro bolometers require an optically-transparent cover.
• an anti-reflective coating is placed on a device wafer lid to increase the optical transmission properties of the lid.
• Traditional anti-reflective coatings are generally patterned with a liftoff method that requires a thick photoresist. This photoresist is hard to remove after the high temperature deposition of the anti-reflective coating.
• One solution to the difficulty in applying the anti-reflective coating on a wafer lid is to create geometric features on the wafer lid that reduce the index of refraction.
• various embodiments of the present invention allow for an anti-reflective surface to be etched on either surface of a device wafer lid, or both, to decrease production costs for optically transparent device wafer lids.
• silicon device wafer 10 is a standard substrate used for fabrication of integrated circuit devices, MEMS devices, or similar devices.
• any suitable substrate material may be used.
• a substrate material with integrated circuit readout devices embedded therein may be used as the device wafer 10.
• Silicon device wafers usually have many MEMS devices 12 formed thereon using traditional methods of integrated circuit fabrication.
• the embodiments disclosed herein discuss integrated circuit fabrication in terms of vacuum packaging for infrared MEMS devices, the embodiments may be used to provide vacuum packaging of any integrated circuit device, or similar device, formed on a substrate material and contained within a 019469.0256
• vacuum package Additionally, the embodiments disclosed herein may be used in any vacuum or non- vacuum packaging of integrated circuit devices.
• Each MEMS device 12 preferably has one or more associated bonding pads 14 which provide electrical connections to the MEMS device 12. As indicated in FIGURE 1, each MEMS device 12 has two associated bonding pads 14. These bonding pads 14 are preferably disposed only on one side of the MEMS device 12, but in any particular embodiment, bonding pads 14 may be disposed on any side, one side, or multiple sides of MEMS device 12.
• FIGURE 1 also depicts sealing surface 16, which defines the vacuum package around a MEMS device 12. Although the present embodiment discusses one MEMS device enclosed in each vacuum package, it is readily understood that multiple MEMS devices may be enclosed within a vacuum package defined by sealing surface 16.
• FIGURE 2 a single MEMS device 12 is illustrated to more completely show the layout on device wafer 10.
• a lead 18 comiects each bonding pad 14 to MEMS device 12.
• a space is left between MEMS device 12 and bonding pad 14 to form the device sealing surface 16.
• lead 18 runs beneath fabrication layers to be built within device sealing surface 16. Because the device sealing surface 16 defines the area of the device wafer 10 within which a vacuum package will be formed, leads 18 form electrical connections to bonding pads 14 without affecting the vacuums' seal existing around MEMS device 12.
• Sealing layer 22 may be comprised of any suitable material having dielectric properties. Sealing layer 22 serves as a platform upon which bonding adhesion surface 24 may be deposited. Preferably, sealing layer 22 is composed of silicon nitrite, although any suitable dielectric may be used. Sealing layer 22 provides electrical isolation for leads 18.
• a bonding adhesion surface 24 is fabricated on sealing layer 22 and may be fabricated using any combination of metal, metal alloy or other material that is suitable for bonding device wafer 10 and lid wafer 30 together. In one embodiment, bonding adhesion surface 24 comprises a first layer of titanium, a second layer of platinum, and a third layer of gold. However, there are many suitable materials or combinations of materials available for use in fabricating bonding 019469.0256
• FIGURE 3 illustrates a silicon lid wafer 30. Although the embodiment described below utilizes a silicon wafer as a substrate for the lid wafer 30, any suitable substrate material may be used. Examples of materials other than silicon which may be used as optically-transparent device wafer lids include quartz or Pyrex, zinc, germanium, sapphire, or infrared chalcogenide glass.
• Lid wafer 30 includes a plurality of lid sealing surfaces 32, preferably corresponding in number to the device sealing surfaces 16 on device wafer 10. Each of the lid sealing surfaces 32 is preferably a mirror image of a respective device sealing surface 16 so that lid wafer 30 mates with device wafer 10. Cavities 34 and bonding pad channels 36 are etched in the lid wafer 30 using an appropriate etching process such as wet or dry etching. Additionally, trenches 42 may be etched in lid wafer 30. Trenches 42 are preferably disposed in sealing surfaces 32 in order to prevent any sealing material from entering cavities 34. Anisotropic etching using potassium hydroxide (KOH), or any other suitable basic solution may be used to etch cavities 34, bonding pad channels 36, and trenches 42. The etching process for cavities 34, bonding pad channels 36, and trenches 42 may include depositing a layer of silicon nitride and patterning the silicon nitride layer to form an appropriate etch mask.
• KOH potassium hydroxide
• FIGURES 4 and 4A illustrate an enlarged view of a portion of lid wafer 30 that is preferably operable to form the lid portion of a single vacuum packaged MEMS device.
• FIGURE 4 is a view of the interior of an individual cavity 34 on lid wafer 30. Sealing surface 32, cavity 34, and trench 42 are illustrated in accordance with an embodiment of the present invention.
• FIGURE 4A illustrates a portion of the opposite side of lid wafer 30, which is the exterior surface of lid wafer 30.
• sub-wavelength structures 44 and 46 are etched on the interior surface and exterior surface, respectively of lid wafer 30. Sub-wavelength structures 44 and 46 may be etched using isotropic wet or dry etching, or by anisotropic etching using potassium hydroxide, or other anisotropic basic solution. 019469.0256
• FIGURE 5 illustrates a cross-sectional view of the lid wafer section illustrated by FIGURE 4.
• sub-wavelength structures 44 are preferably etched on the interior surface of lid wafer 30.
• sub-wavelength structures 46 may be etched on the outer surface of lid wafer 30. Etching a pattern on the lid wafer surface changes the index of refraction by reducing the index of refraction in the etched region according to a fill factor.
• the fill factor may be described as the ratio of the remaining solid material, which in the present embodiment is silicon, over the total affected volume.
• Optical transmission may also be increased by depositing a fill material 48 with a lower index of refraction than the lid wafer in the spaces between the sub-wavelength structures.
• Depositing fill material 48 may provide a protective cover on the outer surface of the lid wafer and on the individual sub-wavelength structures themselves, and may further enhance optical transmission properties of the lid wafer.
• organic compounds such as polyethylene, polyimide, and polypropylene that have refractive indexes below 1.5 may be used as fill material 48.
• inorganic compounds with indexes of refraction of 1.5 or less may be used as fill material 48. Examples of inorganic compounds for use as fill material 48 are magnesium oxide, magnesium fluoride, and calcium fluoride.
• FIGURES 6 and 7 illustrate embodiments of the sub-wavelength structure disposition on a device wafer lid.
• the fill factor (FF) is related inversely to the index of refraction n of the lid material. This relationship may be described by the
• an appropriate sub-wavelength structure will have 019469.02SO
• any suitable pattern of sub-wavelength structures 44 and 46 may be arrayed, or etched on a device wafer lid interior surface or exterior surface, respectively, to reduce the index of refraction.
• FIGURE 8 illustrates an alternative embodiment wherein a window or spacer 80 is used to create an interior surface with sub-wavelength structures 44 etched thereon.
• Window or spacer 80 may be manufactured from any suitable substrate material, and may be bonded to wafer lid 30 using soft glass, glass solder, an indium compression seal, or any other suitable method for layering substrates.
• device sealing surfaces 38, trenches 42, and cavities 34 may be created by using a window or spacer 80 containing apertures which correspond to each MEMS device deposited on device wafer 10.

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• Physics & Mathematics (AREA)
• General Physics & Mathematics (AREA)
• Optics & Photonics (AREA)
• Engineering & Computer Science (AREA)
• Computer Hardware Design (AREA)
• Microelectronics & Electronic Packaging (AREA)
• Micromachines (AREA)

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• 2003
  • 2003-05-02 US US10/428,745 patent/US6897469B2/en not_active Expired - Lifetime
• 2004
  • 2004-04-19 EP EP04760558A patent/EP1620353A1/en not_active Withdrawn
  • 2004-04-19 JP JP2006513139A patent/JP2006527481A/ja not_active Withdrawn
  • 2004-04-19 WO PCT/US2004/012088 patent/WO2004099064A1/en not_active Ceased
  • 2004-10-19 US US10/968,588 patent/US7220621B2/en not_active Expired - Fee Related

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