WO2004073063A1 - Dispositif electronique et dispositif a semiconducteur - Google Patents

Dispositif electronique et dispositif a semiconducteur Download PDF

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Publication number
WO2004073063A1
WO2004073063A1 PCT/JP2003/001526 JP0301526W WO2004073063A1 WO 2004073063 A1 WO2004073063 A1 WO 2004073063A1 JP 0301526 W JP0301526 W JP 0301526W WO 2004073063 A1 WO2004073063 A1 WO 2004073063A1
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WO
WIPO (PCT)
Prior art keywords
tab
lead
electronic device
electrode terminal
circuit unit
Prior art date
Application number
PCT/JP2003/001526
Other languages
English (en)
Japanese (ja)
Inventor
Tadatoshi Danno
Original Assignee
Renesas Technology Corp.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Renesas Technology Corp. filed Critical Renesas Technology Corp.
Priority to JP2004568182A priority Critical patent/JP4137059B2/ja
Priority to PCT/JP2003/001526 priority patent/WO2004073063A1/fr
Priority to TW092115874A priority patent/TW200428614A/zh
Publication of WO2004073063A1 publication Critical patent/WO2004073063A1/fr

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    • H—ELECTRICITY
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    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
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    • H01L21/568—Temporary substrate used as encapsulation process aid
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    • H01L2924/15738—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950 C and less than 1550 C
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    • H01L2924/18301—Connection portion, e.g. seal being an anchoring portion, i.e. mechanical interlocking between the encapsulation resin and another package part
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    • H05K1/02—Details
    • H05K1/0201—Thermal arrangements, e.g. for cooling, heating or preventing overheating
    • H05K1/0203—Cooling of mounted components
    • H05K1/0204—Cooling of mounted components using means for thermal conduction connection in the thickness direction of the substrate
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    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
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    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/095—Conductive through-holes or vias
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    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10621—Components characterised by their electrical contacts
    • H05K2201/10689—Leaded Integrated Circuit [IC] package, e.g. dual-in-line [DIL]
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    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
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    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10954—Other details of electrical connections
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    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
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    • H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/42—Plated through-holes or plated via connections
    • H05K3/429—Plated through-holes specially for multilayer circuits, e.g. having connections to inner circuit layers

Definitions

  • An object of the present invention is to provide an electronic device in which a high-frequency power module for use in a wireless communication device or the like is mounted and which has improved high-frequency characteristics.
  • the tab 4 is supported by a tab suspension lead 6 having four narrow corners. These tab suspension leads 6 are located on a diagonal line of the rectangular sealing body 2, and the outer ends face each corner of the rectangular sealing body 2.
  • the sealing body 2 is a flat quadrilateral, and the corners (corners) are chamfered to form a slope 2a (see FIG. 1).
  • the outer end of the tab suspension lead 6 slightly protrudes from this chamfered portion to 0.1 mm or less.
  • the protruding length is determined by the cutting type of the press machine when cutting the tab suspension lead in the lead frame state, and for example, 0.1 mm or less is selected.
  • a sealing body 2 is formed between each lead 7 and the lead 7 and between the lead 7 and the tab suspension lead 6. There are resin burrs that occur when performing.
  • the resin paris part is generated when the sealing body 2 is formed by performing single-side molding on one surface of the lead frame 13 shown in FIG.
  • runners are located during transfer molding. There, the runner-cured resin is ejected by one pin ejector lead frame 1
  • crosstalk between input signal wirings may cause output fluctuations and signal waveform distortion in the respective circuit sections.
  • an external signal input lead from an antenna with a small input signal In addition, it is necessary to minimize the influence of crosstalk between adjacent leads.
  • the lead 7 and the tab 4 of the high-frequency power module 1 are mounted.
  • a land 81 connected to the wiring and a tab fixing portion 82 as a tab connection terminal are provided. Therefore, the high-frequency power module 1 is positioned and mounted so that the lead 7 and the tab 4 of the high-frequency power module 1 coincide with and overlap the land 81 and the tap fixing portion 82.
  • the signal output mode of the RFVC044 is 3780 to 3840MHz in 03] ⁇ , 3610 to 3760MHz in DCS, and 3860 to 3980MHz in # 3 in the Rx mode.
  • the Tx mode is 3840 to 398 ⁇ for GSM, 3580 to 3730MHz for DCS, and 3860 to 398 ⁇ for PCS.
  • the outputs of the two TXVCOs 67 are sensed by coupler 70. This detection signal is input to the mixer 72 via the amplifier 71.
  • the mixer 72 inputs the RF local signal output from the RFVCO 44 via the switch 49.
  • the output signal of the mixer 72 is input to the mixer 64 and the DPD 65 together with the output signal of the adder 63.
  • An offset PLL Phase-Locked Loop
  • the frequency of the output signal from the mixer 72 is 8 OMHz in each communication system.
  • a land 81 for lead connection for supplying a fixed ground potential to the LNA (first circuit unit) 24 of the high-frequency power module 1 is also connected to the inner layer GND 89 via the through hole 84. Therefore, as shown in FIG. 16, when the high-frequency power module 1 is mounted on the mounting board 80, the LNA 24 is supplied from the tab fixing portion 82 through the tab 4. The same durand potential common to the ground potential is supplied as a fixed potential via the lead 7 and the wire 10.

Abstract

L'invention concerne une structure de boîtier d'un module de puissance haute fréquence (1) dans lequel des circuits intégrés de traitement de signaux analogiques haute fréquence comprenant un amplificateur à faible bruit sont formés. Cette structure comprend le module de puissance haute fréquence (1) et un substrat de boîtier (80). Le module de puissance haute fréquence (1) comprend un tube (4), plusieurs charges (7), une puce à semiconducteur (3) comportant plusieurs terminaux d'électrode et une partie circuit, plusieurs câbles (10) destinés à connecter les terminaux d'électrode aux charges (7), et plusieurs câbles (10) destinées à connecter les terminaux d'électrode au tube (4). Le substrat de boîtier (80) peut alimenter un potentiel à la terre à faible inductance obtenue par le biais de plusieurs trous traversants (84) vers le tube (4). Les câbles à potentiel fixe sont disposés le long des deux cotés du câble de signaux à travers lequel un signal d'entrée est transmis à la partie circuit, et le potentiel à la terre à faible inductance est alimenté à partir du substrat de boîtier (80) vers le tube (4), empêchant ainsi la création d'un écho magnétique entre un système de communication couramment utilisé et un autre. Ainsi, une condition recherchée d'un appel téléphonique peut être réalisée dans un dispositif électronique, notamment un téléphone mobile.
PCT/JP2003/001526 2003-02-14 2003-02-14 Dispositif electronique et dispositif a semiconducteur WO2004073063A1 (fr)

Priority Applications (3)

Application Number Priority Date Filing Date Title
JP2004568182A JP4137059B2 (ja) 2003-02-14 2003-02-14 電子装置および半導体装置
PCT/JP2003/001526 WO2004073063A1 (fr) 2003-02-14 2003-02-14 Dispositif electronique et dispositif a semiconducteur
TW092115874A TW200428614A (en) 2003-02-14 2003-06-11 Electronic device and semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/JP2003/001526 WO2004073063A1 (fr) 2003-02-14 2003-02-14 Dispositif electronique et dispositif a semiconducteur

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WO2004073063A1 true WO2004073063A1 (fr) 2004-08-26

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TW (1) TW200428614A (fr)
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Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007059885A (ja) * 2005-07-22 2007-03-08 Marvell World Trade Ltd 高速集積回路用のパッケージング
EP1827062A3 (fr) * 2006-02-27 2008-08-20 Denso Corporation Dispositif électronique
US7884451B2 (en) 2005-07-22 2011-02-08 Marvell World Trade Ltd. Packaging for high speed integrated circuits
EP2450951A1 (fr) * 2010-11-08 2012-05-09 Samsung Electronics Co., Ltd. Boîtier plat quadruple doté d'une pale exposée
KR101495823B1 (ko) 2007-11-26 2015-02-25 각고호우징 게이오기주크 전자회로
JP2016174094A (ja) * 2015-03-17 2016-09-29 住友電工デバイス・イノベーション株式会社 半導体組立体

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8571229B2 (en) * 2009-06-03 2013-10-29 Mediatek Inc. Semiconductor device
EP3088931A1 (fr) * 2015-04-30 2016-11-02 LG Innotek Co., Ltd. Appareil de déplacement de lentille, module de caméra et dispositif optique comprenant celui-ci

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0738011A (ja) * 1993-06-29 1995-02-07 Hitachi Ltd 半導体集積回路装置
JP2000091489A (ja) * 1998-09-15 2000-03-31 Anam Semiconductor Inc 半導体パッケ―ジ用リ―ドフレ―ム及び、これを用いた半導体パッケ―ジ
EP1187208A2 (fr) * 2000-08-30 2002-03-13 Hitachi, Ltd. Dispositif semi-conducteur
US20020050380A1 (en) * 2000-06-30 2002-05-02 International Business Machines Corporation Electronic package with plurality of solder-applied areas providing heat transfer

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0738011A (ja) * 1993-06-29 1995-02-07 Hitachi Ltd 半導体集積回路装置
JP2000091489A (ja) * 1998-09-15 2000-03-31 Anam Semiconductor Inc 半導体パッケ―ジ用リ―ドフレ―ム及び、これを用いた半導体パッケ―ジ
US20020050380A1 (en) * 2000-06-30 2002-05-02 International Business Machines Corporation Electronic package with plurality of solder-applied areas providing heat transfer
EP1187208A2 (fr) * 2000-08-30 2002-03-13 Hitachi, Ltd. Dispositif semi-conducteur

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007059885A (ja) * 2005-07-22 2007-03-08 Marvell World Trade Ltd 高速集積回路用のパッケージング
US7884451B2 (en) 2005-07-22 2011-02-08 Marvell World Trade Ltd. Packaging for high speed integrated circuits
EP1827062A3 (fr) * 2006-02-27 2008-08-20 Denso Corporation Dispositif électronique
KR101495823B1 (ko) 2007-11-26 2015-02-25 각고호우징 게이오기주크 전자회로
EP2450951A1 (fr) * 2010-11-08 2012-05-09 Samsung Electronics Co., Ltd. Boîtier plat quadruple doté d'une pale exposée
JP2016174094A (ja) * 2015-03-17 2016-09-29 住友電工デバイス・イノベーション株式会社 半導体組立体

Also Published As

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TWI292208B (fr) 2008-01-01
JPWO2004073063A1 (ja) 2006-06-01
TW200428614A (en) 2004-12-16
JP4137059B2 (ja) 2008-08-20

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