WO2004049573A3 - Schaltungsanordnung zur phasenregelung und verfahren zum betrieb der schaltungsanordnung - Google Patents

Schaltungsanordnung zur phasenregelung und verfahren zum betrieb der schaltungsanordnung Download PDF

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Publication number
WO2004049573A3
WO2004049573A3 PCT/DE2003/003537 DE0303537W WO2004049573A3 WO 2004049573 A3 WO2004049573 A3 WO 2004049573A3 DE 0303537 W DE0303537 W DE 0303537W WO 2004049573 A3 WO2004049573 A3 WO 2004049573A3
Authority
WO
WIPO (PCT)
Prior art keywords
control circuit
circuit arrangement
phase
frequency
operating
Prior art date
Application number
PCT/DE2003/003537
Other languages
English (en)
French (fr)
Other versions
WO2004049573A2 (de
Inventor
Edmund Goetz
Guenter Maerzinger
Markus Scholz
Christian Muenker
Original Assignee
Infineon Technologies Ag
Edmund Goetz
Guenter Maerzinger
Markus Scholz
Christian Muenker
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Infineon Technologies Ag, Edmund Goetz, Guenter Maerzinger, Markus Scholz, Christian Muenker filed Critical Infineon Technologies Ag
Priority to AU2003286108A priority Critical patent/AU2003286108A1/en
Publication of WO2004049573A2 publication Critical patent/WO2004049573A2/de
Publication of WO2004049573A3 publication Critical patent/WO2004049573A3/de
Priority to US11/136,232 priority patent/US7068112B2/en

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08Details of the phase-locked loop
    • H03L7/10Details of the phase-locked loop for assuring initial synchronisation or for broadening the capture range
    • H03L7/107Details of the phase-locked loop for assuring initial synchronisation or for broadening the capture range using a variable transfer function for the loop, e.g. low pass filter having a variable bandwidth
    • H03L7/1075Details of the phase-locked loop for assuring initial synchronisation or for broadening the capture range using a variable transfer function for the loop, e.g. low pass filter having a variable bandwidth by changing characteristics of the loop filter, e.g. changing the gain, changing the bandwidth
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L2207/00Indexing scheme relating to automatic control of frequency or phase and to synchronisation
    • H03L2207/05Compensating for non-linear characteristics of the controlled oscillator

Landscapes

  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
  • Inverter Devices (AREA)

Abstract

Die erfindungsgemäße Schaltungsanordnung zur Phasenregelung weist einen Phasenregelkreis (PLL) zum Erzeugen einer geregelten Frequenz (FVCO) mit einem Stelleingang und einem Regelkreisausgang auf, wobei die Frequenz am Regelkreisausgang abgreifbar ist. Des weiteren ist ein Frequenzmesser (51) vorgesehen, welcher zum Messen der Frequenz (FVCO) mit dem Regelkreisausgang des Phasenregelkreises (PLL) verbunden ist. Schließlich ist eine Recheneinheit (53) vorgesehen, um anhand der gemessenen Frequenz eine Steilheit (KVCO) und daraus wiederum einen Korrekturwert (K) zu ermitteln, welche ausgangsseitig mit dem Stelleingang (4.3) verbunden ist.
PCT/DE2003/003537 2002-11-26 2003-10-24 Schaltungsanordnung zur phasenregelung und verfahren zum betrieb der schaltungsanordnung WO2004049573A2 (de)

Priority Applications (2)

Application Number Priority Date Filing Date Title
AU2003286108A AU2003286108A1 (en) 2002-11-26 2003-10-24 Phase-control circuit arrangement and method for operating said circuit arrangement
US11/136,232 US7068112B2 (en) 2002-11-26 2005-05-24 Phase-control circuit arrangement and method for operating said circuit arrangement

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE10255145.6 2002-11-26
DE10255145A DE10255145B4 (de) 2002-11-26 2002-11-26 Schaltungsanordnung zur Phasenregelung und Verfahren zum Betrieb der Schaltungsanordnung

Related Child Applications (1)

Application Number Title Priority Date Filing Date
US11/136,232 Continuation US7068112B2 (en) 2002-11-26 2005-05-24 Phase-control circuit arrangement and method for operating said circuit arrangement

Publications (2)

Publication Number Publication Date
WO2004049573A2 WO2004049573A2 (de) 2004-06-10
WO2004049573A3 true WO2004049573A3 (de) 2004-08-05

Family

ID=32318695

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/DE2003/003537 WO2004049573A2 (de) 2002-11-26 2003-10-24 Schaltungsanordnung zur phasenregelung und verfahren zum betrieb der schaltungsanordnung

Country Status (4)

Country Link
US (1) US7068112B2 (de)
AU (1) AU2003286108A1 (de)
DE (1) DE10255145B4 (de)
WO (1) WO2004049573A2 (de)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE10308643A1 (de) 2003-02-27 2004-09-16 Infineon Technologies Ag Phasenregelanordnung
US20080232443A1 (en) * 2007-03-23 2008-09-25 Tai-Yuan Yu Signal generating apparatus
US7486118B2 (en) * 2007-03-23 2009-02-03 Mediatek Inc. Signal generating apparatus and method thereof
US7382201B1 (en) 2007-03-23 2008-06-03 Mediatek Inc. Signal generating apparatus and method thereof
US20090072911A1 (en) * 2007-09-14 2009-03-19 Ling-Wei Ke Signal generating apparatus and method thereof
US7760042B2 (en) * 2008-06-26 2010-07-20 Infineon Technologies Ag Phase locked loop based frequency modulator with accurate oscillator gain adjustment
US8081936B2 (en) 2009-01-22 2011-12-20 Mediatek Inc. Method for tuning a digital compensation filter within a transmitter, and associated digital compensation filter and associated calibration circuit
US8154356B2 (en) 2009-12-19 2012-04-10 Infineon Technologies Ag Oscillator with capacitance array

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5631587A (en) * 1994-05-03 1997-05-20 Pericom Semiconductor Corporation Frequency synthesizer with adaptive loop bandwidth
US5786733A (en) * 1995-12-04 1998-07-28 Nec Corporation Phase-locked oscillating circuit with a frequency fluctuation detecting circuit

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4105948A (en) 1977-04-18 1978-08-08 Rca Corporation Frequency synthesizer with rapidly changeable frequency
US4743867A (en) * 1987-08-03 1988-05-10 Motorola, Inc. Compensation circuitry for dual port phase-locked loops
US4926141A (en) 1989-05-01 1990-05-15 Motorola, Inc. Frequency synthesizer with improved automatic control of loop bandwidth selection
US5648744A (en) 1995-12-22 1997-07-15 Microtune, Inc. System and method for voltage controlled oscillator automatic band selection
US5625325A (en) 1995-12-22 1997-04-29 Microtune, Inc. System and method for phase lock loop gain stabilization
DE10125373A1 (de) * 2001-05-23 2002-12-05 Infineon Technologies Ag Phasenregelschleife

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5631587A (en) * 1994-05-03 1997-05-20 Pericom Semiconductor Corporation Frequency synthesizer with adaptive loop bandwidth
US5786733A (en) * 1995-12-04 1998-07-28 Nec Corporation Phase-locked oscillating circuit with a frequency fluctuation detecting circuit

Also Published As

Publication number Publication date
WO2004049573A2 (de) 2004-06-10
US20050264368A1 (en) 2005-12-01
AU2003286108A8 (en) 2004-06-18
DE10255145B4 (de) 2005-12-29
AU2003286108A1 (en) 2004-06-18
DE10255145A1 (de) 2004-06-17
US7068112B2 (en) 2006-06-27

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