WO2003085650A1 - Dispositif d'evaluation de disque - Google Patents
Dispositif d'evaluation de disque Download PDFInfo
- Publication number
- WO2003085650A1 WO2003085650A1 PCT/JP2003/004178 JP0304178W WO03085650A1 WO 2003085650 A1 WO2003085650 A1 WO 2003085650A1 JP 0304178 W JP0304178 W JP 0304178W WO 03085650 A1 WO03085650 A1 WO 03085650A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- sample value
- frequency
- read
- disk
- signal
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
- G11B20/00—Signal processing not specific to the method of recording or reproducing; Circuits therefor
- G11B20/10—Digital recording or reproducing
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
- G11B20/00—Signal processing not specific to the method of recording or reproducing; Circuits therefor
- G11B20/10—Digital recording or reproducing
- G11B20/10009—Improvement or modification of read or write signals
- G11B20/10046—Improvement or modification of read or write signals filtering or equalising, e.g. setting the tap weights of an FIR filter
- G11B20/10212—Improvement or modification of read or write signals filtering or equalising, e.g. setting the tap weights of an FIR filter compensation for data shift, e.g. pulse-crowding effects
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
- G11B20/00—Signal processing not specific to the method of recording or reproducing; Circuits therefor
- G11B20/10—Digital recording or reproducing
- G11B20/10009—Improvement or modification of read or write signals
- G11B20/10037—A/D conversion, D/A conversion, sampling, slicing and digital quantisation or adjusting parameters thereof
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
- G11B20/00—Signal processing not specific to the method of recording or reproducing; Circuits therefor
- G11B20/10—Digital recording or reproducing
- G11B20/14—Digital recording or reproducing using self-clocking codes
- G11B20/1403—Digital recording or reproducing using self-clocking codes characterised by the use of two levels
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
- G11B20/00—Signal processing not specific to the method of recording or reproducing; Circuits therefor
- G11B20/10—Digital recording or reproducing
- G11B20/18—Error detection or correction; Testing, e.g. of drop-outs
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
- G11B27/00—Editing; Indexing; Addressing; Timing or synchronising; Monitoring; Measuring tape travel
- G11B27/36—Monitoring, i.e. supervising the progress of recording or reproducing
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
- G11B7/00—Recording or reproducing by optical means, e.g. recording using a thermal beam of optical radiation by modifying optical properties or the physical structure, reproducing using an optical beam at lower power by sensing optical properties; Record carriers therefor
- G11B7/002—Recording, reproducing or erasing systems characterised by the shape or form of the carrier
- G11B7/0037—Recording, reproducing or erasing systems characterised by the shape or form of the carrier with discs
- G11B7/00375—Recording, reproducing or erasing systems characterised by the shape or form of the carrier with discs arrangements for detection of physical defects, e.g. of recording layer
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
- G11B7/00—Recording or reproducing by optical means, e.g. recording using a thermal beam of optical radiation by modifying optical properties or the physical structure, reproducing using an optical beam at lower power by sensing optical properties; Record carriers therefor
- G11B7/004—Recording, reproducing or erasing methods; Read, write or erase circuits therefor
- G11B7/005—Reproducing
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
- G11B2220/00—Record carriers by type
- G11B2220/20—Disc-shaped record carriers
Definitions
- the present invention relates to a disk evaluation device for evaluating the quality of a recording disk.
- the quality of manufactured recording disks is evaluated using the jitter generated in the read signal read from this recording disk.
- the S / N ratio of the high-frequency component in the read signal decreases, and the signal becomes more susceptible to intersymbol interference. Therefore, a jitter that is more doglike than that of the original disc was detected from a recording disc on which high-density recording was performed, and a problem occurred that the recording disc could not be evaluated correctly.
- the present invention has been made to solve such a problem, and an object of the present invention is to provide a disk evaluation device capable of performing a highly reliable disk evaluation even on a recording disk on which high-density recording is performed.
- a disk evaluation device is a disk evaluation device that evaluates a recording disk on which a modulation signal obtained by performing a predetermined modulation process on an information data according to a channel clock is recorded.
- An information reading means for reading the modulated signal from the recording disc to obtain a read signal; and a read sample value system for sampling the read signal at a clock timing having the same frequency as the channel clock.
- An AZD converter for obtaining a sequence; amplitude limiting means for obtaining an amplitude-limited read sample value sequence in which each sample value of the read sample value sequence is limited to a predetermined amplitude limit value or less; When the interval between the sample value and the minimum sample value corresponds to a predetermined high-frequency wavelength interval, the maximum sample value and the minimum sample value are increased to obtain a high-frequency emphasized read sample value sequence in which high-frequency enhancement is performed.
- a band emphasizing filter comprising a DZA converter for converting the high band emphasized read sample value sequence into an analog high band emphasized read signal at a clock timing of the same frequency as the channel clock;
- a low-pass filter that extracts only components below the cut-off frequency and obtains this as an evaluation read signal;
- Comprises a binarization circuit for obtaining a binary signal obtained by binarizing, the Te, the jitter evening of the binary signal and disk evaluation value.
- FIG. 1 is a diagram showing a configuration of a disk evaluation device according to the present invention.
- FIG. 2 is a diagram showing an internal configuration of the limiter equalizer 10.
- Figure 3 is a diagram showing an example of the interpolated read sample value sequence RS p and the amplitude limited read sample value sequence RSL IM.
- FIG. 4 is a diagram showing a comparison between the output of the limit equalizer 10 and the output of an equalizer that does not perform high-frequency emphasis.
- FIG. 5 is a diagram showing the frequency band of the high-frequency emphasized read signal RD input to the bosstro-pass filter 12.
- Figure 6 shows an example of the waveforms of the high-frequency emphasized read signal RD input to the bosstro 1-pass filter 12 and the evaluation read signal RR output from the postro 1-pass filter 12.
- Fig. 7 shows the relationship between the cut-off frequency of the post-low-pass filter 12 and the amount of jitter when the information data is RLL (1, 7) modulated at a channel clock of 66 MHz and recorded on the recording disk 3.
- FIG. 7 shows the relationship between the cut-off frequency of the post-low-pass filter 12 and the amount of jitter when the information data is RLL (1, 7) modulated at a channel clock of 66 MHz and recorded on the recording disk 3.
- FIG. 1 is a diagram showing a configuration of a disk evaluation device according to the present invention.
- a pickup 1 photoelectrically converts reflected light generated when a recording surface of a recording disk 3 to be evaluated, which is rotated by a spindle motor 2 and is irradiated with a reading beam light, to obtain a reading signal RRF .
- a modulated signal obtained by subjecting the information data to RLL (1, 7) modulation processing according to a channel clock of 66 MHz, for example, is recorded in the recording disk 3 in advance.
- High pass filter 5 supplies the read signal R read signal R HC to remove the low-frequency component of the RF to the pre-opening one-pass filter 6.
- Pre-pass filter 6 AZD conversion of read signal R LHC, which removes high-frequency components of sampling frequency 1Z2 or higher from read signal R HC in order to prevent aliasing during sampling processing by A / D converter 7 Supply to container 7.
- the AZD converter 7 supplies a read sample value sequence RS obtained by sampling the read signal RLHC in accordance with the sampling clock SK supplied from the PLL (phase locked loop) circuit 8 to the pre-equalizer 9.
- the sampling clock SK has the same frequency as the channel clock.
- the pre-equalizer 9 supplies, to the limit equalizer 10, a read sample value sequence R Sc from the read sample value sequence RS, from which intersymbol interference based on the transmission characteristics of the information reading system including the pickup 1 and the recording disk 3 has been removed. I do.
- the pre-equalizer 9 is, for example, a transversal filter having tap coefficients [k, 1, 1, k].
- the limiter equalizer 10 converts a high-frequency emphasized read sample value sequence R SH obtained by performing high-frequency emphasis processing on the read sample value sequence RSc without increasing intersymbol interference into a PLL circuit 8. And the D / A converter 11.
- FIG. 2 is a diagram showing an internal configuration of the limit equalizer 10.
- the limit equalizer 10 includes an interpolation filter 41, an amplitude limiting circuit 42, a high-frequency emphasis filter 43, and an adder 44.
- the interpolation filter 41 performs an interpolation operation on the read sample value series RSc to sample a read signal read from the recording disk 3 at an intermediate timing of the clock timing by the sampling clock SK. Find the sample value series that will be obtained. Then, the interpolation filter 4 1 supplies the obtained sample value series which obtains the interpolated read sample value sequence RS P by interpolating included in the read sample value sequence RS c to the amplitude limiting circuit 4 2.
- Amplitude limiting circuit 4 supplies the amplitude limited read sample value sequence R SUM obtained by amplitude limitation such interpolated read sample value sequence RS P at a predetermined amplitude limiting value Th and single Th in high-frequency emphasizing filter 4 3 I do. That is, the amplitude limiting circuit 4 2, if each read sample values in the interpolated read sample value based column RSP is within range of the amplitude limit value one T h to TH is directly above the interpolated read sample value sequence RSP The amplitude-limited read sample value series R SUM is supplied to the high-frequency emphasis filter 43.
- each of the read sample values of the interpolated read sample value sequence RSP is greater than the amplitude limit value T H is a high-frequency emphasizing the sequence of the amplitude limit value T H as the sample value sequence R SUM read amplitude limiting filter Supply 43.
- each of the read sample values of the interpolated read sample value sequence RS P is less than the amplitude limiting value one T h is a sequence of the amplitude limit value one T h as an amplitude limit read preparative sample value sequence R Sua ⁇ Supply to Area Enhancement Filler 43.
- the amplitude limiting value T h and single T h each, when the distance between the sample values of the maximum of the sample value and a minimum in the interpolated read sample value sequence RS P corresponds to a predetermined high-frequency wavelength interval, That is, when the shortest run length 2T in the RLL (1, 7) modulation is applied, each sample value is set to a value such that the amplitude limit is not applied as described above. That is, the interpolated read sample value sequence RSP corresponding to the run length 2 T is as of passes through the amplitude limiting circuit 42 is output as the sample value sequence RSU M read amplitude limit.
- the high-frequency emphasis filter 43 generates a high-frequency read sample value sequence whose level is increased only in the sample sequence corresponding to the shortest run length 2T in the amplitude-limited read sample value sequence R SUM, and adds this to the adder. Supply 44.
- the high-frequency emphasis filter 43 is, for example, a transversal filter having tap coefficients of [1 k, k, k, 1 k]. With such a configuration, the high-frequency emphasis filter 43 is set at the time point D—LS D in the amplitude-limited read sample value series R SUM as shown in, for example, FIG. 3 (a) or FIG. 3 (b).
- the time points D-and D- corresponding to the run length 2T. . 5 (or point D .. 5 and D,. 5) the amplitude limited read sample values at each becomes substantially equal to each other.
- the time points D- and D- in the case where the run length is 3T and 4T, respectively. . 5 (or point D .. 5 and D,. 5) the amplitude limited read sample values at each becomes both an amplitude limit value one T h (or T h) by the operation of the amplitude limiting circuit 42.
- the zero-crossing point D is obtained. Since the high-frequency read sample value obtained in step (1) is maintained at a constant value, no intersymbol interference occurs.
- the adder 44 calculates the high-frequency read sample value series R If, by adding the supplied read sample value sequence R Sc from the pre-equalizer 9, and outputs the addition result as the high-frequency enhanced read sample value series RS H.
- the limit equalizer 10 performs the operation when the interval between the maximum sample value and the minimum sample value in the read sample value sequence RS c corresponds to a predetermined high-band wavelength interval, that is, RLL (1, 7) When it corresponds to the run length 2T in the modulation, these sample values are respectively increased to perform high-frequency emphasis.
- FIG. 5 is a diagram showing in comparison with a spectrum (indicated by a broken line) of a read sample value series obtained by the above method.
- the output of the limit equalizer 10 shown by a solid line
- the output of the limit equalizer 10 includes harmonic components that are not found in the output of the equalizer without high-frequency emphasis (shown by a broken line). .
- the PLL circuit 8 and correct the phase error component that occurs in the high frequency enhanced read sample value sequence RS H, generates a clock signal of the channel clock and the same frequency (66 MHz), the it as the sampling clock SK It is supplied to the AZD converter 7, the DZA converter 11, and the jitter measuring circuit 30.
- the DZA converter 11 converts the high-frequency emphasized read sample value sequence RSH into an analog signal at the evening according to the sampling clock SK, and converts it to a high-frequency emphasized read signal RD as a post-pass one-pass filter 12. To supply.
- the bosstro-pass filter 12 extracts only the baseband component in the high-frequency emphasized read sample value series RSH by removing the aliasing component (described later) existing in the high-frequency emphasized read signal RD. This is supplied to the binarization circuit 13 as the evaluation read signal RR.
- FIG. 5 is a diagram showing a frequency band of the high-frequency emphasized read signal RD input to the bottom low-pass filter 12. ⁇
- the high-frequency emphasized read signal RD is obtained by converting the high-frequency emphasized read sample value sequence R SH into an analog signal at the timing of the sampling clock SK. Therefore, during ⁇ enhanced read signal RD, as shown in FIG. 5, the baseband component of ⁇ enhanced read sample value sequence RS H to 1/2 or less of the band of the sampling frequency s (66 MHz) is present , (1/2) ⁇ The aliasing component exists in the band above fs. Therefore, the post-mouth one-pass filter 12 removes aliasing components equal to or more than (1Z2) ⁇ fs in the high-frequency emphasized read sample value sequence R SH with cut-off characteristics as shown by the broken line in FIG. As a result, the post low-pass filter 12 Extracts only the baseband component of the high frequency enhanced read sample value sequence RS H from frequency enhanced read signal RD, and outputs an evaluation read signal RR this.
- FIG. 6 is a diagram showing an example of the waveform of each of the high-frequency emphasized read signal RD input to the post-low-pass filter 12 and the evaluation read signal RR output from the post-port one-pass filter 12.
- the high-frequency emphasized read signal RD is obtained by the DZA converter 11, it has a step-like waveform due to its zero-order hold characteristic, which is not suitable for jitter measurement.
- the post-opening one-pass filter 1 2 to remove aliasing components of ⁇ enhanced read sample value sequence RS H present in Koikikyo adjustment read signal RD, a smooth waveform as shown in FIG. 6
- the evaluation read signal RR is generated.
- Fig. 7 shows the relationship between the cut-off i wave number and the amount of jitter of the bottom low-pass filter 12 when the information data is subjected to RLL (1, 7) modulation processing at a channel clock of 66 MHz and recorded on the recording disk 3. It is a figure showing a correspondence.
- the numerical aperture N A and the wavelength ⁇ of the objective lens (not shown) mounted on the pickup 1 are as follows.
- the cut-off frequency of the post low-pass filter 12 is set to be smaller than the channel clock frequency 1Z2, that is, 33 MHz. There was no change in the evening.
- the limit equalizer 10 as described above is adopted, the post-low-pass When cut-off frequency of the filter 1 2 3 OMHz is set larger than, becomes impossible Rukoto was sufficiently attenuate the aliasing components of the sample value series RS H enhanced read highband as shown in FIG. 5, FIG. 7 As shown, the amount of zipper increases.
- the cut-off frequency of the post-low-pass filter 12 is set to be smaller than 3 OMHz, the harmonic components in the high-frequency emphasized read sample value sequence R SH as shown by the solid line in FIG. 4 are attenuated. However, as shown in FIG. 7, the jitter amount increases.
- the jitter amount is minimized when the cut-off frequency of the bottom low-pass filter 12 is around 3 OMHz. Furthermore, if the cut-off frequency of the post-port one-pass filter 12 is near 3 OMHz, even if the cut-off frequency of the bottom low-pass filter 12 fluctuates slightly, as shown in FIG. The fluctuation amount of the light amount is small.
- the post-low-pass filter 1 when evaluating the recording disk 3 on which the information data is recorded in the RLL (1, 7) modulation at the channel clock of 66 MHz, the post-low-pass filter 1 It is preferable that the cut-off frequency of 2 is set near 30 MHz.
- the cutoff frequency around 3 OMHz includes a cutoff frequency variation of 10% that is allowable when considering that the variation of the jitter amount is kept within 0.2%. , 27-33MHz.
- the binarization circuit 13 generates a binary signal having a predetermined high voltage when the evaluation read signal RR supplied from the post-low-pass filter 12 is lower than a predetermined threshold value and a predetermined low voltage when the evaluation read signal RR is lower than the predetermined threshold value. This is supplied to the jitter measuring circuit 30.
- the jitter measuring circuit 30 measures the variation of the time difference between the edge timing of the binary signal and the clock timing of the reference clock signal, that is, the jitter amount, and outputs the measurement result as a disk evaluation value.
- the jitter measuring circuit 30 performs high-frequency emphasis only on the read sample value sequence corresponding to the shortest run length without causing intersymbol interference by the limit equalizer 10, and performs the post-port one-pass filter 12
- the read signal from which aliasing components generated during D / A conversion have been removed is used as the object to be measured.
- the disk evaluation apparatus of the present invention a highly reliable disk evaluation can be performed even if the recording density of the recording information recorded on the recording disk is high. Also, when a limit equalizer is applied to a disk evaluation device, by setting the cut-off frequency of a post-low-pass filter, which has not been considered in the past, as in the present invention, the effect of improving the jitter of the limit equalizer can be sufficiently exerted. Becomes possible. In addition, the cut-off frequency of the post-low-pass fill Even if it fluctuates a little, the fluctuation of the jitter is very small, so that there is no variation between disk evaluation devices and highly reliable jitter evaluation is possible.
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- Signal Processing (AREA)
- Optical Recording Or Reproduction (AREA)
- Signal Processing For Digital Recording And Reproducing (AREA)
Description
Claims
Priority Applications (8)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
BR0307639-3A BR0307639A (pt) | 2002-04-05 | 2003-04-01 | Aparelho de avaliação de disco |
AU2003221130A AU2003221130B2 (en) | 2002-04-05 | 2003-04-01 | Disk evaluation device |
KR1020047015799A KR100666098B1 (ko) | 2002-04-05 | 2003-04-01 | 디스크 평가 장치 |
US10/496,674 US7075875B2 (en) | 2002-04-05 | 2003-04-01 | Disk evaluation device |
MXPA04005360A MXPA04005360A (es) | 2002-04-05 | 2003-04-01 | Aparato de evaluacion de disco. |
EP03715709A EP1494218A4 (en) | 2002-04-05 | 2003-04-01 | DISC EVALUATION DEVICE |
CA002468980A CA2468980C (en) | 2002-04-05 | 2003-04-01 | Disk evaluation apparatus |
ZA2004/03258A ZA200403258B (en) | 2002-04-05 | 2004-04-30 | Disk evaluation device |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2002-103524 | 2002-04-05 | ||
JP2002103524A JP3758158B2 (ja) | 2002-04-05 | 2002-04-05 | ディスク評価装置 |
Publications (1)
Publication Number | Publication Date |
---|---|
WO2003085650A1 true WO2003085650A1 (fr) | 2003-10-16 |
Family
ID=28786306
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/JP2003/004178 WO2003085650A1 (fr) | 2002-04-05 | 2003-04-01 | Dispositif d'evaluation de disque |
Country Status (12)
Country | Link |
---|---|
US (1) | US7075875B2 (ja) |
EP (1) | EP1494218A4 (ja) |
JP (1) | JP3758158B2 (ja) |
KR (1) | KR100666098B1 (ja) |
CN (1) | CN1252694C (ja) |
AU (1) | AU2003221130B2 (ja) |
BR (1) | BR0307639A (ja) |
CA (1) | CA2468980C (ja) |
MX (1) | MXPA04005360A (ja) |
TW (1) | TWI251209B (ja) |
WO (1) | WO2003085650A1 (ja) |
ZA (1) | ZA200403258B (ja) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN100385552C (zh) * | 2004-07-06 | 2008-04-30 | 瑞昱半导体股份有限公司 | 用来解码盘片读取信号的装置及其方法 |
Families Citing this family (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2006344294A (ja) | 2005-06-09 | 2006-12-21 | Hitachi Ltd | 情報再生装置及び再生信号処理回路 |
CN101523494B (zh) * | 2006-10-10 | 2011-09-28 | 皇家飞利浦电子股份有限公司 | 光学驱动器和用于预处理光盘读出信号的方法 |
US20090316557A1 (en) * | 2006-10-31 | 2009-12-24 | Yoshio Sasaki | Information reproducing apparatus and method, and computer program |
JP4915876B2 (ja) * | 2006-10-31 | 2012-04-11 | パイオニア株式会社 | 情報再生装置及び方法、並びにコンピュータプログラム |
WO2008068856A1 (ja) * | 2006-12-05 | 2008-06-12 | Pioneer Corporation | 情報再生装置及び方法、並びにコンピュータプログラム |
WO2008068855A1 (ja) * | 2006-12-05 | 2008-06-12 | Pioneer Corporation | 情報再生装置及び方法、並びにコンピュータプログラム |
US8014252B2 (en) | 2006-12-05 | 2011-09-06 | Pioneer Corporation | Information reproducing apparatus and method, and computer program |
JP4861435B2 (ja) * | 2006-12-05 | 2012-01-25 | パイオニア株式会社 | 情報再生装置及び方法、並びにコンピュータプログラム |
WO2008068857A1 (ja) * | 2006-12-05 | 2008-06-12 | Pioneer Corporation | 情報再生装置及び方法、並びにコンピュータプログラム |
WO2009016755A1 (ja) * | 2007-08-01 | 2009-02-05 | Pioneer Corporation | 記録装置及び方法、コンピュータプログラム、並びに記録媒体 |
US8954010B2 (en) * | 2011-07-11 | 2015-02-10 | At&T Intellectual Property Ii, L.P. | Spectrum management system for municipal spectrum using guided cognitive radio |
Citations (4)
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JPH10282165A (ja) * | 1997-04-01 | 1998-10-23 | Yokogawa Electric Corp | ジッタアナライザ |
JPH11259985A (ja) * | 1998-03-06 | 1999-09-24 | Pioneer Electron Corp | 波形等化器 |
JP2001006181A (ja) * | 1999-05-07 | 2001-01-12 | Sony Precision Eng Center Singapore Pte Ltd | 光ディスクのジッタ測定装置 |
JP2002008324A (ja) * | 2000-06-23 | 2002-01-11 | Hitachi Ltd | 信号処理方法およびそれを用いた記録再生装置 |
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JP3437239B2 (ja) * | 1994-02-16 | 2003-08-18 | オリンパス光学工業株式会社 | 情報再生装置 |
-
2002
- 2002-04-05 JP JP2002103524A patent/JP3758158B2/ja not_active Expired - Fee Related
-
2003
- 2003-03-27 TW TW092106962A patent/TWI251209B/zh not_active IP Right Cessation
- 2003-04-01 BR BR0307639-3A patent/BR0307639A/pt not_active IP Right Cessation
- 2003-04-01 US US10/496,674 patent/US7075875B2/en not_active Expired - Fee Related
- 2003-04-01 CA CA002468980A patent/CA2468980C/en not_active Expired - Fee Related
- 2003-04-01 WO PCT/JP2003/004178 patent/WO2003085650A1/ja active Application Filing
- 2003-04-01 EP EP03715709A patent/EP1494218A4/en not_active Withdrawn
- 2003-04-01 CN CNB038016702A patent/CN1252694C/zh not_active Expired - Fee Related
- 2003-04-01 MX MXPA04005360A patent/MXPA04005360A/es active IP Right Grant
- 2003-04-01 KR KR1020047015799A patent/KR100666098B1/ko not_active IP Right Cessation
- 2003-04-01 AU AU2003221130A patent/AU2003221130B2/en not_active Ceased
-
2004
- 2004-04-30 ZA ZA2004/03258A patent/ZA200403258B/en unknown
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH10282165A (ja) * | 1997-04-01 | 1998-10-23 | Yokogawa Electric Corp | ジッタアナライザ |
JPH11259985A (ja) * | 1998-03-06 | 1999-09-24 | Pioneer Electron Corp | 波形等化器 |
JP2001006181A (ja) * | 1999-05-07 | 2001-01-12 | Sony Precision Eng Center Singapore Pte Ltd | 光ディスクのジッタ測定装置 |
JP2002008324A (ja) * | 2000-06-23 | 2002-01-11 | Hitachi Ltd | 信号処理方法およびそれを用いた記録再生装置 |
Non-Patent Citations (3)
Title |
---|
20 May 1999, OHMSHA, LTD., article HEITARO NAKAJIMA ET AL.: "Zukai compact disk dokuhon", XP002970238 * |
See also references of EP1494218A4 * |
TORIKEPPUSU KIKAKUBU, TORIKEPPUSU SOSHO: "Jisedai Hikari Disk Gijutsu", 1 February 1997, KABUSHIKI KAISHA TORIKEPPUSU, pages: 83 - 84, XP002970239 * |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN100385552C (zh) * | 2004-07-06 | 2008-04-30 | 瑞昱半导体股份有限公司 | 用来解码盘片读取信号的装置及其方法 |
Also Published As
Publication number | Publication date |
---|---|
BR0307639A (pt) | 2005-01-04 |
JP2003303474A (ja) | 2003-10-24 |
CA2468980A1 (en) | 2003-10-16 |
AU2003221130B2 (en) | 2007-09-06 |
ZA200403258B (en) | 2005-08-31 |
MXPA04005360A (es) | 2004-09-27 |
JP3758158B2 (ja) | 2006-03-22 |
CA2468980C (en) | 2009-10-27 |
CN1252694C (zh) | 2006-04-19 |
US20040257953A1 (en) | 2004-12-23 |
KR100666098B1 (ko) | 2007-01-10 |
CN1596437A (zh) | 2005-03-16 |
KR20040094449A (ko) | 2004-11-09 |
EP1494218A1 (en) | 2005-01-05 |
EP1494218A4 (en) | 2007-12-12 |
TW200307912A (en) | 2003-12-16 |
AU2003221130A1 (en) | 2003-10-20 |
TWI251209B (en) | 2006-03-11 |
US7075875B2 (en) | 2006-07-11 |
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