WO2003075337A1 - Assemblage sans flux de paquets a semi-conducteurs de la taille de puce - Google Patents

Assemblage sans flux de paquets a semi-conducteurs de la taille de puce Download PDF

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Publication number
WO2003075337A1
WO2003075337A1 PCT/US2002/006183 US0206183W WO03075337A1 WO 2003075337 A1 WO2003075337 A1 WO 2003075337A1 US 0206183 W US0206183 W US 0206183W WO 03075337 A1 WO03075337 A1 WO 03075337A1
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WIPO (PCT)
Prior art keywords
pad
pads
substrate
forming
die
Prior art date
Application number
PCT/US2002/006183
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English (en)
Other versions
WO2003075337A8 (fr
Inventor
Stanislav A. Garyainov
Alexander S. Gotman
Vladimir V. Novikov
Original Assignee
Agng, Llc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Agng, Llc filed Critical Agng, Llc
Priority to PCT/US2002/006183 priority Critical patent/WO2003075337A1/fr
Priority to US10/501,431 priority patent/US7098072B2/en
Publication of WO2003075337A1 publication Critical patent/WO2003075337A1/fr
Publication of WO2003075337A8 publication Critical patent/WO2003075337A8/fr

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    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/161—Cap
    • H01L2924/1615—Shape
    • H01L2924/16152—Cap comprising a cavity for hosting the device, e.g. U-shaped cap
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/03—Conductive materials
    • H05K2201/0332—Structure of the conductor
    • H05K2201/0364—Conductor shape
    • H05K2201/0373—Conductors having a fine structure, e.g. providing a plurality of contact points with a structured tool
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10621—Components characterised by their electrical contacts
    • H05K2201/10674—Flip chip
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/341—Surface mounted components
    • H05K3/3431—Leadless components
    • H05K3/3436—Leadless components having an array of bottom contacts, e.g. pad grid array or ball grid array components
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/4007—Surface contacts, e.g. bumps
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50—Manufacturing or production processes characterised by the final manufactured product

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Wire Bonding (AREA)

Abstract

L'invention porte sur un procédé d'assemblage de paquets à semi-conducteurs (10) consistant à former des paires correspondantes de plaquettes semi-conductrices (14, 16, 20, 22) sur des surfaces respectives d'une matrice (12) et un substrat d'interconnexion (18). Chaque plaquette de chaque paire comprend une portion supérieure comportant au moins un composant d'un alliage eutectique électro-conducteur. Des pics verticaux et tranchants (50, 58) sont formés sur au moins une des plaquettes de chaque paire. La matrice et le substrat sont calés par contrainte et les plaquettes sont chauffées jusqu'à ce que les pics tranchants pénètrent les films d'oxyde (52) sur les plaquettes opposées respectives de chaque paire et viennent en contact avec la surface supérieure de l'autre plaquette, ce qui permet de démarrer la fusion de plaquette. Ces plaquettes sont ensuite refroidies afin de solidifier les parties fondues dans un joint électro-conducteur entre chaque paire correspondante de plaquettes et un joint hermétique autour de la périphérie du paquet.
PCT/US2002/006183 2002-03-01 2002-03-01 Assemblage sans flux de paquets a semi-conducteurs de la taille de puce WO2003075337A1 (fr)

Priority Applications (2)

Application Number Priority Date Filing Date Title
PCT/US2002/006183 WO2003075337A1 (fr) 2002-03-01 2002-03-01 Assemblage sans flux de paquets a semi-conducteurs de la taille de puce
US10/501,431 US7098072B2 (en) 2002-03-01 2002-03-01 Fluxless assembly of chip size semiconductor packages

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/US2002/006183 WO2003075337A1 (fr) 2002-03-01 2002-03-01 Assemblage sans flux de paquets a semi-conducteurs de la taille de puce

Publications (2)

Publication Number Publication Date
WO2003075337A1 true WO2003075337A1 (fr) 2003-09-12
WO2003075337A8 WO2003075337A8 (fr) 2003-12-18

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PCT/US2002/006183 WO2003075337A1 (fr) 2002-03-01 2002-03-01 Assemblage sans flux de paquets a semi-conducteurs de la taille de puce

Country Status (1)

Country Link
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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2012120245A1 (fr) * 2011-03-10 2012-09-13 Commissariat A L'energie Atomique Et Aux Energies Alternatives Composant de connexion muni d'inserts creux
WO2018099766A1 (fr) * 2016-11-30 2018-06-07 Gottfried Wilhelm Leibniz Universität Hannover Procédé d'assemblage d'un composant semi-conducteur à une contre-partie par soudage laser et dispositif pourvu d'un composant semi-conducteur
US10556292B2 (en) 2010-08-31 2020-02-11 Nissan Motor Co., Ltd. Method for bonding aluminum-based metals

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4404453A (en) * 1981-09-10 1983-09-13 Asta, Ltd. Laser bonding of microelectronic circuits
US5900674A (en) * 1996-12-23 1999-05-04 General Electric Company Interface structures for electronic devices
US5938454A (en) * 1997-05-30 1999-08-17 International Business Machines Corporation Electrical connector assembly for connecting first and second circuitized substrates
US6399896B1 (en) * 2000-03-15 2002-06-04 International Business Machines Corporation Circuit package having low modulus, conformal mounting pads

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4404453A (en) * 1981-09-10 1983-09-13 Asta, Ltd. Laser bonding of microelectronic circuits
US5900674A (en) * 1996-12-23 1999-05-04 General Electric Company Interface structures for electronic devices
US5938454A (en) * 1997-05-30 1999-08-17 International Business Machines Corporation Electrical connector assembly for connecting first and second circuitized substrates
US6399896B1 (en) * 2000-03-15 2002-06-04 International Business Machines Corporation Circuit package having low modulus, conformal mounting pads

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10556292B2 (en) 2010-08-31 2020-02-11 Nissan Motor Co., Ltd. Method for bonding aluminum-based metals
WO2012120245A1 (fr) * 2011-03-10 2012-09-13 Commissariat A L'energie Atomique Et Aux Energies Alternatives Composant de connexion muni d'inserts creux
FR2972569A1 (fr) * 2011-03-10 2012-09-14 Commissariat Energie Atomique Composant de connexion muni d'inserts creux
WO2018099766A1 (fr) * 2016-11-30 2018-06-07 Gottfried Wilhelm Leibniz Universität Hannover Procédé d'assemblage d'un composant semi-conducteur à une contre-partie par soudage laser et dispositif pourvu d'un composant semi-conducteur

Also Published As

Publication number Publication date
WO2003075337A8 (fr) 2003-12-18

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