WO2003060981A1 - Procede de getterisation d'impuretes de metaux de transition dans des cristaux de silicium - Google Patents
Procede de getterisation d'impuretes de metaux de transition dans des cristaux de silicium Download PDFInfo
- Publication number
- WO2003060981A1 WO2003060981A1 PCT/JP2003/000139 JP0300139W WO03060981A1 WO 2003060981 A1 WO2003060981 A1 WO 2003060981A1 JP 0300139 W JP0300139 W JP 0300139W WO 03060981 A1 WO03060981 A1 WO 03060981A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- silicon
- transition metal
- impurities
- metal impurities
- silicon crystal
- Prior art date
Links
- 239000012535 impurity Substances 0.000 title claims abstract description 105
- 229910052710 silicon Inorganic materials 0.000 title claims abstract description 94
- 239000010703 silicon Substances 0.000 title claims abstract description 93
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 title claims abstract description 92
- 239000013078 crystal Substances 0.000 title claims abstract description 57
- 229910052723 transition metal Inorganic materials 0.000 title claims abstract description 49
- 150000003624 transition metals Chemical class 0.000 title claims abstract description 49
- 238000000034 method Methods 0.000 title claims abstract description 32
- 238000005247 gettering Methods 0.000 title claims abstract description 16
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims abstract description 33
- 229910052760 oxygen Inorganic materials 0.000 claims abstract description 31
- 229910052799 carbon Inorganic materials 0.000 claims abstract description 30
- 239000001301 oxygen Substances 0.000 claims abstract description 28
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 claims abstract description 22
- 238000009792 diffusion process Methods 0.000 claims abstract description 18
- 238000004519 manufacturing process Methods 0.000 claims abstract description 17
- 229910052759 nickel Inorganic materials 0.000 claims abstract description 13
- 238000000137 annealing Methods 0.000 claims description 12
- 238000005468 ion implantation Methods 0.000 claims description 6
- -1 oxygen ions Chemical class 0.000 claims description 5
- 239000002994 raw material Substances 0.000 claims description 3
- 230000000415 inactivating effect Effects 0.000 claims description 2
- 239000004065 semiconductor Substances 0.000 abstract description 18
- 229910052802 copper Inorganic materials 0.000 abstract description 10
- 230000015572 biosynthetic process Effects 0.000 abstract description 3
- 239000002131 composite material Substances 0.000 abstract 1
- 239000010949 copper Substances 0.000 description 33
- 125000004429 atom Chemical group 0.000 description 10
- 125000004432 carbon atom Chemical group C* 0.000 description 9
- 230000000694 effects Effects 0.000 description 5
- 238000005516 engineering process Methods 0.000 description 5
- 230000010354 integration Effects 0.000 description 5
- XKRFYHLGVUSROY-UHFFFAOYSA-N Argon Chemical compound [Ar] XKRFYHLGVUSROY-UHFFFAOYSA-N 0.000 description 4
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 4
- 125000004430 oxygen atom Chemical group O* 0.000 description 4
- 238000010586 diagram Methods 0.000 description 3
- 229910052786 argon Inorganic materials 0.000 description 2
- 238000002109 crystal growth method Methods 0.000 description 2
- 238000004134 energy conservation Methods 0.000 description 2
- 238000000192 extended X-ray absorption fine structure spectroscopy Methods 0.000 description 2
- 239000007789 gas Substances 0.000 description 2
- 238000010438 heat treatment Methods 0.000 description 2
- 239000000126 substance Substances 0.000 description 2
- 238000006467 substitution reaction Methods 0.000 description 2
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 1
- 101150107341 RERE gene Proteins 0.000 description 1
- 239000000370 acceptor Substances 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 230000004888 barrier function Effects 0.000 description 1
- 239000000969 carrier Substances 0.000 description 1
- 230000015556 catabolic process Effects 0.000 description 1
- 150000001875 compounds Chemical class 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 229910001873 dinitrogen Inorganic materials 0.000 description 1
- 238000005485 electric heating Methods 0.000 description 1
- 238000002474 experimental method Methods 0.000 description 1
- 238000009396 hybridization Methods 0.000 description 1
- 238000001459 lithography Methods 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 238000002161 passivation Methods 0.000 description 1
- 230000002265 prevention Effects 0.000 description 1
- 239000006104 solid solution Substances 0.000 description 1
- 230000007704 transition Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/322—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections
- H01L21/3221—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections of silicon bodies, e.g. for gettering
- H01L21/3225—Thermally inducing defects using oxygen present in the silicon body for intrinsic gettering
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/322—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections
-
- C—CHEMISTRY; METALLURGY
- C30—CRYSTAL GROWTH
- C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
- C30B29/00—Single crystals or homogeneous polycrystalline material with defined structure characterised by the material or by their shape
- C30B29/02—Elements
- C30B29/06—Silicon
-
- C—CHEMISTRY; METALLURGY
- C30—CRYSTAL GROWTH
- C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
- C30B33/00—After-treatment of single crystals or homogeneous polycrystalline material with defined structure
Definitions
- the present invention relates to a transition metal such as Co, Ni, Cu, etc., which is dissolved and mixed from a raw material during a silicon single crystal manufacturing process to form a solid solution, or Cu, etc., mixed into a silicon wafer during Cu wiring.
- the present invention relates to a method for producing a stable silicon semiconductor device without a deep impurity level by inactivating impurities.
- Silicon semiconductor devices support the current information society through high integration using ultra-fine processing technology. At present, silicon semiconductor devices are required to have higher speed and higher integration, and the contact resistance due to wiring has come to dominate the operation limit of these devices.
- transition metal impurities especially Co, Ni, or Cu, which are mixed in from the raw materials during the silicon single crystal manufacturing process such as the Czochralski pulling method, are not a problem when the device size is large.
- the presence of small amounts of transition metal impurities has a significant effect on device quality and yield.
- Patent Document 1 JP-A-10-303430
- Patent Document 2 JP 2001-250957 A
- Patent Document 3 JP 2001-274405 A
- the present invention relates to a gettering method for ultra-high speed diffusion of silicon in a silicon wafer, and particularly for a transition metal impurity which forms a deep impurity level, in particular, Co, Ni, or Cu for ultra-high speed diffusion at room temperature.
- Silicon is simultaneously doped with two types of impurities, oxygen (O) and carbon (C), and then annealed to form an impurity complex consisting of C and O and transition metal impurities at specific atomic positions in the silicon crystal.
- the method is based on a method of fabricating a silicon semiconductor device which is not affected by transition metal impurities by forming a semiconductor.
- the transition metal impurities can be confined in the impurity complex by utilizing the chemical bond energy by forming the impurity complex, and furthermore, the deep impurity level caused by the transition metal impurity can be electrically inactivated. it can. Therefore, even in the presence of transition metal impurities such as Co, Ni, or Cu mixed during the silicon single crystal manufacturing process, and Cu mixed during Cu wiring, deep impurity levels exist in the band gap. It is possible to manufacture a silicon semiconductor device having no position.
- the present invention provides a method for gettering transition metal impurities which diffuses ultra-high speed in a silicon crystal and forms a deep impurity level, wherein two types of impurities, oxygen (O) and carbon (C), After co-doping, a transition metal impurity atom and an impurity complex of C and o are precipitated in the silicon crystal by heat annealing, and the transition metal impurity is confined in the silicon crystal.
- a gettering method for transition metal impurities in a silicon crystal characterized in that ultra-high speed diffusion of transition metal impurities is prevented and deep impurity levels due to the transition metal impurities are electrically inactivated.
- the present invention provides a method for manufacturing a semiconductor device, comprising the steps of: The gettering method of the transition metal impurities in the silicon crystal described above, wherein the impurities are Co, Ni, or Cu impurities mixed in from the silicon, or Cu impurities mixed in the Cu wiring.
- the present invention relates to a method in which two types of oxygen (O) and carbon (C), or oxygen (O) are artificially added to a silicon melt during silicon single crystal growth by the Czochralski pulling method. ) And carbon (C) are simultaneously co-doped with the above-mentioned method for gettering transition metal impurities in a silicon crystal. Further, the present invention provides the above-mentioned silicon, wherein two kinds of impurities of oxygen (O) and carbon (C) are artificially co-doped into a silicon wafer by ion implantation of oxygen ions and carbon ions. This is a method for gettering transition metal impurities in the crystal.
- Transition metal that diffuses very fast through interstitial sites in silicon crystals
- Co, Ni, or Cu impurities form deep impurity levels in the bandgap, trapping carriers from the acceptors and donors of the p-type silicon n-type silicon crystal, and significantly function as devices. Lower.
- a deep impurity level due to Cu doping is formed, which increases the resistance (10 ⁇ cm) .
- Si atoms in the silicon crystal It is evident that it diffuses at an ultra-high speed of about 10 orders of magnitude or more compared to the p-donor impurity in silicon crystal.
- Figure 1 shows the Si atom and silicon crystal in silicon crystal for comparison. Of donor impurities in silicon The temperature dependence of the coefficients is also shown.
- FIG. 1 is a graph showing the temperature dependence of the diffusion coefficients of Ni and Cu in a silicon crystal.
- FIG. 2 is a schematic diagram showing the structure of a C—O impurity complex in a silicon crystal produced by the Czochralski crystal growth method.
- FIG. 3 is a schematic diagram showing the structure of a Cu—O—C impurity complex in a silicon crystal determined experimentally using the EXAFS method.
- Fig. 4 shows the deep impurity level of the Cu impurity in the silicon crystal.
- A The formation of the Cu—O—C impurity complex changes the bonding state in the valence band and the anti-bonding state in the conduction band.
- FIG. 1 is a graph showing the temperature dependence of the diffusion coefficients of Ni and Cu in a silicon crystal.
- FIG. 2 is a schematic diagram showing the structure of a C—O impurity complex in a silicon crystal produced by the Czochralski crystal growth method.
- FIG. 3 is a schematic diagram showing the structure of
- FIG. 4 is an explanatory diagram showing a relationship in which a deep impurity level in a band gap disappears due to splitting and becomes a Cu—O—C impurity level (b).
- FIG. 5 is a graph showing the temperature dependence of the diffusion coefficients of Ni and Cu in a silicon crystal after co-doping with C atoms and O atoms and after annealing at 350 ° C. BEST MODE FOR CARRYING OUT THE INVENTION
- the present invention is characterized in that in a method of gettering transition metal impurities in a silicon crystal, two kinds of impurities, oxygen (o) and carbon (C), are simultaneously doped into silicon and then thermally annealed.
- two kinds of impurities, oxygen (o) and carbon (C) are simultaneously doped into silicon and then thermally annealed.
- co-doping a method can be adopted in which oxygen or carbon is put into a silicon melt when silicon crystals are formed by the Czochralski pulling method before forming a wafer.
- oxygen enters naturally from the air, but its concentration needs to be controlled.
- the concentration is controlled by artificially co-doping oxygen (o) and carbon (C).
- oxygen (O) and carbon (C) can be artificially co-doped with silicon by ion implantation.
- carbon (C) atoms are artificially doped at the Si-substitution position of silicon crystal, the atomic radius of carbon atoms (C) is smaller than the atomic radius of silicon atoms (Si).
- thermal annealing is performed on the silicon crystal containing the two types of impurities, ie, doped C and o.
- the thermal annealing is performed, for example, by disposing a silicon wafer in an electric heating furnace, and in a nitrogen gas or argon gas atmosphere, at least 250 ° C., preferably about 35 Q to 500 ° C., for about 10 minutes. Heating is performed for about 2 hours. Due to thermal annealing, as shown in Fig. 2, O atoms in the interstitial position of the silicon bond are in the vicinity of the C atom due to the long-range force strain field by the C atom at the Si substitution position. Come together. The C atom is at the center of the interstitial bond.
- the transition metal impurity atom is weakly attracted to the C atom by the strain field of the long-range force C atom, and the impurity complex with the o atom collected by thermal annealing around the c atom is formed.
- an impurity complex of a transition metal and C and O atoms is precipitated at a specific atom position in the silicon crystal.
- the structure of the impurity complex containing the transition metal was determined using the EXAFS method. As a result, it was found that the structure was as shown in Fig. 3.
- the specific atomic position is, as shown in FIG. 3, an interstitial position, which is a position around carbon (C), which is strongly bonded to oxygen (O) to form a compound.
- the transition metal impurities are confined in the impurity complex by the chemical bond energy due to the formation of the complex of the two kinds of impurities, oxygen (O) and carbon (C), and the transition metal impurity, and the 3d orbit of the transition metal and the C atom
- the deep impurity level is split into a bonding state (in the valence band) and an anti-bonding state (in the conduction band), as described with reference to FIG. It can disappear and be electrically inactivated.
- the diffusion coefficients of Cu and Ni are measured in this system, as shown in Fig. 5, the diffusion coefficient is reduced by about 8 to 9 digits, and almost no diffusion occurs.
- Figure 5 also shows the temperature dependence of the diffusion coefficients of Si atoms in silicon crystals and P donor impurities in silicon crystals for comparison.
- the electrical activity and ultra-high-speed diffusion of transition metal impurities can be controlled by simple thermal annealing in the device manufacturing process. Large effects in energy conservation are expected.
- the silicon melt was co-doped with oxygen (o) and carbon (C) during crystal growth by the pulling method using a Chiyoklarski puller.
- a low-resistivity n-type silicon single crystal was obtained in which oxygen (O) and carbon (C) were simultaneously doped by 8 ⁇ 10 18 cm ⁇ 3 so as to have a copper impurity concentration or higher.
- the electric resistivity of the wafer processed from this single crystal was 1 ⁇ cm.
- this wafer was doped with 4 ⁇ 10 18 cm ⁇ 3 by ion implantation. Further, the wafer is placed in an electric furnace and heated at 100 ° C, 200 ° C, 300 ° C, 350 ° C, 400 ° C, and 500 ° C for 6 minutes in an argon gas atmosphere. Annealed.
- the present invention controls electrical activity and ultra-high-speed diffusion of deep transition levels of transition metal impurities such as Co, Ni, or Cu by a simple process in a device manufacturing process in a silicon semiconductor manufacturing process.
- transition metal impurities such as Co, Ni, or Cu
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- Engineering & Computer Science (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- Materials Engineering (AREA)
- Metallurgy (AREA)
- Organic Chemistry (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Crystals, And After-Treatments Of Crystals (AREA)
Description
Claims
Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1020047010635A KR100596701B1 (ko) | 2002-01-10 | 2003-01-09 | 실리콘결정중의 천이금속 불순물의 게터링 방법 |
US10/501,080 US7157354B2 (en) | 2002-01-10 | 2003-01-09 | Method for gettering transition metal impurities in silicon crystal |
EP03701051A EP1467405A1 (en) | 2002-01-10 | 2003-01-09 | Method for gettering transition metal impurities in silicon crystal |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2002-003896 | 2002-01-10 | ||
JP2002003896A JP2003209114A (ja) | 2002-01-10 | 2002-01-10 | シリコン結晶中の遷移金属不純物のゲッタリング方法 |
Publications (1)
Publication Number | Publication Date |
---|---|
WO2003060981A1 true WO2003060981A1 (fr) | 2003-07-24 |
Family
ID=19190931
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/JP2003/000139 WO2003060981A1 (fr) | 2002-01-10 | 2003-01-09 | Procede de getterisation d'impuretes de metaux de transition dans des cristaux de silicium |
Country Status (6)
Country | Link |
---|---|
US (1) | US7157354B2 (ja) |
EP (1) | EP1467405A1 (ja) |
JP (1) | JP2003209114A (ja) |
KR (1) | KR100596701B1 (ja) |
TW (1) | TWI232897B (ja) |
WO (1) | WO2003060981A1 (ja) |
Families Citing this family (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP4684574B2 (ja) * | 2004-04-30 | 2011-05-18 | 独立行政法人科学技術振興機構 | シリコン結晶中のCu不純物のゲッタリング方法 |
JP4604889B2 (ja) * | 2005-05-25 | 2011-01-05 | 株式会社Sumco | シリコンウェーハの製造方法、並びにシリコン単結晶育成方法 |
JP2007220825A (ja) | 2006-02-15 | 2007-08-30 | Sumco Corp | シリコンウェーハの製造方法 |
JP2010016169A (ja) * | 2008-07-03 | 2010-01-21 | Shin Etsu Handotai Co Ltd | エピタキシャルウェーハおよびエピタキシャルウェーハの製造方法 |
CN105098017B (zh) * | 2015-08-18 | 2018-03-06 | 西安电子科技大学 | 基于c面蓝宝石衬底上N面黄光LED结构及其制作方法 |
CN105140365B (zh) * | 2015-08-18 | 2018-03-06 | 西安电子科技大学 | 基于c面蓝宝石衬底上Ga极性黄光LED结构及其制作方法 |
CN105140355A (zh) * | 2015-08-18 | 2015-12-09 | 西安电子科技大学 | 基于m面蓝宝石衬底上半极性(11-22)黄光LED材料及其制作方法 |
Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0419044A1 (en) * | 1989-08-23 | 1991-03-27 | Shin-Etsu Handotai Company, Limited | Single crystal silicon |
EP0502471A2 (en) * | 1991-03-05 | 1992-09-09 | Fujitsu Limited | Intrinsic gettering of a silicon substrate |
JPH1041311A (ja) * | 1996-07-18 | 1998-02-13 | Sony Corp | エピタキシャルシリコン基板及び固体撮像装置並びにこれらの製造方法 |
JPH11204534A (ja) * | 1998-01-14 | 1999-07-30 | Sumitomo Metal Ind Ltd | シリコンエピタキシャルウェーハの製造方法 |
US20010012686A1 (en) * | 2000-02-04 | 2001-08-09 | Nec Corporation, | Semiconductor device and fabricating method thereof |
Family Cites Families (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO1998005063A1 (fr) * | 1996-07-29 | 1998-02-05 | Sumitomo Sitix Corporation | Plaquette epitaxiale en silicium et son procede de fabrication |
-
2002
- 2002-01-10 JP JP2002003896A patent/JP2003209114A/ja active Pending
-
2003
- 2003-01-09 EP EP03701051A patent/EP1467405A1/en not_active Withdrawn
- 2003-01-09 WO PCT/JP2003/000139 patent/WO2003060981A1/ja not_active Application Discontinuation
- 2003-01-09 KR KR1020047010635A patent/KR100596701B1/ko not_active IP Right Cessation
- 2003-01-09 US US10/501,080 patent/US7157354B2/en not_active Expired - Fee Related
- 2003-01-09 TW TW092100378A patent/TWI232897B/zh not_active IP Right Cessation
Patent Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0419044A1 (en) * | 1989-08-23 | 1991-03-27 | Shin-Etsu Handotai Company, Limited | Single crystal silicon |
EP0502471A2 (en) * | 1991-03-05 | 1992-09-09 | Fujitsu Limited | Intrinsic gettering of a silicon substrate |
JPH1041311A (ja) * | 1996-07-18 | 1998-02-13 | Sony Corp | エピタキシャルシリコン基板及び固体撮像装置並びにこれらの製造方法 |
JPH11204534A (ja) * | 1998-01-14 | 1999-07-30 | Sumitomo Metal Ind Ltd | シリコンエピタキシャルウェーハの製造方法 |
US20010012686A1 (en) * | 2000-02-04 | 2001-08-09 | Nec Corporation, | Semiconductor device and fabricating method thereof |
Non-Patent Citations (1)
Title |
---|
MADDALON-VINANTE C. ET AL.: "On the origin of internal gettering suppression in low carbon CZ silicon, by rapid thermal annealing", JOURNAL OF ELECTROCHEMICAL SOCIETY, vol. 142, no. 2, February 1995 (1995-02-01), pages 560 - 564, XP002966302 * |
Also Published As
Publication number | Publication date |
---|---|
JP2003209114A (ja) | 2003-07-25 |
US7157354B2 (en) | 2007-01-02 |
TWI232897B (en) | 2005-05-21 |
KR20040076882A (ko) | 2004-09-03 |
US20050090079A1 (en) | 2005-04-28 |
EP1467405A1 (en) | 2004-10-13 |
TW200301786A (en) | 2003-07-16 |
KR100596701B1 (ko) | 2006-07-04 |
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