WO2003028104A3 - Halbleiterspeicher mit einen vertikalen auswahltransistor umfassenden speicherzellen sowie verfahren zu seiner herstellung - Google Patents
Halbleiterspeicher mit einen vertikalen auswahltransistor umfassenden speicherzellen sowie verfahren zu seiner herstellung Download PDFInfo
- Publication number
- WO2003028104A3 WO2003028104A3 PCT/DE2002/002980 DE0202980W WO03028104A3 WO 2003028104 A3 WO2003028104 A3 WO 2003028104A3 DE 0202980 W DE0202980 W DE 0202980W WO 03028104 A3 WO03028104 A3 WO 03028104A3
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- trench
- production
- word line
- selection transistor
- semiconductor memory
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B12/00—Dynamic random access memory [DRAM] devices
- H10B12/01—Manufacture or treatment
- H10B12/02—Manufacture or treatment for one transistor one-capacitor [1T-1C] memory cells
- H10B12/03—Making the capacitor or connections thereto
- H10B12/038—Making the capacitor or connections thereto the capacitor being in a trench in the substrate
- H10B12/0383—Making the capacitor or connections thereto the capacitor being in a trench in the substrate wherein the transistor is vertical
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B12/00—Dynamic random access memory [DRAM] devices
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B12/00—Dynamic random access memory [DRAM] devices
- H10B12/30—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
- H10B12/39—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells the capacitor and the transistor being in a same trench
- H10B12/395—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells the capacitor and the transistor being in a same trench the transistor being vertical
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B12/00—Dynamic random access memory [DRAM] devices
- H10B12/30—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
- H10B12/48—Data lines or contacts therefor
- H10B12/488—Word lines
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B12/00—Dynamic random access memory [DRAM] devices
- H10B12/01—Manufacture or treatment
- H10B12/02—Manufacture or treatment for one transistor one-capacitor [1T-1C] memory cells
- H10B12/03—Making the capacitor or connections thereto
- H10B12/038—Making the capacitor or connections thereto the capacitor being in a trench in the substrate
- H10B12/0385—Making a connection between the transistor and the capacitor, e.g. buried strap
Abstract
Priority Applications (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2003531529A JP2005504440A (ja) | 2001-09-05 | 2002-08-14 | 垂直選択トランジスタを含むメモリーセルを備えた半導体メモリー、および、その製造方法 |
EP02764546A EP1423874A2 (de) | 2001-09-05 | 2002-08-14 | Halbleiterspeicher mit einen vertikalen auswahltransistor umfassenden speicherzellen sowie verfahren zu seiner herstellung |
KR1020047003325A KR100700365B1 (ko) | 2001-09-05 | 2002-08-14 | 수직 선택 트랜지스터를 포함하는 메모리 셀을 구비한 반도체 메모리 및 그 제조 방법 |
US10/792,742 US6977405B2 (en) | 2001-09-05 | 2004-03-05 | Semiconductor memory with memory cells comprising a vertical selection transistor and method for fabricating it |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE10143650.5 | 2001-09-05 | ||
DE10143650A DE10143650A1 (de) | 2001-09-05 | 2001-09-05 | Halbleiterspeicher mit einen vertikalen Auswahltransistor umfassenden Speicherzellen sowie Verfahren zu seiner Herstellung |
Related Child Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US10/792,742 Continuation US6977405B2 (en) | 2001-09-05 | 2004-03-05 | Semiconductor memory with memory cells comprising a vertical selection transistor and method for fabricating it |
Publications (2)
Publication Number | Publication Date |
---|---|
WO2003028104A2 WO2003028104A2 (de) | 2003-04-03 |
WO2003028104A3 true WO2003028104A3 (de) | 2003-08-14 |
Family
ID=7697897
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/DE2002/002980 WO2003028104A2 (de) | 2001-09-05 | 2002-08-14 | Halbleiterspeicher mit einen vertikalen auswahltransistor umfassenden speicherzellen sowie verfahren zu seiner herstellung |
Country Status (7)
Country | Link |
---|---|
US (1) | US6977405B2 (de) |
EP (1) | EP1423874A2 (de) |
JP (1) | JP2005504440A (de) |
KR (1) | KR100700365B1 (de) |
DE (1) | DE10143650A1 (de) |
TW (1) | TW556341B (de) |
WO (1) | WO2003028104A2 (de) |
Families Citing this family (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE10318625B4 (de) * | 2003-04-24 | 2006-08-03 | Infineon Technologies Ag | Vertikale Speicherzelle und Verfahren zu deren Herstellung |
TWI300975B (en) * | 2006-06-08 | 2008-09-11 | Nanya Technology Corp | Method for fabricating recessed-gate mos transistor device |
US20150112623A1 (en) * | 2013-10-22 | 2015-04-23 | United Microelectronics Corp. | Structure for measuring doping region resistance and method of measuring critical dimension of spacer |
CN113629061B (zh) * | 2021-08-02 | 2023-10-13 | 中国科学院微电子研究所 | Nor型存储器件及其制造方法及包括存储器件的电子设备 |
EP4216263A1 (de) | 2021-08-23 | 2023-07-26 | Changxin Memory Technologies, Inc. | Speichervorrichtung und verfahren zur herstellung davon |
CN116133375A (zh) * | 2021-08-23 | 2023-05-16 | 长鑫存储技术有限公司 | 存储器件及其形成方法 |
Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS62140456A (ja) * | 1985-12-16 | 1987-06-24 | Toshiba Corp | 半導体記憶装置 |
JPH01266756A (ja) * | 1988-04-18 | 1989-10-24 | Sony Corp | 半導体メモリ |
JPH0214563A (ja) * | 1988-07-01 | 1990-01-18 | Matsushita Electron Corp | 半導体記憶装置 |
US5776836A (en) * | 1996-02-29 | 1998-07-07 | Micron Technology, Inc. | Self aligned method to define features smaller than the resolution limit of a photolithography system |
WO2001017015A1 (de) * | 1999-08-31 | 2001-03-08 | Infineon Technologies Ag | Verfahren zur herstellung einer dram-zellenanordnung |
DE10038728A1 (de) * | 2000-07-31 | 2002-02-21 | Infineon Technologies Ag | Halbleiterspeicher-Zellenanordnung und Verfahren zu deren Herstellung |
Family Cites Families (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH07130871A (ja) | 1993-06-28 | 1995-05-19 | Toshiba Corp | 半導体記憶装置 |
EP0899790A3 (de) | 1997-08-27 | 2006-02-08 | Infineon Technologies AG | DRAM-Zellanordnung und Verfahren zu deren Herstellung |
TW469599B (en) | 1998-12-02 | 2001-12-21 | Infineon Technologies Ag | DRAM-cells arrangement and its production method |
KR101140087B1 (ko) * | 2002-06-13 | 2012-04-30 | 쓰리엠 이노베이티브 프로퍼티즈 캄파니 | 제어되는 인증서 생산 및 관리 시스템 |
-
2001
- 2001-09-05 DE DE10143650A patent/DE10143650A1/de not_active Ceased
-
2002
- 2002-08-14 KR KR1020047003325A patent/KR100700365B1/ko not_active IP Right Cessation
- 2002-08-14 JP JP2003531529A patent/JP2005504440A/ja active Pending
- 2002-08-14 WO PCT/DE2002/002980 patent/WO2003028104A2/de active Application Filing
- 2002-08-14 EP EP02764546A patent/EP1423874A2/de not_active Withdrawn
- 2002-08-21 TW TW091118906A patent/TW556341B/zh active
-
2004
- 2004-03-05 US US10/792,742 patent/US6977405B2/en not_active Expired - Fee Related
Patent Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS62140456A (ja) * | 1985-12-16 | 1987-06-24 | Toshiba Corp | 半導体記憶装置 |
JPH01266756A (ja) * | 1988-04-18 | 1989-10-24 | Sony Corp | 半導体メモリ |
JPH0214563A (ja) * | 1988-07-01 | 1990-01-18 | Matsushita Electron Corp | 半導体記憶装置 |
US5776836A (en) * | 1996-02-29 | 1998-07-07 | Micron Technology, Inc. | Self aligned method to define features smaller than the resolution limit of a photolithography system |
WO2001017015A1 (de) * | 1999-08-31 | 2001-03-08 | Infineon Technologies Ag | Verfahren zur herstellung einer dram-zellenanordnung |
DE10038728A1 (de) * | 2000-07-31 | 2002-02-21 | Infineon Technologies Ag | Halbleiterspeicher-Zellenanordnung und Verfahren zu deren Herstellung |
Non-Patent Citations (3)
Title |
---|
PATENT ABSTRACTS OF JAPAN vol. 011, no. 367 (E - 561) 28 November 1987 (1987-11-28) * |
PATENT ABSTRACTS OF JAPAN vol. 014, no. 032 (E - 876) 22 January 1990 (1990-01-22) * |
PATENT ABSTRACTS OF JAPAN vol. 014, no. 156 (E - 0908) 26 March 1990 (1990-03-26) * |
Also Published As
Publication number | Publication date |
---|---|
KR20040033018A (ko) | 2004-04-17 |
US20040201055A1 (en) | 2004-10-14 |
TW556341B (en) | 2003-10-01 |
WO2003028104A2 (de) | 2003-04-03 |
US6977405B2 (en) | 2005-12-20 |
DE10143650A1 (de) | 2003-03-13 |
EP1423874A2 (de) | 2004-06-02 |
JP2005504440A (ja) | 2005-02-10 |
KR100700365B1 (ko) | 2007-03-27 |
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