WO2002084748A2 - Procede pour produire des zones optiquement transparentes dans un substrat de silicium - Google Patents

Procede pour produire des zones optiquement transparentes dans un substrat de silicium Download PDF

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Publication number
WO2002084748A2
WO2002084748A2 PCT/DE2002/000798 DE0200798W WO02084748A2 WO 2002084748 A2 WO2002084748 A2 WO 2002084748A2 DE 0200798 W DE0200798 W DE 0200798W WO 02084748 A2 WO02084748 A2 WO 02084748A2
Authority
WO
WIPO (PCT)
Prior art keywords
silicon substrate
etching process
cavity
etching
optically transparent
Prior art date
Application number
PCT/DE2002/000798
Other languages
German (de)
English (en)
Other versions
WO2002084748A3 (fr
Inventor
Hubert Benzel
Heribert Weber
Hans Artmann
Frank Schaefer
Original Assignee
Robert Bosch Gmbh
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Robert Bosch Gmbh filed Critical Robert Bosch Gmbh
Priority to DE50207649T priority Critical patent/DE50207649D1/de
Priority to EP02727197A priority patent/EP1390988B1/fr
Priority to JP2002581591A priority patent/JP4253507B2/ja
Priority to US10/474,968 priority patent/US7419581B2/en
Publication of WO2002084748A2 publication Critical patent/WO2002084748A2/fr
Publication of WO2002084748A3 publication Critical patent/WO2002084748A3/fr

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Classifications

    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B81—MICROSTRUCTURAL TECHNOLOGY
    • B81B—MICROSTRUCTURAL DEVICES OR SYSTEMS, e.g. MICROMECHANICAL DEVICES
    • B81B3/00—Devices comprising flexible or deformable elements, e.g. comprising elastic tongues or membranes
    • B81B3/0064—Constitution or structural means for improving or controlling the physical properties of a device
    • B81B3/0083—Optical properties
    • C—CHEMISTRY; METALLURGY
    • C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25F—PROCESSES FOR THE ELECTROLYTIC REMOVAL OF MATERIALS FROM OBJECTS; APPARATUS THEREFOR
    • C25F3/00—Electrolytic etching or polishing
    • C25F3/02—Etching
    • C25F3/12—Etching of semiconducting materials
    • C—CHEMISTRY; METALLURGY
    • C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25F—PROCESSES FOR THE ELECTROLYTIC REMOVAL OF MATERIALS FROM OBJECTS; APPARATUS THEREFOR
    • C25F3/00—Electrolytic etching or polishing
    • C25F3/02—Etching
    • C25F3/14—Etching locally
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/308—Chemical or electrical treatment, e.g. electrolytic etching using masks
    • H01L21/3081—Chemical or electrical treatment, e.g. electrolytic etching using masks characterised by their composition, e.g. multilayer masks, materials
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B81—MICROSTRUCTURAL TECHNOLOGY
    • B81B—MICROSTRUCTURAL DEVICES OR SYSTEMS, e.g. MICROMECHANICAL DEVICES
    • B81B2203/00—Basic microelectromechanical structures
    • B81B2203/03—Static structures
    • B81B2203/0315—Cavities
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B81—MICROSTRUCTURAL TECHNOLOGY
    • B81C—PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
    • B81C2201/00—Manufacture or treatment of microstructural devices or systems
    • B81C2201/01—Manufacture or treatment of microstructural devices or systems in or on a substrate
    • B81C2201/0101—Shaping material; Structuring the bulk substrate or layers on the substrate; Film patterning
    • B81C2201/0111—Bulk micromachining
    • B81C2201/0114—Electrochemical etching, anodic oxidation
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B81—MICROSTRUCTURAL TECHNOLOGY
    • B81C—PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
    • B81C2201/00—Manufacture or treatment of microstructural devices or systems
    • B81C2201/01—Manufacture or treatment of microstructural devices or systems in or on a substrate
    • B81C2201/0101—Shaping material; Structuring the bulk substrate or layers on the substrate; Film patterning
    • B81C2201/0111—Bulk micromachining
    • B81C2201/0115—Porous silicon
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B81—MICROSTRUCTURAL TECHNOLOGY
    • B81C—PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
    • B81C2201/00—Manufacture or treatment of microstructural devices or systems
    • B81C2201/01—Manufacture or treatment of microstructural devices or systems in or on a substrate
    • B81C2201/0174—Manufacture or treatment of microstructural devices or systems in or on a substrate for making multi-layered devices, film deposition or growing
    • B81C2201/0176—Chemical vapour Deposition
    • B81C2201/0178—Oxidation

Definitions

  • the invention relates to a method for producing optically transparent areas in a silicon substrate and to a structure formed in a silicon substrate, which can be produced using such a method.
  • silicon oxide has approximately the same optical properties as quartz glass, i.e. is transparent in the visible spectral range.
  • silicon oxide layers are deposited on the silicon substrate in order to produce optically transparent areas in connection with a silicon substrate, which layers are then structured.
  • the known method is problematic in several ways.
  • only optically transparent areas with a relatively small layer thickness can be produced with the known method.
  • the production of such an optically transparent area above a cavity in the silicon substrate is not readily possible, so that the optically transparent areas generated in the context of the known method cannot generally be used as an optically transparent cover of a cavity or fluid channel, as is the case, for example for optical examinations of the smallest amounts of liquid in medicine or analytics.
  • the present invention provides a simple and inexpensive way of producing optically transparent regions in a silicon substrate. with which both optically transparent areas of any thickness and optically transparent areas can be realized over a cavity in the silicon substrate.
  • At least one defined area of the silicon substrate is etched porously.
  • the defined porous area of the silicon substrate is then oxidized.
  • silicon oxide is well suited for the realization of optically transparent areas in a silicon substrate
  • the silicon oxide does not have to be deposited on the substrate surface, but can also be produced in the silicon substrate itself if one is sufficient large area of attack for the oxidation of silicon is created.
  • it is therefore proposed to porously etch the silicon substrate where a transparent area is to be formed. In the course of a subsequent oxidation process, the silicon in the porous region is then converted into the optically transparent silicon oxide.
  • the silicon substrate can be etched porous to any depth without any problems, optically transparent areas can easily be produced in this way, which extend as deep into the silicon substrate and also over the entire thickness of the silicon substrate.
  • porous areas in the silicon substrate can also be easily undercut, so that the method according to the invention also opens up the possibility of realizing optically transparent areas over a cavity in the silicon substrate.
  • electrochemical anodizing proves to be special. orteilhaft.
  • the material is removed on the anodic side of the silicon substrate, ie on the side of the silicon substrate which is in contact with the anode.
  • a medium containing hydrofluoric acid is used as the etching solution.
  • This can be, for example, a hydrofluoric acid-ethanol solution or an aqueous hydrofluoric acid solution, which can also be provided with wetting agents
  • the porosity generated in the etching process is dependent on various parameters, such as the doping of the silicon substrate, the concentration of the etching solution and that on the silicon substrate during the etching process current intensity dependent.
  • the porosity can therefore be influenced in a targeted manner using one or more of these parameters.
  • the porous silicon substrate experiences an increase in volume, which can lead to tension in the silicon substrate and consequently to defects in the structure and / or function of the component produced from the silicon substrate.
  • a residual porosity remaining after the oxidation or an incomplete oxidation of the porous area have a negative effect on the mechanical and optical properties of the transparent area. Therefore, the etching process and the oxidation conditions, especially the duration of the oxidation, should be coordinated.
  • the porosity generated in the defined area is so large that the pores are completely closed by the increase in volume upon complete oxidation without tension occurring in the silicon substrate.
  • a porosity of the silicon substrate of approx. 54% has proven to be suitable for this.
  • etching masks which are applied to at least one surface of the silicon substrate and thus define the areas to be etched, at least in this plane, has proven useful for producing locally delimited porous regions as a preliminary stage of locally delimited optically transparent regions in the silicon substrate.
  • a metal mask as an etching mask proves to be particularly advantageous. In this case the current namely flows perpendicular to the substrate surface, so that there is no undercutting of the metal mask.
  • an additional metal mask also be applied to the other side of the silicon substrate to lead even better ⁇ power lines.
  • a silicon nitride mask or an n + doping can also be used as an etching mask, possibly in conjunction with an additional silicon nitride mask.
  • the optically transparent regions produced with the method according to the invention can advantageously be used as covers for cavities and channels in the silicon substrate.
  • such cavities are created below the defined porous area by continuing the etching process as a cavity etching process under conditions in which the silicon substrate is completely etched out, in particular by the etching process using a less concentrated etching solution and / or is continued with a higher current applied to the silicon substrate.
  • the silicon substrate, which has already been porously etched, is not further degraded in the course of the cavity etching process, since the etching solution does not attack the side walls of the pores, but essentially only on the pore base.
  • the etching solution therefore reaches the base of the pores from where the undercut of the porous area originates.
  • the size of the cavity can then simply be determined via the duration of the cavity etching process.
  • Subsequent oxidation converts the silicon in the porous region into optically transparent silicon oxide.
  • FIGS. 1 a and 1 b show a silicon substrate in two different stages of the method according to the invention.
  • FIGS. 2 to 4 and 5a and 5b show different structures formed in a silicon substrate, which structures have been produced using the method according to the invention.
  • etching mask 3 As is usually used in the etching of a silicon substrate.
  • the material of the etching mask 3 is selected depending on the type of etching process. In connection with an electrochemical etching process, the use of a metal mask proves to be particularly advantageous. In this case, the streamlines run perpendicular to the substrate surface, so that the etching mask cannot be undercut.
  • the use of an n + doping, a silicon nitride mask or a combination of n + doping and a silicon nitride mask is also possible.
  • the silicon substrate 1 in the exemplary embodiment shown here was exposed to an electrochemical etching process in a medium containing hydrofluoric acid.
  • the silicon substrate is positioned between an anode and a cathode in a hydrofluoric acid bath, the contacting of the silicon Substrate is carried out via the hydrofluoric acid bath. Since the material is removed when the current flows on the anodic side of the silicon substrate, here the substrate surface 2, such an etching process is also referred to as anodization.
  • the unprotected areas of the substrate surface 2 are etched porous.
  • the resulting porosity of the silicon substrate was selected in accordance with the subsequent oxidation process so that the increase in volume associated with the oxidation does fill the pores in the porous regions 5 and 6 but does not lead to stresses in the silicon substrate 1.
  • the depth of the porous regions 5 and 6 was determined by the duration of the anodization.
  • Fig. 1 b the silicon substrate 1 is shown after removal of the etching mask and by 3 'of oxidation.
  • the porous silicon in areas 5 and ' 6 is here
  • the silicon substrate 1 can then be processed further, for example by introducing further doping, by metallization, by depositing passivation layers, etc.
  • FIG. process A further silicon substrate 11 is shown in FIG. process according to the invention, as has been explained in connection with FIGS. 1 a and b, two optically transparent areas 15 and 16 have been produced, which extend over the entire thickness of the silicon substrate 11.
  • the anodization was carried out until the silicon substrate 11 was etched porous 30 in its entire thickness in the areas 15 and 16 exposed to the etching attack.
  • the porous regions 15 and 16 thus produced were then completely oxidized.
  • FIG. 3 shows a silicon substrate 21, in which two optically transparent regions 25 and 26 each have a cavity 27 and 28 in the silicon substrate 21 are trained.
  • This structure was also produced with the aid of the method according to the invention by changing the anodizing conditions after the porous etching of the regions 25 and 26 in such a way that the silicon below the porous regions 25 and 26 was completely etched out. For this purpose, the concentration of the hydrofluoric acid solution was reduced and / or the current strength was increased.
  • the size of the cavities 27 and 28 was determined by the duration of the etching attack with changed anodizing conditions.
  • the subsequent oxidation has resulted in a structure in the silicon substrate 21 with cavities 27 and 28 or channels and optically transparent regions 25 and 26 lying above it, with which, for example, optical measurements on liquids with the smallest volumes can be carried out.
  • FIG. 4 shows a silicon substrate 31 in which two optically transparent regions 35 and 36 are likewise formed over a cavity 37 and 38, respectively.
  • the etching process was continued after the etching of the cavities 37 and 38 under the original etching conditions until all of the silicon located under the cavities 37 and 38 had been porously etched.
  • the silicon located under the cavities 37 and 38 can alternatively also be porous etched by reversing the voltage originally applied during anodizing.
  • This variant proves to be particularly advantageous since the silicon substrate is then etched from the underside and the etching medium and also the etched-out silicon do not have to penetrate through the porous layers already produced on the other side of the cavity.
  • the subsequent oxidation has resulted in a structure in the silicon substrate 31, with cavities 37 and 38 or channels which are delimited on two sides by optically transparent regions 25 and 26, so that, for example, optical measurements can be carried out with this structure.
  • the method according to the invention can also be used to produce structures with more complex geometries in a silicon substrate, such as the structure shown in FIGS. 5a and b in plan view and in sectional view.
  • This is a meandering channel 48, which is an oval Cavity 47 starts with an access opening 49 in the substrate surface 42. Both the cavity 47 and the channel 48 are formed in the silicon substrate 41 below optically transparent regions 45 and 46 which merge into one another.
  • the optically transparent regions in a silicon substrate were always produced in a common etching process with subsequent oxidation.
  • the method according to the invention can also be applied several times in succession to a differently masked silicon substrate in order to produce optically transparent regions with different depths and also at different heights in the silicon substrate.
  • a first optically transparent area with a certain depth could be generated by suitable masking of the substrate surface.
  • a further optically transparent area with a different depth could then be created or also a transparent area that is from a previously created depression in the substrate surface.
  • complex depth profiles with transparent areas in a silicon substrate can be realized with the aid of the method according to the invention.

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  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Materials Engineering (AREA)
  • Metallurgy (AREA)
  • Organic Chemistry (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Electrochemistry (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Power Engineering (AREA)
  • Weting (AREA)
  • Optical Measuring Cells (AREA)
  • Optical Integrated Circuits (AREA)

Abstract

L'invention concerne un procédé simple et rentable pour produire des zones optiquement transparentes (5, 6) dans un substrat de silicium (1), ce procédé permettant de réaliser aussi bien des zones optiquement transparentes de n'importe quelle épaisseur que des zones optiquement transparentes au-dessus d'une cavité dans le substrat de silicium. Ce procédé consiste dans un premier temps à attaquer chimiquement au moins une zone définie (5, 6) du substrat de silicium (1) de façon à la rendre poreuse. La zone poreuse définie (5, 6) du substrat de silicium (1) est ensuite oxydée.
PCT/DE2002/000798 2001-04-14 2002-03-05 Procede pour produire des zones optiquement transparentes dans un substrat de silicium WO2002084748A2 (fr)

Priority Applications (4)

Application Number Priority Date Filing Date Title
DE50207649T DE50207649D1 (de) 2001-04-14 2002-03-05 Verfahren zum Erzeugen von optisch transparenten Bereichen in einem Siliziumsubstrat
EP02727197A EP1390988B1 (fr) 2001-04-14 2002-03-05 Procédé pour produire des zones optiquement transparentes dans un substrat de silicium
JP2002581591A JP4253507B2 (ja) 2001-04-14 2002-03-05 シリコン基板に光透過性領域を形成する方法
US10/474,968 US7419581B2 (en) 2001-04-14 2002-03-05 Method for producing optically transparent regions in a silicon substrate

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE10118568A DE10118568A1 (de) 2001-04-14 2001-04-14 Verfahren zum Erzeugen von optisch transparenten Bereichen in einem Siliziumsubstrat
DE10118568.5 2001-04-14

Publications (2)

Publication Number Publication Date
WO2002084748A2 true WO2002084748A2 (fr) 2002-10-24
WO2002084748A3 WO2002084748A3 (fr) 2003-12-04

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PCT/DE2002/000798 WO2002084748A2 (fr) 2001-04-14 2002-03-05 Procede pour produire des zones optiquement transparentes dans un substrat de silicium

Country Status (5)

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US (1) US7419581B2 (fr)
EP (1) EP1390988B1 (fr)
JP (1) JP4253507B2 (fr)
DE (2) DE10118568A1 (fr)
WO (1) WO2002084748A2 (fr)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102004043357B4 (de) * 2004-09-08 2015-10-22 Robert Bosch Gmbh Verfahren zur Herstellung eines mikromechanischen Sensorelements
GB201100967D0 (en) * 2011-01-20 2011-03-02 Univ Swansea Lab on a chip device
DE102014226138A1 (de) 2014-12-16 2016-06-16 Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V. Verfahren zum Herstellen einer Vorrichtung mit einer dreidimensionalen magnetischen Struktur
DE102016215616B4 (de) 2016-08-19 2020-02-20 Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V. Verfahren zum Herstellen einer magnetischen Struktur und Vorrichtung
DE102016215617A1 (de) * 2016-08-19 2018-02-22 Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V. Verfahren zum Herstellen eines Hohlraums mit poröser Struktur

Citations (6)

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Publication number Priority date Publication date Assignee Title
US4680963A (en) * 1985-01-24 1987-07-21 Kabushiki Kaisha Toyota Chuo Kenkyusho Semiconductor flow velocity sensor
FR2670579A1 (fr) * 1990-12-14 1992-06-19 Schlumberger Ind Sa Capteur semi-conducteur de debit.
US5231878A (en) * 1991-12-23 1993-08-03 Ford Motor Company Mass air flow sensor
US5387803A (en) * 1993-06-16 1995-02-07 Kulite Semiconductor Products, Inc. Piezo-optical pressure sensitive switch with porous material
US5461001A (en) * 1993-05-07 1995-10-24 Kulite Semiconductor Products, Inc. Method for making semiconductor structures having environmentally isolated elements
DE19803852A1 (de) * 1998-01-31 1999-08-12 Bosch Gmbh Robert Verfahren zur Herstellung beidseitig oxidierter Siliziumwafer

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Publication number Priority date Publication date Assignee Title
DE4331798B4 (de) * 1993-09-18 2004-08-26 Robert Bosch Gmbh Verfahren zur Herstellung von mikromechanischen Bauelementen
JP2002512737A (ja) * 1997-05-08 2002-04-23 ナノシステムズ，インコーポレイテッド マイクロチャンネルプレートを製造するためのシリコンエッチング方法
CN1118103C (zh) * 1998-10-21 2003-08-13 李韫言 微细加工热辐射红外传感器

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4680963A (en) * 1985-01-24 1987-07-21 Kabushiki Kaisha Toyota Chuo Kenkyusho Semiconductor flow velocity sensor
FR2670579A1 (fr) * 1990-12-14 1992-06-19 Schlumberger Ind Sa Capteur semi-conducteur de debit.
US5231878A (en) * 1991-12-23 1993-08-03 Ford Motor Company Mass air flow sensor
US5461001A (en) * 1993-05-07 1995-10-24 Kulite Semiconductor Products, Inc. Method for making semiconductor structures having environmentally isolated elements
US5387803A (en) * 1993-06-16 1995-02-07 Kulite Semiconductor Products, Inc. Piezo-optical pressure sensitive switch with porous material
DE19803852A1 (de) * 1998-01-31 1999-08-12 Bosch Gmbh Robert Verfahren zur Herstellung beidseitig oxidierter Siliziumwafer

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
LAMMEL G ET AL: "Free-standing, mobile 3D porous silicon microstructures" SENSORS AND ACTUATORS A, ELSEVIER SEQUOIA S.A., LAUSANNE, CH, Bd. 85, Nr. 1-3, 25. August 2000 (2000-08-25), Seiten 356-360, XP004214496 ISSN: 0924-4247 *

Also Published As

Publication number Publication date
EP1390988A2 (fr) 2004-02-25
DE10118568A1 (de) 2002-10-17
WO2002084748A3 (fr) 2003-12-04
JP4253507B2 (ja) 2009-04-15
JP2004524539A (ja) 2004-08-12
DE50207649D1 (de) 2006-09-07
EP1390988B1 (fr) 2006-07-26
US20040155010A1 (en) 2004-08-12
US7419581B2 (en) 2008-09-02

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