WO2001028002A1 - Semiconductor component, controlled by field effect - Google Patents

Semiconductor component, controlled by field effect Download PDF

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Publication number
WO2001028002A1
WO2001028002A1 PCT/EP2000/009962 EP0009962W WO0128002A1 WO 2001028002 A1 WO2001028002 A1 WO 2001028002A1 EP 0009962 W EP0009962 W EP 0009962W WO 0128002 A1 WO0128002 A1 WO 0128002A1
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Prior art keywords
zone
semiconductor component
type
region
line
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PCT/EP2000/009962
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German (de)
French (fr)
Inventor
Jenö Tihanyi
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Infineon Technologies Ag
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Publication of WO2001028002A1 publication Critical patent/WO2001028002A1/en

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/7801—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
    • H01L29/7802—Vertical DMOS transistors, i.e. VDMOS transistors
    • H01L29/7811—Vertical DMOS transistors, i.e. VDMOS transistors with an edge termination structure
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
    • H01L27/06—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
    • H01L27/0611—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region
    • H01L27/0617—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region comprising components of the field-effect type
    • H01L27/0629—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region comprising components of the field-effect type in combination with diodes, or resistors, or capacitors
    • H—ELECTRICITY
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    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
    • H01L29/0607—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
    • H01L29/0611—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices
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    • H01L29/063—Reduced surface field [RESURF] pn-junction structures
    • H01L29/0634—Multiple reduced surface field (multi-RESURF) structures, e.g. double RESURF, charge compensation, cool, superjunction (SJ), 3D-RESURF, composite buffer (CB) structures
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    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/70—Bipolar devices
    • H01L29/72—Transistor-type devices, i.e. able to continuously respond to applied control signals
    • H01L29/739—Transistor-type devices, i.e. able to continuously respond to applied control signals controlled by field-effect, e.g. bipolar static induction transistors [BSIT]
    • H—ELECTRICITY
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    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/7801—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
    • H01L29/7802—Vertical DMOS transistors, i.e. VDMOS transistors
    • H01L29/7803—Vertical DMOS transistors, i.e. VDMOS transistors structurally associated with at least one other device
    • H01L29/7808—Vertical DMOS transistors, i.e. VDMOS transistors structurally associated with at least one other device the other device being a breakdown diode, e.g. Zener diode
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
    • H01L29/0607—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
    • H01L29/0611—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices
    • H01L29/0615—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE]
    • H01L29/0619—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE] with a supplementary region doped oppositely to or in rectifying contact with the semiconductor containing or contacting region, e.g. guard rings with PN or Schottky junction
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
    • H01L29/0607—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
    • H01L29/0611—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices
    • H01L29/0615—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE]
    • H01L29/0619—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE] with a supplementary region doped oppositely to or in rectifying contact with the semiconductor containing or contacting region, e.g. guard rings with PN or Schottky junction
    • H01L29/0623—Buried supplementary region, e.g. buried guard ring
    • H—ELECTRICITY
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    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/402—Field plates
    • H—ELECTRICITY
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    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/402—Field plates
    • H01L29/404—Multiple field plate structures

Definitions

  • the present invention relates to a semiconductor component which has the following features:
  • a semiconductor body with a line zone of a first line type, a connection zone of the first line type, a channel zone of a second line type arranged between the connection zone and the line zone (4) and with a plurality of regions of the second line type arranged spaced apart from one another in the line zone,
  • a control electrode arranged insulated from the channel zone.
  • Such semiconductor components are known from DE 198 15 907 Cl.
  • the n-type vertical MOSFET and lateral MOSFET described therein have a semiconductor body with an n-type conduction zone as the drain zone, in which a multiplicity of p-type regions are arranged. P-type channel zones are also introduced into the semiconductor body, in which n-type connection zones are introduced as source zones.
  • a control electrode is provided, which is mounted on the semiconductor body in an insulated manner from the channel zone.
  • Semiconductor components of this type have good conductivity in the conductive state, ie a low on-resistance R on due to the n-conducting line zone.
  • the blocked state In the blocked state, they have a high dielectric strength, because with increasing dram-source voltage or with increasing space charge zone forming in the conduction zone, the preferably highly doped p-conducting regions and the n-doped regions of the conduction zone surrounding them clear each other out , causing depletion of charge carriers in the line zone.
  • a "weak injector” is provided, for example, as a Schottky contact or as a p-type layer between the line layer and a drain connection of the MOSFET or as a p-type well (s) in the area (s) of the contact zone (s) is trained.
  • the disadvantage here is that in particular the provision of the weak injector between the line zone and the drain connection causes an additional resistance or an additional voltage drop.
  • the object of the present invention is to provide a semiconductor component which can be controlled by a field effect and which has a high dielectric strength in the blocked state and good conductivity in the conductive state and which in particular does not have the disadvantages mentioned above.
  • a semiconductor component which, in addition to the features mentioned at the outset, has an injection region of the second line type which is introduced into the semiconductor body and is connected to a charge source.
  • the charge source supplies charge carriers of the second conductivity type into the conduction zone in order to discharge the regions of the second conductivity type which have been charged after the semiconductor component has been blocked, and thus to ensure good conductivity.
  • the injection region of the first second conductivity type is preferably highly doped and embedded in a highly doped region of the first conductivity type.
  • the injection area of the second line type and the surrounding area of the first line type act as an injector in the manner of a Zener diode.
  • the charge source is preferably a capacitance connected between the injection area and a reference potential. The capacitance is reduced to that when the semiconductor component is blocked
  • the semiconductor component is preferably designed as a vertical MOSFET, with a first connection terminal on a rear side of the semiconductor body being connected to the conduction zone.
  • the channel zone is located in the area of a front side of the semiconductor body, above which the control electrode is arranged.
  • Areas of the second conduction type, which surround the channel zone (s) and are conductively connected to field plates arranged above, are preferably provided in the manner of a trough in the region of the front.
  • the task of these areas of the second conduction type and the field plates is to limit the spread of charge carriers in the lateral direction.
  • the injection area is preferred wise spaced from the channel zones, separated by these areas.
  • FIG. 1 cross section through a section of a semiconductor component according to the invention
  • FIG. 2 equivalent circuit diagram of the semiconductor component according to the invention with a charge source according to a first embodiment
  • Figure 3 equivalent circuit diagram of the semiconductor device according to the invention with a charge source according to a second embodiment.
  • FIG. 1 shows a cross section through a section of an embodiment of a semiconductor component according to the invention, which is essentially designed as a vertical n-channel MOSFET.
  • the semiconductor component has a semiconductor body 2 with an n-doped line zone 4, which extends essentially between a front side and a rear side of the semiconductor body 2, and which functions as a drain zone of the MOSFET.
  • a highly electrically conductive layer 3 is applied for connecting a first connection terminal D (drain connection) of the semiconductor component.
  • P-doped channel zones 8 are introduced into the line zone 4 in the region of the front side of the semiconductor body, in which n + -doped connection zones 6, the source zones of the MOSFET, are in turn introduced.
  • the channel zones 8 and the connecting Zones 6 are short-circuited in the exemplary embodiment by a highly electrically conductive layer 7, preferably made of metal or polysilicon, which serves to connect a second connection terminal S (source connection) of the semiconductor component.
  • Control electrodes 20 are arranged above the channel zones 8, which are separated from the semiconductor body by an insulation layer, preferably an oxide, and which function as gate electrodes of the MOSFET.
  • a large number of p + -doped regions 10 are arranged at a distance from one another in the line zone 4. These highly doped regions 10 can be distributed arbitrarily in the line zone 4 or, as in the embodiment shown, can be arranged on different levels of the semiconductor body and preferably have a spherical, ellipsoidal or similar shape.
  • the semiconductor body is preferably produced by successive deposition of a plurality of epitaxial layers, the regions 10 being formed on the individual epitaxial layers during the production process.
  • At least some of the areas 10 of a plane are preferably connected to one another in a grid-like manner by p + -doped channels 14.
  • Preferably, only the regions 10 are connected to one another, which are arranged in the region below the channel zones 8 or the source zones 6. In FIG. 1, these are the areas which are arranged to the right of the dashed line drawn in for clarification.
  • a p + -doped injection region 16 is inserted into the semiconductor body 2, which is connected to a charge source C.
  • the charge source C is a capacitance C which is connected between the induction area 16 and a reference potential M.
  • the injection region is embedded in an n + -doped tub 18 in the semiconductor body 2.
  • the injection area 16 and the n + -doped tub 18 form a zener diode which is polarized in the reverse direction from the line zone 4 or the n-substrate of the semiconductor body 2 to the capacitance.
  • the semiconductor component according to the embodiment furthermore has at least one p-doped region 30 which is introduced into the semiconductor body 2 and which surrounds the channel zones 8 and the source regions 6 in a ring-like manner.
  • the area 30 and also the “outermost” of the channel zones 8 are connected to field plates 32, which are arranged in an insulation layer Ox above the semiconductor body.
  • An outer field plate 36 which serves as a "channel stopper", is conductively connected to the n-substrate of the semiconductor body 2.
  • the task of the area 30 and the field plates 32, 36 is to limit the spread of the charge carriers of the conduction zone in the lateral direction of the semiconductor body 2.
  • the injection region 16 or the zener diode 16, 18 is arranged separated from the channel zones 8 or the source regions by the p-region 30 or the field plates 32, 36. According to a further embodiment, which is not shown in any more detail, it is provided that the injection area be arranged between the channel zones, the injection area then having to be completely surrounded by a corresponding p-area and field plate structure.
  • an n-type channel is formed in the channel zone 8, which channel has a positive drain-source Voltage allows current to flow.
  • the resistance of the line zone 4 is at voltages below the
  • the dielectric strength of the semiconductor component is dependent on the doping of the line zone 4. If the channel in channel zone 8 blocks when the control potential is removed and a large dram-source voltage builds up, for example a few hundred volts when the semiconductor component is used to control an ignition coil in a motor vehicle or a switching power supply, then spreads from a space charge zone from the front of the semiconductor body, which zone gradually detects the p + regions 10 arranged in the individual levels. The p-regions 10 and the surrounding n-regions of the line zone 4 clear each other, so that there is a depletion of La ⁇ ungstrager in the line zone 4, which leads to a high dielectric strength. In this process, the capacitance C via the Zener diode 16, 18 to the potential at the dram connection D minus the breakdown voltage of the
  • Zener diode charged While the interconnected p regions 10 of a plane are at the same potential, the potential of the unconnected p regions 10 decreases in the lateral direction of the semiconductor body.
  • the semiconductor component is subsequently made conductive by applying a drive voltage to the gate electrode G, the p-regions 10 initially remain charged and the conduction zone 4 is depleted of charge carriers.
  • the charge stored in the capacitance C is injected into the conduction zone 4 via the zener diode 16, 18 polarized in the direction of flow in order to discharge the p + regions 10 and to restore the full conductivity of the conduction zone 4. This process takes place quickly after switching on the semiconductor component.
  • the injector according to the invention with the zener diode 16, 18 does not cause any additional voltage drop over the load path, i.e. the dram-source path, the MOSFET.
  • FIG. 2 shows an equivalent circuit diagram of the semiconductor component according to the invention, which is used as an interconnection of a MOSFET T represents a Zener diode Z, the Zener diode being connected to the substrate of the MOSFET M. Between a terminal 34 and a reference potential M, the capacitance C is connected, which is charged via the substrate and the Zener diode Z when the MOSFET is off and releases the stored charge back to the substrate when the MOSFET is conductive.
  • FIG. 3 The equivalent circuit diagram of a further embodiment of the semiconductor component according to the invention is shown in FIG. 3.
  • the terminal 34 is connected via a resistor R and a diode D to an auxiliary potential U +, with charge being released to the substrate or p-charge carriers being injected into the substrate in order to discharge the p-regions 10 when the MOSFET to lead.

Abstract

The invention relates to a semiconductor component, comprising the following features: a semiconductor body (2) with a conduction region (4) of a first conductivity type, a connection region (6) of the first conductivity type, a channel region (8) of a second conductivity type, located between the connection region (6) and the conduction region (4) and a plurality of zones (10, 12) of the second conductivity type which are interspaced in the conduction region, a control electrode (20), insulated in relation to the channel region (8), an injection region (16) of the second conductivity type which is located in the semiconductor body (2) and is connected to a charge source.

Description

Beschreibungdescription
Durch Feldeffekt steuerbares HalbleiterbauelementSemiconductor component controllable by field effect
Die vorliegende Erfindung betrifft ein Halbleiterbauelement das folgende Merkmale aufweist:The present invention relates to a semiconductor component which has the following features:
- einen Halbleiterkorper mit einer Leitungszone eines ersten Leitungstyps, einer Anschlußzone des ersten Leitungstyps, ei- ner zwischen der Anschlußzone und der Leitungszone (4) angeordneten Kanalzone eines zweiten Leitungstyps und mit einer Vielzahl von beabstandet zueinander in der Leitungszone angeordneten Bereichen des zweiten Leitungstyps,a semiconductor body with a line zone of a first line type, a connection zone of the first line type, a channel zone of a second line type arranged between the connection zone and the line zone (4) and with a plurality of regions of the second line type arranged spaced apart from one another in the line zone,
- eine isoliert gegenüber der Kanalzone angeordnete Steuerelektrode .- A control electrode arranged insulated from the channel zone.
Derartige Halbleiterbauelemente sind aus der DE 198 15 907 Cl bekannt. Die darin beschriebenen n-leitenden Vertikal-MOSFET und Lateral-MOSFET weisen einen Halbleiterkorper mit einer n- leitenden Leitungszone als Drain-Zone auf, m der eine Vielzahl p-leitender Gebiete angeordnet sind. In den Halbleiterkorper sind weiterhin p-leitende Kanalzonen eingebracht, in denen n-leitende Anschlußzonen als Source-Zonen eingebracht sind. Zur Ansteuerung des MOSFET ist eine Steuerelektrode vorgesehen, die isoliert gegen die Kanalzone auf dem Halbleiterkorper angebracht ist. Derartige Halbleiterbauelemente besitzen in leitendem Zustand eine gute Leitfähigkeit, d.h. einen geringen Einschaltwiderstand Ron bedingt durch die n-lei- tende Leitungszone. In gesperrtem Zustand besitzen sie eine hohe Spannungsfestigkeit, weil sich mit zunehmender Dram- Source-Spannung bzw. mit zunehmender sich m der Leitungszone ausbildender Raumladungszone die vorzugsweise hocndotierten p-leitenden Gebiete und die diese umgebenden n-dotierten Be- reiche der Leitungszone sich gegenseitig ausräumen, wodurch eine Verarmung an Ladungsträgern in der Leitungszone stattfindet . Um zu verhindern, daß die ausgeräumten Zonen um die p-lei- tenden Gebiete erhalten bleiben bzw. daß die p-leitenden Gebiete aufgeladen bleiben, wenn die Drain-Source-Spannung abnimmt und der MOSFET wieder leiten soll, ist bei dem bekann- ten Halbleiterbauelement ein "schwacher Injektor" vorgesehen, der beispielsweise als Schottky-Kontakt oder als p-leitende Schicht zwischen die Leitungsschicht und einen Drain-Anschluß des MOSFET oder als p-leitende Wanne (n) in dem/den Bereichten) der Kontaktzone (n) ausgebildet ist. Durch den In- jektor werden im leitenden Zustand des MOSFET Löcher oder p- Ladungstrager in die Leitungszone injiziert, die die p-leitenden Gebiete entladen und so eine gute Leitfähigkeit der Leitungszone wiederherstellen.Such semiconductor components are known from DE 198 15 907 Cl. The n-type vertical MOSFET and lateral MOSFET described therein have a semiconductor body with an n-type conduction zone as the drain zone, in which a multiplicity of p-type regions are arranged. P-type channel zones are also introduced into the semiconductor body, in which n-type connection zones are introduced as source zones. To control the MOSFET, a control electrode is provided, which is mounted on the semiconductor body in an insulated manner from the channel zone. Semiconductor components of this type have good conductivity in the conductive state, ie a low on-resistance R on due to the n-conducting line zone. In the blocked state, they have a high dielectric strength, because with increasing dram-source voltage or with increasing space charge zone forming in the conduction zone, the preferably highly doped p-conducting regions and the n-doped regions of the conduction zone surrounding them clear each other out , causing depletion of charge carriers in the line zone. In order to prevent the cleared-out zones around the p-conducting regions from being preserved or from the p-conducting regions being charged when the drain-source voltage decreases and the MOSFET is to conduct again, this is known Semiconductor component a "weak injector" is provided, for example, as a Schottky contact or as a p-type layer between the line layer and a drain connection of the MOSFET or as a p-type well (s) in the area (s) of the contact zone (s) is trained. When the MOSFET is in the conductive state, holes or p-type charge carriers are injected into the line zone by the injector, which discharge the p-type regions and thus restore good conductivity in the line zone.
Nachteilig wirkt sich dabei aus, daß insbesondere das Vorsehen des schwachen Injektors zwischen der Leitungszone und dem Drain-Anschluß einen zusatzlichen Widerstand bzw. einen zusätzlichen Spannungsabfall hervorruft.The disadvantage here is that in particular the provision of the weak injector between the line zone and the drain connection causes an additional resistance or an additional voltage drop.
Der vorliegenden Erfindung liegt die Aufgabe zugrunde, ein durch Feldeffekt steuerbares Halbleiterbauelement zur Verfugung zu stellen, das in gesperrtem Zustand eine hohe Spannungsfestigkeit und in leitendem Zustand eine gute Leitfähigkeit aufweist und das insbesondere die oben genannten Nach- teile nicht aufweist.The object of the present invention is to provide a semiconductor component which can be controlled by a field effect and which has a high dielectric strength in the blocked state and good conductivity in the conductive state and which in particular does not have the disadvantages mentioned above.
Diese Aufgabe wird durch ein Halbleiterbauelement gelost, das neben den eingangs genannten Merkmalen ein in den Halbleiterkorper eingebrachtes Injektionsgebiet des zweiten Lei- tungstyps aufweist, das an eine Ladungsquelle angeschlossen is .This object is achieved by a semiconductor component which, in addition to the features mentioned at the outset, has an injection region of the second line type which is introduced into the semiconductor body and is connected to a charge source.
Wenn das Halbleiterbauelement leiten soll, liefert die Ladungsquelle Ladungsträger des zweiten Leitungstyps in die Leitungszone, um die nach dem Sperren des Halbleiterbauelements aufgeladenen Gebiete des zweiten Leitungstyps zu entladen und so eine gute Leitfähigkeit zu gewahrleisten. Das Injektionsgebiet des ersten zweiten Leitungstyps ist vorzugsweise hochdotiert und in ein hochdotiertes Gebiet des ersten Leitungstyps eingebettet. Das Injektionsgebiet des zwei- ten Leitungstyps und das umgebende des ersten Leitungstyps Gebiet wirken als Injektor nach Art einer Zenerdiode.If the semiconductor component is to conduct, the charge source supplies charge carriers of the second conductivity type into the conduction zone in order to discharge the regions of the second conductivity type which have been charged after the semiconductor component has been blocked, and thus to ensure good conductivity. The injection region of the first second conductivity type is preferably highly doped and embedded in a highly doped region of the first conductivity type. The injection area of the second line type and the surrounding area of the first line type act as an injector in the manner of a Zener diode.
Die Ladungsquelle ist vorzugsweise eine zwischen das Injektionsgebiet und ein Bezugspotential geschaltete Kapazität. Die Kapazität wird bei sperrendem Halbleiterbauelement auf dasThe charge source is preferably a capacitance connected between the injection area and a reference potential. The capacitance is reduced to that when the semiconductor component is blocked
Potential der an die Leitungszone angeschlossenen Klemme des Halbleiterbauelements abzüglich der Durchbruchspannung der Zenerdiode aufgeladen. Bei leitendem Halbleiterbauelement wird die in der Kapazität gespeicherte Ladung in die Lei- tungszone injiziert, um die Gebiete des zweiten Leitungstyps zu entladen und eine gute Leitfähikeit zu erreichen. Die volle Leitfähigkeit wird bereits kurz nach Anlegen einer entsprechenden Steuerspannung an die Steuerelektrode erreicht.Potential of the terminal of the semiconductor component connected to the line zone minus the breakdown voltage of the zener diode is charged. In the case of a conductive semiconductor component, the charge stored in the capacitance is injected into the conduction zone in order to discharge the areas of the second conduction type and to achieve good conductivity. Full conductivity is reached shortly after a corresponding control voltage is applied to the control electrode.
Gemäß einer weiteren Ausführungsform ist vorgesehen, das Injektionsgebiet, vorzugsweise über einen Widerstand und eine Diode an ein Hilfspotential anzulegen.According to a further embodiment, it is provided to apply the injection area to an auxiliary potential, preferably via a resistor and a diode.
Das Halbleiterbauelement ist vorzugsweise als vertikaler MOSFET ausgebildet, wobei eine erste Anschlußklemme an einer Rückseite des Halbleiterkörpers an die Leitungszone angeschlossen ist. Die Kanalzone befindet sich dabei im Bereich einer Vorderseite des Halbleiterkörpers, über der die Steuerelektrode angeordnet ist. Vorzugsweise sind wannenartig im Bereich der Vorderseite angeordnete, die Kanalzone (n) umgebende Gebiete des zweiten Leitungstyps vorgesehen, die leitend mit darüber angeordneten Feldplatten verbunden sind.The semiconductor component is preferably designed as a vertical MOSFET, with a first connection terminal on a rear side of the semiconductor body being connected to the conduction zone. The channel zone is located in the area of a front side of the semiconductor body, above which the control electrode is arranged. Areas of the second conduction type, which surround the channel zone (s) and are conductively connected to field plates arranged above, are preferably provided in the manner of a trough in the region of the front.
Aufgabe dieser Gebiete des zweiten Leitungstyps und der Feld- platten ist es, die Ausbreitung von Ladungsträgern in lateraler Richtung zu begrenzen. Das Injektionsgebiet ist Vorzugs- weise beabstandet zu den Kanalzonen, getrennt durch diese Gebiete angeordnet.The task of these areas of the second conduction type and the field plates is to limit the spread of charge carriers in the lateral direction. The injection area is preferred wise spaced from the channel zones, separated by these areas.
Die vorliegende Erfindung wird nachfolgend in Ausfuhrungsbei- spielen anhand von Figuren naher erläutert. Es zeigen:The present invention is explained in more detail below in exemplary embodiments with reference to figures. Show it:
Figur 1: Querschnitt durch einen Ausschnitt eines erfindungsgemaßen Halbleiterbauelements;FIG. 1: cross section through a section of a semiconductor component according to the invention;
Figur 2: Ersatzschaltbild des erfindungsgemaßen Halbleiter- bauelements mit einer Ladungsquelle gemäß einer ersten Ausfuhrungsform;FIG. 2: equivalent circuit diagram of the semiconductor component according to the invention with a charge source according to a first embodiment;
Figur 3: Ersatzschaltbild des erfindungsgemaßen Halbleiter- bauelements mit einer Ladungsquelle gemäß einer zweiten Ausfuhrungsform.Figure 3: equivalent circuit diagram of the semiconductor device according to the invention with a charge source according to a second embodiment.
In den Figuren bezeichnen, sofern nicht anders angegeben, gleiche Bezugszeichen gleiche Teile und Bereiche mit gleicher Bedeutung.Unless otherwise stated, the same reference symbols in the figures denote the same parts and areas with the same meaning.
Figur 1 zeigt einen Querschnitt durch einen Ausschnitt einer Ausfuhrungsform eines erfindungsgemaßen Halbleiterbauele- ments, aas im Wesentlichen als vertikaler n-Kanal-MOSFET aus- gebildet ist. Das Halbleiterbauelement weist einen Halbleiterkorper 2 mit einer n-dotierten Leitungszone 4 aufweist, die sich im Wesentlichen zwischen einer Vorderseite und einer Ruckseite des Halbleiterkorpers 2 erstreckt, und die als Drain-Zone des MOSFET funktioniert. An der Ruckseite des Halbleiterkorpers 2 ist eine gut elektrisch leitende Schicht 3, beispielsweise aus Metall oder einem n+-dotιerten Halblei- termateπal zum Anschluß einer ersten Anschlußklemme D (Drain-Anschluß) des Halbleiterbauelements aufgebracht. In die Leitungszone 4 sind im Bereich der Vorderseite des Halb- leiterkorpers 2 p-dotierte Kanalzonen 8 eingebracht, in denen wiederum n+-dotιerte Anschlußzonen 6, die Source-Zonen des MOSFET, eingebracht sind. Die Kanalzonen 8 unα die Anschluß- zonen 6 sind n dem Ausfuhrungsbeispiel durch eine gut elektrisch leitende Schicht 7, vorzugsweise aus Metall oder Poly- silizium, die zum Anschluß einer zweiten Anschlußklemme S (Source-Anschluß) des Halbleiterbauelements dient, kurzge- schlössen. Über den Kanalzonen 8 sind Steuerelektroden 20 angeordnet, die gegenüber dem Halbleiterkorper durch eine Iso- lationsschicht , vorzugsweise ein Oxid, getrennt sind und die als Gate-Elektroden des MOSFET funktionieren.FIG. 1 shows a cross section through a section of an embodiment of a semiconductor component according to the invention, which is essentially designed as a vertical n-channel MOSFET. The semiconductor component has a semiconductor body 2 with an n-doped line zone 4, which extends essentially between a front side and a rear side of the semiconductor body 2, and which functions as a drain zone of the MOSFET. On the rear side of the semiconductor body 2, a highly electrically conductive layer 3, for example made of metal or an n + -doped semiconductor material, is applied for connecting a first connection terminal D (drain connection) of the semiconductor component. P-doped channel zones 8 are introduced into the line zone 4 in the region of the front side of the semiconductor body, in which n + -doped connection zones 6, the source zones of the MOSFET, are in turn introduced. The channel zones 8 and the connecting Zones 6 are short-circuited in the exemplary embodiment by a highly electrically conductive layer 7, preferably made of metal or polysilicon, which serves to connect a second connection terminal S (source connection) of the semiconductor component. Control electrodes 20 are arranged above the channel zones 8, which are separated from the semiconductor body by an insulation layer, preferably an oxide, and which function as gate electrodes of the MOSFET.
In der Leitungszone 4 sind eine Vielzahl p+-dotιerter Gebiete 10 beabstandet zueinander angeordnet. Diese hochdotieren Gebiete 10 können willkürlich in der Leitungszone 4 verteilt oder, wie in dem αargestellten Ausfuhrungsbeispiel, m verschiedenen Ebenen des Halbleiterkorpers angeordnet sein und weisen vorzugsweise eine kugelförmige, ellipsoidformige oder ähnliche Form auf. Der Halbleiterkorper ist vorzugsweise durch aufeinanderfolgendes Abscheiden mehrere Epitaxieschicn- ten hergestellt, wobei αie Gebiete 10 wahrend des Herstel- lungsprozesses auf den einzelnen Epitaxieschichten gebildet werden.A large number of p + -doped regions 10 are arranged at a distance from one another in the line zone 4. These highly doped regions 10 can be distributed arbitrarily in the line zone 4 or, as in the embodiment shown, can be arranged on different levels of the semiconductor body and preferably have a spherical, ellipsoidal or similar shape. The semiconductor body is preferably produced by successive deposition of a plurality of epitaxial layers, the regions 10 being formed on the individual epitaxial layers during the production process.
Wenigstens einige der Gebiete 10 einer Ebene sind vorzugsweise untereinander gitterartig durch p+-dotιerte Kanäle 14 miteinander verbunden. Vorzugsweise sind nur die Gebiete 10 mit- einander verbunden, die im Bereich unter den Kanalzonen 8, bzw. den Source-Zonen 6 angeordnet sind. In Figur 1 sind dies die Gebiete, die rechts der zur Verdeutlichung eingezeichneten gestrichelten Linie angeordnet sind.At least some of the areas 10 of a plane are preferably connected to one another in a grid-like manner by p + -doped channels 14. Preferably, only the regions 10 are connected to one another, which are arranged in the region below the channel zones 8 or the source zones 6. In FIG. 1, these are the areas which are arranged to the right of the dashed line drawn in for clarification.
In den Halbleiterkorper 2 ist m dem Ausfuhrungsbeispiel im Bereich der Vorderseite ein p+-dotιertes Injektionsgebiet 16 eingeoracht, das an eine Ladungsquelle C angeschlossen ist. Die Ladungsquelle C ist in dem Ausfuhrungsbeispiel eine Kapazität C, die zwischen dem In ektionsgebiet 16 und einem Be- zugspotential M angeschlossen ist. Das Injektionsgebiet ist n eine n+-dotιerte Wanne 18 in dem Halbleiterkorper 2 eingebettet. Das Injektionsgebiet 16 und die n+-dotιerte Wanne 18 bilden eine Zenerdiode, die von der Leitungszone 4 bzw. dem n-Substrat des Halbleiterkorpers 2 zu der Kapazität in Sper- richtung gepolt ist.In the exemplary embodiment in the area of the front, a p + -doped injection region 16 is inserted into the semiconductor body 2, which is connected to a charge source C. In the exemplary embodiment, the charge source C is a capacitance C which is connected between the induction area 16 and a reference potential M. The injection region is embedded in an n + -doped tub 18 in the semiconductor body 2. The injection area 16 and the n + -doped tub 18 form a zener diode which is polarized in the reverse direction from the line zone 4 or the n-substrate of the semiconductor body 2 to the capacitance.
Das Halbleiterbauelement gemäß der Ausfuhrungsform weist weiterhin wenigstens ein p-dotiertes Gebiet 30 auf, das in den Halbleiterkorper 2 eingebracht ist und das die Kanalzonen 8 bzw. die Source-Bereiche 6 ringartig umgibt. Das Gebiet 30 und auch die "äußerste" der Kanalzonen 8 sind an Feldplatten 32 angeschlossen, die in einer Isolationsschicht Ox über dem Halbleiterkorper angeordnet sind. Eine äußerte Feldplatte 36, die als "Channel stopper" dient, ist leitend mit dem n- Substrat des Halbleiterkorpers 2 verbunden. Aufgabe des Gebiets 30 und der Feldplatten 32, 36 ist es, die Ausbreitung der Ladungsträger der Leitungszone in lateraler Richtung des Halbleiterkorpers 2 zu begrenzen.The semiconductor component according to the embodiment furthermore has at least one p-doped region 30 which is introduced into the semiconductor body 2 and which surrounds the channel zones 8 and the source regions 6 in a ring-like manner. The area 30 and also the “outermost” of the channel zones 8 are connected to field plates 32, which are arranged in an insulation layer Ox above the semiconductor body. An outer field plate 36, which serves as a "channel stopper", is conductively connected to the n-substrate of the semiconductor body 2. The task of the area 30 and the field plates 32, 36 is to limit the spread of the charge carriers of the conduction zone in the lateral direction of the semiconductor body 2.
Das Injektionsgebiet 16 bzw. die Zenerdiode 16, 18 ist getrennt durch das p-Gebiet 30 bzw. die Feldplatten 32, 36, von den Kanalzonen 8 bzw. den Source-Bereichen angeordnet. Gemäß einer weiteren nicht naher dargstellten Ausfuhrungsform ist vorgesehen, das Injektionsgebiet zwischen den Kanalzonen anzuordnen, wobei das Injektionsgebiet dann vollständig von einer entsprechenden p-Gebiet- und Feldplattenstruktur umgeDen sein mußte.The injection region 16 or the zener diode 16, 18 is arranged separated from the channel zones 8 or the source regions by the p-region 30 or the field plates 32, 36. According to a further embodiment, which is not shown in any more detail, it is provided that the injection area be arranged between the channel zones, the injection area then having to be completely surrounded by a corresponding p-area and field plate structure.
Die Funktionsweise des erfindungsgemaßen Halbleiterbauele- ments wird im folgenden kurz beschrieben.The mode of operation of the semiconductor component according to the invention is briefly described below.
Bei Anlegen eines positiven Potentials an die Gate-Elektrode G, bzw. bei Anlegen einer positiven Spannung zwischen der Gate-Elektrode und dem Source-Anschluß S bildet sich in der Kanalzone 8 ein n-leitender Kanal aus, der bei positiver Drain- Source-Spannung einen Stromfluß ermöglicht. Der Widerstand der Leitungszone 4 ist bei Spannungen, die unterhalb derWhen a positive potential is applied to the gate electrode G, or when a positive voltage is applied between the gate electrode and the source terminal S, an n-type channel is formed in the channel zone 8, which channel has a positive drain-source Voltage allows current to flow. The resistance of the line zone 4 is at voltages below the
Spannungsfestigkeit des Halbleiterbauelements liegen abhangig von der Dotierung der Leitungszone 4. Sperrt der Kanal in der Kanalzone 8 bei Wegnehmen des Ansteuerpotentials und baut sich eine große Dram-Source-Spannung, beispielsweise einige hundert Volt bei Verwendung des Halb- leiterbauelements zur Ansteuerung einer Zündspule in einem Kraftfahrzeug oder einem Schaltnetzteil, auf, so breitet sich ausgehend von der Vorderseite des Halbleiterkorpers eine Raumladungszone aus, die nach und nach die in den einzelnen Ebenen angeordneten p+-Gebιete 10 erfasst. Dabei räumen sich die p-Gebiete 10 und die diese umgebenden n-Bereiche der Leitungszone 4 gegenseitig aus, so daß es zu einer Verarmung an Laαungstragern in der Leitungszone 4 kommt, was zu einer hoher Spannungsfestigkeit fuhrt. Bei diesen Vorgang wird die Kapazität C über die Zenerdiode 16, 18 auf das Potential an dem Dram-Anschluß D abzuglich der Durchbruchspannung derThe dielectric strength of the semiconductor component is dependent on the doping of the line zone 4. If the channel in channel zone 8 blocks when the control potential is removed and a large dram-source voltage builds up, for example a few hundred volts when the semiconductor component is used to control an ignition coil in a motor vehicle or a switching power supply, then spreads from a space charge zone from the front of the semiconductor body, which zone gradually detects the p + regions 10 arranged in the individual levels. The p-regions 10 and the surrounding n-regions of the line zone 4 clear each other, so that there is a depletion of Laαungstrager in the line zone 4, which leads to a high dielectric strength. In this process, the capacitance C via the Zener diode 16, 18 to the potential at the dram connection D minus the breakdown voltage of the
Zenerdiode aufgeladen. Wahrend sich die miteinander verbundenen p-Gebiete 10 einer Ebene auf gleichem Potential befinden, nimmt das Potential der nicht verbundenen p-Geöiete 10 in lateraler Richtung des Halbleiterkorpers ab.Zener diode charged. While the interconnected p regions 10 of a plane are at the same potential, the potential of the unconnected p regions 10 decreases in the lateral direction of the semiconductor body.
Wird das Halbleiterbauelement anschließend durch Anlegen einer Ansteuerspannung an die Gate-Elektrode G leitend gemacht, bleiben die p-Gebiete 10 zunächst aufgeladen und die Leitungszone 4 an Ladungsträgern verarmt. Jedoch wird beim Ein- schalten die in der Kapazität C gespeicherte Ladung über die in Flußrichtung gepolte Zenerdiode 16, 18 in die Leitungszone 4 injiziert um die p+-Gebιete 10 zu entladen und die volle Leitfähigkeit der Leitungszone 4 wiederherzustellen. Dieser Vorgang erfolgt schnell nach dem Einschalten des Halbleiter- bauelements.If the semiconductor component is subsequently made conductive by applying a drive voltage to the gate electrode G, the p-regions 10 initially remain charged and the conduction zone 4 is depleted of charge carriers. However, when switched on, the charge stored in the capacitance C is injected into the conduction zone 4 via the zener diode 16, 18 polarized in the direction of flow in order to discharge the p + regions 10 and to restore the full conductivity of the conduction zone 4. This process takes place quickly after switching on the semiconductor component.
Der erfindungsgemaße Injektor mit der Zenerdiode 16, 18 verursacht keinen zusatzlichen Spannungsabfall über der Laststrecke, d.h. der Dram-Source-Strecke, des MOSFET.The injector according to the invention with the zener diode 16, 18 does not cause any additional voltage drop over the load path, i.e. the dram-source path, the MOSFET.
Figur 2 zeigt ein Ersatzschaltbild des erfindungsgemaßen Halbleiterbauelements, die sicn als Verschaltung eines MOSFET T mit einer Zenerdiode Z darstellt, wobei die Zenerdiode an das Substrat des MOSFET M angeschlossen ist. Zwischen einer Klemme 34 und einem Bezugspotential M ist die Kapazität C geschaltet, die bei sperrendem MOSFET über das Substrat und die Zenerdiode Z aufgeladen wird und bei leitendem MOSFET die gespeicherte Ladung wieder an das Substrat abgibt.FIG. 2 shows an equivalent circuit diagram of the semiconductor component according to the invention, which is used as an interconnection of a MOSFET T represents a Zener diode Z, the Zener diode being connected to the substrate of the MOSFET M. Between a terminal 34 and a reference potential M, the capacitance C is connected, which is charged via the substrate and the Zener diode Z when the MOSFET is off and releases the stored charge back to the substrate when the MOSFET is conductive.
Das Ersatzschaltbild einer weiteren Ausfuhrungsform des er- findungsgemaßen Halbleiterbauelements ist in Figur 3 darge- stellt. Dabei ist die Klemme 34 über einen Widerstand R und eine Diode D an ein Hilfspotential U+ angeschlossen, wobei Ladung an das Substrat abgegeben wird, bzw. p-Ladungstrager in das Substrat injiziert werden, um die p-Gebiete 10 zu entladen, wenn der MOSFET leiten soll. The equivalent circuit diagram of a further embodiment of the semiconductor component according to the invention is shown in FIG. 3. Here, the terminal 34 is connected via a resistor R and a diode D to an auxiliary potential U +, with charge being released to the substrate or p-charge carriers being injected into the substrate in order to discharge the p-regions 10 when the MOSFET to lead.

Claims

Patentansprüche claims
1. Halbleiterbauelement das folgende Merkmale aufweist:1. Semiconductor component which has the following features:
5 - einen Halbleiterkorper (2) mit einer Leitungszone (4) eines ersten Leitungstyps, einer Anschlußzone (6) des ersten Leitungstyps, einer zwischen der Anschlußzone (6) und der Leitungszone (4) angeordneten Kanalzone (6) eines zweiten Leitungstyps und mit einer Vielzahl von beabstandet zueinander 0 in der Leitungszone angeordneten Bereichen (10, 12) des zweiten Leitungstyps,5 - a semiconductor body (2) with a line zone (4) of a first line type, a connection zone (6) of the first line type, a channel zone (6) of a second line type arranged between the connection zone (6) and the line zone (4) and with one A plurality of regions (10, 12) of the second conduction type which are arranged at a distance from one another in the conduction zone,
- eine isoliert gegenüber der Kanalzone (8) angeordnete Steuerelektrode (20) , 5 g e k e n n z e i c h n e t durch folgendes weiteres Merkmal:- A control electrode (20), 5 isolated from the channel zone (8), has the following additional feature:
ein m dem Halbleiterkorper (2) angeordnetes Injektionsgebiet 20 (16) des zweiten Leitungstyps, das an eine Ladungsquelle angeschlossen ist.an injection region 20 (16) of the second conductivity type which is arranged in the semiconductor body (2) and is connected to a charge source.
2. Halbleiterbauelement nach einem der vorangehende Ansprüche d a d u r c h g e k e n n z e i c h n e t, daß das Injekti-2. Semiconductor component according to one of the preceding claims d a d u r c h g e k e n n z e i c h n e t that the injection
-5 onsgebiet (16) wenigstens teilweise von einem hochdotierten Gebiet (18) des ersten Leitungstyps umgeben ist.-5 onsgebiet (16) is at least partially surrounded by a highly doped region (18) of the first conductivity type.
3. Halbleiterbauelement nach einem der vorangehenden Ansprüche,3. Semiconductor component according to one of the preceding claims,
30 d a d u r c h g e k e n n z e i c h n e t, daß jeweils einige der Bereiche (10) des zweiten Leitungstyps durch Kanäle (14) des zweiten Leitungstyps miteinander verbunden sind.30 so that some of the areas (10) of the second conduction type are connected to one another by channels (14) of the second conduction type.
4. Halbleiterbauelement nach einem der vorangehenden Anspru- 35 ehe, d a d u r c h g e k e n n z e i c h n e t, daß die Kanalzone (8) als Wanne des zweiten Leitungstyps im Bereich einer Oberfläche des Halbleiterkorpers (2) ausgebildet ist in der die Anschlußzone (6) als Wanne des ersten Leitungstyps ausgebildet ist.4. Semiconductor component according to one of the preceding claims 35, characterized in that the channel zone (8) as a trough of the second conductivity type in the region of a Surface of the semiconductor body (2) is formed in which the connection zone (6) is designed as a trough of the first conductivity type.
5. Halbleiterbauelement einem der vorangehenden Ansprüche, d a d u r c h g e k e n n z e i c h n e t, daß die Ladungsquelle (C, M; D, R, U+) eine zwischen das Injektionsgebiet (16) und ein Bezugspotential (M) geschaltete Kapazität (C) ist.5. Semiconductor component according to one of the preceding claims, that the charge source (C, M; D, R, U +) is a capacitance (C) connected between the injection region (16) and a reference potential (M).
6. Halbleiterbauelement nach einem der vorangehenden Ansprüche, d a d u r c h g e k e n n z e i c h n e t, daß die Ladungsquelle (C, M; D, R, U+) eine zwischen das Injektionsgebiet (16) und ein Versorgungspotential (U+) geschaltete Reihenschaltung einer Diode (D) und eines Widerstands (R) ist.6. Semiconductor component according to one of the preceding claims, characterized in that the charge source (C, M; D, R, U +) a series connection of a diode (D) and a resistor (R) between the injection region (16) and a supply potential (U +) ) is.
7. Halbleiterbauelement nach einem der vorangehenden Ansprüche, d a d u r c h g e k e n n z e i c h n e t, daß wenigstens ein Gebiet (30) des zweiten Leitungstyps, das an eine oberhalb des Halbleiterkorpers (2) angeordnete Feldplatte (32) angeschlossen ist, zwischen der Kanalzone (8) und dem Injektionsgebiet (16) angeordnet ist.7. Semiconductor component according to one of the preceding claims, characterized in that at least one region (30) of the second conductivity type, which is connected to a field plate (32) arranged above the semiconductor body (2), between the channel zone (8) and the injection region (16 ) is arranged.
8. Halbleiterbauelement nach einem der vorangehenden Ansprüche, d a d u r c h g e k e n n z e i c h n e t, daß zwischen der Kanalzone (8) und dem Injektionsgebiet (16) auf dem Halblei- terkörper (2) wenigstens eine an die Leitungszone (4) angeschlossene Feldplatte (36) angeordnet ist. 8. Semiconductor component according to one of the preceding claims, d a d u r c h g e k e n n z e i c h n e t that between the channel zone (8) and the injection region (16) on the semiconductor body (2) at least one field plate (36) connected to the line zone (4) is arranged.
PCT/EP2000/009962 1999-10-11 2000-10-10 Semiconductor component, controlled by field effect WO2001028002A1 (en)

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DE10108046B4 (en) * 2001-02-20 2006-10-19 Infineon Technologies Ag Semiconductor device
DE10145723A1 (en) * 2001-09-17 2003-04-10 Infineon Technologies Ag Semiconductor structure

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JPH05283702A (en) * 1992-04-03 1993-10-29 Hitachi Ltd Composite control type semiconductor device and power converter using thereof
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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7872300B2 (en) 2005-05-13 2011-01-18 Infineon Technologies Ag Power semiconductor component with plate capacitor structure

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