DE102004052153B4 - Vertical power semiconductor device with gate on the back and method of making the same - Google Patents

Abstract

A vertical power semiconductor device (1) comprising: - a drift zone (9) of a first conductivity type, - a MOS structure (12) arranged on top of the drift zone (9), - wherein the MOS structure - a plurality of Body zones (13) of the second conductivity type, which extend in the region of the surface of the drift zone (9), - a plurality of source zones (14) of the first conductivity type, which are introduced into the body zone (13), - and a plurality of electrically conductive Gates (15), which are isolated from the body zone (13) by means of a gate oxide (17) and which, when appropriately controlled, form a conductive channel (18) in the body zone (13) between the source zones (14) and the drift zone (9). a drain zone (11) at the rear side (3) of the component (1) and in electrical contact with the drain zone (10), a source electrode (16 ) at the front a gate electrode in electrical contact with the gates (15), and wherein the gates (15) and the areas of the gate electrode located at the front side (2) of the gate electrode (15) are in contact with the source zones (14) an insulation (28) overlying them, and wherein the gate electrode is guided by a conductive vertical gate leadthrough (7) through the component (1) to the rear side (3) of the component (1), wherein the vertical gate leadthrough (7) of the semiconductor regions of the MOS structure (12), the drift zone (9) and the drain zone (10) is electrically insulated, and wherein the power semiconductor device (1) has an edge termination (4), which is designed to voltage in the case of blocking between the Gates Implementation (7) and the drain zone (10) degrade.

Description

The invention relates to a vertical power semiconductor component and to a method for producing a vertical power semiconductor component.

Conventional vertical power semiconductor devices have a front and a back. With them, the source terminal, or the cathode, together with the gate terminal on the front, while the drain terminal, or the anode, is mounted on the back of the transistor.

In this case, the back is mounted on a chip carrier, which in turn is mounted on a heat sink.

There are applications where there is a desire to mount the source on the chip carrier and the heat sink, with the gate being connectable from the outside and not shorted to the source.

Out US 5 134 448 A For example, a power MOSFET transistor is known whose gate and drain are on one side and whose source is on the other side. For this purpose, the layer sequence of a conventional power transistor is reversed, so that the source on the back and the drain are on the front. The resulting transistor is also referred to as a source-down transistor. Such a source-down transistor requires more space than a conventional power transistor, because it requires an additional connection for the source and the body zone. In addition, the production of the source-down transistor is very complex.

The WO 99/43 027 A1 provides an EMC optimized circuit breaker in which the front gate connections are routed through the drift zone to the backside of the transistor. The bushing is separated from the drift zone by means of insulation. In the US Pat. No. 6,274,904 B1 An edge structure in a drift zone is shown. A semiconductor body of one conductivity type has an edge region with a plurality of regions of the other conductivity type.

According to the US 6 114 768 A is guided by means of a passage through a drift zone of the source contact on the side on which the drain contact is. In the US 5,473,176 A For example, a buried gate electrode is housed in a U-shaped groove located at the top of a MOSFET.

The DE 100 42 226 A1 shows a source-down power MOSFET whose backside consists of a p-type substrate, in which an n-type source region is embedded, which is short-circuited via a non-rectifying connection with the substrate.

In the DE 102 16 633 A1 The gates are placed in trenches with the gate on the same side as the drain.

The DE 102 14 151 A1 shows a semiconductor device in the form of a trench transistor having a formed in a semiconductor body a plurality of similar transistor cell cell array and at least one formed on the edge of the cell array edge cell, each of the transistor cells having a formed in a trench control electrode and the edge cell has a formed in a trench field plate wherein the distance of the trench of the boundary cell to the trench of the immediately adjacent transistor cell is less than the distance of a trench of a transistor cell to the trench of an immediately adjacent transistor cell in the cell array.

The invention has for its object to provide a vertical power transistor available, which is compact and easy to manufacture and with the side on which the source terminal, or the cathode is located, can be mounted on a chip carrier, wherein the gate of outside is connectable.

This object is solved by the subject matter of the independent claims. Advantageous embodiments emerge from the respective subclaims.

According to the invention, a vertically conductive power semiconductor device is specified. It has a drift zone of the first conductivity type. The conductivity type is either n if the free charge carriers are electrons in an n-doped region, or p if the holes in p doped regions are the free charge carriers.

The device also includes a MOS structure disposed on top of the drift zone. Here and below, the front of the device is assumed at the top and its back at the bottom. The MOS structure has a plurality of body zones of the second conductivity type extending on the surface of the drift zone and a plurality of source zones. The source zones are introduced in the body zones and have the first conductivity type. The MOS structure also includes a plurality of electrically conductive gates. They are by means of a gate insulation, for example made of silicon oxide, isolated from the body zone and the other semiconductor regions. The gates provide with appropriate control, ie when applying a certain voltage for a conductive channel within the body zone between the source zones and the drift zone.

The device further comprises a drain zone below the drift zone and an edge termination laterally of the MOS structure. A drain electrode is located on the back side of the device in electrical contact with the drain zone, a source electrode is electrically connected to the source region on the front side, and a gate electrode is in electrical contact with the gates located on the front side.

The gate electrode is guided by means of a conductive horizontal transverse guide to the edge of the device and at the edge through the device by means of a vertical passage on the back of the device. The vertical feedthrough is electrically isolated from the semiconductor regions of the MOS structure and the drift zone and the drain zone. On the gates and the regions of the gate electrode located on the front side there is an insulating layer covering the gates and the gate electrode.

Due to the stated structure, it is possible to substantially leave the structure of a conventional power device and still provide the connection of the gate electrode on the back side of the device. The sequence and the structure of the gates and the semiconductor layers drain zone, drift zone, body zone and source zone has not changed compared to the conventional power semiconductor component. In addition, however, the transverse guidance and the implementation of the gate electrode and the necessary adjustments for the isolation of the gate electrode.

This makes it possible to apply the device with the front side on a chip carrier, which has an electrically conductive top, and thus electrically connect the drain electrode to the top of the chip carrier. The insulating layer on the gates and the gate electrode ensures that there is no short circuit between the gates and the drain electrode. The gate electrode is led to the rear side and can be contacted from outside like the source electrode. The gate passage takes place to save space at the edge, because no MOS structures are housed at the edge because of the risk of breakthrough.

The gate electrode is insulated on the chip top side so that the source electrode on the front side can be connected from the outside without causing a short circuit between gate electrode and source electrode.

In this context, those areas of the device are considered as edge, which are not at the lateral end but in the middle of the device, but surrounded by edge structures and are separated by these of the MOS structures.

If the vertical feedthrough is made of doped semiconductor material, the already existing semiconductor material can be used for the gate feedthrough. The gate feedthrough then only needs to be isolated from the remaining semiconductor material.

If the vertical leadthrough is made of metal or of metal-containing material, there is the advantage that the resistance from the external gate terminal to the gates is reduced and thus the switching behavior of the power semiconductor component is accelerated.

The gate feedthrough may be created by etching a trench and then filling the trench with a conductive material. If the conductive material is polysilicon, the trench can be made narrow because polysilicon can also be deposited in deep, narrow trenches.

In an advantageous embodiment, the gate leadthrough is electrically insulated by means of two opposite pn junctions. The already existing semiconductor material need only be provided with the appropriate doping.

In a further embodiment, in addition to the vertical gate leadthrough, there is a semiconductor oxide layer which electrically insulates the gate leadthrough from the other semiconductor regions of the MOS structure, from the drain zone and from the source zone. Such a semiconductor oxide layer can be produced after the etching of a trench by oxidation of the semiconductor material, so that the original structure of the trench walls remains.

In the case of blocking, the edge termination provided in the case of a conventional component ensures a voltage reduction between drain and source on the component front side. The entire chip back and the lateral edge of the chip are at drain potential. In contrast, in the present invention, the edge termination is used to reduce the high potential difference between the gate feedthrough and the drain zone on the rear side of the semiconductor component in the blocking case, while on the front side only the relatively small potential difference between gate and source is to be included. The lateral edge of the chip is approximately at the gate or source potential.

In another embodiment, the drain zone is of the second conductivity type. The power semiconductor component is thus an IGBT (Insulated Gate Bipolar Transistor). This power transistor is a bipolar transistor with insulated gate.

When the drain region is of the first conductivity type, the power semiconductor device forms a power MOSFET. Particularly with these power transistors, it is desirable to be able to connect the gate electrode on the same side as the drain electrode in order to be able to apply the source to a conductive chip carrier and thus be able to cool effectively. With such transistors can also be realized together with conventional power MOSFETs in a simple way full bridges. In such a bridge, two transistors are connected with their drain electrodes to the high supply potential and two transistors with their source electrodes to the low supply potential. For example, two conventional transistors with their drain electrodes can be applied to a common chip carrier, which is connected to the high supply potential, while two transistors according to the invention are applied with their source electrodes on a second chip carrier connected to the low supply potential.

When the gate is located in a trench incorporated in the semiconductor material on the front side of the semiconductor device, the device is a trench gate device. Such is particularly space-saving, because the area in which the channel is formed, vertical and not horizontal.

In a superjunction transistor, pillars of the second conductivity type are introduced into the drift zone. As a result, in the case of blocking, countercharges which compensate at the same height for the charges determined in the drift zone by the height of the n-doping are available, so that in the case of transmission the number of free charge carriers can be increased without increasing the risk of breakdown. The columns of the second conductivity type are also referred to as compensation areas.

Advantageously, the surface of the source electrode contains a solderable metal, so that the electrical connection of the source electrode can take place from outside via a solder connection. This results in a low contact resistance.

The invention also relates to a method for producing a vertically conductive power semiconductor component. In this case, the structures described above are produced in the semi-finished material, the gate oxide and the gates. Structures in the semiconductor region include the drain zone, the drift zone, the body zones, the source zones and possibly the columns for the superjunction transistor, the structures for the edge termination and the insulation of the gate leadthrough.

Subsequently, the gate is electrically tested and the metallization applied to the front. To isolate the gate electrode, a passivation or insulating layer is deposited on it. From the back, the semi-finished material is now thinned to reduce the thickness of the drain zone. Subsequently, the metallization for the gate and drain electrode and the passivation is applied on the back. Thus, the metallic contacts for the device, which can now be connected from the outside.

Line transistors, which may contain, as superjunction transistors, pillars of the second conductivity type in the drift zone, are advantageously fabricated so that the structures in the semiconductor region take place in the following manner with the same work steps. The semiconductor regions that provide the insulation of the gate feedthrough from the semiconductor regions of the MOS structure, the drift zone and the drain zone are treated with the same operations as the second conductivity type columns and / or the regions of the drift zone surrounding the second conductivity type columns. manufactured. Such a step may be, for example, an epitaxy. Finishing with the same steps saves time and reduces the complexity of manufacturing.

According to the invention, the gate connection is conducted through the chip to the backside by means of a conductive region insulated against source and drain, which is possible in particular with superjunction devices because of the isolation possibilities for the drain due to the structure without much additional process outlay.

The invention is illustrated in more detail in the drawings with reference to embodiments.

1 shows in section a vertical power semiconductor component with a gate feedthrough according to the invention.

2 shows in a second embodiment, a vertical power semiconductor device with a gate feedthrough of p-doped semiconductor material.

3 shows in section in a further embodiment, a vertical power semiconductor device with an insulated gate passage made of metal.

1 shows a section through a vertical power semiconductor device 1 , The semiconductor device has a front side 2 and a back 3 , where the front 2 above and the back 3 shown below. On the left are the semiconductor structures that make up the transistor, on the right side is an edge termination 4 The insulation layers follow 5 and 6 and a vertical gate passage 7 on the edge 8th of the semiconductor device 1 ,

In the semiconductor structures forming the transistor, there is a drift zone 9 of weakly doped n-type semiconductor material. Below the drift zone 9 there is a drain zone consisting of highly doped n ⁺ semiconductor material 10 with a metallic drain electrode 11 , Above the drift zone 9 are MOS structures 12 made up of p-doped body zones 13 , from n ⁺ -doped source zones 14 and gates 15 exist, introduced. The body zones 13 and the source zones 14 are with the source electrode 16 connected. The gates 15 are polysilicon and are from the source electrode 16 and from the semiconductor regions of the drift zone 9 , the body zone 13 and the source zone 14 by means of the gate insulation 17 , which consists of silicon oxide, separated. The gates 15 are connected to each other via a common gate electrode, which is not shown here. Below the body zones 13 columns extend 19 made of p doped material.

When a voltage is applied to the gate electrode such that the voltage between source and gate exceeds a threshold, this causes the body zones in the body zones 13 between the source zones 14 and the drift zone 9 conductive channels 18 form. This causes a current flow from the source regions 14 to the drainage area 10 ,

The described structure forms a power MOS transistor. If, in the blocking case, the gates are below the threshold value, no channel is formed 18 between the drift zone 9 and the source zones 14 , It lies between the drift zone 9 and the other semiconductor regions but a high voltage. That's why the drift zone is 9 low doped to prevent avalanche breakdown. In addition, the p-doped columns provide 19 for the free charges in the drift zone determined by the level of n-doping 9 compensating countercharges are provided. The p-doped columns 19 are also referred to as compensation areas and form with the n-doped areas of the drift zone 9 a so-called superjunction structure.

The edge conclusion 4 consists of p-doped columns 20 in the drift zone 9 that can be electrically isolated. Partially they protrude into the drift zone 9 into it, partially they are up to the lower edge 21 led the semiconductor device.

The insulation layer 5 consists of n-doped and the insulation layer 6 made of p-doped material. They form together and with the gate passage 7 two opposite pn junctions and thus isolate the gate passage 7 from the drift zone 9 , The gate passage 7 consists of an n-doped column 22 , an n ⁺ -doped area 24 above and an n ⁺ -doped area 23 below the column 22 , The n ⁺ -doped areas 24 and 23 provide electrical contact between the column 22 and the upper metallic gate contact 25 and the lower metallic gate contact 26 ,

The upper metallic gate contact 25 is connected to the gate electrode via the cross connection 27 , which consists of the same material as the gates connected. Above the upper metallic contact and the transverse guide 27 there is an upper passivation 28 , On the back of the semiconductor device is a lower passivation 29 between the drain electrode 11 and the lower metallic contact 26 applied.

The gate lead ensures that the gate electrode is connected to the lower metallic contact 26 electrically connected. The gate can be connected from the back. The device can be mounted with the front on a horizontal chip carrier. For that there is no short circuit between the source electrode 16 and the upper metallic contact 25 comes, ensures the upper passivation 28 ,

The edge seals ensure a reduction of the tensions. Here's the edge closure 4 not just for reducing the voltage between the source zone 10 and the gate passage 7 on the front side 2 of the component, but especially for the reduction of tension between the drain zone 10 and the gate passage 7 on the back side 3 of the component. That is why the columns are enough 20 partially to the bottom 21 ,

2 shows in a second embodiment a section through a semiconductor device 1 , Reference numerals with the same numbers denote the same functions and will therefore not be explained again here.

The columns 20 the edge conclusion 4 are about an extra p-area with the bodyzone 13 connected to a MOS structure. They are thus not floating, but are at the potential of the source electrode. This prevents high potential differences on the chip front side.

The gate passage 7 is in this embodiment of p-doped material. In addition to the gate passage 7 lies in this embodiment, the n-doped insulating layer 5 followed by the p-doped insulating layer 6 ,

3 shows in a further embodiment, a semiconductor device 1 on average. The gate passage 7 consists of a metallic pillar 30 , It is of a silicon dioxide layer 32 jacketed. This gate feedthrough was produced by etching a trench in the edge region of the semiconductor component. At the edge remains an n-doped region 31 , In the trench silicon dioxide is deposited and then filled the trench with metal.

The drain zone consists of p + doped material. The power semiconductor component shown is thus an IGBT (Insulated Gate Bipolar Transistor).

The horizontal connection of the upper metallic contact 25 with the gate electrode via a metallic cross connection 33 , which is only near the MOS structures on a connector 34 is made of polysilicon. This reduces the resistance of the cross-connection compared to a polysilicon interconnection.

LIST OF REFERENCE NUMBERS

1

Power semiconductor device

2

front

3

back

4

edge termination

5

insulation layer

6

insulation layer

7

Gate implementing

8th

lateral edge

9

drift region

10

drain region

11

drain

12

MOS structure

13

Body zone

14

source zone

15

gate

16

source electrode

17

gate insulation

18

channel

19

p-doped column, compensation area

20

p-doped column

21

lower edge

22

n-doped column

23

n ⁺ -doped area

24

n ⁺ -doped area

25

upper metallic gate contact

26

lower metallic gate contact

27

width guide

28

passivation

29

passivation

30

Metallic column

31

n-doped region

32

insulation layer

33

cross connection

34

joint

Claims (14)

Vertical power semiconductor device ( 1 ) having the following features: a drift zone ( 9 ) of a first conductivity type, - a MOS structure ( 12 ) located on top of the drift zone ( 9 ) - wherein the MOS structure - a plurality of body zones ( 13 ) of the second conductivity type, which in the region of the surface of the drift zone ( 9 ), - a plurality of source zones ( 14 ) of the first type of conductivity entering the body zone ( 13 ) are introduced, - and a plurality of electrically conductive gates ( 15 ), which by means of a gate oxide ( 17 ) of the Bodyzone ( 13 ) are isolated and which, when appropriately controlled for a conducting channel ( 18 ) in the body zone ( 13 ) between the source zones ( 14 ) and the drift zone ( 9 ), - having a drain zone ( 10 ) below the drift zone ( 9 ), - a drain electrode ( 11 ) on the back ( 3 ) of the component ( 1 ) and in electrical contact with the drain zone ( 10 ), - a source electrode ( 16 ) at the front of the device ( 1 ) and in electrical contact with the source zones ( 14 ), - a gate electrode in electrical contact with the gates ( 15 ), and where the gates ( 15 ) and those on the front ( 2 ) lying areas of the gate electrode with an overlying insulation ( 28 ), and wherein the gate electrode by means of a conductive vertical gate passage ( 7 ) through the device ( 1 ) to the back ( 3 ) of the component ( 1 ), whereby the vertical gate passage ( 7 ) of the semiconductor regions of the MOS structure ( 12 ), the drift zone ( 9 ) and the drain zone ( 10 ) is electrically isolated, and wherein the power semiconductor device ( 1 ) an edge termination ( 4 ), which is designed to be in the case of blocking voltage between the gate passage ( 7 ) and the drain zone ( 10 ). A vertical power semiconductor device ( 1 ) according to claim 1, characterized characterized in that the gate passage ( 7 ) consists of doped semiconductor material. Vertical power semiconductor device ( 1 ) according to one of claims 1 to 2, characterized in that the gate passage ( 7 ) consists of a material containing metal. Vertical power semiconductor device ( 1 ) according to one of claims 1 to 3, characterized in that the gate passage ( 7 ) consists of polysilicon. Vertical power semiconductor device ( 1 ) according to one of claims 1 to 4, characterized in that the gate passage ( 7 ) of the semiconductor regions of the MOS structure ( 12 ), the drift zone ( 9 ) and the drain zone ( 10 ) is electrically isolated by means of two oppositely connected pn junctions. Vertical power semiconductor device ( 1 ) according to one of claims 1 to 5, characterized in that in addition to the vertical gate passage ( 7 ) a semiconductor oxide layer ( 32 ) through which the gate ( 7 ) of the semiconductor regions of the MOS structure ( 12 ), the drift zone ( 9 ) and the drain zone ( 10 ) is electrically isolated. Vertical power semiconductor device ( 1 ) according to one of claims 1 to 6, characterized in that the drain zone ( 10 ) is of the second conductivity type. Vertical power semiconductor component according to one of Claims 1 to 6, characterized in that the drain zone ( 10 ) is of the first conductivity type. A vertical power semiconductor device according to any one of claims 1 to 8, characterized in that the gates are located in trenches which are mounted in the semiconductor regions at the front. Vertical power semiconductor component according to one of claims 1 to 6, 8 or 9, characterized in that it is a superjunction transistor. Vertical power semiconductor component according to one of Claims 1 to 10, characterized in that the source electrode has a solderable metallization on its surface. Method for producing a vertically conducting power semiconductor component ( 1 ) according to one of claims 1 to 11, comprising the following steps: - producing the gate oxide ( 17 ) and the gates ( 15 ); - making the drain zone ( 10 ) of the drift zone ( 9 ), the body zones ( 13 ), the source zones ( 14 ) and marginal structures ( 4 ) and isolation ( 6 ) of the gate ( 7 ); - Subsequent electrical testing of the gate ( 15 ) and applying the metallization on the front side ( 2 ), - deposition of a passivation or insulation layer on the gate electrode ( 17 ) for their isolation; Thinning the semiconductor material from the backside ( 3 ) to reduce the thickness of the drain zone; - Putting the metallization for the gate and drain electrode ( 11 . 26 ); - applying a passivation ( 29 ) on the back side ( 3 ); Finishing the vertically conducting power semiconductor device ( 1 ). Method for producing a vertically conducting power semiconductor component ( 1 ) according to claim 12, characterized in that columns of the second power type in the drift zone ( 9 ) and this manufacturing takes place with the same work steps as the fabrication of the semiconductor regions of the columns ( 19 ) of the second conductivity type of the superjunction transistor and / or as the manufacturing of those semiconductor regions of the drift zone ( 9 ), the columns ( 19 ) of the second conductivity type of the superjunction transistors. Method for producing a vertically conducting power semiconductor component ( 1 ) according to claim 13, characterized in that the steps include an epitaxy.

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