WO2001018869A3 - Halbleiterbauelement für hohe sperrspannungen bei gleichzeitig niedrigem einschaltwiderstand und verfahren zu dessen herstellung - Google Patents

Halbleiterbauelement für hohe sperrspannungen bei gleichzeitig niedrigem einschaltwiderstand und verfahren zu dessen herstellung Download PDF

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Publication number
WO2001018869A3
WO2001018869A3 PCT/EP2000/008706 EP0008706W WO0118869A3 WO 2001018869 A3 WO2001018869 A3 WO 2001018869A3 EP 0008706 W EP0008706 W EP 0008706W WO 0118869 A3 WO0118869 A3 WO 0118869A3
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WO
WIPO (PCT)
Prior art keywords
semiconductor element
production
high blocking
voltages during
simultaneously low
Prior art date
Application number
PCT/EP2000/008706
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English (en)
French (fr)
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WO2001018869A2 (de
Inventor
Jeno Tihanyi
Klaus-Guenter Oppermann
Original Assignee
Jeno Tihanyi
Klaus-Guenter Oppermann
Infineon Technologies Ag
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Filing date
Publication date
Application filed by Jeno Tihanyi, Klaus-Guenter Oppermann, Infineon Technologies Ag filed Critical Jeno Tihanyi
Publication of WO2001018869A2 publication Critical patent/WO2001018869A2/de
Publication of WO2001018869A3 publication Critical patent/WO2001018869A3/de
Priority to US10/095,270 priority Critical patent/US6762455B2/en

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/7801DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
    • H01L29/7802Vertical DMOS transistors, i.e. VDMOS transistors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0603Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
    • H01L29/0607Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
    • H01L29/0611Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices
    • H01L29/0615Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE]
    • H01L29/063Reduced surface field [RESURF] pn-junction structures
    • H01L29/0634Multiple reduced surface field (multi-RESURF) structures, e.g. double RESURF, charge compensation, cool, superjunction (SJ), 3D-RESURF, composite buffer (CB) structures
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/08Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
    • H01L29/0843Source or drain regions of field-effect devices
    • H01L29/0847Source or drain regions of field-effect devices of field-effect transistors with insulated gate
    • H01L29/0852Source or drain regions of field-effect devices of field-effect transistors with insulated gate of DMOS transistors
    • H01L29/0873Drain regions
    • H01L29/0878Impurity concentration or distribution
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0603Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
    • H01L29/0607Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
    • H01L29/0611Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices
    • H01L29/0615Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE]
    • H01L29/0619Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE] with a supplementary region doped oppositely to or in rectifying contact with the semiconductor containing or contacting region, e.g. guard rings with PN or Schottky junction
    • H01L29/0623Buried supplementary region, e.g. buried guard ring
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0603Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
    • H01L29/0642Isolation within the component, i.e. internal isolation
    • H01L29/0649Dielectric regions, e.g. SiO2 regions, air gaps
    • H01L29/0653Dielectric regions, e.g. SiO2 regions, air gaps adjoining the input or output region of a field-effect device, e.g. the source or drain region
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/10Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
    • H01L29/1095Body region, i.e. base region, of DMOS transistors or IGBTs
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/40Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/417Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions carrying the current to be rectified, amplified or switched
    • H01L29/41725Source or drain electrodes for field effect devices
    • H01L29/41766Source or drain electrodes for field effect devices with at least part of the source or drain electrode having contact below the semiconductor surface, e.g. the source or drain electrode formed at least partially in a groove or with inclusions of conductor inside the semiconductor

Abstract

Die Erfindung betrifft ein Halbleiterbauelement, bei dem in ein die Raumladungszone aufnehmendes Halbleitergebiet (3) des einen Leitungstyps Halbleiterbereiche (4) des anderen Leitungstyps eingelagert sind, die zur Beschleunigung des Schaltvorganges über fadenförmige Halbleiterzonen (9, 15, 18) des anderen Leitungstyps mit der Sourceelektrode verbunden sind.
PCT/EP2000/008706 1999-09-09 2000-09-06 Halbleiterbauelement für hohe sperrspannungen bei gleichzeitig niedrigem einschaltwiderstand und verfahren zu dessen herstellung WO2001018869A2 (de)

Priority Applications (1)

Application Number Priority Date Filing Date Title
US10/095,270 US6762455B2 (en) 1999-09-09 2002-03-11 Semiconductor component for high reverse voltages in conjunction with a low on resistance and method for fabricating a semiconductor component

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE19943143A DE19943143B4 (de) 1999-09-09 1999-09-09 Halbleiterbauelement für hohe Sperrspannungen bei gleichzeitig niedrigem Einschaltwiderstand und Verfahren zu dessen Herstellung
DE19943143.4 1999-09-09

Related Child Applications (1)

Application Number Title Priority Date Filing Date
US10/095,270 Continuation US6762455B2 (en) 1999-09-09 2002-03-11 Semiconductor component for high reverse voltages in conjunction with a low on resistance and method for fabricating a semiconductor component

Publications (2)

Publication Number Publication Date
WO2001018869A2 WO2001018869A2 (de) 2001-03-15
WO2001018869A3 true WO2001018869A3 (de) 2001-08-02

Family

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PCT/EP2000/008706 WO2001018869A2 (de) 1999-09-09 2000-09-06 Halbleiterbauelement für hohe sperrspannungen bei gleichzeitig niedrigem einschaltwiderstand und verfahren zu dessen herstellung

Country Status (3)

Country Link
US (1) US6762455B2 (de)
DE (1) DE19943143B4 (de)
WO (1) WO2001018869A2 (de)

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FR2807569B1 (fr) * 2000-04-10 2004-08-27 Centre Nat Rech Scient Perfectionnement apportes aux diodes schottky
DE10061528C1 (de) * 2000-12-11 2002-07-25 Infineon Technologies Ag Mittels Feldeffekt steuerbares Halbleiterbauelement
DE10061529A1 (de) * 2000-12-11 2002-06-27 Infineon Technologies Ag Feldeffekt gesteuertes Halbleiterbauelement und Verfahren
US6465304B1 (en) * 2001-10-04 2002-10-15 General Semiconductor, Inc. Method for fabricating a power semiconductor device having a floating island voltage sustaining layer
US6566201B1 (en) * 2001-12-31 2003-05-20 General Semiconductor, Inc. Method for fabricating a high voltage power MOSFET having a voltage sustaining region that includes doped columns formed by rapid diffusion
US6656797B2 (en) * 2001-12-31 2003-12-02 General Semiconductor, Inc. High voltage power MOSFET having a voltage sustaining region that includes doped columns formed by trench etching and ion implantation
US6686244B2 (en) 2002-03-21 2004-02-03 General Semiconductor, Inc. Power semiconductor device having a voltage sustaining region that includes doped columns formed with a single ion implantation step
JP3652322B2 (ja) * 2002-04-30 2005-05-25 Necエレクトロニクス株式会社 縦型mosfetとその製造方法
US7166890B2 (en) 2003-10-21 2007-01-23 Srikant Sridevan Superjunction device with improved ruggedness
US7394158B2 (en) * 2004-10-21 2008-07-01 Siliconix Technology C.V. Solderable top metal for SiC device
US7812441B2 (en) 2004-10-21 2010-10-12 Siliconix Technology C.V. Schottky diode with improved surge capability
US9419092B2 (en) * 2005-03-04 2016-08-16 Vishay-Siliconix Termination for SiC trench devices
US7834376B2 (en) * 2005-03-04 2010-11-16 Siliconix Technology C. V. Power semiconductor switch
JP2007012858A (ja) * 2005-06-30 2007-01-18 Toshiba Corp 半導体素子及びその製造方法
JP4488984B2 (ja) * 2005-08-25 2010-06-23 株式会社東芝 ショットキーバリアダイオード
US8368165B2 (en) 2005-10-20 2013-02-05 Siliconix Technology C. V. Silicon carbide Schottky diode
US7659588B2 (en) * 2006-01-26 2010-02-09 Siliconix Technology C. V. Termination for a superjunction device
US9627552B2 (en) * 2006-07-31 2017-04-18 Vishay-Siliconix Molybdenum barrier metal for SiC Schottky diode and process of manufacture
DE102007018631B4 (de) * 2007-04-19 2009-01-22 Infineon Technologies Austria Ag Halbleiterbauelement mit Kompensationszonen und Entladestrukturen für die Kompensationszonen
DE102007020659B4 (de) * 2007-04-30 2012-02-23 Infineon Technologies Austria Ag Halbleiterbauelement und Verfahren zur Herstellung desselben
US7880224B2 (en) * 2008-01-25 2011-02-01 Infineon Technologies Austria Ag Semiconductor component having discontinuous drift zone control dielectric arranged between drift zone and drift control zone and a method of making the same
JP5606019B2 (ja) * 2009-07-21 2014-10-15 株式会社東芝 電力用半導体素子およびその製造方法
US8680613B2 (en) 2012-07-30 2014-03-25 Alpha And Omega Semiconductor Incorporated Termination design for high voltage device
US8785279B2 (en) 2012-07-30 2014-07-22 Alpha And Omega Semiconductor Incorporated High voltage field balance metal oxide field effect transistor (FBM)
US9224852B2 (en) 2011-08-25 2015-12-29 Alpha And Omega Semiconductor Incorporated Corner layout for high voltage semiconductor devices
JP6135364B2 (ja) * 2013-07-26 2017-05-31 住友電気工業株式会社 炭化珪素半導体装置およびその製造方法
KR101514537B1 (ko) * 2013-08-09 2015-04-22 삼성전기주식회사 전력 반도체 소자 및 그 제조 방법
US20150118810A1 (en) * 2013-10-24 2015-04-30 Madhur Bobde Buried field ring field effect transistor (buf-fet) integrated with cells implanted with hole supply path
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CN104733535A (zh) * 2015-03-17 2015-06-24 北京中科新微特科技开发股份有限公司 一种功率mosfet
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Also Published As

Publication number Publication date
US6762455B2 (en) 2004-07-13
WO2001018869A2 (de) 2001-03-15
US20020117715A1 (en) 2002-08-29
DE19943143A1 (de) 2001-03-22
DE19943143B4 (de) 2008-04-24

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