WO2000077933A1 - Circuit comportant un commutateur de puissance a semi-conducteurs desactivable - Google Patents

Circuit comportant un commutateur de puissance a semi-conducteurs desactivable Download PDF

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Publication number
WO2000077933A1
WO2000077933A1 PCT/DE2000/001872 DE0001872W WO0077933A1 WO 2000077933 A1 WO2000077933 A1 WO 2000077933A1 DE 0001872 W DE0001872 W DE 0001872W WO 0077933 A1 WO0077933 A1 WO 0077933A1
Authority
WO
WIPO (PCT)
Prior art keywords
semiconductor switch
circuit
blocking
low
voltage
Prior art date
Application number
PCT/DE2000/001872
Other languages
German (de)
English (en)
Inventor
Benno Weis
Eric Baudelot
Manfred Bruckmann
Heinz Mitlehner
Original Assignee
Siemens Aktiengesellschaft
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siemens Aktiengesellschaft filed Critical Siemens Aktiengesellschaft
Publication of WO2000077933A1 publication Critical patent/WO2000077933A1/fr

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Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/08—Modifications for protecting switching circuit against overcurrent or overvoltage
    • H03K17/082—Modifications for protecting switching circuit against overcurrent or overvoltage by feedback from the output to the control circuit
    • H03K17/0828—Modifications for protecting switching circuit against overcurrent or overvoltage by feedback from the output to the control circuit in composite switches

Definitions

  • the invention relates to a circuit arrangement with a power semiconductor switch that can be switched off in accordance with the preamble of claim 1.
  • switchable semiconductor switches e.g. Insulated gate bipolar transistors (IGBT) or metal oxide layer field-effect transistors (MOSFET) are used, so that the aforementioned requirements can be met without additional passive components in the power circuit by controlling the semiconductor switch alone.
  • IGBT Insulated gate bipolar transistors
  • MOSFET metal oxide layer field-effect transistors
  • the output voltage of this semiconductor switch is monitored during the conducting state of the semiconductor switch. Based on the known output characteristic, the level of the output voltage is a measure of the current which the semiconductor switch carries. If the semiconductor switch carries an overcurrent, its output voltage rises, whereby this rise becomes disproportionately strong with very large currents (short-circuit case). The rise in the output voltage of the semiconductor switch is used as a signal for an overcurrent or short-circuit current.
  • Such a circuit with saturation monitoring for a switching transistor is known from EP 0 361 212 Bl. This circuit arrangement has a desaturation measuring circuit, which is linked on the input side by means of a decoupling diode to a collector terminal of the switching transistor.
  • this desaturation measuring circuit is connected to a switch-off device which is arranged in the gate supply line.
  • this circuit arrangement has a protective circuit which has a timing element on the input side and a series circuit comprising a zener diode and an off switch electrically in parallel with the base-emitter path of the switching transistor.
  • the control signal of the switching transistor is present at the input of the timing element, a control signal being present at its output.
  • This control signal which is the time-delayed control signal, opens the switch and simultaneously activates the desaturation measuring circuit. As soon as the control signal is withdrawn, the switch immediately returns to its rest position (closed).
  • this protective circuit limits the collector current of the switching transistor when it has been connected to an existing short circuit, and on the other hand it only activates the desaturation measuring circuit when the switching transistor is in nominal operation.
  • the measuring circuit for detecting the desaturation of the power semiconductor switch must be decoupled in the switched-off state of the semiconductor switch by a high-blocking component, which is generally a diode, the diode having to have the dielectric strength of the power semiconductor switch .
  • a high-blocking component which is generally a diode, the diode having to have the dielectric strength of the power semiconductor switch .
  • the desaturation measuring circuit must be deactivated until the collector-emitter voltage of the power semiconductor switch has dropped to its stationary end value (saturation voltage). Switches the power semiconductor Switch to an existing short circuit or if a short circuit occurs immediately after switching on, this short circuit is not recognized, but the collector current of the switching transistor is limited,
  • the design of the power semiconductor switch must be designed to saturate at the lowest possible current values. This limits the optimization of the power semiconductor switch, for example, to improved transmission behavior.
  • the invention is based on the object of specifying a circuit arrangement which no longer has the disadvantages described.
  • a cascode circuit consisting of a series circuit of a low and high blocking semiconductor switch, is used as a power semiconductor switch that can be switched off, the output voltage of the low blocking semiconductor switch is used for the desaturation measuring circuit.
  • the high-blocking semiconductor switch does not have to be optimized for a low desaturation current. Since the output voltage of the low-blocking semiconductor switch is now used for the detection of desaturation, the dielectric strength of the decoupling diode drops to the level of the low-blocking semiconductor switch of the cascode circuit. It is now also possible to optimize the two semiconductor switches of the cascode circuit separately.
  • the low-blocking semiconductor switch is optimized for low forward voltage and low desaturation current, whereas the high-blocking semiconductor switch of the cascode circuit is optimized with regard to improved forward behavior.
  • a hybrid power MOSFET is used as the cascode circuit, which as the low-blocking semiconductor switch is a MOSFET, in particular a self-blocking n-channel MOSFET, and the high-blocking semiconductor switch is a barrier layer FET, in particular a self-conducting n-channel blocking layer - FET, wherein the gate connection of the junction FET is connected to the source connection of the MOSFET by means of a resistor.
  • the junction FET is also referred to as a junction field effect transistor (JFET).
  • This special configuration of the cascode circuit ensures that the maximum reverse voltage of the MOSFET is 30 V. Therefore a high voltage decoupling of the desaturation measuring circuit is not necessary.
  • the output voltage of the MOSFET drops so quickly due to an Em-switching signal that the load current can only increase slightly during this very short time interval.
  • the saturation voltage of the MOSFET is available as a signal for short-circuit detection after a short time. It is therefore possible for a short circuit to be detected when the cascode circuit switches to an existing short circuit.
  • no blanking circuit is required for the desaturation measuring circuit.
  • a cascade connection of a MOSFET with a voltage-controlled semiconductor switch is used as the cascode circuit, the gate connection of the voltage-controlled semiconductor switch being linked to the source connection of the MOSFET by means of a constant voltage source.
  • FIG. 2 shows an advantageous embodiment of a circuit arrangement according to the invention.
  • pass characteristics of the low and high blocking semiconductor switch of the cascode circuit according to FIG. 2 are shown
  • FIG. 4 shows a diagram over time t of the load current and the output voltages of the two semiconductor switches of the cascode circuit according to FIG. 2
  • FIG. 5 shows a further advantageous embodiment of the circuit arrangement according to the invention.
  • This circuit arrangement has a cascode circuit 2, consisting of a series connection of a low and high blocking semiconductor switches 4 and 6, as a power semiconductor switch that can be switched off.
  • this circuit arrangement also has a desaturation measuring circuit 8 and a control device 10.
  • the desaturation measuring circuit 8 is linked on the input side by means of a decoupling diode 12 to a drain terminal D 'of the low-blocking semiconductor switch 4 of the cascode circuit 2 and on the output side to an input of the control circuit 10.
  • this drive circuit 10 is linked to the gate and source terminals G 'and S' of the low-blocking semiconductor switch 4 of the cascode circuit 2.
  • the anode of this decoupling diode 12 is a voltage supply by means of a resistor R GD with a positive supply voltage + U V the control circuit 12 connected.
  • the decoupling diode 12 blocks and a current flows from the voltage supply (not shown in more detail) to the desaturation measuring circuit 8, which then generates an error signal S F s.
  • This error signal S S causes the control circuit 10 to suppress the control signal U S t > which causes the low-blocking semiconductor switch 4 and the high-blocking semiconductor switch 6 of the cascode circuit 2 to be switched off.
  • a hybrid power MOSFET is provided as the cascode circuit 2.
  • This hybrid power MOSFET has a self-locking n-channel MOSFET, in particular a low-voltage power MOSFET, as a low-blocking semiconductor switch 4, and a self-conducting junction FET as a high-blocking semiconductor switch 6.
  • This high blocking junction FET is also referred to as a junction field effect transistor (JFET).
  • the low-blocking MOSFET of this cascode circuit 2 has an internal bipolar diode D ⁇ .N , which is connected antiparallel to the MOSFET and is generally referred to as an inverse diode or internal freewheeling diode.
  • the normally-off n-channel MOSFET is made of silicon, whereas the normally-off n-channel JFET is made of silicon carbide.
  • This hybrid power MOSFET is designed for a high reverse voltage of over 600 V and yet has only low losses in the pass band.
  • This cascode circuit 2 is controlled by means of the gate voltage UQ 'S' of the normally-off MOSFET. If this MOSFET is switched on or the anti-parallel internal diode D N of the MOSFET carries a current, then the dram voltage is U D'S . of the MOSFET approximately zero.
  • the gate voltage U G s ' of the JFET is zero to little or negative.
  • the largest drain current I D flows through the JFET.
  • the MOSFET is switched off, the dram voltage U D ' s- increases until the maximum permissible reverse voltage of the MOSFET is reached.
  • the value of the reverse voltage in a low-voltage power MOSFET is, for example, 30 V.
  • the drain current I D of the JFET is zero. That is, the JFET is turned off.
  • FIG. 4 shows a switch-on process of the cathode circuit 2 according to FIG. 2 in more detail.
  • the gate of the low-blocking MOSFET is charged at the time to by the level change of the control signal U S f from "low” to "high".
  • the drain voltage U D ' S ' of the low-blocking MOSFET drops very quickly.
  • the MOSFET of the cascode circuit 2 is already in the saturated state at time ti. This very rapidly falling dram voltage U D ' s ' of the MOSFET is fed back as a control voltage to the gate of the JFET.
  • the time range t ⁇ ⁇ t 0 is so short that a load current I D can only increase slightly in this range.
  • the load current I D increases to its stationary end value.
  • the Dra source voltage U DS ' at the JFET then drops to its saturation value until time t 3 .
  • the desaturation measuring circuit 8 When using conventional power semiconductors, such as, for example, IGBT, power MOSFET, bipolar transistor, the desaturation measuring circuit 8 must be masked out until time t 3 . Since the length of the time range t 3 -t 0 also increases sharply both with the load current I D and with the commutation voltage, the "worst case" including a safety reserve must always be observed for the fade-out time.
  • voltage U D ' s ' at MOSFET is available as a signal for short-circuit detection from time ti. This is particularly advantageous in the event that the cascode circuit 2 switches on a short-circuited load.
  • FIG 5 shows a further advantageous embodiment of the circuit arrangement according to the invention.
  • This embodiment differs from the embodiment according to FIG only in that instead of a JFET as a high-blocking semiconductor switch 6 em voltage-controlled semiconductor switch 14 is provided.
  • the gate connection G of this voltage-controlled semiconductor switch 14 is connected to the source connection S ′ of the low-blocking semiconductor switch 4 of the cascode circuit 2 by means of a gate resistor R and a constant voltage source 16 connected.
  • a DC voltage source for example a battery of approximately 15 V, is used as the constant voltage source.
  • the voltage-controlled semiconductor switch 14 can be, for example, an insulated gate bipolar transistor (IGBT), an MOSFET, an MOS-controlled thyristor (MCT),... Only an IGBT as a high-blocking semi-power switch 6 of the cascode circuit 2 is shown. By using a voltage-controlled semiconductor switch 14 as a high-blocking semiconductor switch 6 of the cascode circuit 2, nothing has changed in the functioning of this circuit arrangement.
  • IGBT insulated gate bipolar transistor
  • MCT MOS-controlled thyristor

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  • Electronic Switches (AREA)

Abstract

L'invention concerne un circuit comportant un commutateur de puissance à semi-conducteurs désactivable, un circuit de déclenchement (10) et un circuit de mesure de désaturation (8). Le circuit selon l'invention est caractérisé en ce qu'on utilise comme commutateur de puissance à semi-conducteurs désactivable un circuit cascode (2), constitué d'un montage en série d'un commutateur à semi-conducteurs à blocage bas et d'un commutateur à semi-conducteurs à blocage haut (4, 6), en ce que le circuit de mesure de désaturation (8) est relié au moyen d'une diode de découplage (12) à une connexion de drain (D') du commutateur à semi-conducteurs à blocage bas (4) et en ce que le circuit de déclenchement (10) est relié, côté sortie, à la connexion de grille (G') du commutateur à semi-conducteurs à blocage bas (4). On peut ainsi détecter un court-circuit même lorsque le circuit cascode (2) est commuté sur un court-circuit existant.
PCT/DE2000/001872 1999-06-11 2000-06-13 Circuit comportant un commutateur de puissance a semi-conducteurs desactivable WO2000077933A1 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE19926716.2 1999-06-11
DE19926716 1999-06-11

Publications (1)

Publication Number Publication Date
WO2000077933A1 true WO2000077933A1 (fr) 2000-12-21

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Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE10310578B3 (de) * 2003-03-11 2004-06-03 Siemens Ag Verfahren und Schaltungsanordnung zur Führung des Rückwärtsstromes eines Sperrschicht-FET (JFET)
JP2007036218A (ja) * 2005-06-27 2007-02-08 Internatl Rectifier Corp 非対称のｃｍｏｓを介した、ノーマリーオン、ノーマリーオフカスコード接続構成デバイスのアクティブ駆動
FR2949630A1 (fr) * 2009-08-31 2011-03-04 Hispano Suiza Sa Module electronique de commande pour transistor jfet
US9595889B2 (en) 2013-02-15 2017-03-14 Eaton Corporation System and method for single-phase and three-phase current determination in power converters and inverters

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3430961A1 (de) * 1984-08-20 1986-02-27 Siemens AG, 1000 Berlin und 8000 München Halbleiterschalter
FR2583939A1 (fr) * 1985-06-19 1986-12-26 Telemecanique Electrique Dispositif de commutation rapide de puissance
US4663547A (en) * 1981-04-24 1987-05-05 General Electric Company Composite circuit for power semiconductor switching
EP0361211A2 (fr) * 1988-09-28 1990-04-04 Siemens Aktiengesellschaft Circuit de protection pour une unité semi-conductrice de puissance
US5396085A (en) * 1993-12-28 1995-03-07 North Carolina State University Silicon carbide switching device with rectifying-gate

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4663547A (en) * 1981-04-24 1987-05-05 General Electric Company Composite circuit for power semiconductor switching
DE3430961A1 (de) * 1984-08-20 1986-02-27 Siemens AG, 1000 Berlin und 8000 München Halbleiterschalter
FR2583939A1 (fr) * 1985-06-19 1986-12-26 Telemecanique Electrique Dispositif de commutation rapide de puissance
EP0361211A2 (fr) * 1988-09-28 1990-04-04 Siemens Aktiengesellschaft Circuit de protection pour une unité semi-conductrice de puissance
US5396085A (en) * 1993-12-28 1995-03-07 North Carolina State University Silicon carbide switching device with rectifying-gate

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
OETJEN J ET AL: "HYBRID 3000A-MOSFET FOR GTO CASCODE SWITCHES", IEEE INTERNATIONAL SYMPOSIUM ON POWER SEMICONDUCTOR DEVICES AND ICS,US,NEW YORK, NY: IEEE, vol. CONF. 9, 26 May 1997 (1997-05-26), pages 241 - 244, XP000800191, ISBN: 0-7803-3994-0 *
WILLIAMS B W ET AL: "GTO THYRISTOR AND BIPOLAR TRANSISTOR CASCODE SWITCHES", IEE PROCEEDINGS B. ELECTRICAL POWER APPLICATIONS,GB,INSTITUTION OF ELECTRICAL ENGINEERS. STEVENAGE, vol. 137, no. 3, PART B, 1 May 1990 (1990-05-01), pages 141 - 153, XP000116327 *

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE10310578B3 (de) * 2003-03-11 2004-06-03 Siemens Ag Verfahren und Schaltungsanordnung zur Führung des Rückwärtsstromes eines Sperrschicht-FET (JFET)
JP2007036218A (ja) * 2005-06-27 2007-02-08 Internatl Rectifier Corp 非対称のｃｍｏｓを介した、ノーマリーオン、ノーマリーオフカスコード接続構成デバイスのアクティブ駆動
FR2949630A1 (fr) * 2009-08-31 2011-03-04 Hispano Suiza Sa Module electronique de commande pour transistor jfet
EP2293443A1 (fr) * 2009-08-31 2011-03-09 Hispano Suiza Module électronique de commande pour transistor JFET
US9595889B2 (en) 2013-02-15 2017-03-14 Eaton Corporation System and method for single-phase and three-phase current determination in power converters and inverters

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