Classifications

• • G—PHYSICS
  • G06—COMPUTING; CALCULATING OR COUNTING
  • G06F—ELECTRIC DIGITAL DATA PROCESSING
  • G06F9/00—Arrangements for program control, e.g. control units
  • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
  • G06F9/46—Multiprogramming arrangements
  • G06F9/52—Program synchronisation; Mutual exclusion, e.g. by means of semaphores
• • G—PHYSICS
  • G06—COMPUTING; CALCULATING OR COUNTING
  • G06F—ELECTRIC DIGITAL DATA PROCESSING
  • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
  • G06F12/02—Addressing or allocation; Relocation
  • G06F12/06—Addressing a physical block of locations, e.g. base addressing, module addressing, memory dedication
  • G06F12/0638—Combination of memories, e.g. ROM and RAM such as to permit replacement or supplementing of words in one module by words in another module
• • G—PHYSICS
  • G06—COMPUTING; CALCULATING OR COUNTING
  • G06F—ELECTRIC DIGITAL DATA PROCESSING
  • G06F8/00—Arrangements for software engineering
  • G06F8/60—Software deployment
  • G06F8/65—Updates
  • G06F8/656—Updates while running
• • H—ELECTRICITY
  • H04—ELECTRIC COMMUNICATION TECHNIQUE
  • H04Q—SELECTING
  • H04Q2213/00—Indexing scheme relating to selecting arrangements in general and for multiplex systems
  • H04Q2213/1305—Software aspects
• • H—ELECTRICITY
  • H04—ELECTRIC COMMUNICATION TECHNIQUE
  • H04Q—SELECTING
  • H04Q2213/00—Indexing scheme relating to selecting arrangements in general and for multiplex systems
  • H04Q2213/13057—Object-oriented software
• • H—ELECTRICITY
  • H04—ELECTRIC COMMUNICATION TECHNIQUE
  • H04Q—SELECTING
  • H04Q2213/00—Indexing scheme relating to selecting arrangements in general and for multiplex systems
  • H04Q2213/13103—Memory
• • H—ELECTRICITY
  • H04—ELECTRIC COMMUNICATION TECHNIQUE
  • H04Q—SELECTING
  • H04Q2213/00—Indexing scheme relating to selecting arrangements in general and for multiplex systems
  • H04Q2213/13109—Initializing, personal profile
• • H—ELECTRICITY
  • H04—ELECTRIC COMMUNICATION TECHNIQUE
  • H04Q—SELECTING
  • H04Q2213/00—Indexing scheme relating to selecting arrangements in general and for multiplex systems
  • H04Q2213/13166—Fault prevention
• • H—ELECTRICITY
  • H04—ELECTRIC COMMUNICATION TECHNIQUE
  • H04Q—SELECTING
  • H04Q2213/00—Indexing scheme relating to selecting arrangements in general and for multiplex systems
  • H04Q2213/13376—Information service, downloading of information, 0800/0900 services
• • H—ELECTRICITY
  • H04—ELECTRIC COMMUNICATION TECHNIQUE
  • H04Q—SELECTING
  • H04Q2213/00—Indexing scheme relating to selecting arrangements in general and for multiplex systems
  • H04Q2213/1338—Inter-exchange connection

Definitions

• the invention relates to a method for a software change of access from software stored in a first memory to software stored in a second memory in the network node of a telecommunications network.
• the invention also relates to a network node of a telecommunications network, said node comprising a first memory and a second memory for storing one software version each, as well as hardware responsible for controlling the data traffic passing the network node and a buffer memory, into which memory, configuration values can be written which are generated for the hardware by at least one software area of the network node which software area is coupled to the software used, from where the configuration values can be made available to the hardware.
• network nodes are used for various tasks such as for example for data multiplexing.
• the network nodes comprise various software areas such as access to network management, application-related software and access to the hardware used for data transfer through the network node.
• the various software areas generate the configuration values required by the hardware for carrying out the data transfer.
• These configuration values can be made available to the hardware in that they are written into registers contained in the hardware.
• the configuration values written into the registers can either be values changeable during the execution time of application software or else, configuration values can comprise default values which are set once at the program start by an initialisation software and then kept.
• the updateable software for the node which also helps to determine the configuration values delivered to the hardware, is stored in a memory (flash bank) .
• a memory flash bank
• two independent memories are provided, with a different software version being storable in each of these memories. In this way it is possible, during continuous operation of the node, to load a new software version into the memory not being used at the time. After completion of loading, especially after completion of loading in all or selected nodes of the network, a changeover from the software in the memory used so far to the software in the second memory can take place without interrupting the data traffic through the node.
• the new software causes various software areas of the software level of the network node, such as for example the application-oriented software, to configure anew without any coordination amongst themselves. If the resulting non-coordinated configuration values are output to the hardware used for controlling the data traffic, then these values are used for further control, which can lead to an interruption or a deterioration of the data transfer.
• each software area carries out a check irrespective of other software areas, with the check intended to determine whether a restart was caused by an interruption in the power supply or by a change of access to other software.
• An independent check of the status, carried out by the individual software areas, is expensive.
• the lack of control of the renewed permission to write to the register can lead to values being placed in the hardware which do not mach, thus presenting the danger of a disturbance to the data transfer in spite of the checks carried out by the individual software areas .
• the invention is also based on the object of providing an improved network node which makes such a change possible.
• this object is firstly met by a method for a software change of access from software stored in a first memory to software stored in a second memory in the network node of a telecommunications network, with the configuration values required by hardware for data traffic through the node being provided by at least one software area of the network node coupled to the software of the current memory, characterised by the following steps:
• this object is met according to the precharacterising part of claim 7 in that means for disabling the transfer of the configuration values written to the buffer memory by the software area of which there is at least one, are allocated to the network node during the initialisation phase of the software area of which there is at least one, after a change of the software, and for causing the output of the entire current content of the buffer memory to the hardware after completion of the initialisation phase of all integrated software areas.
• the solution according to the invention takes advantage of the fact that the data transfer through the network node can be maintained for a while by the hardware with existing non-updated configuration values, without problems occurring. For this reason, the configuration values generated during the initialisation phase after a change of access to new software, can first be placed in a buffer memory without it becoming necessary to immediately hand on the configuration values to the hardware. But rather, according to the invention, this transfer to the hardware only occurs when the initialisation phase is completed and when the individual configuration values are matched so that they can sensibly be used by the hardware.
• the method according to the invention and the network node according to the invention thus provide the advantage that they permit a change from one software version to another software version in a network node, with said change ensuring uninterrupted error-free data traffic through the node even during the change.
• the method according to the invention provides that during detection of a fault after changing the software in the second memory, a change to the software in the first memory takes place.
• Fig. 1 is a diagrammatic representation of the software level of a network node
• Figs. 2a, 2b are diagrammatic representations of an exemplary progression in transmitting configuration values without changing the software of a network node
• Figs. 3a to 3c are representations of an exemplary progression in transmitting configuration values immediately after changing the software of a network node according to the method according to the invention.
• Fig. 1 provides an overview of the software level in a network node of a telecommunications network.
• the area designated S B4 creates access for the node to a management computer.
• class interface KS and a RAM buffer memory (not shown) the software area S B3 has access to the hardware HW of the node, said hardware HW being responsible for data transmission through the network node.
• Various functions in the network node have been allocated to the software areas SWBl, SWB2 and SWB5.
• the software area SWB3 transfers configuration values generated by the software areas SWBl, SWB2 which are necessary for data transmission, to the hardware H .
• the RAM buffer memory forms part of the program RAM memory in which for example delay-time variables or similar values are stored.
• a control block CB is connected to the software level, said control block comprising two flash banks FBI, FB2.
• the first flash bank FBI the currently used software is stored.
• a newer software version can be written into the second flash bank FB2. This writing activity can take place either locally on the network node or else via a remote computer which can also communicate with several network nodes.
• the network node after writing in a new software version into the second flash bank FB2, receives a signal via the software area SWB4 that a changeover to the new software version is to take place, then a change to the new software is triggered in the software areas SWBl, SWB2 of the network node.
• the software areas SWBl, SWB2 start to reconfigure. Only after completion of an initialisation phase are the areas ready again, and also matched to each other, to the extent that sensible configuration values for the hardware can be provided.
• Figs. 2a and 2b show the transmission of configuration values in regular operation of the network node without software exchange.
• the configuration values generated by the various software areas SWBl, SWB2 are transmitted by way of a software-based class interface KS, for example by means of a C++ ASIC class, to the RAM buffer memory SP and from there onward to one of several configuration registers REG (ASIC register map) of the hardware HW .
• KS software-based class interface
• REG ASIC register map
• Figs. 3a-3c show the transmission of configuration values generated by the software areas SWBl, SWB2 for the configuration registers REG, for the case where a change to new software is made.
• a RAM buffer memory is provided for all configuration registers REG of the hardware HW, with each of Figs. 3a-3c showing only one RAM buffer memory SP allocated to a "write only" register.
• the configuration values generated by the software areas SWBl, SWB2 are written into a RAM buffer memory SP and in the case of "write only" registers are read-out again from there, to obtain the hitherto current values for further writing activities.
• data transfer through the network node can be carried out for a while using the old values in the ASIC register map, without any interruption of the data transfer taking place .

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• Engineering & Computer Science (AREA)
• Theoretical Computer Science (AREA)
• Software Systems (AREA)
• General Engineering & Computer Science (AREA)
• Physics & Mathematics (AREA)
• General Physics & Mathematics (AREA)
• Computer Security & Cryptography (AREA)
• Data Exchanges In Wide-Area Networks (AREA)

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Applications Claiming Priority (2)

Publications (1)

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Country Status (3)

Cited By (1)

Families Citing this family (2)

Citations (5)

Family Cites Families (2)

• 1998
  • 1998-09-19 DE DE19843048A patent/DE19843048C2/de not_active Expired - Lifetime
• 1999
  • 1999-09-01 AU AU58573/99A patent/AU5857399A/en not_active Abandoned
  • 1999-09-01 WO PCT/EP1999/006403 patent/WO2000018145A1/en active Application Filing

Patent Citations (5)

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