WO1999049448A2 - Display driving - Google Patents

Display driving Download PDF

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Publication number
WO1999049448A2
WO1999049448A2 PCT/IB1999/000375 IB9900375W WO9949448A2 WO 1999049448 A2 WO1999049448 A2 WO 1999049448A2 IB 9900375 W IB9900375 W IB 9900375W WO 9949448 A2 WO9949448 A2 WO 9949448A2
Authority
WO
WIPO (PCT)
Prior art keywords
sub
field
motion
fields
display
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/IB1999/000375
Other languages
English (en)
French (fr)
Other versions
WO1999049448A3 (en
Inventor
Roy Van Dijk
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Koninklijke Philips NV
Philips AB
Philips Svenska AB
Original Assignee
Koninklijke Philips Electronics NV
Philips AB
Philips Svenska AB
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Koninklijke Philips Electronics NV, Philips AB, Philips Svenska AB filed Critical Koninklijke Philips Electronics NV
Priority to JP54797699A priority Critical patent/JP2002508090A/ja
Priority to EP99903882A priority patent/EP0983584A2/en
Priority to KR1019997010860A priority patent/KR100623404B1/ko
Publication of WO1999049448A2 publication Critical patent/WO1999049448A2/en
Publication of WO1999049448A3 publication Critical patent/WO1999049448A3/en
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/28Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels
    • G09G3/288Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels using AC panels
    • G09G3/296Driving circuits for producing the waveforms applied to the driving electrodes
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/2007Display of intermediate tones
    • G09G3/2018Display of intermediate tones by time modulation using two or more time intervals
    • G09G3/2022Display of intermediate tones by time modulation using two or more time intervals using sub-frames
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00Control of display operating conditions
    • G09G2320/02Improving the quality of display appearance
    • G09G2320/0247Flicker reduction other than flicker reduction circuits used for single beam cathode-ray tubes
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00Control of display operating conditions
    • G09G2320/02Improving the quality of display appearance
    • G09G2320/0261Improving the quality of display appearance in the context of movement of objects on the screen or movement of the observer relative to the screen
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00Control of display operating conditions
    • G09G2320/02Improving the quality of display appearance
    • G09G2320/0266Reduction of sub-frame artefacts
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00Control of display operating conditions
    • G09G2320/10Special adaptations of display systems for operation with variable images
    • G09G2320/106Determination of movement vectors or equivalent parameters within the image
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/28Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels
    • G09G3/2803Display of gradations

Definitions

  • the invention relates to driving a display such as a plasma display panel.
  • An (AC) plasma display panel (PDP) and a digital (micro-)mirror device (DMD) are bi-level displays with a memory function, i.e. pixels (picture elements) can only be turned on or off.
  • a memory function i.e. pixels (picture elements) can only be turned on or off.
  • three phases can be distinguished; an erase sequence, an addressing sequence and a sustain sequence.
  • the first sequence the memories of all pixels are cleared.
  • the second addressing phase is necessary.
  • the pixels are addressed on a line at a time basis.
  • the pixels that should turn on are conditioned in such a way, that they turn on when a voltage is put across its electrodes. The conditioning is done for all pixels in a display that should be switched on.
  • a third phase the sustain phase, is required in which the luminance is generated. All pixels that were addressed, turn on as long as the sustain phase lasts.
  • the sustain period is common for all pixels of a display, thus, during this sustain period, all pixels on the screen that were addressed are switched on simultaneously.
  • the field period is divided into several sub-fields each consisting of a sequence of erase, address and sustain.
  • the grey-scale contribution of each sub-field is determined by varying the duration of the sustain phase, i.e. how long the pixels are switched on.
  • the duration of the sustain phase is further denoted as the weight of a sub-field.
  • the higher the weight of a sub-field the higher the luminance of a pixel that is switched on during the sustain phase.
  • the grey-scale itself is now generated in such a way that the luminance value is divided into several sub-fields in which the sub-fields have various weights, i.e. the duration of the sustain phase is proportional to a weight factor, thus also the luminance output is proportional to the same weight factor.
  • the sub-fields can be started in two fashions; they can be equally divided over a field period, or they can start when the previous one is finished. The latter situation is shown in Fig. 1.
  • a field period including six sub-fields SF1-SF6 is shown for a conventional PDP.
  • Each sub-field SFi includes an erase period EP, an addressing period AP, and a sustain period SP.
  • the length of the sustain period SP of a sub-field determines its impact on the output luminance.
  • Figs. 2A-2D show the artifacts resulting from motion at a speed of 2 pixels per field period.
  • Fig. 2D shows a Time vs. Position diagram in which the six sub-fields together forming a first field T 0 are shown on the vertical axis, and position P is shown on the horizontal axis.
  • Increasing luminance values L are set out horizontally; these luminance values are built up in a digital manner by means of the various sub-fields having binary weights.
  • Fig. 2C shows where the various sub-field informations are perceived as a result of the motion at 2 pixels per field period.
  • Fig. 2 A shows the resulting luminance on the retina, as well as a line R indicating the intended ramp. The difference between the intended ramp and the actually perceived luminance on the retina is a problem to be solved. It can be seen from Fig. 2A that the observed luminance can differ a lot from the actual still image data. This method calculates the precise position of the sub-fields and weights of the pixels under the assumption that the eye is tracking the motion according to the motion vectors.
  • FIG. 2D shows a part of the black and white luminance ramp.
  • the motion vectors are drawn with a speed of 2 pixels per field period.
  • the projections of the separate sub-fields are drawn on a diagram in which the luminance is drawn as function of the position on the retina when the eye is perfectly tracking the motion with a speed of 2 pixels per field period. All luminances generated by the sub-fields that are received at the same positions on the retina are integrated resulting in a diagram in which the total luminance received by the retina has been drawn as a function of the position on the retina (this is shown in Fig. 2A). What can be seen is that the pattern on the retina still does not resemble the still image luminance ramp. There is still a bright vertical bar visible.
  • a luminance of 20 must be shown as projected on the motion vector.
  • the right luminance level of the vertical line is obtained, when this pattern has a speed of 6 pixels per field period to the right.
  • the luminances that are required are the luminance levels shown on the motion vectors, i.e. the luminances of the pixels that are shown are the luminances of the compensation pattern.
  • OL indicates the obtained luminance when tracking, as a result of putting not the desired ramp itself, but the compensation pattern CP on the display.
  • the luminances of the pixels that are visible are the luminances projected on the motion vectors when the eyes are tracking the motion of 6 pixels per field period.
  • a first aspect of the invention provides a method as defined in claim 1. Further aspects of the invention provide a display driving device as defined in claim 7 and a display apparatus as defined in claim 8. Advantageous embodiments are defined in the dependent claims.
  • field information from a field of an image signal is distributed over a plurality of sub-fields, and a start time for each sub-field is generated in dependence upon motion.
  • Fig. 1 illustrates an example of a field period for an AC plasma display
  • Figs. 2A-2D illustrate motion artifacts for a luminance ramp at a speed of 2 pixels per field period
  • Fig. 3 illustrates motion-compensation of one grey-scale on the plasma screen
  • Fig. 4 illustrates a motion-compensated luminance ramp
  • Figs. 5A-5D illustrate motion-compensation at a speed of 3 pixels per field period
  • Figs. 6A-6D illustrate motion-compensation with an improved sub-field order and timing at a speed of 2 pixels per field period
  • Figs. 7A-7D illustrate motion-compensation with an improved sub-field order and timing at a speed of 3 pixels per field period
  • Figs. 8A-8D and 9 illustrate motion-compensation with an improved sub-field order and timing at a speed of 4 pixels per field period
  • Fig. 10 shows a block circuit diagram of a display apparatus in accordance with the present invention.
  • the sub-field order and timing is fixed for a given display panel.
  • the motion- compensation circuit could calculate (or a LUT with preprogrammed values could be used) the most optimum sub-field order and timing for a given speed.
  • the sub-field timing is hereby determined by the compensation circuit and is not fixed any more.
  • a preferred sub- field order and timing belonging to a speed of 4 pixels per field period from Figs. 8A-8D is given in Fig. 9, in which at the right-hand side the sub-field order and timing is given.
  • the second problem is a fundamental problem, it hardly never occurs that there is only one speed apart from O in a natural scene. What mostly is the case is that only one speed within a certain small range is present much more often than any other speed.
  • motion artifacts mostly occur around the most significant sub-fields (the sub- fields with the highest weights) at spatial sub-field changes when only a small change in grey-scale must be achieved.
  • Both properties can be used to calculate the speed that shows most artifacts for that scene when a normal sub-field order would be used. This speed can be used as an input to calculate a more optimum sub-field timing and order. When implementing this in this way, flicker is likely to occur due to a sudden shift of a significant sub-field.
  • a method is presented to reduce the motion artifacts by dynamically adapting the sub-field order and timing dependent on the contents of a video image.
  • the most common speed can be found whereby artifacts are likely to occur.
  • the best sub-field order and timing is calculated and this is applied in the panel.
  • a low- pass filtering this information prevents introduction of flicker due to sudden changes in sub- field timing.
  • the speed to which the sub-field order is adjusted can be one of the following alternatives:
  • a speed obtained in dependence on one or more of the above speeds by taking e.g. an average or a median.
  • the MSB sub-field i.e. the sub-field having the highest sub-field weight
  • the MSB is put at a position close to the middle of that line to accommodate for motion-estimation errors.
  • ⁇ t is the time difference between the generation of the MSB-1 sub-field with reference to the MSB sub-field
  • x is the displacement expressed in full pixels, thereby reducing the rounding error to
  • Tf is the field time.
  • the MSB-1 sub-field is put at an intersection close to that of the MSB sub-field to reduce artifacts resulting from motion estimation errors. If there are several sub-fields having an identical highest weight, one of these sub-fields is taken for the above-mentioned MSB sub-field, while another of these sub- fields is taken for the above-mentioned MSB-1 sub-field, etc.
  • Fig. 10 shows a block circuit diagram of a display apparatus in accordance with the present invention.
  • An antenna A receives a television signal, which is applied to a tuner T.
  • An output signal of the tuner T is applied to a video signal processor VP.
  • An output signal of the video processor VP is applied to an analysis unit AU for analyzing speeds in an image and the contents of the image.
  • An output signal of the analysis unit AU is applied to sub-field order and timing calculator SOC for calculating the most optimal sub-field order and timing in accordance with the present invention as described above.
  • the output signal of the video processor VP is applied to a display driver DD, an output of which is connected to a PDP or DMD display D.
  • a control input of the display driver DD is connected to an output of the sub-field order and timing calculator SOC for adjusting the sub-field order in accordance with the present invention.
  • the past is taken into account (low-pass filtering).
  • Motion-compensation is based on the sub-field order and timing.
  • This can have been stored into a LUT (look-up table) ROM.
  • Fig. 11 explains the notion positional error by means of a Time versus Position diagram of the type of Fig. 2D and other figures described above.
  • the positional error PE mentioned above is the difference between the actual position (always an integer position) of a pixel in a sub-field on the display grid (indicated by a dot) on the one hand, and the line indicating the motion trajectory.

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Power Engineering (AREA)
  • Plasma & Fusion (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)
  • Transforming Electric Information Into Light Information (AREA)
  • Liquid Crystal Display Device Control (AREA)
  • Control Of Gas Discharge Display Tubes (AREA)
PCT/IB1999/000375 1998-03-23 1999-03-04 Display driving Ceased WO1999049448A2 (en)

Priority Applications (3)

Application Number Priority Date Filing Date Title
JP54797699A JP2002508090A (ja) 1998-03-23 1999-03-04 ディスプレイ駆動
EP99903882A EP0983584A2 (en) 1998-03-23 1999-03-04 Display driving
KR1019997010860A KR100623404B1 (ko) 1998-03-23 1999-03-04 디스플레이 구동

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
EP98200918 1998-03-23
EP98200918.5 1998-03-23

Publications (2)

Publication Number Publication Date
WO1999049448A2 true WO1999049448A2 (en) 1999-09-30
WO1999049448A3 WO1999049448A3 (en) 1999-12-09

Family

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Application Number Title Priority Date Filing Date
PCT/IB1999/000375 Ceased WO1999049448A2 (en) 1998-03-23 1999-03-04 Display driving

Country Status (5)

Country Link
US (1) US6373477B1 (enExample)
EP (1) EP0983584A2 (enExample)
JP (1) JP2002508090A (enExample)
KR (1) KR100623404B1 (enExample)
WO (1) WO1999049448A2 (enExample)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2001039488A3 (en) * 1999-11-26 2002-01-17 Koninkl Philips Electronics Nv Method and unit for processing images
US6710772B2 (en) 2001-09-05 2004-03-23 Koninklijke Philips Electronics N.V. Plasma display panel and method of driving thereof

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3322809B2 (ja) * 1995-10-24 2002-09-09 富士通株式会社 ディスプレイ駆動方法及び装置
EP1049068A1 (en) * 1999-04-28 2000-11-02 THOMSON multimedia S.A. Method and apparatus for processing video signals
WO2001001382A1 (en) * 1999-06-28 2001-01-04 Koninklijke Philips Electronics N.V. Subfield-driven display
JP2001083926A (ja) * 1999-09-09 2001-03-30 Sharp Corp 動画偽輪郭補償方法およびその方法を用いた画像表示装置
EP1172765A1 (en) * 2000-07-12 2002-01-16 Deutsche Thomson-Brandt Gmbh Method for processing video pictures and apparatus for processing video pictures
EP1253575A1 (en) * 2001-04-27 2002-10-30 Deutsche Thomson-Brandt Gmbh Pre-filtering for plasma display panel signal
AU2002340506A1 (en) * 2002-11-07 2004-06-07 Fractus, S.A. Integrated circuit package including miniature antenna
US7253811B2 (en) * 2003-09-26 2007-08-07 Hewlett-Packard Development Company, L.P. Generating and displaying spatially offset sub-frames
KR100557660B1 (ko) * 2004-07-29 2006-03-10 매그나칩 반도체 유한회사 영상 신호에서의 플리커 검출 방법
JP2008261984A (ja) * 2007-04-11 2008-10-30 Hitachi Ltd 画像処理方法及びこれを用いた画像表示装置
KR20150019686A (ko) * 2013-08-14 2015-02-25 삼성디스플레이 주식회사 룩업 테이블에 기반한 부분적 의사 윤관 검출 방법 및 그 장치, 그리고 이를 이용한 영상 데이터 보정 방법

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Publication number Priority date Publication date Assignee Title
EP1008980A1 (en) 1997-04-10 2000-06-14 Fujitsu General Limited Dynamic image correction method and dynamic image correction circuit for display

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EP0540102B1 (en) * 1991-10-31 1997-07-23 Koninklijke Philips Electronics N.V. Arrangement for reducing artifacts in video signals
US5604856A (en) * 1994-10-13 1997-02-18 Microsoft Corporation Motion compensated noise reduction method and system for computer generated images
JP3432348B2 (ja) * 1996-01-30 2003-08-04 三菱電機株式会社 代表画像表示方法、代表画像表示装置およびこの装置を用いた動画検索装置
FR2745410B1 (fr) * 1996-02-27 1998-06-05 Thomson Csf Procede de commande d'un ecran de visualisation d'image affichant des demi-teintes, et dispositif de visualisation mettant en oeuvre le procede
JPH09319342A (ja) * 1996-03-26 1997-12-12 Sharp Corp 液晶表示装置及び液晶表示装置の駆動方法
EP0807919A1 (en) * 1996-05-13 1997-11-19 Hitachi, Ltd. Display apparatus and display method thereof
JP2962245B2 (ja) * 1996-10-23 1999-10-12 日本電気株式会社 表示装置の階調表示方法
JP3672697B2 (ja) * 1996-11-27 2005-07-20 富士通株式会社 プラズマディスプレイ装置
JP3033546B2 (ja) * 1997-01-28 2000-04-17 日本電気株式会社 交流放電メモリ型プラズマディスプレイパネルの駆動方法
JP3331918B2 (ja) * 1997-08-27 2002-10-07 日本電気株式会社 放電表示パネルの駆動方法
JP3423865B2 (ja) * 1997-09-18 2003-07-07 富士通株式会社 Ac型pdpの駆動方法及びプラズマ表示装置

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1008980A1 (en) 1997-04-10 2000-06-14 Fujitsu General Limited Dynamic image correction method and dynamic image correction circuit for display

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2001039488A3 (en) * 1999-11-26 2002-01-17 Koninkl Philips Electronics Nv Method and unit for processing images
KR100800272B1 (ko) * 1999-11-26 2008-02-05 코닌클리케 필립스 일렉트로닉스 엔.브이. 영상들을 처리하는 방법 및 유닛
US6710772B2 (en) 2001-09-05 2004-03-23 Koninklijke Philips Electronics N.V. Plasma display panel and method of driving thereof
WO2003021559A3 (en) * 2001-09-05 2004-05-06 Koninkl Philips Electronics Nv A plasma display panel with reduction of motion artifacts and method of driving thereof

Also Published As

Publication number Publication date
US6373477B1 (en) 2002-04-16
KR20010012894A (ko) 2001-02-26
JP2002508090A (ja) 2002-03-12
KR100623404B1 (ko) 2006-09-13
WO1999049448A3 (en) 1999-12-09
EP0983584A2 (en) 2000-03-08

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