WO1999038232A1 - Petit contacteur pour sondes de verification, mise sous boitier des puces et autres - Google Patents

Petit contacteur pour sondes de verification, mise sous boitier des puces et autres Download PDF

Info

Publication number
WO1999038232A1
WO1999038232A1 PCT/US1999/001249 US9901249W WO9938232A1 WO 1999038232 A1 WO1999038232 A1 WO 1999038232A1 US 9901249 W US9901249 W US 9901249W WO 9938232 A1 WO9938232 A1 WO 9938232A1
Authority
WO
WIPO (PCT)
Prior art keywords
contact elements
substrate
contact
array
contact element
Prior art date
Application number
PCT/US1999/001249
Other languages
English (en)
Inventor
Alexander H. Slocum
R. Scott Ziegenhagen, Iii
Robert A. Richard
Original Assignee
Kinetrix, Inc.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Kinetrix, Inc. filed Critical Kinetrix, Inc.
Priority to AU23312/99A priority Critical patent/AU2331299A/en
Publication of WO1999038232A1 publication Critical patent/WO1999038232A1/fr

Links

Classifications

    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R1/00Details of instruments or arrangements of the types included in groups G01R5/00 - G01R13/00 and G01R31/00
    • G01R1/02General constructional details
    • G01R1/06Measuring leads; Measuring probes
    • G01R1/067Measuring probes
    • G01R1/06711Probe needles; Cantilever beams; "Bump" contacts; Replaceable probe pins
    • G01R1/06733Geometry aspects
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49811Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads
    • H01L23/49816Spherical bumps on the substrate for external connection, e.g. ball grid arrays [BGA]
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/341Surface mounted components
    • H05K3/3421Leaded components
    • H05K3/3426Leaded components characterised by the leads
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K7/00Constructional details common to different types of electric apparatus
    • H05K7/02Arrangements of circuit components or wiring on supporting structure
    • H05K7/10Plug-in assemblages of components, e.g. IC sockets
    • H05K7/1053Plug-in assemblages of components, e.g. IC sockets having interior leads
    • H05K7/1061Plug-in assemblages of components, e.g. IC sockets having interior leads co-operating by abutting
    • H05K7/1069Plug-in assemblages of components, e.g. IC sockets having interior leads co-operating by abutting with spring contact pieces
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R1/00Details of instruments or arrangements of the types included in groups G01R5/00 - G01R13/00 and G01R31/00
    • G01R1/02General constructional details
    • G01R1/04Housings; Supporting members; Arrangements of terminals
    • G01R1/0408Test fixtures or contact fields; Connectors or connecting adaptors; Test clips; Test sockets
    • G01R1/0433Sockets for IC's or transistors
    • G01R1/0441Details
    • G01R1/0466Details concerning contact pieces or mechanical details, e.g. hinges or cams; Shielding
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30Technical effects
    • H01L2924/301Electrical effects
    • H01L2924/3011Impedance
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/325Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by abutting or pinching, i.e. without alloying process; mechanical auxiliary parts therefor
    • H05K3/326Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by abutting or pinching, i.e. without alloying process; mechanical auxiliary parts therefor the printed circuit having integral resilient or deformable parts, e.g. tabs or parts of flexible circuits
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/40Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/4092Integral conductive tabs, i.e. conductive parts partly detached from the substrate
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02PCLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50Manufacturing or production processes characterised by the final manufactured product

Definitions

  • This invention relates generally to semiconductor integrated circuits and more specifically to structures for making reliable electrical contact thereto.
  • a contactor is a socket with numerous springy contact elements. One end of each contact element is connected to an automatic test system. The other end of the contact element makes contact with a test point on the integrated circuit chip. For a ball grid array, each solder ball is generally used as a test point.
  • One commercially available contactor has S-shaped contact elements.
  • the looped parts of the "S" engage an elastomeric material to form two springy elements.
  • One side of the S is pressed against the test point and the other is pressed against a pad that is connected to the test system.
  • Such a contactor is difficult and expensive to make.
  • each time a part is pressed into the contactor the S shaped contact element scrapes across the pad. This scraping action can cause excessive wear on the pad, limiting the useful life of the contactor.
  • the ends of the S shaped contact elements act like coupled parallel plate capacitors, which limits electrical performance.
  • a limiting factor in making contactors for small BGA devices is that the physical space available for the contact elements is very limited.
  • the beams which form the springy portions of the contact elements must therefore be relatively short. Short beams are not as compliant as longer beams and the distance the beams can
  • a problem with having a limited stroke is that it significantly increases the accuracy with which the test point on the chip must be positioned relative to the contactor for the contactor to work. This is referred to as the planarity of the contact points.
  • the test point on the chip should press down on the contact element so that the springy portion of the contact element is deflected enough to generate sufficient spring force to make good electrical contact.
  • the contactor might be designed so that the test point on the chip is intended to deflect the contact element by an amount equal to one half of its stroke. In this case, one half of the stroke is an upper limit on the amount of inaccuracy that is possible in positioning the test point. If the test point is too high by that amount, it will not make contact with the contactor at all.
  • the greater the stroke of the contact element the more tolerance there is for inaccurate positioning of the test points on the chip during testing, i.e. lack of planarity of the contact points. Greater tolerance in positioning the test points will translate into a greater likelihood likely that good electrical contact will be made to the test points.
  • a ball grid array package might have hundreds of test points. All test points in the array must be contacted simultaneously. Thus, not only must the BGA package be positioned accurately relative to the contact elements, the test points on the BGA package must be positioned accurately relative to the package. For a BGA, this is difficult because the test points are solder balls.
  • the solder balls are generally formed and then placed on pads on the package. There is significant variability in the processes of forming the balls and attaching them to the pads. For example, thermal "warp" of the chip can lead to significant variability. As a result that there can be significant variation in the height of the solder balls.
  • probe cards have recently been made by attaching small, S -shaped perpendicular to the surface of a ceramic substrate. Tips might be attached to the S- shaped wires with points for better electrical contact.
  • probe cards are complex and expensive to manufacture. They are also very delicate and easily damaged.
  • probe card that is made with very short contact elements that can be aligned with contact pads on adjacent chips on the wafers. It would also be desirable to have such a probe card that is less expensive to manufacture and less susceptible to damage.
  • Micromachining involves processing techniques similar to those used to make semiconductor chips. Layers of material are deposited on a substrate. Masks are used to form protective coatings in particular patterns on the layers. When the layers are exposed to various etching solutions, structures are left that have the required shape. Micromaching has been used for making various structures, such as relays.
  • micromachined beams suffer from various drawbacks.
  • One problem is that it is difficult to generate the required spring force to make good electrical contact.
  • oxide layers form over metal structures, such as would be used to form most test points. There must be sufficient contact force to ensure that the oxide layer is either broken up or pierced by the contact element.
  • a second problem is that the micromachined beams are often so small that, if electric charge builds up on the beam, electrostatic force can deflect the beam. If the beam is deflected, it does not make good electrical contact with the integrated circuit chip. It has been suggested that probe cards be made with micromachined contacts on a flexible membrane, instead of a rigid substrate. Extra stroke and more contact force is provided by the membrane.
  • thermal stress occurs when two items, made of materials with different coefficients of thermal expansion, are rigidly attached or when two items - of similar or dissimilar material - experience a large temperature gradient. If an integrated circuit chip, which is generally made of silicon, were soldered directly to the printed circuit board, differences in the coefficient of thermal expansion between the silicon in the chip and the printed circuit board would stress the solder bonds and might cause the bonds to break. The problem is particularly acute for highly integrated parts because such parts can generate a lot of heat in operation and also because a limited amount of solder can be used for attaching the numerous points of the packaged part to the printed circuit board. Even a silicon chip mounted to a ceramic substrate, if the chip dissipates high power, can experience problems with conventional attachment techniques.
  • BGA packages are generally made by attaching the integrated circuit chip to a small printed circuit board that is separated from the chip by a compliant structure, such as an elastomeric pad.
  • the solder balls are formed on one side of the small printed circuit board. Wire bonds run from the chip to the printed circuit board. Traces in the printed circuit board connect the wire bonds to the solder balls. The entire structure is encapsulated, leaving just the solder balls exposed.
  • This type of packaging adjusts for thermal stress that might occur when the BGA is mounted to a large printed circuit board.
  • the printed circuit board inside the BGA package has a coefficient of thermal expansion that matches the printed circuit board to which the BGA package is attached, thereby reducing the thermal stress on the solder joints.
  • the wire bonds between the chip and printed circuit board are flexible enough to adjust for forces caused by the mismatch.
  • small scale packaging is also generally associated with integrated circuits that operate at high frequencies. It would be desirable to have contact elements suitable for testing at very high frequency.
  • the number of bends in the compliant member equals or exceeds the number of points at which the compliant member is affixed to a substrate.
  • the contact members have a very small scale. They are formed using microelectrical mechanical fabrication techniques and are formed on silicon substrates.
  • FIG. 1 A is an isometric view of an array of contact elements according to the invention.
  • FIG. IB is an enlarged view of a portion of FIG. 1A showing greater detail of one contact element;
  • FIG. 1C shows further detail of the compliant member of a contact element of FIG. 1A;
  • FIG. 2 shows a step in the fabrication of the array of contact elements of FIG.
  • FIG. 3 shows a step in the fabrication of an alternative embodiment of the array of contact elements made according to the invention
  • FIG. 4A shows a contact element according to the invention configured to provide a contact pad
  • FIG. 4B shows a contact element according to the invention configured to provide a probe tip
  • FIG. 5A shows a contact element according to the invention configured with a contact pad holding a solder ball
  • FIG. 5B shows an alternative embodiment of a contact element according to the invention
  • FIG. 6 is an isometric view of the bonding pads on the surface of an integrated circuit chip
  • FIG. 7 shows an alternative embodiment of a contact element according to the invention which is adapted for making a probe for probing bonding pads as shown in FIG. 6
  • FIG. 8A is an isometric view of a probe for probing bonding pads as shown in
  • FIG. 10 is a sketch illustrating a ball grid array package formed according to the invention.
  • DESCRIPTION OF THE PREFERRED EMBODIMENT Copending US patent application by Slocum et al. entitled ROBUST, SMALL ELECTRICAL CONTACTOR, filed simultaneously with this application and hereby incorporated by reference, describes a contact structure which provides reliable and repeatable contact. That contact structure is designed to withstand forces parallel to the substrate which carries an array of contact elements. Because the contact structure is resistant to forces parallel to the substrate, it is not well suited to provide compliance when forces are applied parallel to the substrate.
  • FIG. 1A shows an array 100 of contact elements 110 fabricated on a substrate 101.
  • specific size of the contact elements 110 or the array 100 are not critical to the invention, the invention will be most useful in conjunction with large arrays of relatively small contact elements. Such arrays are needed in many facets of semiconductor fabrication or utilization. It is contemplated that contact elements 110 will be less than 2 mm in any direction. However, the invention will be most useful for making contact to arrays of points that are very close together. For example, ball grid array packages have solder balls that are on a pitch of 1.27 mm and smaller. Thus, in a preferred embodiment contact elements 110 will be 1.3 mm or less in any dimension. Very significantly, the contact elements of the invention are intended to provide the spring force, compliance and robustness for making contact on a very small pitch. Thus, in some embodiments, contact elements 110 will have a maximum dimension of
  • substrate material Various items might be used as a substrate.
  • the choice of substrate material will depend in large measure on the intended use of the array 100 of contact elements.
  • silicon such as is conventionally used in the fabrication of integrated circuits
  • epoxy based material such as is conventionally used to make printed circuit boards, are two desirable substrate materials.
  • substrate 101 will have electrically conducting traces (not shown) running through it. Each contact element 110 is connected to a trace, thereby allowing electrical signals to be routed to and from the contact elements
  • the contact elements 110 are made of one or more conducting members, generally parallel with substrate 101.
  • the conducting members are made from a springy material with bends in them.
  • conducting members 110 could be a metal, such as aluminum, nickel or chrome. Alternatively, they could be made from a
  • contact elements 110 could be made from a ceramic, such as silicon nitride or silicon carbide, or a silicon oxide. If an insulative material is used as the springy material, a conductive material will be overlayed on the insulative material. For example, a highly conductive material without adequate springiness, such as gold, might be deposited over a silicon nitride beam.
  • the bends give the contact elements 110 compliance in multiple directions. As shown in FIG. 1C, the bends give contact element 110 four approximately equal lobes. The lobes give contact element 110 a clover-shape. Contact element 110 is bent into two arm portions 106 A and 106B and a tip portion 104 (FIG. IB). Arm portions 106A and 106B give contact element 110 bending and torsional compliance when subjected to forces at tip portion 104.
  • clover-shaped contact element 110 as shown in FIG. 1 A has compliance with three degrees of freedom.
  • Tip portion 104 can move in a direction perpendicular to the surface of substrate 101. It can also move in the two directions that define a plane parallel with the surface of substrate 101.
  • clover-shaped structure combines bending and torsional stress in a small area, thereby maximizing the compliance potential of the material. This shape allows the contacts to be miniaturized, while still providing the required contact force and compliance.
  • conducting element 110 has a thickness of approximately 0.01 mm to 0.05 mm.
  • the overall length of conducting element is approximately 0.15 mm to 1 mm.
  • the bend radius of each of the lobes is 0.01 mm to 0.1 mm.
  • contact element 110 is mounted above the surface of substrate 101.
  • Contact elements 110 are mounted to posts 102A and 102B, that hold contact element 110 above substrate 101.
  • Posts 102A and 102B project, in the illustrated embodiment, above the surface of substrate 101 by about 0.1 mm. This dimension defines the stroke of the connector and will thus be set to equal or exceed the desired amount of deflection at the tip 104.
  • contact element 110 has two ends 103A and 103B that are mounted to separate posts 102A and 102B.
  • This configuration is desirable for making a probe for "fly-by” testing, as will be described below. Briefly, fly-by testing occurs when a signal is applied to a test point over a separate path than is used to measure signals at the same point. "Fly-by” testing is used with high speed signals in which transmission line effects might cause interference between signals being applied
  • posts 102A and 102B are electrically conducting. Posts 102A and 102B connect contact element 110 to the conductive traces within substrate 101. If posts 102 A and 102B are made of a non-conducting material, conducting pathways can be included through them, such as vias used in circuit board or semiconductor fabrication, to make electrical connection between contact element 110 and the traces within substrate 101.
  • FIG. 1C shows contact element 110 in greater detail.
  • FIG. 2 shows the posts 102 A and 102B on substrate 101 without showing contact element 110.
  • posts 102A and 102 are electrically conducting and are physically separate.
  • the surface of substrate 101 is an insulator, which may overlay a ground plane within substrate 101. If contact element 110 is formed from an insulator with a conductive trace on one surface, then the surface of substrate 101 can be a conductive ground plane.
  • FIG. 3 shows an alternative implementation of substrate 101, which forms a base for mounting array 100.
  • substrate 101 is formed with a well 111 associated with each contact element 110.
  • tips 104 of contact elements 110 bend toward substrate 101 when making electrical contact with another structure, such as an integrated circuit chip or printed circuit board.
  • posts 102 A and 102B have a height sufficient to provide the required contact stroke.
  • posts 102A and 102B do not need to be so high.
  • tip 104 will bend into recess 111, thereby providing the required stroke.
  • the embodiment of FIG. 3 is useful for manufacturing processes in which it is easier to form a recess than to construct a tall post.
  • FIG. 4A and 4B illustrate important advantages of a contact element according to the invention.
  • a contact element 402 is shown with the same "clover-leaf structure of contact element 110.
  • base 401 of contact element 402 is solid instead of split as shown in FIG. 1 A.
  • a post 403 has been fabricated at the tip of contact element 402.
  • Post 403 might, for example, be etched or otherwise fabricated with a point to facilitate good electrical connection with a metal surface on which an oxide layer has formed. Post 403 aids in breaking the oxide layer such that good electrical contact is made to the underlying metal conductor.
  • the embodiment of FIG. 4B can also be used as the basis form making a compliant pad structure 400.
  • post 403 serves as an
  • FIG. 4A is suited for using the array of contact elements as a probe to make electrical contact to numerous points on an integrated circuit chip
  • the embodiment of FIG. 4A is useful for making compliant pads on an integrated circuit chip.
  • Pads are often included on the exterior surfaces of packaged integrated circuit chips, particularly BGA type packages. The pads serve as an attachment point of the chip to a printed circuit board or other substrate, such as might be found in a multi-chip module (MCM).
  • MCM multi-chip module
  • An important advantage of making compliant pads on an integrated circuit chip is that problems associated with thermal stress are greatly reduced.
  • pad 410 is attached at one end to post 403.
  • Post 403 lifts pad 410 above contact element 402, such that contact element 402 will still provide compliance both parallel and perpendicular to substrate (such as 101 in FIG. 1A) to which the array is mounted.
  • Pad 410 may optionally be formed with a ring 411. Ring 411 serves to retain a solder ball on pad 410, thereby aiding in miniaturization of the BGA technology. In making BGA type devices, a solder ball is placed on a pad.
  • FIGs. 5A and 5B show an alternative embodiment of a contact element 500.
  • Contact element 500 has two spiral shaped beams 502 A and 502B. One end of each beam 502A and 502B is attached to post 501 A or 501B, respectively.
  • Posts 501A and 501B elevate beans 502A and 502B above the surface of a substrate (such as substrate 101 in FIG. 1A).
  • the other end of each beam is attached to tip 503.
  • Tip 503 is thicker than beams 502A and 502B such that the upper surface of tip 503 is above the beams 502 A and 502B.
  • tip 503 can be shaped into a point appropriate for piercing an oxide layer on a pad it contacts.
  • Beams 502A and 503B can deflect down towards a substrate. Alternatively, they can flex at their bends to allow compliance of tip 503 in a plane parallel to the surface of a substrate (such as substrate 101 in FIG. 1A).
  • Contact element 500 in the configuration of FIG. 5B, could be used to probe pads, such as might be found on an integrated circuit chip.
  • tip 503 might be etched to be pointed.
  • a pointed tip improves electrical contact by piercing an oxide layer which might build up on a metal pad to which contact element 500 us to make electrical contact.
  • Pad 510 is elevated above beams 502 A and 502B, thereby allowing tip 503 to have its full range of compliant motions.
  • Pad 510 might thus be used as an attachment point for a solder ball in a BGA package that is resistant to thermal stress.
  • Pad 510 has an optional ring 511 around its periphery to act as a lip to help restrain solder ball 551.
  • FIG. 10 illustrates a semiconductor device with a ball grid array package according to the invention.
  • FIG. 10 is drawn with a scale that exaggerates the contact elements.
  • a substrate 101 is shown in cross section.
  • the substrate 101 contains the electronic circuitry of the semiconductor chip.
  • an array of contact elements is formed on one surface of the chip.
  • five such contact elements are shown in a row. In a practical application, there would likely be many more such contact elements, but only five are shown for clarity.
  • Each contact element 402 is mounted on a post 401 to a surface of the chip that acts as substrate 101.
  • Pads 410 are elevated above contact elements 402 on posts 403.
  • Ring 411 retains a solder ball 551.
  • the entire chip is encased in a housing 1010, which is optional.
  • the solder balls 551 would be placed against a printed circuit board and heated until they reflow, thereby securing pads 510 to the printed circuit board.
  • Contact element 500 would then provide compliance between the chip and the printed circuit board, making the structure immune to thermal stress.
  • FIG. 6 shows the surface of an integrated circuit chip 600.
  • Integrated circuit chip 600 has numerous pads 601 on it. Pads 601 are laid out in rows along the periphery of chip 600 in what is commonly referred to as a peripheral pad layout. Pads 601 connect to circuit elements within chip 600.
  • wire bonds are made from pads 601 to contact points extending from the package. Having pads 601 near the periphery of chip 600 is important to allow wire bonding. However, placing all the pads along the periphery means that the spacing between each pad will be very small. It is typical for the pads to be 0.004 inches (0.1 mm) square and spaced on center on the order of 0.006 inches (0.15mm) or less. Making the contact elements as in FIGs. 1 A or 5B with such a spacing might be undesirable. However, current probe cards are largely made using long tungsten needles for contact element, which is also undesirable.
  • a probe card that makes contact to the pads 601 would, in general, contain contact elements to contact the pads on many dies simultaneously.
  • the beams that form the contact elements are so long, with the contact pads around the periphery of each chip, it is difficult to fit the contact elements for adjacent
  • probe cards contain contact elements that align with the pads on dies that are spaced apart on the wafer. Thus, only dies that are physically separated on the wafer can be tested simultaneously. Testing in this fashion, though, requires more complicated set-up to ensure that all dies are eventually tested. Testing in this fashion also reduces efficiency because it will not always be possible to match the pattern of contact elements on the probe card to untested dies on the wafers. Thus, there would be an advantage to making a probe card that contained several arrays of contact elements. Each array of contact elements should have the probe tips of the contact elements aligned in rows to match the pattern of pads 601. In addition, the contact elements should be confined within an area that matches the area of a chip 600. In this way, a probe card could be made that contacts adjacent dies on a wafer simultaneously.
  • FIG. 7 shows a contact element 700 that could be used to make a probe card with an array of contact elements having their tips arranged in lines along the periphery of the chip. However, all of the contact elements in the array can be positioned within the boundaries of the chip. Such a probe card would be useful for simultaneously probing several adjacent dies on a wafer.
  • FIG. 7 shows an L-shaped contact element 700.
  • the L-shaped contact element 700 has a first arm portion 705 and a second arm portion 706.
  • the arms 705 and 706 are elevated above the surface of a substrate (such as 101 in FIG. 1A) by post 701.
  • first arm portion 705 is loaded in bending and torsion when a force normal to the surface of probe card 802 is applied at tip 703.
  • Second arm portion 706 is loaded in bending.
  • the strain carrying capacity of the material is increased.
  • the L-shaped contact provides greater strain carrying capacity than a straight beam having the same length, thereby allowing a contact meeting the mechanical requirements for a probe card to be fit into a smaller area.
  • Arms 705 and 706 are shown made of an insulating material with a conductive trace 704 deposited thereon. Arms 705 and 706 are, in a preferred embodiment formed of undoped silicon. Undoped silicon has high strength and is therefore unlikely to be permanently deformed or damaged when used. Undoped silicon is an insulative material. To provide the required conductivity, metal trace 704 is formed over arms 705 and 706. Metal trace 704 is connected to
  • arms 705 and 706 might be coated with silicon nitride that allows contact 700 to be a shielded impedance controlled design.
  • a probe tip 703 can be formed on second arm 706.
  • probe tip 703 is made of a hard metal, such as chrome, that is etched into a point. Probe tip 703 breaks through any oxide layer that might form on a pad 601.
  • the L-shaped contact elements 700 are particularly well suited for making arrays of contact elements on a probe card.
  • FIG. 8 A shows one array 800 of contact elements 700 that might be incorporated into a probe card.
  • FIG. 8A shows one array of contact elements that is intended to probe one die on a wafer, such as die 600 (FIG. 6). It will be appreciated that multiple arrays of contact elements will be incorporated into a probe card 802. For simplicity, only one such array is shown. However, it will be appreciated that the array of FIG. 8A would be repeated multiple times on probe card 802. The arrays would be spaced to match the spacing of dies on the wafer to be probed.
  • FIG. 8B shows an enlarged view of one corner of the array 800.
  • the probe tips 703 are positioned in rows that match the rows of contact pads 601 (FIG. 6) being probed. Note also that the unique L-shape of contact elements 700 allows contact elements to be aligned with all contact pads - even at the corners of the die.
  • Contact elements 700 are disposed in two rows. Inner row 803 has contact elements with second arm 706 bending to the left. Outer row 804 has contact elements with second arm 706 bending to the right. The contact elements in inner row 803 and outer row
  • a probe tip 703 in inner row 803 aligns with every second contact pad around the periphery of chip 600.
  • the probe tips 703 in outer row 804 align with every second contact pad, and are interleaved with the probe tips from inner row 803.
  • This interleaved pattern continues even at the corner of the pattern of peripheral pads, thereby reducing the overall area occupied by the contact elements. In this way, all of the contact elements 700 for one chip 600 can fit within the area occupied by that die on the wafer. Thus, multiple adjacent die can be readily probed.
  • FIG. 8B also shows a stop 801 positioned below each probe tip 703. Stop 801 is optional. However, it is desirable because it allows contact element 700 to be elevated further above the surface of probe card 802 than the required stroke of probe
  • Stop 801 prevents contact element 700 from being over stressed and therefor damaged.
  • a stop 801 might be used, for example, where it is desired to increase the spacing between a contact element 700 and substrate 802.
  • Stop 801 can be an insulative material such as silicon oxide. However, a conductive material could also be used, depending on the circuitry of the probe card.
  • FIG. 9 shows an alternative implementation of contact element 700. Contact element 900 is likewise L-shaped with a first arm 905 and a second arm 906. The arms 905 and 906 might be made of silicon in the same way that arms 705 and 706 are described. However, in the embodiment of FIG. 7, the conductive trace 704 is deposited on the surface of the arms 705 and 706. In the embodiment of FIG.
  • the conducting element is a layer in a trench 904 that is formed in the surface of arms 905 and 906. Contact is made to the conductive trace in trench 904 by means of a via through post 901. At the tip end of contact element 900, a conductive pad 907 is deposited. Conductive pad 907 makes electrical contact with the conducting element within trench 904. A probe tip 903 may then be formed on pad 907.
  • An advantage of forming a conductive layer in a trench is that the stress on the conducting element might thereby be reduced. Reducing the stress on the conducting element will be particularly important if the conducting element can withstand less stress than the arms. It is also important because the conducting element, if deposited on the surface of the arms, might experience more stress than the arms.
  • trench 904 is cut to a depth in arms 905 and 906 such that the bottom of the trench falls on the "neutral axis" of the beam.
  • one side of the beam will be stretched. The other side will be compressed. At some point in the beam, the beam is neither compressed nor stretched. The points that are neither stretched nor compressed define the neutral axis. The neutral axis will usually fall near the center of the beam.
  • trench 904 will have a depth that is between one quarter and three quarters of the thickness of the arms. In this manner, the stresses on a metal conductive trace, which can not readily withstand the same stresses as silicon, will be minimized.
  • trench 904 will have a depth that is between about one quarter and one half the thickness of the arms.
  • contact elements described above will be fabricated using microelectromechanical fabrication techniques.
  • fabrication would start with a silicon substrate.
  • circuit traces will first be formed in the silicon substrate in the same way that circuit traces are formed within a silicon substrate when manufacturing an integrated circuit chip.
  • the circuit traces carry signals to and from each contact element.
  • One trace will be used to carry signals to the contact element and the other will be used to carry the signals away from the contact elements.
  • Vias will then be cut through the surface of substrate 101, allowing electrical contact to be made to the circuit traces.
  • Posts 102A and 102B are then formed over those vias.
  • the posts are formed by depositing a layer of material over the surface of the substrate and then selectively etching it away to leave the pattern as shown in FIG. 2. If that material is a conductor, such as doped silicon, electrical connection is thereby made to the traces inside the substrate 101.
  • posts 102A and 102B are made from an insulative material, such as undoped silicon, silicon oxide or silicon nitride, vias will have to be cut through the posts and a conductive material, such as aluminum, deposited in the vias.
  • Conductive material can be deposited in the vias in the same way that vias are formed in the manufacture of semiconductor circuits.
  • a sacrificial layer is deposited over the surface of the substrate 101.
  • the sacrificial layer is formed to a thickness equal to the height of posts 102 A and 102B.
  • Another layer of material is then deposited over the sacrificial layer. This layer is the material that forms contact element 110. That layer is patterned to the required shape of contact element 110. If the material is an insulator, vias are cut through the layers above posts 102 A and 102B, so that electrical contact is made between the contct element 110 and the traces within substrate 101.
  • the sacrificial layer is removed, such as by etching.
  • etchant that preferentially removes the sacrificial layer but leaves the other structures largely unaffected is used.
  • the wells 111 are etched in the surface of substrate 101 before posts 102A and 102B are formed.
  • another layer such as a metal layer is deposited over the structure and then patterned to leave posts 403.
  • this step is performed before the sacrificial layer is removed.
  • another sacrificial layer is deposited.
  • the second sacrificial layer has a thickness equal to the height of post 403.
  • a metal layer is then deposited and etched to form pad 410.
  • Another layer can be deposited and patterned to form ring 411 , if desired.
  • the layer of material used to form ring 411 might be metal or could, alternatively, be an insulator or other material.
  • Array 100 is designed for use in making a contactor for testing ball grid array parts.
  • Each of the contact elements 110 is positioned to align with a ball on the ball grid array.
  • tip 104 is positioned to align with the solder ball.
  • tip 104 is formed by an open loop.
  • One possible mode of using contact element 110 is to align the open loop of tip 104 with the solder ball such that the solder ball fits partially into the open loop. If, in the fabrication of array 100, probe tip 104 does not perfectly align with a solder ball, the loop at tip 104 will tend to reach a stable point surrounding the tip of the solder ball.
  • the compliance of contact element particularly in a plane parallel to substrate 101, makes it possible for tip 104 to move into the required position.
  • array 100 is connected to an automatic test system in the place of a convention contactor. Electrical stimulus signals are produced by the test system and passed through the traces in substrate 101 to post 102 A. The signals pass through post 102A to contact element 110. The stimulus signal passes through arm 106A to tip 104.
  • Response signals travel back from tip 104 through arm 106B.
  • the response signals pass through post 102B into traces in substrate 100. Those traces run to comparator circuits inside the test system.
  • fly-by testing is particularly beneficial for high frequency signals.
  • high frequency signals are digital signals having data rates in excess of 750 MHz. Fly-by testing will be most useful in conjunction with signals having data rates above 1 GHz.
  • FIG. 4A and FIG. 5 A represent points on a ball grid array package to which solder balls are attached.
  • the ball grid array package is tested by pressing it against a contactor, which can simply be a series of pads.
  • Contact elements 400 or 500 provide the required compliance and spring force to make good electrical contact to the device.
  • the BGA device tests OK, it can then be placed on a printed circuit board or the substrate of a multichip module.
  • the solder balls are then heated to reflow the solder, thereby soldering the pad 410 or 510 to the printed circuit board, substrate of the multichip module or other chip interconnect system.
  • the contactor and the printed circuit board to which the BGA will ultimately be attached are very similar. Each is simply a series of pads that align with the solder balls.
  • the printed circuit board might even be used as the contactor for test. For example, the BGA part might be pressed against the printed circuit board. The printed circuit board would then be connected to the automatic test system.
  • FIGs. 8 A and 9 illustrate contact elements that are suitable for making a probe card.
  • the probe card would be made with multiple arrays on it, each matching the pattern of test pads of one chip on the die.
  • the probe card would be attached to a test system, as with a conventional probe card.
  • a wafer would then be aligned with the probe card using a device known in the industry as a "prober.”
  • the prober would align the wafer so that a set of adjacent chips on the wafer were each aligned with one array of contact elements on the probe card.
  • test system would then generate stimulus signals and measure response signals to test multiple chips on a wafer. These test signals would be passed through traces on the probe card to the contact elements on the probe card.
  • the prober would move the wafer to align a new set of chips with the arrays of contact elements on the probe card. This process would be repeated until all the chips on the wafer were tested. Because a probe card made according to the invention can probe adjacent chips simultaneously, the test operation can be performed more efficiently than when a convention needle- epoxy probe card is used.
  • contact elements according to the invention provide significant advantages over existing technology.
  • An L-shaped contact element such as 700 might be formed with the following dimensions: First arm 705 has a length of 0.010 inches (0.245 mm). Second arm has a length of 0.009 inches (0.221 mm). The width of each arm is 0.002 inches (0.049 mm) and the thickness about 0.0005 inches (0.012 mm). When made in silicon with a modulus of elasticity of about 200 GPa, a force of about 0.005 pounds (2 grams) should cause tip 703 to deflect about 0.003" (0.074 mm) and there would be Von-Mises stress in the beam of about 500 ksi. This large (in comparison to the scale of the devices being built) degree of deflection is made possible by the combined bending and torsion of the L-shaped beam.
  • a simple cantilevered beam with the same foot print would have a free cantilevered length of 0.009 inches (0.221 mm).
  • 0.009 inches (0.221 mm) long 0.0005 inch (0.012 mm) thick cantilevered beam to deflect the same distance would create a stress in the beam of 800 ksi, which is above the elastic limits of silicon. If the same beam were made of Beryllium Copper alloy, the stress would be 450 ksi, which is well above the elastic limit of 150 ksi.
  • the L shaped beam should provide a significantly greater stroke with the desired force to break oxides than a straight cantilevered beam.
  • the substrate has an upper surface and directions are recited relative to this surface. It will be appreciated that the designation "upper” is intended only to provide relative orientation and is not intended
  • Integrated circuit chips can be probed from any direction. Likewise, chips can be mounted to a printed circuit board with the surface described as the upper surface facing towards or away from the printed circuit board. Also, it was described that silicon based material are used as a substrate and also to form the contact elements. It will be understood that silicon is a preferred material because of its widespread use in the fabricating semiconductor integrated circuits. Other semiconductor materials, such as germanium or gallium arsenide, might alternatively be used. Further, while semiconductor materials are preferred because they allow integration of active circuitry with the contact elements, the invention might be employed without using semiconductor elements. For example, it might be possible to manufacture the contact elements on saphire, ceramic, epoxy or other materials suitable for use as a substrate for electrical circuits.
  • all of the substrate materials used in the preferred embodiments are rigid material.
  • structures as disclosed could be used on flexible substrate, such as are typically used in a membrane probe card.
  • FIG. 9 describes that a trench 904 is formed in arms 905 and 906 to relieve stress on the conducting element.
  • the conducting element might be formed in a serpentine shape, also to relieve stress.
  • Such a shape is disclosed in copending patent application 08/832,303 entitled FLEXIBLE SHIELDED LAMINATE BEAM FOR ELECTRICAL CONTACTS AND THE LIKE AND METHOD OF CONTACT OPERATION by Slocum et al., which is hereby incorporated by reference.
  • posts 102 A and 102B are formed in a separate step than contact elements 110. If the posts and contact elements are formed of the same material, they might be formed in the same step. One layer having a thickness equal to the height of the post plus the thickness of the contact element might be deposited. The contact element and posts might be shaped in one etching operation by etching free space below the contact element. Also, while manufacturing using microelectromechanical fabrication techniques is a preferred embodiment, other fabrication techniques might be employed. For example, the contact elements might be formed in a metal sheet which has been deposited on a sheet of insulative material, such as Kapton (a trademark of Dupont). The contact elements might be formed by stamping or etching. The metal contacts can then be soldered, brazed or welded to metal posts on the substrate. The insulative material would then be burned away with a laser or otherwise removed.
  • Kapton a trademark of Dupont
  • a Ball Grid Array package was made using compliant pads on the package as a mounting point for solder balls. It is not necessary that the package be manufactured with the solder balls on the package before it is attached to the printed circuit board. The solder balls, or even solder paste, might be applied first to the printed circuit board. Pads 410 on the BGA package would then be attached to the solder on the board. The same finished circuit board with the BGA attached would result.
  • contact elements are formed with conductive traces on an upper surface.
  • the contact elements might be formed on the lower surface of the contact elements.
  • conductive traces might be formed on stops 801 or on the surface of substrate 101. Conduction between the trace on the lower surface of the contact element and the upper surface of stops 801 or substrate 101 would indicate that the beam had been deflected to the full extent of its travel.
  • Such a signal might be used for an overtravel signal. It might also be used as a planarizer signal, indicating which test points are out of line with the others.
  • solder is used throughout. That term could refer to a low melting point metal alloy. However, it could more generally refer to a material that can be used for mechanical and electrical connection of electronic components. For example, conductive polymers are sometimes used in place of more traditional metal alloy solders.

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • General Physics & Mathematics (AREA)
  • Geometry (AREA)
  • Manufacturing & Machinery (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Measuring Leads Or Probes (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)
  • Testing Of Individual Semiconductor Devices (AREA)

Abstract

L'invention concerne un élément de contacteur électrique permettant de résoudre bon nombre de problèmes liés à l'établissement des liaisons électriques avec les puces. Ce type d'élément s'adapte dans des zones de petites taille mais, selon certaines configurations, il est opérationnel dans des directions multiples pour assurer la fonctionnalité nécessaire. La forme est conçue pour offrir une course importante et une force élevée, ce qui permet d'assurer un bon contact électrique. Le type d'élément considéré peut être incorporé à des contacteurs permettant d'assurer le contact électrique avec les ensembles de grilles à boules, aux fins de vérification. On peut également incorporer ce type d'élément dans les boîtiers desdits ensembles de grilles, et on peut l'utiliser comme point de montage pour les globules de soudure. L'élément considéré permet aux connexions électriques de résister aux contraintes qui résultent de l'expansion thermique différentielle.
PCT/US1999/001249 1998-01-23 1999-01-22 Petit contacteur pour sondes de verification, mise sous boitier des puces et autres WO1999038232A1 (fr)

Priority Applications (1)

Application Number Priority Date Filing Date Title
AU23312/99A AU2331299A (en) 1998-01-23 1999-01-22 Small contactor for test probes, chip packaging and the like

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US09/012,838 1998-01-23
US09/012,838 US5973394A (en) 1998-01-23 1998-01-23 Small contactor for test probes, chip packaging and the like

Publications (1)

Publication Number Publication Date
WO1999038232A1 true WO1999038232A1 (fr) 1999-07-29

Family

ID=21756959

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US1999/001249 WO1999038232A1 (fr) 1998-01-23 1999-01-22 Petit contacteur pour sondes de verification, mise sous boitier des puces et autres

Country Status (4)

Country Link
US (1) US5973394A (fr)
AU (1) AU2331299A (fr)
TW (1) TW396657B (fr)
WO (1) WO1999038232A1 (fr)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP2141503A1 (fr) * 2008-06-30 2010-01-06 Capres A/S Sonde multipoints pour tester les propriétés électriques et son procédé de fabrication
WO2013087677A1 (fr) * 2011-12-12 2013-06-20 Harting Ag Contact souple, connecteur enfichable et carte de circuits imprimés

Families Citing this family (68)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6228686B1 (en) 1995-09-18 2001-05-08 Tessera, Inc. Method of fabricating a microelectronic assembly using sheets with gaps to define lead regions
US20020009827A1 (en) 1997-08-26 2002-01-24 Masud Beroz Microelectronic unit forming methods and materials
US6520778B1 (en) 1997-02-18 2003-02-18 Formfactor, Inc. Microelectronic contact structures, and methods of making same
US6807734B2 (en) * 1998-02-13 2004-10-26 Formfactor, Inc. Microelectronic contact structures, and methods of making same
US6268015B1 (en) 1998-12-02 2001-07-31 Formfactor Method of making and using lithographic contact springs
US6255126B1 (en) * 1998-12-02 2001-07-03 Formfactor, Inc. Lithographic contact elements
US6980017B1 (en) * 1999-03-10 2005-12-27 Micron Technology, Inc. Test interconnect for bumped semiconductor components and method of fabrication
US6437591B1 (en) 1999-03-25 2002-08-20 Micron Technology, Inc. Test interconnect for bumped semiconductor components and method of fabrication
US6313999B1 (en) * 1999-06-10 2001-11-06 Agere Systems Optoelectronics Guardian Corp. Self alignment device for ball grid array devices
US6464513B1 (en) 2000-01-05 2002-10-15 Micron Technology, Inc. Adapter for non-permanently connecting integrated circuit devices to multi-chip modules and method of using same
US6698295B1 (en) 2000-03-31 2004-03-02 Shipley Company, L.L.C. Microstructures comprising silicon nitride layer and thin conductive polysilicon layer
US7026697B2 (en) * 2000-03-31 2006-04-11 Shipley Company, L.L.C. Microstructures comprising a dielectric layer and a thin conductive layer
US6407566B1 (en) 2000-04-06 2002-06-18 Micron Technology, Inc. Test module for multi-chip module simulation testing of integrated circuit packages
US6483329B1 (en) * 2000-08-28 2002-11-19 Micron Technology, Inc. Test system, test contactor, and test method for electronic modules
US6489794B1 (en) 2000-08-31 2002-12-03 Micron Technology, Inc. High speed pass through test system and test method for electronic modules
JP3440243B2 (ja) 2000-09-26 2003-08-25 株式会社アドバンストシステムズジャパン スパイラルコンタクタ
US6775906B1 (en) * 2000-10-20 2004-08-17 Silverbrook Research Pty Ltd Method of manufacturing an integrated circuit carrier
US6632733B2 (en) * 2001-03-14 2003-10-14 Tessera, Inc. Components and methods with nested leads
US6722896B2 (en) 2001-03-22 2004-04-20 Molex Incorporated Stitched LGA connector
US6694609B2 (en) * 2001-03-22 2004-02-24 Molex Incorporated Method of making stitched LGA connector
US7045889B2 (en) * 2001-08-21 2006-05-16 Micron Technology, Inc. Device for establishing non-permanent electrical connection between an integrated circuit device lead element and a substrate
US7049693B2 (en) * 2001-08-29 2006-05-23 Micron Technology, Inc. Electrical contact array for substrate assemblies
US7275562B2 (en) * 2001-10-17 2007-10-02 Agilent Technologies, Inc. Extensible spiral for flex circuit
TW519310U (en) * 2001-12-18 2003-01-21 Via Tech Inc Electric connection apparatus
DE10162983B4 (de) 2001-12-20 2010-07-08 Qimonda Ag Kontaktfederanordnung zur elektrischen Kontaktierung eines Halbleiterwafers zu Testzwecken sowie Verfahren zu deren Herstellung
US20060006888A1 (en) * 2003-02-04 2006-01-12 Microfabrica Inc. Electrochemically fabricated microprobes
JP3950799B2 (ja) * 2003-01-28 2007-08-01 アルプス電気株式会社 接続装置
US20080211524A1 (en) * 2003-02-04 2008-09-04 Microfabrica Inc. Electrochemically Fabricated Microprobes
JP2006064676A (ja) * 2004-08-30 2006-03-09 Tokyo Electron Ltd プローブ針、プローブ針の製造方法および三次元立体構造の製造方法
JP4308797B2 (ja) * 2005-05-02 2009-08-05 株式会社アドバンストシステムズジャパン 半導体パッケージおよびソケット付き回路基板
US7245135B2 (en) * 2005-08-01 2007-07-17 Touchdown Technologies, Inc. Post and tip design for a probe contact
US7589542B2 (en) * 2007-04-12 2009-09-15 Touchdown Technologies Inc. Hybrid probe for testing semiconductor devices
US7362119B2 (en) * 2005-08-01 2008-04-22 Touchdown Technologies, Inc Torsion spring probe contactor design
TW200739831A (en) * 2006-04-12 2007-10-16 Phoenix Prec Technology Corp Carrier board structure with chip embedded therein and method for fabricating the same
US7384271B1 (en) 2007-06-14 2008-06-10 Itt Manufacturing Enterprises, Inc. Compressive cloverleaf contactor
US7985672B2 (en) * 2007-11-28 2011-07-26 Freescale Semiconductor, Inc. Solder ball attachment ring and method of use
WO2014011232A1 (fr) 2012-07-12 2014-01-16 Hsio Technologies, Llc Embase de semi-conducteur à métallisation sélective directe
WO2011139619A1 (fr) 2010-04-26 2011-11-10 Hsio Technologies, Llc Adaptateur d'emballage de dispositif à semi-conducteur
US8955215B2 (en) 2009-05-28 2015-02-17 Hsio Technologies, Llc High performance surface mount electrical interconnect
US9276336B2 (en) 2009-05-28 2016-03-01 Hsio Technologies, Llc Metalized pad to electrical contact interface
WO2010147939A1 (fr) 2009-06-17 2010-12-23 Hsio Technologies, Llc Douille semi-conductrice
US9184527B2 (en) 2009-06-02 2015-11-10 Hsio Technologies, Llc Electrical connector insulator housing
US9276339B2 (en) 2009-06-02 2016-03-01 Hsio Technologies, Llc Electrical interconnect IC device socket
WO2010141303A1 (fr) 2009-06-02 2010-12-09 Hsio Technologies, Llc Ensemble d'interconnexion électrique conducteur élastique
US9054097B2 (en) 2009-06-02 2015-06-09 Hsio Technologies, Llc Compliant printed circuit area array semiconductor device package
US9414500B2 (en) 2009-06-02 2016-08-09 Hsio Technologies, Llc Compliant printed flexible circuit
WO2014011226A1 (fr) 2012-07-10 2014-01-16 Hsio Technologies, Llc Ensemble de circuits imprimés hybrides avec un cœur principal de faible densité et des régions de circuit de forte densité intégrées
WO2012078493A1 (fr) 2010-12-06 2012-06-14 Hsio Technologies, Llc Support d'interconnexion électrique de dispositif à circuit intégré
US9136196B2 (en) 2009-06-02 2015-09-15 Hsio Technologies, Llc Compliant printed circuit wafer level semiconductor package
US9603249B2 (en) 2009-06-02 2017-03-21 Hsio Technologies, Llc Direct metalization of electrical circuit structures
US9232654B2 (en) 2009-06-02 2016-01-05 Hsio Technologies, Llc High performance electrical circuit structure
US9613841B2 (en) 2009-06-02 2017-04-04 Hsio Technologies, Llc Area array semiconductor device package interconnect structure with optional package-to-package or flexible circuit to package connection
US9093767B2 (en) 2009-06-02 2015-07-28 Hsio Technologies, Llc High performance surface mount electrical interconnect
US9318862B2 (en) 2009-06-02 2016-04-19 Hsio Technologies, Llc Method of making an electronic interconnect
WO2010141296A1 (fr) 2009-06-02 2010-12-09 Hsio Technologies, Llc Boîtier de semi-conducteur à circuit imprimé adaptable
US9196980B2 (en) 2009-06-02 2015-11-24 Hsio Technologies, Llc High performance surface mount electrical interconnect with external biased normal force loading
US9930775B2 (en) 2009-06-02 2018-03-27 Hsio Technologies, Llc Copper pillar full metal via electrical circuit structure
US9277654B2 (en) * 2009-06-02 2016-03-01 Hsio Technologies, Llc Composite polymer-metal electrical contacts
US8264089B2 (en) * 2010-03-17 2012-09-11 Maxim Integrated Products, Inc. Enhanced WLP for superior temp cycling, drop test and high current applications
US9350093B2 (en) 2010-06-03 2016-05-24 Hsio Technologies, Llc Selective metalization of electrical connector or socket housing
US10159154B2 (en) 2010-06-03 2018-12-18 Hsio Technologies, Llc Fusion bonded liquid crystal polymer circuit structure
US9689897B2 (en) 2010-06-03 2017-06-27 Hsio Technologies, Llc Performance enhanced semiconductor socket
US9761520B2 (en) 2012-07-10 2017-09-12 Hsio Technologies, Llc Method of making an electrical connector having electrodeposited terminals
US10506722B2 (en) 2013-07-11 2019-12-10 Hsio Technologies, Llc Fusion bonded liquid crystal polymer electrical circuit structure
US10667410B2 (en) 2013-07-11 2020-05-26 Hsio Technologies, Llc Method of making a fusion bonded circuit structure
US11068770B2 (en) * 2014-03-08 2021-07-20 Féinics AmaTech Teoranta Lower Churchfield Connection bridges for dual interface transponder chip modules
US9755335B2 (en) 2015-03-18 2017-09-05 Hsio Technologies, Llc Low profile electrical interconnect with fusion bonded contact retention and solder wick reduction
US20230391609A1 (en) * 2022-06-03 2023-12-07 International Business Machines Corporation Micromachined superconducting interconnect in silicon

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5086337A (en) * 1987-01-19 1992-02-04 Hitachi, Ltd. Connecting structure of electronic part and electronic device using the structure
WO1996015459A1 (fr) * 1994-11-15 1996-05-23 Formfactor, Inc. Montage d'elements souples sur des dispositifs a semi-conducteurs et methodologie d'essai applicables aux plaquettes

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2533511B2 (ja) * 1987-01-19 1996-09-11 株式会社日立製作所 電子部品の接続構造とその製造方法
US5047740A (en) * 1990-06-12 1991-09-10 Hewlett-Packard Company Microwave switch
US5148103A (en) * 1990-10-31 1992-09-15 Hughes Aircraft Company Apparatus for testing integrated circuits
US5121089A (en) * 1990-11-01 1992-06-09 Hughes Aircraft Company Micro-machined switch and method of fabrication
US5210939A (en) * 1992-04-17 1993-05-18 Intel Corporation Lead grid array integrated circuit
US5802699A (en) * 1994-06-07 1998-09-08 Tessera, Inc. Methods of assembling microelectronic assembly with socket for engaging bump leads
US5632631A (en) * 1994-06-07 1997-05-27 Tessera, Inc. Microelectronic contacts with asperities and methods of making same
AU4159996A (en) * 1994-11-15 1996-06-17 Formfactor, Inc. Interconnection elements for microelectronic components
US5602422A (en) * 1995-06-16 1997-02-11 Minnesota Mining And Manufacturing Company Flexible leads for tape ball grid array circuit
US5810609A (en) * 1995-08-28 1998-09-22 Tessera, Inc. Socket for engaging bump leads on a microelectronic device and methods therefor
US5763941A (en) * 1995-10-24 1998-06-09 Tessera, Inc. Connection component with releasable leads

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5086337A (en) * 1987-01-19 1992-02-04 Hitachi, Ltd. Connecting structure of electronic part and electronic device using the structure
WO1996015459A1 (fr) * 1994-11-15 1996-05-23 Formfactor, Inc. Montage d'elements souples sur des dispositifs a semi-conducteurs et methodologie d'essai applicables aux plaquettes

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP2141503A1 (fr) * 2008-06-30 2010-01-06 Capres A/S Sonde multipoints pour tester les propriétés électriques et son procédé de fabrication
WO2010000265A1 (fr) * 2008-06-30 2010-01-07 Capres A/S Sonde multipoints pour tester des propriétés électriques et procédé de production d’une sonde multipoints
WO2013087677A1 (fr) * 2011-12-12 2013-06-20 Harting Ag Contact souple, connecteur enfichable et carte de circuits imprimés

Also Published As

Publication number Publication date
US5973394A (en) 1999-10-26
AU2331299A (en) 1999-08-09
TW396657B (en) 2000-07-01

Similar Documents

Publication Publication Date Title
US5973394A (en) Small contactor for test probes, chip packaging and the like
JP4060919B2 (ja) 電気的接続装置、接触子製造方法、及び半導体試験方法
EP1092338B1 (fr) Assemblage d'un composant electronique avec boitier a ressort
US7989945B2 (en) Spring connector for making electrical contact at semiconductor scales
US6426638B1 (en) Compliant probe apparatus
EP1523229B1 (fr) Appareil pour fiabiliser par rodage des semiconducteurs, connecteur pour tester et methode de fabrication
JP4391717B2 (ja) コンタクタ及びその製造方法並びにコンタクト方法
US7026833B2 (en) Multiple-chip probe and universal tester contact assemblage
US6497581B2 (en) Robust, small scale electrical contactor
WO2010025175A1 (fr) Système de contact de test pour tester des circuits intégrés comportant des boîtiers ayant un réseau de contacts de signaux et de puissance
US7172431B2 (en) Electrical connector design and contact geometry and method of use thereof and methods of fabrication thereof
KR20030020238A (ko) 프로우브 장치
EP1943528A1 (fr) Carte de sonde avec substrat à empilements
CA2583218A1 (fr) Ensemble d'interconnexion pour carte sonde
US6614246B1 (en) Probe structure
KR100340754B1 (ko) 커넥터 장치
JP2002139540A (ja) プローブ構造体とその製造方法
WO2001096894A1 (fr) Appareil sonde souple
JP2005127961A (ja) テスト用基板及びそれを使用したテスト装置
WO2001084900A1 (fr) Dispositif de connexion
JP2000150096A (ja) コネクタ装置

Legal Events

Date Code Title Description
AK Designated states

Kind code of ref document: A1

Designated state(s): AL AM AT AU AZ BA BB BG BR BY CA CH CN CU CZ DE DK EE ES FI GB GD GE GH GM HR HU ID IL IN IS JP KE KG KP KR KZ LC LK LR LS LT LU LV MD MG MK MN MW MX NO NZ PL PT RO RU SD SE SG SI SK SL TJ TM TR TT UA UG US UZ VN YU ZW

AL Designated countries for regional patents

Kind code of ref document: A1

Designated state(s): GH GM KE LS MW SD SZ UG ZW AM AZ BY KG KZ MD RU TJ TM AT BE CH CY DE DK ES FI FR GB GR IE IT LU MC NL PT SE BF BJ CF CG CI CM GA GN GW ML MR NE SN TD TG

DFPE Request for preliminary examination filed prior to expiration of 19th month from priority date (pct application filed before 20040101)
121 Ep: the epo has been informed by wipo that ep was designated in this application
REG Reference to national code

Ref country code: DE

Ref legal event code: 8642

NENP Non-entry into the national phase

Ref country code: KR

122 Ep: pct application non-entry in european phase