WO1994008296B1 - Operations de double tamponnage entre le bus de memoire et le bus d'expansion d'un systeme informatique - Google Patents

Operations de double tamponnage entre le bus de memoire et le bus d'expansion d'un systeme informatique

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Publication number
WO1994008296B1
WO1994008296B1 PCT/US1993/009366 US9309366W WO9408296B1 WO 1994008296 B1 WO1994008296 B1 WO 1994008296B1 US 9309366 W US9309366 W US 9309366W WO 9408296 B1 WO9408296 B1 WO 9408296B1
Authority
WO
WIPO (PCT)
Prior art keywords
read
data
latch
address
write
Prior art date
Application number
PCT/US1993/009366
Other languages
English (en)
Other versions
WO1994008296A1 (fr
Filing date
Publication date
Priority claimed from US07/956,068 external-priority patent/US5519839A/en
Application filed filed Critical
Priority to DE69324926T priority Critical patent/DE69324926T2/de
Priority to EP93924286A priority patent/EP0664030B1/fr
Priority to AU54025/94A priority patent/AU5402594A/en
Priority to CA002146138A priority patent/CA2146138A1/fr
Publication of WO1994008296A1 publication Critical patent/WO1994008296A1/fr
Publication of WO1994008296B1 publication Critical patent/WO1994008296B1/fr

Links

Abstract

Opérations de double tamponnage permettant de réduire les temps d'attente d'un bus central lorsqu'un pilote de bus d'expansion est en train d'accéder à la mémoire principale d'un bus central d'un système informatique. Un tampon de données de système, couplé entre la mémoire principale et le bus d'expansion, comprend des doubles tampons de lecture et d'écriture à 256 bits. Un contrôleur de mémoire, couplé aux doubles tampons et au bus d'expansion, comprend des bascules d'adresse primaire et secondaire, correspondant aux doubles tampons. Le contrôleur de mémoire détecte l'accès à la mémoire principale, compare l'adresse de bus d'expansion avec les adresses primaire et secondaire et commande les doubles tampons de lecture et d'écriture et les bascules d'adresse primaire et secondaire en fonction de la comparaison. Au cours des opérations d'écriture, les données devant être inscrites dans la même ligne de mémoire sont inscrites dans un premier tampon choisi entre le doubles tampons d'écriture jusqu'à ce qu'une opération d'écriture ait lieu vers une adresse d'une ligne différente, avant que les données soient transférées à la mémoire principale. Au cours des opérations de lecture, une ligne entière est chargée dans l'un des doubles tampons de lecture, et la prochaine ligne est extraite de la mémoire principale et introduite dans un second tampon de lecture si un succès ultérieur est obtenu dans le premier tampon de lecture.
PCT/US1993/009366 1992-10-02 1993-09-29 Operations de double tamponnage entre le bus de memoire et le bus d'expansion d'un systeme informatique WO1994008296A1 (fr)

Priority Applications (4)

Application Number Priority Date Filing Date Title
DE69324926T DE69324926T2 (de) 1992-10-02 1993-09-29 Doppelte pufferungspeicherung zwischen dem speicherbus und dem expansionsbus eines rechnersystems
EP93924286A EP0664030B1 (fr) 1992-10-02 1993-09-29 Operations de double tamponnage entre le bus de memoire et le bus d'expansion d'un systeme informatique
AU54025/94A AU5402594A (en) 1992-10-02 1993-09-29 Double buffering operations between the memory bus and the expansion bus of a computer system
CA002146138A CA2146138A1 (fr) 1992-10-02 1993-09-29 Double tamponnage entre le bus de memoire et le bus d'expansion d'un systeme informatique

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US956,068 1992-10-02
US07/956,068 US5519839A (en) 1992-10-02 1992-10-02 Double buffering operations between the memory bus and the expansion bus of a computer system

Publications (2)

Publication Number Publication Date
WO1994008296A1 WO1994008296A1 (fr) 1994-04-14
WO1994008296B1 true WO1994008296B1 (fr) 1994-04-28

Family

ID=25497712

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US1993/009366 WO1994008296A1 (fr) 1992-10-02 1993-09-29 Operations de double tamponnage entre le bus de memoire et le bus d'expansion d'un systeme informatique

Country Status (7)

Country Link
US (3) US5519839A (fr)
EP (1) EP0664030B1 (fr)
AT (1) ATE180071T1 (fr)
AU (1) AU5402594A (fr)
CA (1) CA2146138A1 (fr)
DE (1) DE69324926T2 (fr)
WO (1) WO1994008296A1 (fr)

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