WO1989008327A1

WO1989008327A1 - Method and apparatus for packaging and cooling integrated circuit chips

Info

Publication number: WO1989008327A1
Application number: PCT/US1989/000732
Authority: WO
Inventors: Leslie R. Fox
Original assignee: Digital Equipment Corporation
Priority date: 1988-03-01
Filing date: 1989-02-28
Publication date: 1989-09-08
Also published as: CA1311855C; JPH02501178A; EP0357747A1

Abstract

A packaging and cooling assembly for integrated circuit chips includes a base (14) for reception of one or more circuit chips (12), and a combination heat sink and cover (28) for attachment to the base (19). The circuit chips (12) are mounted circuit side down on the base (14), and include flexible lead frames (20) for attachment to bonding pads on the base (14). Compliant cushions (44) that generally conform to the shape and size of the chips (12) are held loosely between the circuit sides of the chips, and the base (14). The heat sink (28) engages the back sides of the circuit chips (12) when it is attached to the base. This causes the chips (12) to compress the compliant cushions (44), thereby holding the chips firmly in position, and forming a high thermal conductivity interface between the chips and the heat sink (28). To further enhance the heat transfer characteristics of the interface, a thin film of fluid (50) is coated on the back sides of each chip (12) to fill in the microvoids which result from asperity contact of the heat sink (28) and chip mating surfaces. A sealing gasket (34) is provided between the heat sink (28) and the base (14) to form a protective enclosure for the chips. Intermediate housings or heat spreader structures may alternatively be disposed between the chips (12) and the heat sink (28).

Description

DESCRIPTION METHOD AND APPARATUS FOR PACKAGING

AND COOLING INTEGRATED CIRCUIT CHIPS Technical Field The present invention relates, in general, to a method and apparatus for packaging and cooling Tape Automated Bonding (TAB) type integrated circuit chips. Background Art Removal of heat from integrated circuit (IC) chips is a central problem in modern high performance electronic packaging, requiring careful engineering. Often the well known or standard methods of thermal management are at odds with other package engineering or performance requirements. Incorporation of heat dissipation structures in a circuit chip module often undesirably increases complexity and size of the mechanical structure. The alternative is to design a structure which is usually not very efficient at removing heat from the circuit chips, and thus increases the likelihood of temperature related structural and electrical failures.

A number of different techniques have been proposed to avoid these problems. Usually these techniques involve the use of the chip module housing or package as a heat sink. To insure maximum cooling of the chips contained within the housing, the chips are mechanically connected to the housing or heat sink in a manner so that there is good thermal conductivity between them. This can pose a problem, however, since a rigid mechanical connection between the housing and the circuit chips can cause excessive stress on the chips which could damage them. If, on the other hand, a less rigid mechanical connection is employed, the efficiency of heat transfer from the chips to the heat sink will be reduced, and the probability of chip malfunction due to excessive operating temperature will be correspondingly increased. Another problem presented by the necessity of coupling the circuit chips to a common heat sink or housing is that the dimensional tolerances from chip to chip on the mounting substrate are such that it is difficult to insure that every chip in the module will be coupled to the housing evenly. Some chips may not even be coupled at all to the housing, while excessive mechanical stress may be imparted to other chips.

There have been proposed a number of solutions in the past to these problems. One such solution is used by IBM in their Thermal Conduction Module for packaging and cooling IC's, and employs captive pistons within the heat sink to contact the chip backside, and accommodate variances in the mechanical features and tolerances. This technique is mechanically complex and therefore costly. Other techniques employ the use of thermally conductive material, such as solder or a thixotropic thermal compound to fill the gap between the chips and the heat sink. These techniques are difficult to implement, and there is little or no compliancy or spring action in the chip-heat sink subsystems to insure close mechanical and thermal contact, and accommodation of dimensional tolerance variations. Disclosure of the Invention

The present invention seeks to overcome the disadvantages of the prior techniques.

It is therefore the object of the present invention to provide an improved method and apparatus for packaging and cooling IC chips in which the chips are held in direct thermal contact with a one piece heat sink without excessive mechanical stress, and without a requirement that the heat sink and chip assembly be constructed in accordance with strict dimensional tolerances. It is another object of the present invention to provide an efficient cooling structure for electrical circuit chips in which a heat sink also helps form a protective sealed enclosure for the chips. it is yet another object of the present invention to provide a method and apparatus for cooling electric circuit chips which improves the reliability of the chips through improved thermal management and reduced mechanical and thermal stress.

It is a further object of the present invention to provide a cooling and packaging structure for circuit chips which does not require the chip housings to be bonded to a substrate, and thus permits easy removal of the chips for replacement or reworking.

These and other objects of the invention are attained through the provision of a circuit chip module or assembly which includes a base for supporting a plurality of TAB type IC chips in a circuit side face down manner, and a protective enclosure for attachment to the base which includes a plurality of cooling fins on its top side to permit the enclosure to act as a heat sink. The inner top surface of the heat sink is designed to contact the backsides of the IC chips when the heat sink is in position. Alternatively, the chips can be mounted within separate intermediate protective housings, or include intermediate heat spreader structures, which are then contacted by the heat sink. The heat sink also includes a peripheral recess on its underside for the reception of a compliant gasket or O-ring. When the heat sink is positioned on the base, the gasket acts as a sealing ring, and combined with the heat sink and the base, forms a protective enclosure for the IC chips which prevents them from being exposed to external moisture, dirt, etc.

To accommodate variances in the dimensional tolerances of the assembly, a plurality of compliant elastomeric pads or cushions are disposed, one each, between each IC chip and the base. These pads are generally configured to each of the IC chips and can be, for example, circular or rectangular in shape. The IC chips rest on these pads, but are not bonded to them. Instead, flexible circuit lead frames, which lead from each side of the TAB chips to bonding pads on the base substrate, are bonded to the base, and thereby help secure the chips to the same.

When the heat sink is attached to the base, its inside top surface bears on the backsides of the chips, or housings for the same, and causes the cushions beneath the chips to compress slightly. The TAB flexible lead frames permit this vertical movement. As a result, each of the chips is held firmly in position, but without excessive stress. Also, the pressure exerted between the chips and the heat sink due to the compression of the cushions, causes an intimate mechanical contact between each of the chips and the heat sink, which enhances heat transfer between them.

To further enhance heat transfer between the chips and the heat sink, the interface between them is wetted with a very thin film of a non-spreading low vapor pressure fluid, such as a polyphenyl ether or a liquid metal, to fill in the microvoids resulting from asperity contact of the heat sink and chip mating surfaces. Alternatively, a gas filled gap can be employed for this purpose, although the use of a liquid is preferred since it is less sensitive to misalignment and small changes in interface pressure.

The low stress of the separable interface between each chip and the heat sink improves the reliability of the overall structure by reducing the likelihood of thermal stress cracking of the chip, or breaching the passivation moisture barrier through microcracking. Slip freedom of the chip heat sink interface also reduces the tendency of the TAB frame to undergo thermal cycle fatigue induced by thermal mismatches among the various components of the assembly. This, combined with the excellent thermal conductivity characteristics of the interface, and the sealed nature of the enclosure, provides an assembly for IC chips which is relatively simple in construction, and affords the chips a great deal of protection from both thermal and mechanical stress, and external conditions. Brief Description Of The Drawings

The foregoing and additional objects, features, and advantages of the present invention will be apparent from a consideration of the following detailed description of a preferred embodiment thereof taken in conjunction with the accompanying drawings, in which:

FIG. 1 is a perspective exploded view of an assembly for housing a plurality of IC chips; FIG. 2 is a partial perspective exploded view of a TAB type IC chip, a mounting substrate. and a compliant cushion for disposal between the chip and the substrate;

FIG. 3 is a partial cross section of the assembly; and FIGs. 4A and 4B are partial cross sections of the assembly showing different types of chip housing structures. Best Mode For Carrying Out The Invention

Turning now to a more detailed consideration of the invention, there is illustrated in FIG. 1, an assembly 10 for housing a plurality of TAB type IC chip 12. Each of the chips 12, comprises an integrated circuit that is embedded or disposed on a silicon wafer, as is conventional. The assembly includes a base support plate 14, which is preferably constructed either of metal or rigid plastic. Disposed on plate 14 is a conventional ceramic format substrate 16 that includes embedded circuitry (not shown) for supplying power and signals to the IC chips 12. A multilayer thin film substrate 18 is disposed on top of format substrate 16, and also includes a plurality of embedded conductors for supplying power and signals from substrate 16 to a plurality of bonding pads (not shown) which are disposed on top of thin film substrate 18. Each of the TAB type IC chips 12 includes, as is conventional, flexible circuit lead frames 20 that are formed on a thin layer of carrier film, and extend from all sides of the chip. Lead frames 20 are bonded to the bonding pads on thin film substrate 18 to electrically connect, and mechanically secure each of the chips 12 to the same.

A plurality of conventional tape type flexible circuit electrical connectors 22 are attached by means of soldering to the bottom edges of format substrate 16. These connectors supply power and signals to the circuit chips 12 via format substrate 16, thin film substrate 18, and lead frames 20.

A heat sink and protective cover 28 is secured to format substrate 16 and base support plate 14 with a plurality of screws 30 that are inserted through holes (not shown) in heat sink 28, and a plurality of holes 32 in substrate 16, plate 14 and connectors 22. Heat sink 28 includes a plurality of heat conducting fins 33 disposed on the top thereof, and is preferably made of metal which has good thermal conductivity, and incidentally acts as an electromagnetic shielding means for chips 12. An O-ring or compliant gasket 34 is disposed between heat sink 28 and format substrate 16 that serves to seal the circuit chips 12 from external dust, water, corrosive gases, etc.

Turning now to FIG. 2, there is illustrated a single TAB type circuit 40 which includes an IC chip 12 that is disposed circuit side down with a back side 41 facing up on a film type lead frame 20. Lead frame 20 includes a plurality of circuit leads 42 that are connected at one end to IC chip 12. Their other ends are positioned to be bonded to a plurality of bond pads 43 on multilayer thin film substrate 18 when circuit 40 is in position on the same.

A compliant cushion or pad 44 is disposed between thin film substrate 18 and chip 12. This cushion is shown in FIG. 2 as being circular in shape, but can be any shape that generally conforms to the size and shape of chip 12. As will be shown, cushion 44 is designed to be placed under a state of compression when heat sink 28 is attached to the assembly, and contacts the back side of circuit chip 12. Accordingly, cushion 44 should be made of a material, such as silicon rubber or Viton, which has a low modulus to avoid high stresses on chip 12, and is compatible with assembly, cleaning, and test processes. The thickness of cushion 44 should be such that it will be subject to no more than about 25% compression. In one experiment, a cushion thickness of 0.017 inches was successfully employed. A partial cross section of the assembled assembly 10 is illustrated in FIG. 3. As shown, heat sink 28 has an inner top surface 46 positioned to engage the back sides of the face down chips 12. Before heat sink 28 is secured to base support plate 14 and format substrate 16, however, a thin film of a non-spreading low vapor pressure dielectric fluid 50 is applied to the backsides of chips 12. This film of fluid fills in the microvoids resulting from asperity contact of the heat sink and chip mating surfaces, and thereby enhances heat transfer between the two. Both 5 and 6 ring polyphenyl ethers (PPE) have been tested for use as fluid 50, and found to perform very well. Alternatively, the thin layer of fluid 50 can be liquid metal, or a gas contained within the assembly.

The inner top surface 46 of heat sink 28 is provided with a smooth surface by standard machining methods to further assure that a low chip to heat sink thermal contact resistance is realized. Ordinarily, the surfaces of the backsides of the chips 12 already have adequate smoothness. Typically, the spacing of the non-asperity contacting surfaces of the chips and the heat sink is between 0.5 and 2.0 microns which corresponds to the required thickness of fluid film 50. When heat sink 28 is assembled to base support plate 14 and format substrate 16 as illustrated in FIG. 3, inner top surface 46 bears down on backside of chip 12, and causes cushion 44 to slightly compress. This movement is permitted by the inherent vertical compliance of TAB type lead frame 20. In this manner, a low stress, but efficient thermal interface is achieved between heat sink 28 and circuit chip 12. The compressibility of cushion 44 compensates for minor dimensional variances that may be present in the assembly, and insures that intimate mechanical and thermal contact is maintained between each of the chips 12, and the heat sink 28. Compliant gasket 34, which is shown in FIG. 3 as being disposed in a peripheral recess 52 in the bottom of heat sink 28, serves to form a sealed enclosure 54 for the chips 12, when heat sink 28 is assembled to base support plate 14. As stated before, this protects the chips 12 from external moisture, dirt, gases, etc.

Turning now to FIGs. 4A and 4B, there are illustrated two alternative embodiments of the present invention wherein the circuit chip 12 is bonded to or contained in, an intermediate housing or structure. Specifically, in FIG. 4A, circuit chip 12 is shown contained in a clamshell housing 60, which is preferably made of high thermal conductivity ceramic, and includes a lower half 62, and an upper half 64. Disposed between the mating surfaces of these two halves are seal means 66 and 68, through which, the TAB lead frame 20 of chip 12 passes. Clamshell housing 60 thus provides a sealed enclosure for chip 12. Disposed beneath lower half 62 of clamshell 60, is the compliant cushion 44 which sits on multilayer thin film substrate 18, and format substrate 16. The top half 64 of clamshell 60 is held in intimate contact with the inner top surface 46 of heat sink 28, and as in FIG. 3, the fluid layer 50 is disposed between these two elements to improve heat transfer between them. This, combined with the fact that chip 12 is bonded to the inner surface of upper half 64, provides a good thermal path between chip 12 and heat sink 28. The embodiment illustrated in FIG 4B is similar, however, a heat spreader element 70 is employed in place of clamshell housing 60. Heat spreader 70 is bonded to chip 12, and its top surface is held in contact with the inner top surface 46 of heat sink 28. As with the previous embodiments, fluid layer 50 is provided between heat sink 28, and heat spreader 70.

Two compliant cushion elements, 44a, and 44b, are provided: one disposed beneath chip 12, and the other disposed beneath depending legs 72 and 74 on heat spreader 70.

The embodiments illustrated in FIGs. 4A and 4B achieve the same function as the embodiment illustrated in FIG. 3, however, provide additional sealing and heat dissipation means for the chip 12 as well.

Although the invention has been illustrated in terms of a preferred embodiment, it will be understood that numerous variations and modifications can be made by those of skill in the art without departing from the true spirit and scope of the inventive concept as set forth in the following claims.

Claims

Claims 1. An assembly for packaging and cooling circuit chips comprising: a base for receiving at least a first circuit chip; compliant means for placement between said base and a first side of a circuit chip and, a heat sink for engagement with said base including means to contact a second side of a circuit chip for causing said compliant means to compress, and the contact pressure between said heat sink and a second side of a circuit chip to be increased, when said heat sink is engaged with said base.

2. The assembly of claim 1, wherein said means to contact a second side of a circuit chip comprises an inner top surface of said heat sink.

3. The assembly of claim 1, further including sealing means for disposal between said heat sink and said base to protect a circuit chip received within the assembly from external ambient conditions.

4. An assembly for packaging and cooling circuit chips comprising: a base; compliant means disposed on said base; at least a first circuit chip disposed with a first side on said compliant means, and a second side facing upwardly; and, a heat sink for engagement with said base having contact means to contact the second side of said circuit chip, and compress said compliant means so that the contact pressure, and therefore the thermal conductivity, between said contact means and the second side of said circuit chip is increased.

5. The assembly of claim 4 wherein a thin film of fluid is disposed between the second side of said circuit chip and said contact means to further increase the thermal conductivity between the two.

6. The assembly of claim 5, wherein said fluid is a liquid.

7. The assembly of claim 6, wherein said liquid is a polyphenyl ether.

8. The assembly of claim 6, wherein said liquid is a liquid metal.

9. The assembly of claim 5, wherein said fluid is a gas.

10. The assembly of claim 4, further including seal means disposed between said heat sink and said base to form a sealed enclosure for said chip for protection of the chip from external ambient conditions.

11. The assembly of claim 4, wherein said contact means comprises an inner top surface of said heat sink.

12. The assembly of claim 4, wherein a flexible circuit lead frame is mechanically and electrically attached at a first end to said circuit chip, and at a second end to a plurality of bonding pads disposed on said base.

13. The assembly of claim 12, wherein said compliant means comprises a thin elastomeric cushion that is sized generally to conform to said circuit chip, and is held in place between said circuit chip and said base by said flexible circuit lead frame, and the pressure exerted through said chip to said cushion by the heat sink contact means.

14. The assembly of claim 12, wherein said circuit chip and said circuit lead frame form a TAB type integrated circuit.

15. The assembly of claim 4, further including an intermediate structure which is bonded to said second side of said circuit chip, and is engaged by said heat sink contact means.

16. The assembly of claim 4, wherein said heat sink is made of metal to act as an electromagnetic shield for said circuit chip.

17. A method for packaging and cooling circuit chips comprising the steps of: placing a compliant means on a base; placing at least a first circuit chip loosely on said compliant means with a first side facing downwardly, and a second side facing upwardly and, engaging said base with a heat sink having contact means to intimately engage the second side of said circuit chip, compress said compliant cushion, and thereby firmly hold said circuit chip in place, while at the same time providing a mechanical interface of high thermal conductivity between the second side of said chip and said heat sink.

18. The method of claim 17, further including the step of coating the second side of said circuit chip with a thin layer of fluid before engaging the heat sink to the base to further enhance the heat transfer characteristics between the chip and the heat sink,

19. The method of claim 17, further including the step of bonding a flexible circuit lead frame at a first end to said circuit chip, and at a second end to a plurality of bonding pads disposed on said base, before said heat sink is engaged to said base.

20. The method of claim 17, further including the step of disposing a sealing means between said heat sink and said base before engaging the heat sink to the base to form a sealed enclosure for said circuit chip.