WO1982000072A1 - Convertisseur analogique/numerique - Google Patents

Convertisseur analogique/numerique Download PDF

Info

Publication number
WO1982000072A1
WO1982000072A1 PCT/SU1980/000112 SU8000112W WO8200072A1 WO 1982000072 A1 WO1982000072 A1 WO 1982000072A1 SU 8000112 W SU8000112 W SU 8000112W WO 8200072 A1 WO8200072 A1 WO 8200072A1
Authority
WO
WIPO (PCT)
Prior art keywords
blοκa
unit
κοda
ποdκlyuchen
input
Prior art date
Application number
PCT/SU1980/000112
Other languages
English (en)
Russian (ru)
Inventor
Politekhnichesky Inst Vinnitsky
Original Assignee
Azarov A
Stakhov A
Luzhetsky V
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Azarov A, Stakhov A, Luzhetsky V filed Critical Azarov A
Priority to PCT/SU1980/000112 priority Critical patent/WO1982000072A1/fr
Priority to DE803050456T priority patent/DE3050456T1/de
Priority to JP55501579A priority patent/JPS6352806B2/ja
Priority to GB8204360A priority patent/GB2091507B/en
Publication of WO1982000072A1 publication Critical patent/WO1982000072A1/fr

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00—Analogue/digital conversion; Digital/analogue conversion
    • H03M1/10—Calibration or testing
    • H03M1/1071—Measuring or testing
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00—Analogue/digital conversion; Digital/analogue conversion
    • H03M1/12—Analogue/digital converters
    • H03M1/14—Conversion in steps with each step involving the same or a different conversion means and delivering more than one bit
    • H03M1/144—Conversion in steps with each step involving the same or a different conversion means and delivering more than one bit the steps being performed sequentially in a single stage, i.e. recirculation type
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00—Analogue/digital conversion; Digital/analogue conversion
    • H03M1/12—Analogue/digital converters
    • H03M1/34—Analogue value compared with reference values
    • H03M1/36—Analogue value compared with reference values simultaneously only, i.e. parallel type
    • H03M1/361—Analogue value compared with reference values simultaneously only, i.e. parallel type having a separate comparator and reference value for each quantisation level, i.e. full flash converter type

Definitions

  • an analog-to-digital converter is known / to Z. and d ⁇ .
  • the digital converter with a cyclical refinement of the result, - "Products and power supplies", 1979, 2, str.96-97 /, which is / is and a large block of comparison.
  • the processor, the known converter contains a parallel converter, the analog switch, the total, the installation and the unit.
  • the output of the analogue circuit breaker is connected to the input unit, and its first output is the result of a multiplayer connection.
  • the amount is connected to the entrance of the register and is
  • ⁇ G. ⁇ - 2. the output of an analogue-digital converter.
  • ⁇ ⁇ -th circuit involves / 1 - 1 / amplifiers, / 1 - 1 / digital-to-analog converters, I-channel analogue to the circuit-breaker and free-circuit-to-do-it-yourself
  • ⁇ ⁇ e ⁇ v ⁇ m tsi ⁇ le anal ⁇ g ⁇ vaya value s ⁇ v ⁇ da due ves ⁇ n ⁇ g ⁇ ⁇ e ⁇ b ⁇ az ⁇ va ⁇ elya ⁇ dae ⁇ sya on ⁇ e ⁇ vy v ⁇ d analogous l ⁇ g ⁇ v ⁇ g ⁇ ⁇ mmu ⁇ a ⁇ a, ⁇ y ⁇ d deys ⁇ viem yuscheg ⁇ signal u ⁇ avlya-, ⁇ s ⁇ u ⁇ ayuscheg ⁇ of bl ⁇ a u ⁇ avleniya, ⁇ e- ⁇ edae ⁇ it on v ⁇ d mn ⁇ g ⁇ g ⁇ v ⁇ g ⁇ bl ⁇ a s ⁇ avneniya.
  • This unit converts the input analogue value into a parallel unit cd, which is directly connected to the converter for a separate converter
  • the received code is added to the total amount.
  • the result of the summation is transferred to the registry.
  • the variety of analogue quantities that pass through the inputs of the amplifier is amplified and fed into the second input of the circuit. Further, the conversion process occurs in a similar fashion.
  • the processor is equipped with a sophisticated processor. ⁇ me ⁇ g ⁇ , e ⁇ ⁇ e ⁇ b ⁇ a- z ⁇ va ⁇ el imee ⁇ niz ⁇ uyu nadezhn ⁇ s ⁇ not ⁇ zv ⁇ lyayuschuyu ⁇ - lucha ⁇ is ⁇ inn ⁇ e value tsi ⁇ v ⁇ g ⁇ e ⁇ vivalen ⁇ a v ⁇ d- n ⁇ y anal ⁇ g ⁇ v ⁇ y value ⁇ i neis ⁇ avn ⁇ s ⁇ i ⁇ ya would ⁇ d- n ⁇ g ⁇ of ⁇ az ⁇ yad ⁇ v tsi ⁇ -anal ⁇ g ⁇ v ⁇ g ⁇ ⁇ e ⁇ b ⁇ az ⁇ va ⁇ elya. .
  • the basic task of the invention is the creation of such an analogue-digital converter, in addition to the non-payment 5 of the same number in the p-boxes, it would be possible to remove its metabolic control and increase reliability.
  • P ⁇ s ⁇ avlennaya task ⁇ eshae ⁇ sya ⁇ em, ch ⁇ anal ⁇ g ⁇ - 10 -tsi ⁇ v ⁇ y ⁇ e ⁇ b ⁇ az ⁇ va ⁇ el, s ⁇ de ⁇ zhaschy / ⁇ - ⁇ / usili ⁇ e- lei vy ⁇ d ⁇ azhd ⁇ g ⁇ of ⁇ y ⁇ ⁇ d ⁇ lyuchen ⁇ s ⁇ ve ⁇ s ⁇ - vuyuschemu v ⁇ du, s ⁇ v ⁇ g ⁇ ⁇ -th, anal ⁇ g ⁇ v ⁇ g ⁇ ⁇ mmu- ⁇ a ⁇ a, vy ⁇ d ⁇ g ⁇ ⁇ d ⁇ lyuchen ⁇ v ⁇ du mn ⁇ g ⁇ - g ⁇ v ⁇ g ⁇ bl ⁇ a s ⁇ avneniya, ⁇ ichem v ⁇ d / I + ⁇ / -g ⁇ usi- 15 li ⁇ elya ⁇ ds ⁇ edin
  • the optional output of unit 4 is connected to the multi-input of the optional 5 accessory, which is equipped with a ⁇ y ⁇ d ⁇ e ⁇ b ⁇ az ⁇ va ⁇ elya 5 ⁇ d ⁇ lyuchen ⁇ tsi ⁇ v ⁇ mu ⁇ mmu- ⁇ a ⁇ u 6, ⁇ - ⁇ az ⁇ yadny vy ⁇ d ⁇ g ⁇ ⁇ d ⁇ lyuchen ⁇ ⁇ e- ve ⁇ sivn ⁇ mu sche ⁇ chi ⁇ u 7 and 8.
  • a preferred version of unit 10 is a special device for operating with a minimum size / cm. Description of the Patent Office 1543302 /.
  • the output of unit 10 is connected to a digital analogue II, which is connected to the direct input of the amplifier 2. Otherwise, the multiple output of unit 10 is also connected to the first input of unit 12 of the division of the species of separation. Block 12 makes it possible to divide the view of the block by block 10.
  • the large input of unit 12 is connected to the register 13.
  • Unit 13 is used to store non-identifiable items.
  • the output of register 1.3 is connected to block 9, which is directly connected to the output of the digital signal of the comparison of the signal amplitude, which is intended for the comparison of the output signal - 6 -
  • the inlet of the circuit 14 is connected to a multiple of the outlet of the counting 7, which is the result of a negative output. 5
  • the analogue inputs of the analogue circuit 3, the large unit 4 of the comparison and the register 13 are mutually disaggregated by the rule of 18. Otherwise, the second one introduces the input of block 9 of the code analysis, and also
  • block 12 contains a logical scheme.
  • the proposed analog-to-digital converter operates in two modes: the direct-to-analog mode is in digital and non-volatile mode.
  • Each of the cycles of the category is divided into categories. ⁇ I th tsi ⁇ le uchas ⁇ vuyu ⁇ I -I usili ⁇ eley 2-tsi ⁇ anal ⁇ - g ⁇ vy ⁇ e ⁇ b ⁇ az ⁇ va ⁇ el II, I th ⁇ anal anal ⁇ g ⁇ v ⁇ g ⁇ ⁇ mmu ⁇ a ⁇ a 3, I th ⁇ anal tsi ⁇ v ⁇ g ⁇ ⁇ mmu ⁇ a ⁇ a 6 and ⁇ s ⁇ alnye nodes ⁇ isyvaem ⁇ g ⁇ ⁇ e ⁇ b ⁇ az ⁇ va ⁇ elya, ⁇ me bl ⁇ a s ⁇ emy 9 and 14. ⁇ In the mode of metrological control, all nodes are involved.
  • the attempt is to replace the zero in the £th and the units in the /- Economics / -m and / 1 - ⁇ - civil / -th order and their derivation and mean ⁇ ⁇ ⁇
  • the mode of the direct conversion of the input to the analogue value in the process is carried out by the following process.
  • This unit 4 converts the input analogue value into the parallel code, which is converted into the consequent one.
  • - 9 uni ⁇ a ⁇ ny ⁇ d ⁇ e ⁇ b ⁇ az ⁇ va ⁇ elem 5.
  • the process of the process begins with the operation of the equipment according to its metrological specifications / ⁇ + 2 / -th 35 discharge of the analogue circuit. It is hereby suggested that ⁇ + ⁇ junior discharges are common.

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Analogue/Digital Conversion (AREA)
  • Nitrogen And Oxygen Or Sulfur-Condensed Heterocyclic Ring Systems (AREA)

Abstract

Un convertisseur analogique/numerique comprend des amplificateurs (2), un commutateur analogique (3) connecte par ses entrees aux amplificateurs (2) et une unite de comparaison a etages multiples (4) recevant a son entree le signal de sortie provenant du commutateur (3). Le convertisseur comprend en outre un dispositif de traduction a code seriel (5) assurant la traduction du code en parallele provenant de l'unite (4) en une sequence d'impulsion envoyee a l'entree d'un commutateur digital (6). Le convertisseur est pourvu d'un compteur reversible (7) et d'un compteur (8) les entrees des deux compteurs etant connectees au commutateur (6). Le signal de sortie provenant des compteurs (8) est envoye vers une unite a code de rappels-evacuations (10) et a une unite d'analyse de codes qui est connectee par l'intermediaire d'un registre (13) a une unite de determination du mode d'exploration (12), le signal de sortie provenant de l'unite (10) etant transmis a l'unite (12) et a un convertisseur analogique/numerique (11) connecte par sa sortie a l'entree du premier amplificateur (21). Une unite de commande (18) predetermine un algorithme de travail pour ce convertisseur, de sorte que dans le mode de conversion directe, le procede de conversion de la valeur d'entree analogique en un code p a n bits se fait apres K cycles, tandis que dans le mode de commande metrologique, des nombres binaires sont determines, dont les caracteristiques metrologiques de deviation depassent des valeurs admises.
PCT/SU1980/000112 1980-06-26 1980-06-26 Convertisseur analogique/numerique WO1982000072A1 (fr)

Priority Applications (4)

Application Number Priority Date Filing Date Title
PCT/SU1980/000112 WO1982000072A1 (fr) 1980-06-26 1980-06-26 Convertisseur analogique/numerique
DE803050456T DE3050456T1 (de) 1980-06-26 1980-06-26 Analog-to-digital converter
JP55501579A JPS6352806B2 (fr) 1980-06-26 1980-06-26
GB8204360A GB2091507B (en) 1980-06-26 1980-06-26 Analog-to-digital converter

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
PCT/SU1980/000112 WO1982000072A1 (fr) 1980-06-26 1980-06-26 Convertisseur analogique/numerique
WOSU80/00112800626 1980-06-26

Publications (1)

Publication Number Publication Date
WO1982000072A1 true WO1982000072A1 (fr) 1982-01-07

Family

ID=21616634

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/SU1980/000112 WO1982000072A1 (fr) 1980-06-26 1980-06-26 Convertisseur analogique/numerique

Country Status (4)

Country Link
JP (1) JPS6352806B2 (fr)
DE (1) DE3050456T1 (fr)
GB (1) GB2091507B (fr)
WO (1) WO1982000072A1 (fr)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4477313A (en) * 1981-12-03 1984-10-16 Aktiebolaget Karlstads Mekaniska Werkstad Method and apparatus for producing a multilayer paper web

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB1367515A (en) * 1970-10-29 1974-09-18 Rech Et Const Electroniques So Sample amplifiers having automatic regulation of the amplification factor by discrete values
US4161725A (en) * 1977-11-09 1979-07-17 Stakhov Alexei P Analog-Fibonacci p-code converter
SU758510A1 (ru) * 1978-06-07 1980-08-23 Винницкий политехнический институт Аналого-цифровой преобразователь

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
SU662930A1 (ru) * 1976-07-19 1979-05-15 Таганрогский радиотехнический институт им. В.Д.Калмыкова Устройство дл приведени р-кодов фибоначчи к минимальной форме
DE2848911A1 (de) * 1978-11-10 1980-05-14 Vinnizkij Politekhn I Digital-analog-wandler

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB1367515A (en) * 1970-10-29 1974-09-18 Rech Et Const Electroniques So Sample amplifiers having automatic regulation of the amplification factor by discrete values
US4161725A (en) * 1977-11-09 1979-07-17 Stakhov Alexei P Analog-Fibonacci p-code converter
SU758510A1 (ru) * 1978-06-07 1980-08-23 Винницкий политехнический институт Аналого-цифровой преобразователь

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4477313A (en) * 1981-12-03 1984-10-16 Aktiebolaget Karlstads Mekaniska Werkstad Method and apparatus for producing a multilayer paper web

Also Published As

Publication number Publication date
GB2091507A (en) 1982-07-28
DE3050456T1 (de) 1982-08-12
DE3050456C2 (fr) 1988-02-04
JPS6352806B2 (fr) 1988-10-20
JPS57500856A (fr) 1982-05-13
GB2091507B (en) 1983-11-30

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