US6091303A - Method and apparatus for reducing oscillator noise by noise-feedforward - Google Patents

Method and apparatus for reducing oscillator noise by noise-feedforward Download PDF

Info

Publication number
US6091303A
US6091303A US09/286,857 US28685799A US6091303A US 6091303 A US6091303 A US 6091303A US 28685799 A US28685799 A US 28685799A US 6091303 A US6091303 A US 6091303A
Authority
US
United States
Prior art keywords
phase
signal
output signal
circuit
controlled oscillator
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
US09/286,857
Other languages
English (en)
Inventor
Paul W. Dent
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Ericsson Inc
Original Assignee
Ericsson Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ericsson Inc filed Critical Ericsson Inc
Priority to US09/286,857 priority Critical patent/US6091303A/en
Assigned to ERICSSON INC. reassignment ERICSSON INC. ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: DENT, PAUL W.
Priority to PCT/US2000/008202 priority patent/WO2000060741A1/fr
Priority to JP2000610126A priority patent/JP2002541707A/ja
Priority to EP00919750A priority patent/EP1166447B1/fr
Priority to AT00919750T priority patent/ATE255296T1/de
Priority to CN00805671.4A priority patent/CN1225088C/zh
Priority to AU40384/00A priority patent/AU4038400A/en
Priority to DE60006792T priority patent/DE60006792D1/de
Priority to TR2001/02834T priority patent/TR200102834T2/xx
Publication of US6091303A publication Critical patent/US6091303A/en
Application granted granted Critical
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Images

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03C—MODULATION
    • H03C3/00—Angle modulation
    • H03C3/02—Details
    • H03C3/09—Modifications of modulator for regulating the mean frequency
    • H03C3/0908—Modifications of modulator for regulating the mean frequency using a phase locked loop
    • H03C3/0966—Modifications of modulator for regulating the mean frequency using a phase locked loop modulating the reference clock
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03C—MODULATION
    • H03C5/00—Amplitude modulation and angle modulation produced simultaneously or at will by the same modulating signal
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/0805—Details of the phase-locked loop the loop being adapted to provide an additional control signal for use outside the loop
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
    • H03L7/22—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using more than one loop
    • H03L7/23—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using more than one loop with pulse counters or frequency dividers
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00—Modulated-carrier systems
    • H04L27/18—Phase-modulated carrier systems, i.e. using phase-shift keying
    • H04L27/20—Modulator circuits; Transmitter circuits
    • H04L27/2003—Modulator circuits; Transmitter circuits for continuous phase modulation
    • H04L27/2007—Modulator circuits; Transmitter circuits for continuous phase modulation in which the phase change within each symbol period is constrained
    • H04L27/2014—Modulator circuits; Transmitter circuits for continuous phase modulation in which the phase change within each symbol period is constrained in which the phase changes in a piecewise linear manner during each symbol period, e.g. minimum shift keying, fast frequency shift keying

Definitions

  • the present invention is directed toward reducing phase noise in radio systems and, more particularly, toward integrating oscillators into silicon chips while achieving a reduction of phase noise in the radio systems in which the integrated oscillators are utilized.
  • TXIF-VCO transmit intermediate frequency voltage controlled oscillator
  • QVCO Quadrature VCO
  • the quadrature output signals are received by a quadrature modulator, such as the improved quadrature modulator described in U.S. Pat. No. 5,530,722 issued Jun. 25, 1996, also hereby incorporated by reference herein.
  • the modulated TXIF-QVCO signal from the quadrature modulator is then compared in a phase comparator with a signal from a transmit final-frequency voltage controlled oscillator (TX-VCO).
  • TX-VCO transmit final-frequency voltage controlled oscillator
  • the TX-VCO signal is mixed down to equal the frequency of the TXIF-QVCO signal by heterodyne mixing with a signal from a frequency synthesizer, the latter signal normally being available from the receiver where the frequency synthesizer is used as the receiver local oscillator (RXLO).
  • An error signal is output by the phase comparator when the phases of the signals input thereto are not equal.
  • the error signal is passed through a loop, or low pass, filter and is used to control, or tune, the TX-VCO to the desired transmit frequency, which is equal to the sum or difference of the RXLO and TXIF signal frequencies.
  • the control loop bandwidth of the loop filter is made sufficiently wide to pass the phase modulation applied by the quadrature modulator to the TXIF-QVCO signal, and thus apply the same phase modulation to the TX-VCO, thus obtaining a modulated final-frequency transmit signal.
  • the TXIF-QVCO frequency is a small multiple of the crystal reference oscillator frequency, as deliberately arranged in the GSM/PCS1900 circuits, the TXIF-QVCO frequency only need be frequency divided by that small multiple in order to reduce the frequency of the TXIF-QVCO signal to that of the crystal reference oscillator for phase comparison.
  • phase noise of an oscillator controlled by a phase-locked loop circuit (PLL) is dependent on the frequency divider ratio, and is worse when the frequency divider ratio is large.
  • the small divider ratio results in acceptably low phase noise, allowing the TXIF-QVCO to be of a multivibrator type, which may be easily integrated into a silicon integrated circuit.
  • a suitable type of multivibrator is, for example, an emitter-coupled or source-coupled current-controlled multivibrator, based on either bipolar or field-effect transistors, respectively.
  • An example of such a multivibrator is described in U.S. Pat. No. 5,654,677 issued Aug. 5, 1997, which is hereby incorporated by reference herein.
  • the present invention is directed toward overcoming the above-mentioned problems, namely, alleviating the deleterious affects of higher TXIF-QVCO phase noise.
  • An oscillator capable of being controlled in frequency by a control signal can be manufactured in any of a number of ways. In cellular technology, to reduce size and cost, the preferred way is by integration into a silicon integrated circuit. While oscillator phase noise may be reduced by employing high-Q resonators to define the oscillator operating frequency, high-Q resonators are difficult to produce in an integrated circuit since they are spaced from the lossy silicon substrate by only a few microns, and the proximity of the lossy silicon substrate reduces the Q.
  • an integrated circuit oscillator having a low-Q resonator which are capable of being produced in an integrated circuit, or else an oscillator that does not require a resonant circuit, such as a multivibrator oscillator, exhibits high phase noise which is undesirable in certain system applications.
  • a circuit including a first phase comparator for comparing the phase of a first controlled oscillator signal from a first controlled oscillator with the phase of a reference oscillator frequency signal derived from a low-noise reference oscillator, such as a crystal oscillator. Prior to the comparison, both oscillator signals are reduced to a common comparison frequency by means of suitable frequency divider circuits.
  • the first phase comparator outputs an error signal when the oscillator signals do not have the same phase.
  • a first loop filter including an integrator circuit, filters the error signal from the first phase comparator to produce a control signal to the first controlled oscillator such that its frequency is controlled to a desired value and its phase error has a mean of zero.
  • the first controlled oscillator signal is then compared in a second phase comparator with a signal from a second controlled oscillator. Prior to the comparison, both signals are reduced to a common comparison frequency by frequency division or heterodyne mixing.
  • the second phase comparator outputs an error signal when the oscillator signals do not have the same phase.
  • the phase error signal of nominally zero mean value from the first phase comparator is then added in a summer to the phase error from the second phase comparator (the phase error signals are 180° out of phase) in such a way that phase noise of the first controlled oscillator is canceled, thereby producing a control signal for the second controlled oscillator that is free of phase noise from the first controlled oscillator.
  • the noise free control signal is then filtered in a second loop filter and used to control the second controlled oscillator to produce a signal at a desired frequency having improved phase noise characteristics.
  • the first phase comparator includes two identical phase comparators having the same input signals from the first controlled oscillator and the reference oscillator, respectively.
  • One of the identical phase comparators is connected to the first loop filter to provide the control signal for the first controlled oscillator, while the other identical phase comparator is connected to the output of the second phase comparator to produce a Y-added addition of the phase error current signals.
  • phase comparators typically have current source outputs, and therefore, merely splitting the output of the first phase comparator would result in a current split.
  • the noise free control signal is then filtered in the second loop filter and used to control the second controlled oscillator.
  • the first and second loop filters are thereby decoupled from one another by the use of identical first phase comparators.
  • FIG. 1 is block diagram of a general implementation of the invention for reducing oscillator noise by noise-feedforward
  • FIG. 2 is a block diagram of a preferred embodiment of the present invention for reducing oscillator noise by noise-feedforward.
  • FIG. 1 is a block diagram of a general implementation of the inventive circuit, shown generally at 10.
  • the inventive circuit 10 achieves a reduction in oscillator phase noise. Further, the inventive circuit 10 may be integrated into silicon chips, thus reducing the overall size of the circuit and its cost of manufacture.
  • the inventive circuit 10 includes a first phase-locked loop circuit 12, a quadrature modulator 14 and a second phase-locked loop circuit 16.
  • the first phase-locked loop circuit 12 includes a first voltage controlled oscillator (VCO) 18 which generates an output signal 20 frequency dependent on the voltage control input signal 22.
  • VCO voltage controlled oscillator
  • Such frequency-controllable oscillators are generally known as VCO's, this term shall be taken also to encompass current-controlled oscillators, which are another common implementation in which the frequency of the output signal depends on a control current rather than a control voltage.
  • the output signal 20 from the VCO 18 is buffered by buffer amplifiers 24, which can include a 90° phasing network or a Hilbert network, producing cosine and sine wave outputs that have a relative 90° phase shift with respect to each other. It is also known to construct Quadrature VCO's (QVCO's), which directly output both the cosine and sine waveforms, and such QVCO's may alternatively be used (see e.g., FIG. 2). In this implementation, the buffer amplifiers 24 are subsumed into the QVCO. Quadrature modulators and improvements thereto are described in allowed U.S. Pat. No. 5,530,722 issued Jun. 25, 1996, which is hereby incorporated by reference herein.
  • the buffer amplifiers 24 also provide a buffered VCO signal 26 back to the first phase-locked loop circuit 12.
  • the buffered VCO signal 26 from the buffer amplifiers 24 is a third separately buffered output signal and can be a cosine or sine waveform having the same frequency but out of phase with the cosine and sine waveforms supplied to the quadrature modulator 14.
  • the buffered VCO signal 26 is received at a divide-by-N circuit 28 which divides the buffered VCO signal 26 by N.
  • a reference divide-by-M circuit 30 divides a reference signal of known frequency F ref to obtain F ref /M.
  • a phase comparator 32 compares the outputs of dividers 28 and 30 and develops an error signal 34 when the outputs of dividers 28 and 30 do not have the same frequency and phase.
  • the error signal 34 is provided to a loop filter 36 which filters the error signal 34 and produces the control signal 22 to VCO 18 in such a way as to cause the error in the to VCO output signal 20 to reduce towards zero frequency and phase error.
  • the VCO 18 is locked to the frequency (N/M)F ref .
  • any desired VCO 18 frequency can be obtained, within practical limits, by suitable choice of M and N according to well known digital frequency synthesizer techniques.
  • the quadrature modulator 14 impresses phase and/or amplitude modulation on a signal having a mean frequency equal to the frequency of the VCO 18.
  • phase modulation In some applications, such as in cellular phones conforming to GSM (Global System for Mobile Communications) standards, only phase modulation is used. It is desired that such phase modulation shall be transferred to an output transmitter frequency chosen from one of a plurality of channels located in an allocated cellular telephone band, such as 935-960 MHz in Europe, or in the 1900 MHz PCS spectrum in the United States.
  • the quadrature modulator 14 includes a pair of balanced mixers 36,38 and a summer 40.
  • the mixers 36,38 mathematically perform a multiplication of I and Q signals onto the cosine and sine waveforms generated by the buffer amplifiers 24.
  • the I and Q signals are preferably generated by a digital signal processor (not shown) and carry modulated information, and when modulated onto a radio carrier cause amplitude and phase modulation of the radio carrier.
  • the I signals (I and I, are multiplied onto the cosine and waveform by mixer 36.
  • the Q signals Q and Q are multiplied onto the sine waveform at mixer 38.
  • the outputs of mixers 36 and 38 are added together by the summer 40 producing an amplitude/phase modulated signal 42 which is essentially a vector having an amplitude and phase.
  • amplitude/phase modulated signal 42 which is essentially a vector having an amplitude and phase.
  • various forms of modulation may be produced, e.g., binary phase shift keying, quadrature amplitude modulation, single side band speech, etc.
  • the I and Q signals essentially determine the type of modulation to be implemented.
  • the desired cellular channel is conventionally selected by programming a frequency synthesizer 44, which is typically used as the local oscillator in the receiver, to generate a mixing frequency signal 46 to a downconverter 48.
  • a second VCO 50 produces the other input signal 52 to the downconverter 48.
  • the VCO 50 is operating directly on the transmit frequency, and is preferably a low noise VCO.
  • the transmit frequency signal 52 is subtracted from the mixing frequency signal 46 in the downconverter 48 producing a difference frequency signal 54 which should be at the transmit offset frequency.
  • the transmit offset is the offset that is made from the receiver frequency synthesizer 44 to produce the transmit frequency and is equal to the receiver intermediate frequency plus or minus duplex spacing.
  • the duplex spacing is essentially a fixed gap between the uplink and downlink frequency bands enabling a cell phone, or other device, to simultaneously transmit and receive signals.
  • the duplex spacing is 45 MHz; in the 2 Gigahertz PCS band the duplex spacing is a constant 80 MHz.
  • the VCO 18 of the first phase-locked loop 12 is preferably operating at the transmit offset frequency.
  • the output signal 42 from the quadrature modulator 14 is thus a modulated transmit offset frequency signal.
  • the difference frequency signal 54 from the downconverter 48 and the modulated transmit offset frequency signal 42 are input to a phase comparator, or detector, 56, which compares the difference frequency signal 54 with the phase modulated signal 42 (both signals being at the transmit offset frequency) from the quadrature modulator 14.
  • phase of the signal 52 from the VCO 50 does not equal the phase of the modulated signal 42, an error signal 58 (shown in dotted form) is produced to a loop filter 60, which in turn produces a control signal 62 to control the VCO 50 to reduce the error, thus forcing the VCO 50 to follow the phase modulation impressed by the quadrature modulator 14.
  • the phase modulated signal 64 from the VCO 50 is then amplified by a transmit power amplifier 66 and radiated by an antenna 68, when required.
  • a troublesome imperfection with prior art systems is that oscillator phase noise can occur with a sufficient magnitude, compared to the intended phase modulation, to increase errors in data transmission.
  • Phase noise is particularly troublesome when attempts are made to reduce size and cost by manufacturing the VCO 18 as part of an integrated circuit chip embodying all of the elements (14, 18, 24, 28, 30, 32, 36, 48 and 56). Therefore the present invention incorporates additional elements or connections in order to reduce the phase noise contribution from the VCO 18.
  • phase noise generated by the VCO 18, relative to the assumed noise-free reference signal F ref emerges from the phase comparator 32 reduced by the factor N, which is the division ratio of the divider 28. Therefore, the error signal 34 from the phase comparator 32 is scaled in a scaler 70, by a factor N for example, to obtain a signal 72 representing the phase noise of the VCO 18 in a proper magnitude.
  • the phase noise of the VCO 18 also appears, together with the intended modulation, on the output signal 42 from the quadrature modulator 14, and is thus transferred through to the output signal 58 of the phase comparator 56.
  • the present invention thus contemplates providing a summer 74 receiving the scaled phase noise signal 72 from the scaler 70 and the phase error signal 58 from the phase comparator 56 and adding the scaled phase noise signal 72 from the scaler 70 to the phase error signal 58 from phase comparator 56 in such a way as to cancel the phase noise generated by VCO 18.
  • the summer 74 performs a simple addition application, since the scaled phase noise signal 72 is out of phase with the phase error signal 58 by 180°, a subtraction, or cancellation, of the phase error results.
  • the addition of the summer 74 reduces the amount of phase error generated by the VCO 18 that is transferred through the loop filter 60 to the VCO 50, and thus to the output of the power amplifier 66 and antenna 68.
  • elements 14, 18, 24, 28, 30, 32, 36, 48, 56, 70 and 74 would be implemented as part of the integrated circuit chip.
  • the loop filter 60 may or may not be formed as part of the integrated circuit chip.
  • the VCO 18 may be of a small size and low cost, without incurring the phase noise penalty generally associated with small size, low cost VCO's.
  • FIG. 2 illustrates a preferred implementation of the inventive circuit, shown generally at 100, with like elements from FIG. 1 indicated with the same reference numbers and elements which have been modified indicated with a prime (').
  • a quadrature VCO (QVCO) 102 is provided in the first phase-locked loop circuit 12' replacing the VCO 18 and buffer amplifiers 24 of FIG. 1.
  • the QVCO 102 receives the control signal 22 from the loop filter 36 and generates the cosine and sine wave forms required to drive the quadrature modulator 14.
  • identical phase comparators 104 and 106 have replaced the single phase comparator 32 of FIG. 1.
  • the identical phase comparators 104 and 106 have the same input signals as phase comparator 32 in FIG.
  • phase comparator 104 develops an error signal 110 if the phases of the QVCO signal 26 and F ref signal are different.
  • the error signal 110 is provided to the loop filter 36, which in turn produces the control signal 22 to the QVCO 102 to reduce the frequency and phase error output by the QVCO 102.
  • the phase comparator 106 outputs the error signal 72 representative of phase differences between the QVCO signal 26 and reference signal F ref .
  • Both phase comparators 104 and 106 are preferably of the form known as charge pumps, which are more fully described in, for example, U.S. Pat. No.
  • the frequency synthesizer disclosed in the '288 Patent may furthermore be used as frequency synthesizer 44 in FIG. 1, or may be implemented as part of the downconverter 48' in FIG. 2.
  • the downconverter 48' may also incorporate digital frequency dividers as well, or instead of, heterodyne downconverter, which options are however largely immaterial to the invention.
  • phase comparator 56 is also preferred for the phase comparator 56 in the second phase-locked loop circuit 16', although any type of phase comparator having a current source output signal proportional to phase error between the comparator input signals is suitable for use with the present invention.
  • a Gilbert Cell type of phase comparator may be used with current mirrors to convert its output to a bidirectional current source.
  • the Gilbert Cell type of phase comparator is preferred to a digital phase comparator and charge pump for operating (input signal) frequencies higher than about 20 MHz.
  • phase comparators 56 and 106 allow the output of phase comparators 56 and 106 to be merely connected in parallel at node 112 to achieve addition of their output current signals.
  • the reason for the duplicate phase comparators 104 and 106 is that they avoid the need to connect the output of phase comparators 104 and 56 together, which would cause unwanted interaction between the first phase-locked loop circuit (28,36, 102, 104) controlling the QVCO 102 and the second phase-locked loop circuit (48',50,56,60) controlling the VCO 50.
  • the provision of the separate phase comparator 106 otherwise identical or similar to the phase comparator 104, thus provides a duplicate but isolated output of the same phase error current signal as exists at the output of phase comparator 104.
  • the phase comparator 106 preferably directly provides a phase noise current scaled up by a factor ⁇ N ⁇ compared to the phase noise current from phase comparator 56, thus compensating for the division-by-N in the divider circuit 28.
  • This scaling may be achieved by proper choice of the operating currents of charge pump or Gilbert Cell type of phase comparators, which can be set to a sufficient accuracy without further adjustment while still achieving useful amounts of phase noise compensation. If however the divide-by-N circuit 28 is a variable divider that is operated at different values, as may be necessary for transmitters that operate in alternate cellular bands such as 800 MHz and 1900 MHz, then the amount of scaling for proper noise compensation may have to be adjusted.
  • the '288 Patent incorporated herein discloses how to construct charge pump phase comparators having programmable current levels, which are suitable for producing variable scaling, if needed.
  • a minor amount of additional circuitry such as a duplicate charge pump phase comparator 106 in FIG. 2, and a scaler 70 and summer 74 in FIG. 1, can compensate for phase noise from a QVCO 102 or a VCO 18 when used to perform modulation at a transmit intermediate frequency (TXIF) in, for example, a cellular telephone transmitter.
  • TXIF transmit intermediate frequency
  • the preferred form would be to incorporate elements (14, 22, 28, 48', 56, 102, 104 and 106) into an integrated circuit chip.
  • the loop filter 60 may or may not be formed on the integrated circuit chip.

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
  • Transmitters (AREA)
  • Inductance-Capacitance Distribution Constants And Capacitance-Resistance Oscillators (AREA)
  • Oscillators With Electromechanical Resonators (AREA)
US09/286,857 1999-04-06 1999-04-06 Method and apparatus for reducing oscillator noise by noise-feedforward Expired - Lifetime US6091303A (en)

Priority Applications (9)

Application Number Priority Date Filing Date Title
US09/286,857 US6091303A (en) 1999-04-06 1999-04-06 Method and apparatus for reducing oscillator noise by noise-feedforward
AT00919750T ATE255296T1 (de) 1999-04-06 2000-03-28 Verfahren und vorrichtung zur verminderung des rauschens eines oszillators durch vorwärtskopplung des rauschens
JP2000610126A JP2002541707A (ja) 1999-04-06 2000-03-28 雑音フィードフォワードにより発振器雑音を減らす方法と装置
EP00919750A EP1166447B1 (fr) 1999-04-06 2000-03-28 Procede et appareil permettant de reduire le bruit d'un oscillateur par precompensation de bruit
PCT/US2000/008202 WO2000060741A1 (fr) 1999-04-06 2000-03-28 Procede et appareil permettant de reduire le bruit d'un oscillateur par precompensation de bruit
CN00805671.4A CN1225088C (zh) 1999-04-06 2000-03-28 用于通过噪声前馈减少振荡器噪声的方法和装置
AU40384/00A AU4038400A (en) 1999-04-06 2000-03-28 Method and apparatus for reducing oscillator noise by noise-feedforward
DE60006792T DE60006792D1 (de) 1999-04-06 2000-03-28 Verfahren und vorrichtung zur verminderung des rauschens eines oszillators durch vorwärtskopplung des rauschens
TR2001/02834T TR200102834T2 (tr) 1999-04-06 2000-03-28 Gürültü-ileri-besleme yönetimiyle osilatör gürültüsünün azaltılması için yöntem ve cihaz.

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US09/286,857 US6091303A (en) 1999-04-06 1999-04-06 Method and apparatus for reducing oscillator noise by noise-feedforward

Publications (1)

Publication Number Publication Date
US6091303A true US6091303A (en) 2000-07-18

Family

ID=23100474

Family Applications (1)

Application Number Title Priority Date Filing Date
US09/286,857 Expired - Lifetime US6091303A (en) 1999-04-06 1999-04-06 Method and apparatus for reducing oscillator noise by noise-feedforward

Country Status (9)

Country Link
US (1) US6091303A (fr)
EP (1) EP1166447B1 (fr)
JP (1) JP2002541707A (fr)
CN (1) CN1225088C (fr)
AT (1) ATE255296T1 (fr)
AU (1) AU4038400A (fr)
DE (1) DE60006792D1 (fr)
TR (1) TR200102834T2 (fr)
WO (1) WO2000060741A1 (fr)

Cited By (29)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6188287B1 (en) * 1999-09-27 2001-02-13 Motorola, Inc. Method and apparatus for reducing phase noise in a voltage controlled oscillator circuit
US20020002038A1 (en) * 2000-06-29 2002-01-03 Tdk Corporation Mobile communications device power amplifier module and mobile communications device terminal and mobile communications device base station
US6356597B1 (en) * 1994-12-13 2002-03-12 Hughes Electronics Corporation High precision, low phase noise synthesizer with vector modulator
US20020064237A1 (en) * 2000-11-30 2002-05-30 Shigeru Shibata Quadrature modulation apparatus, radio transmission apparatus using quadrature modulation apparatus and quadrature modulation method
US6496077B2 (en) * 2000-11-23 2002-12-17 Samsung Electronics Co., Ltd. Phase detector for automatically controlling offset current and phase locked loop including the same
US6639933B2 (en) * 1997-01-30 2003-10-28 Hitachi. Ltd. Phase-locked loop circuit and radio communication apparatus using the same
US20040104773A1 (en) * 2002-11-26 2004-06-03 Ascarrunz Franklin G. Feed-forward-back suppressed noise circuits
US20040198418A1 (en) * 2003-02-25 2004-10-07 Masaaki Noda Digital signal transceiver
WO2004088843A2 (fr) * 2003-03-28 2004-10-14 Ess Technology, Inc. Systeme et procede de compensation des erreurs dans un circuit sigma delta
US20040257478A1 (en) * 2003-06-22 2004-12-23 Tung-Ming Su Harmonic mixer based television tuner and method of processing a received rf signal
US20040257479A1 (en) * 2003-06-22 2004-12-23 Tung-Ming Su Dual mode television tuner capable of processing both digital and satellite television signals and method thereof
US20050001937A1 (en) * 2003-06-22 2005-01-06 Liang-Hui Lee Television tuner and method of processing a received rf signal
US20050128363A1 (en) * 2003-12-15 2005-06-16 Tung-Ming Su Television tuner and method of processing a received rf signal
US20050169418A1 (en) * 2004-01-28 2005-08-04 Alcatel Method and circuit for adaptive control of the bandwidth of a carrier recovery loop in radio transmission systems
US20050179857A1 (en) * 2004-02-18 2005-08-18 The Hilsinger Company Tool for adjusting rimless eyewear
DE102004014148A1 (de) * 2004-03-23 2005-10-13 Rohde & Schwarz Gmbh & Co. Kg Digitaler IQ-Modulator mit numerisch gesteuertem Frequenzoszillator
US6990154B1 (en) * 2000-11-03 2006-01-24 Texas Instruments Incorporated Using an IF synthesizer to provide raster component of frequency channel spacing
US7103334B1 (en) * 2003-10-15 2006-09-05 National Semiconductor Corporation Method and system for tuning quality factor in high-Q, high-frequency filters
US7158841B1 (en) * 2004-04-23 2007-01-02 Summit Microelectronics, Inc. Active DC output control and method for controlling targeted applications
EP1760877A1 (fr) * 2005-09-02 2007-03-07 Asic Ahead NV Modulateur à configuration variable
US20070120584A1 (en) * 2005-11-30 2007-05-31 International Business Machines Corporation Phase- or frequency-locked loop circuit having a glitch detector for detecting triggering-edge-type glitches in a noisy signal
GB2447961A (en) * 2007-03-30 2008-10-01 Motorola Inc Voltage controlled oscillator with reduced phase noise
US20090170463A1 (en) * 2007-12-27 2009-07-02 Koroglu Mustafa H Correcting for phase noise of an oscillator
US20090261916A1 (en) * 2008-04-21 2009-10-22 Ram Kelkar Programmable Filter for LC Tank Voltage Controlled Oscillator (VCO), Design Structure and Method Thereof
EP2120347A1 (fr) * 2007-02-14 2009-11-18 NEC Corporation Dispositif de correction de bruit de phase et son procédé
US20100215120A1 (en) * 2002-10-04 2010-08-26 Quintic Holdings Low-Power Polar Transmitter
US20130260706A1 (en) * 2012-03-27 2013-10-03 Lgc Wireless, Llc Systems and methods for implementing a distributed antenna system in a radio frequency integrated circuit
US20150349815A1 (en) * 2014-05-27 2015-12-03 Fujitsu Limited Radio device
CN113572452A (zh) * 2021-09-23 2021-10-29 广州慧智微电子有限公司 一种多相位移相器和多相位移相方法

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN100449938C (zh) * 2002-07-05 2009-01-07 中兴通讯股份有限公司 前馈线性功率放大器误差环自适应对消控制方法
US7409192B2 (en) * 2005-07-21 2008-08-05 Telefonaktiebolaget Lm Ericsson (Publ) Method and apparatus for frequency synthesis in direct-conversion transmitters
JP4836274B2 (ja) * 2007-07-12 2011-12-14 オムロンオートモーティブエレクトロニクス株式会社 送信装置および方法
US8710888B2 (en) * 2012-02-24 2014-04-29 Analog Devices, Inc. System and method for oscillator frequency control
TW201401762A (zh) * 2012-06-27 2014-01-01 Yong-Sheng Huang 降低振盪器相位雜訊的電路
US9866222B2 (en) * 2015-01-14 2018-01-09 Infineon Technologies Ag System and method for synchronizing multiple oscillators using reduced frequency signaling
CN104777376B (zh) * 2015-05-13 2017-10-31 中国人民解放军国防科学技术大学 一种激光放大器相位噪声测量系统
EP3523878B1 (fr) 2016-10-20 2023-02-22 Huawei Technologies Co., Ltd. Oscillateur à commande numérique de haute précision
CN113678377A (zh) * 2019-05-31 2021-11-19 华为技术有限公司 一种相位同步装置、相位同步系统及收发装置

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5095288A (en) * 1989-11-13 1992-03-10 Telefonaktiebolaget L M Ericsson Phase-locked loop having a variable bandwidth
US5530722A (en) * 1992-10-27 1996-06-25 Ericsson Ge Mobile Communications Inc. Quadrature modulator with integrated distributed RC filters
US5535432A (en) * 1994-09-14 1996-07-09 Ericsson Ge Mobile Communications Inc. Dual-mode satellite/cellular phone with a frequency synthesizer
US5654677A (en) * 1996-06-24 1997-08-05 Ericsson Inc. Relaxation oscillator of reduced complexity using CMOS equivalent of a four-layer diode
US5737694A (en) * 1995-11-30 1998-04-07 Scientific-Atlanta, Inc. Highly stable frequency synthesizer loop with feedforward

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5606581A (en) * 1994-03-17 1997-02-25 Myers; Glen A. Method and apparatus for the cancellation of interference in electrical systems
FR2734972B1 (fr) * 1995-05-31 1997-08-01 Matra Communication Dispositif d'emission radio a modulation de frequence
FR2779890B1 (fr) * 1998-06-11 2000-08-04 Alsthom Cge Alcatel Chaine d'emission reception et procede d'emission notamment pour un telephone mobile

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5095288A (en) * 1989-11-13 1992-03-10 Telefonaktiebolaget L M Ericsson Phase-locked loop having a variable bandwidth
US5530722A (en) * 1992-10-27 1996-06-25 Ericsson Ge Mobile Communications Inc. Quadrature modulator with integrated distributed RC filters
US5535432A (en) * 1994-09-14 1996-07-09 Ericsson Ge Mobile Communications Inc. Dual-mode satellite/cellular phone with a frequency synthesizer
US5737694A (en) * 1995-11-30 1998-04-07 Scientific-Atlanta, Inc. Highly stable frequency synthesizer loop with feedforward
US5654677A (en) * 1996-06-24 1997-08-05 Ericsson Inc. Relaxation oscillator of reduced complexity using CMOS equivalent of a four-layer diode

Cited By (53)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6356597B1 (en) * 1994-12-13 2002-03-12 Hughes Electronics Corporation High precision, low phase noise synthesizer with vector modulator
US6683918B2 (en) * 1994-12-13 2004-01-27 Hughes Electronics Corporation High precision, low phase noise synthesizer with vector modulator
US6639933B2 (en) * 1997-01-30 2003-10-28 Hitachi. Ltd. Phase-locked loop circuit and radio communication apparatus using the same
US20040032901A1 (en) * 1997-01-30 2004-02-19 Taizo Yamawaki Phase-locked loop circuit and radio communication apparatus using the same
US7266171B2 (en) 1997-01-30 2007-09-04 Renesas Technology Corp. Phase-locked loop circuit and radio communication apparatus using the same
US6188287B1 (en) * 1999-09-27 2001-02-13 Motorola, Inc. Method and apparatus for reducing phase noise in a voltage controlled oscillator circuit
US20020002038A1 (en) * 2000-06-29 2002-01-03 Tdk Corporation Mobile communications device power amplifier module and mobile communications device terminal and mobile communications device base station
US6990154B1 (en) * 2000-11-03 2006-01-24 Texas Instruments Incorporated Using an IF synthesizer to provide raster component of frequency channel spacing
US6496077B2 (en) * 2000-11-23 2002-12-17 Samsung Electronics Co., Ltd. Phase detector for automatically controlling offset current and phase locked loop including the same
US20020064237A1 (en) * 2000-11-30 2002-05-30 Shigeru Shibata Quadrature modulation apparatus, radio transmission apparatus using quadrature modulation apparatus and quadrature modulation method
EP1217723A2 (fr) * 2000-11-30 2002-06-26 Kabushiki Kaisha Toshiba Modulateur en quadrature utilisant une boucle à verrouillage de phase
EP1217723A3 (fr) * 2000-11-30 2002-07-10 Kabushiki Kaisha Toshiba Modulateur en quadrature utilisant une boucle à verrouillage de phase
US20100215120A1 (en) * 2002-10-04 2010-08-26 Quintic Holdings Low-Power Polar Transmitter
US8301086B2 (en) * 2002-10-04 2012-10-30 Quintic Holdings Low-power polar transmitter
US20040104773A1 (en) * 2002-11-26 2004-06-03 Ascarrunz Franklin G. Feed-forward-back suppressed noise circuits
US7064608B2 (en) 2002-11-26 2006-06-20 Scriptl, Llc Feed-forward-back suppressed noise circuits
US7349672B2 (en) * 2003-02-25 2008-03-25 Matsushita Electric Industrial Co., Ltd. Digital signal transceiver
US20040198418A1 (en) * 2003-02-25 2004-10-07 Masaaki Noda Digital signal transceiver
US20040216007A1 (en) * 2003-03-28 2004-10-28 Ess Technology, Inc. System and method for compensating for error in a sigma delta circuit
WO2004088843A2 (fr) * 2003-03-28 2004-10-14 Ess Technology, Inc. Systeme et procede de compensation des erreurs dans un circuit sigma delta
WO2004088843A3 (fr) * 2003-03-28 2005-06-09 Ess Technology Inc Systeme et procede de compensation des erreurs dans un circuit sigma delta
US7259704B2 (en) 2003-03-28 2007-08-21 Ess Technology, Inc. System and method for compensating for error in a sigma delta circuit
US7180553B2 (en) 2003-06-22 2007-02-20 Realtek Semiconductor Corp. Dual mode television tuner capable of processing both digital and satellite television signals and method thereof
US7120413B2 (en) * 2003-06-22 2006-10-10 Realtek Semiconductor Corp. Television tuner and method of processing a received RF signal
US20040257478A1 (en) * 2003-06-22 2004-12-23 Tung-Ming Su Harmonic mixer based television tuner and method of processing a received rf signal
US20050001937A1 (en) * 2003-06-22 2005-01-06 Liang-Hui Lee Television tuner and method of processing a received rf signal
US20040257479A1 (en) * 2003-06-22 2004-12-23 Tung-Ming Su Dual mode television tuner capable of processing both digital and satellite television signals and method thereof
US7262815B2 (en) 2003-06-22 2007-08-28 Realtek Semiconductor Corp. Harmonic mixer based television tuner and method of processing a received RF signal
US7945218B1 (en) 2003-10-15 2011-05-17 National Semiconductor Corporation Method and system for tuning quality factor in high-Q, high-frequency filters
US7103334B1 (en) * 2003-10-15 2006-09-05 National Semiconductor Corporation Method and system for tuning quality factor in high-Q, high-frequency filters
US7202916B2 (en) 2003-12-15 2007-04-10 Realtek Semiconductor Corp. Television tuner and method of processing a received RF signal
US20050128363A1 (en) * 2003-12-15 2005-06-16 Tung-Ming Su Television tuner and method of processing a received rf signal
US20050169418A1 (en) * 2004-01-28 2005-08-04 Alcatel Method and circuit for adaptive control of the bandwidth of a carrier recovery loop in radio transmission systems
US20050179857A1 (en) * 2004-02-18 2005-08-18 The Hilsinger Company Tool for adjusting rimless eyewear
DE102004014148A1 (de) * 2004-03-23 2005-10-13 Rohde & Schwarz Gmbh & Co. Kg Digitaler IQ-Modulator mit numerisch gesteuertem Frequenzoszillator
US7158841B1 (en) * 2004-04-23 2007-01-02 Summit Microelectronics, Inc. Active DC output control and method for controlling targeted applications
WO2007025355A1 (fr) * 2005-09-02 2007-03-08 Asic Ahead N.V. Modulateur de signal reconfigurable
EP1760877A1 (fr) * 2005-09-02 2007-03-07 Asic Ahead NV Modulateur à configuration variable
US20070120584A1 (en) * 2005-11-30 2007-05-31 International Business Machines Corporation Phase- or frequency-locked loop circuit having a glitch detector for detecting triggering-edge-type glitches in a noisy signal
US7268600B2 (en) 2005-11-30 2007-09-11 International Business Machines Corporation Phase- or frequency-locked loop circuit having a glitch detector for detecting triggering-edge-type glitches in a noisy signal
EP2120347A4 (fr) * 2007-02-14 2014-01-15 Nec Corp Dispositif de correction de bruit de phase et son procédé
EP2120347A1 (fr) * 2007-02-14 2009-11-18 NEC Corporation Dispositif de correction de bruit de phase et son procédé
GB2447961A (en) * 2007-03-30 2008-10-01 Motorola Inc Voltage controlled oscillator with reduced phase noise
GB2447961B (en) * 2007-03-30 2009-08-26 Motorola Inc Voltage controlled oscillator circuit
US8126420B2 (en) * 2007-12-27 2012-02-28 Silicon Laboratories Inc. Correcting for phase noise of an oscillator
US20090170463A1 (en) * 2007-12-27 2009-07-02 Koroglu Mustafa H Correcting for phase noise of an oscillator
US20090261916A1 (en) * 2008-04-21 2009-10-22 Ram Kelkar Programmable Filter for LC Tank Voltage Controlled Oscillator (VCO), Design Structure and Method Thereof
US8373510B2 (en) 2008-04-21 2013-02-12 International Business Machines Corporation Programmable filter for LC tank voltage controlled oscillator (VCO), design structure and method thereof
US20130260706A1 (en) * 2012-03-27 2013-10-03 Lgc Wireless, Llc Systems and methods for implementing a distributed antenna system in a radio frequency integrated circuit
US8699982B2 (en) * 2012-03-27 2014-04-15 Adc Telecommunications, Inc. Systems and methods for implementing a distributed antenna system in a radio frequency integrated circuit
US20150349815A1 (en) * 2014-05-27 2015-12-03 Fujitsu Limited Radio device
US9461678B2 (en) * 2014-05-27 2016-10-04 Fujitsu Limited Calculation of voltage standing wave ratio in radio device
CN113572452A (zh) * 2021-09-23 2021-10-29 广州慧智微电子有限公司 一种多相位移相器和多相位移相方法

Also Published As

Publication number Publication date
EP1166447A1 (fr) 2002-01-02
TR200102834T2 (tr) 2002-04-22
JP2002541707A (ja) 2002-12-03
CN1345482A (zh) 2002-04-17
AU4038400A (en) 2000-10-23
EP1166447B1 (fr) 2003-11-26
DE60006792D1 (de) 2004-01-08
ATE255296T1 (de) 2003-12-15
WO2000060741A1 (fr) 2000-10-12
CN1225088C (zh) 2005-10-26

Similar Documents

Publication Publication Date Title
US6091303A (en) Method and apparatus for reducing oscillator noise by noise-feedforward
US7215215B2 (en) Phase modulation apparatus, polar modulation transmission apparatus, wireless transmission apparatus and wireless communication apparatus
US8374283B2 (en) Local oscillator with injection pulling suppression and spurious products filtering
JPH08509589A (ja) 入れ子にした振幅変調コントローラおよび位相変調コントローラを有する電力増幅器
US8085108B2 (en) Digital polar radio frequency transmitting device with a radiofrequency reference oscillator and an integrated circuit comprising such device
TWI324468B (en) Radio frequency transceiver and transmission method
WO2005055623A1 (fr) Emetteur/recepteur radiofrequence multibande et multimode et procede de communications associe
US6700447B1 (en) Trimming of a two point phase modulator
US6028493A (en) Elimination of bandpass filter after quadrature modulator in modulation synthesizer circuit
WO2005117252A2 (fr) Reduction de couplage de bruit numerique et generation de frequence intermediaire variable des circuits a signaux mixtes
JP4416660B2 (ja) 信号の周波数を変換するためのシステムおよび方法
US7313379B2 (en) Generation of a self-correcting local oscillation
US7978789B2 (en) Frequency shift keying modulator and applications thereof
US8369446B2 (en) Transmitter
US20060114071A1 (en) Phase locked loop
JP3825317B2 (ja) フェーズロックループおよび直交位相変調器の両方を用いたｆｍ変調器
EP1255356B1 (fr) Synthétiseur de fréquence bi-mode / triple bande
EP1881608A1 (fr) Emetteur-récepteur de radiofréquence
EP1257065A1 (fr) Synthétiseur de fréquence pour des terminaux mobiles pour un système de télécommunication sans fil
JPS5853239A (ja) 無線通信システム

Legal Events

Date Code Title Description
AS Assignment

Owner name: ERICSSON INC., NORTH CAROLINA

Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:DENT, PAUL W.;REEL/FRAME:009911/0801

Effective date: 19990331

STCF Information on status: patent grant

Free format text: PATENTED CASE

CC Certificate of correction
FEPP Fee payment procedure

Free format text: PAYOR NUMBER ASSIGNED (ORIGINAL EVENT CODE: ASPN); ENTITY STATUS OF PATENT OWNER: LARGE ENTITY

FPAY Fee payment

Year of fee payment: 4

FPAY Fee payment

Year of fee payment: 8

REMI Maintenance fee reminder mailed
FPAY Fee payment

Year of fee payment: 12