CN113678377A - 一种相位同步装置、相位同步系统及收发装置 - Google Patents

一种相位同步装置、相位同步系统及收发装置 Download PDF

Info

Publication number
CN113678377A
CN113678377A CN201980095431.1A CN201980095431A CN113678377A CN 113678377 A CN113678377 A CN 113678377A CN 201980095431 A CN201980095431 A CN 201980095431A CN 113678377 A CN113678377 A CN 113678377A
Authority
CN
China
Prior art keywords
phase
signal
locked loop
local oscillator
control
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN201980095431.1A
Other languages
English (en)
Inventor
高鹏
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Huawei Technologies Co Ltd
Original Assignee
Huawei Technologies Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Huawei Technologies Co Ltd filed Critical Huawei Technologies Co Ltd
Publication of CN113678377A publication Critical patent/CN113678377A/zh
Pending legal-status Critical Current

Links

Images

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/099—Details of the phase-locked loop concerning mainly the controlled oscillator of the loop
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
    • H03L7/22—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using more than one loop
    • H03L7/23—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using more than one loop with pulse counters or frequency dividers
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/07—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop using several loops, e.g. for redundant clock signal generation
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
    • H03L7/087—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal using at least two phase detectors or a frequency and phase detector in the loop
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
    • H03L7/18—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
    • H03L7/18—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
    • H03L7/197—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between numbers which are variable in time or the frequency divider dividing by a factor variable in time, e.g. for obtaining fractional frequency division
    • H03L7/1974—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between numbers which are variable in time or the frequency divider dividing by a factor variable in time, e.g. for obtaining fractional frequency division for fractional frequency division
    • H03L7/1976—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between numbers which are variable in time or the frequency divider dividing by a factor variable in time, e.g. for obtaining fractional frequency division for fractional frequency division using a phase accumulator for controlling the counter or frequency divider

Abstract

一种相位同步装置、相位同步系统及收发装置，用以为多芯片拼接方案中的每个射频收发机芯片提供相位一致的本振信号。相位同步系统包括：第一射频收发机芯片和第二射频收发机芯片，第一射频收发机芯片包括第一锁相环和第一控制电路，第二射频收发机芯片包括第二锁相环；其中，第一锁相环，用于产生第一本振信号；第二锁相环，用于产生第二本振信号；第一控制电路，用于根据第一本振信号以及第二本振信号检测得到第一相位差，并根据第一相位差产生第一控制信号，以及利用第一控制信号对第一锁相环进行相位控制或对第二锁相环进行相位控制。

Description

PCT国内申请，说明书已公开。

Claims (30)

  1. PCT国内申请，权利要求书已公开。
CN201980095431.1A 2019-05-31 2019-05-31 一种相位同步装置、相位同步系统及收发装置 Pending CN113678377A (zh)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/CN2019/089705 WO2020237690A1 (zh) 2019-05-31 2019-05-31 一种相位同步装置、相位同步系统及收发装置

Publications (1)

Publication Number Publication Date
CN113678377A true CN113678377A (zh) 2021-11-19

Family

ID=73552678

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201980095431.1A Pending CN113678377A (zh) 2019-05-31 2019-05-31 一种相位同步装置、相位同步系统及收发装置

Country Status (4)

Country Link
US (1) US20220085821A1 (zh)
EP (1) EP3968523A4 (zh)
CN (1) CN113678377A (zh)
WO (1) WO2020237690A1 (zh)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN114710256A (zh) * 2021-12-30 2022-07-05 北京力通通信有限公司 射频和基带同步方法
WO2024017232A1 (zh) * 2022-07-20 2024-01-25 华为技术有限公司 一种通信方法、通信装置和通信系统

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP4078814A1 (en) 2019-12-20 2022-10-26 Telefonaktiebolaget LM Ericsson (publ) Multiple pll system with common and difference mode loop filters
CN115603763A (zh) * 2021-06-28 2023-01-13 中兴通讯股份有限公司（Cn） 多通道信号合成电路及多通道信号合成方法
US20230082794A1 (en) * 2021-09-16 2023-03-16 Ses Rfid Solutions Gmbh Chip packaging structure
WO2023159649A1 (zh) * 2022-02-28 2023-08-31 华为技术有限公司 一种相控阵装置、通信设备及控制方法
WO2023232254A1 (en) * 2022-06-02 2023-12-07 Telefonaktiebolaget Lm Ericsson (Publ) Multiple pll system with pairwise phase difference regulation
CN115842616B (zh) * 2023-02-27 2023-06-30 成都九洲迪飞科技有限责任公司 一种用于远程通信的宽带接收机与发射机同步通信系统

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102882536A (zh) * 2012-08-28 2013-01-16 叶松 北斗rdss卫星导航系统的射频接收机
CN103888136A (zh) * 2012-12-20 2014-06-25 澜起科技（上海）有限公司 广播系统芯片的无晶体时钟产生系统
US9225507B1 (en) * 2013-06-04 2015-12-29 Pmc-Sierra Us, Inc. System and method for synchronizing local oscillators
US20180309472A1 (en) * 2017-04-21 2018-10-25 Qualcomm Incorporated Mechanism to mitigate transmitter and receiver voltage-controlled oscillator (vco) pulling

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6091303A (en) * 1999-04-06 2000-07-18 Ericsson Inc. Method and apparatus for reducing oscillator noise by noise-feedforward
EP1162777A1 (en) * 2000-06-07 2001-12-12 Alcatel Multi-carrier comunication system with sample rate pilot carrier and time division duplexing frame rate pilot carrier
US6765977B1 (en) * 2001-03-19 2004-07-20 Cisco Technology, Inc. Offset mode phase locked loop frequency synthesizer with reduced divide ratio
US8013681B2 (en) * 2009-08-05 2011-09-06 Harris Corporation Wide spectrum radio transmit architecture
US8415999B2 (en) * 2010-07-28 2013-04-09 International Business Machines Corporation High frequency quadrature PLL circuit and method
US9014323B2 (en) * 2013-08-30 2015-04-21 Nxp B.V. Clock synchronizer for aligning remote devices
US9866222B2 (en) * 2015-01-14 2018-01-09 Infineon Technologies Ag System and method for synchronizing multiple oscillators using reduced frequency signaling
CN105656484A (zh) * 2015-12-29 2016-06-08 中国电子科技集团公司第二十六研究所 一种微分相位射频移相方法及系统
EP3197056B1 (en) * 2016-01-25 2018-08-01 Nxp B.V. Phase locked loop circuits
US9979408B2 (en) * 2016-05-05 2018-05-22 Analog Devices, Inc. Apparatus and methods for phase synchronization of phase-locked loops
WO2017220138A1 (en) * 2016-06-22 2017-12-28 Telefonaktiebolaget Lm Ericsson (Publ) Method and system for phase alignment of multiple phased locked loops
KR102595903B1 (ko) * 2016-08-26 2023-10-30 삼성전자주식회사 모뎀 칩, 이를 포함하는 어플리케이션 프로세서 및 모뎀 칩의 동작방법
CN108737000B (zh) * 2017-04-24 2020-01-21 上海诺基亚贝尔股份有限公司 用于时钟同步的方法和设备
US11528029B2 (en) * 2018-06-29 2022-12-13 Intel Corporation Apparatus to synchronize clocks of configurable integrated circuit dies through an interconnect bridge

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102882536A (zh) * 2012-08-28 2013-01-16 叶松 北斗rdss卫星导航系统的射频接收机
CN103888136A (zh) * 2012-12-20 2014-06-25 澜起科技（上海）有限公司 广播系统芯片的无晶体时钟产生系统
US9225507B1 (en) * 2013-06-04 2015-12-29 Pmc-Sierra Us, Inc. System and method for synchronizing local oscillators
US20180309472A1 (en) * 2017-04-21 2018-10-25 Qualcomm Incorporated Mechanism to mitigate transmitter and receiver voltage-controlled oscillator (vco) pulling

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN114710256A (zh) * 2021-12-30 2022-07-05 北京力通通信有限公司 射频和基带同步方法
CN114710256B (zh) * 2021-12-30 2022-11-15 北京力通通信有限公司 射频和基带同步方法
WO2024017232A1 (zh) * 2022-07-20 2024-01-25 华为技术有限公司 一种通信方法、通信装置和通信系统

Also Published As

Publication number Publication date
EP3968523A4 (en) 2022-05-18
WO2020237690A1 (zh) 2020-12-03
EP3968523A1 (en) 2022-03-16
US20220085821A1 (en) 2022-03-17

Similar Documents

Publication Publication Date Title
CN113678377A (zh) 一种相位同步装置、相位同步系统及收发装置
US9246498B2 (en) Electronic circuit and control method
KR101829974B1 (ko) 고속 아날로그 빔형성 시스템 및 방법
US7499684B2 (en) Master-slave local oscillator porting between radio integrated circuits
US8013681B2 (en) Wide spectrum radio transmit architecture
US20230336182A1 (en) Fractional divider with duty cycle regulation and low subharmonic content
KR102656996B1 (ko) 기지국의 다중 채널 위상 동기화 장치, 방법 및 기지국
CN115603763A (zh) 多通道信号合成电路及多通道信号合成方法
US9948450B2 (en) Frequency generator
CN114450894B (zh) 具有多个倍频器的lo生成器的可扩展双偏振毫米波多频带5g相控阵
CN116418361A (zh) 一种射频收发芯片和射频收发装置
US20230387958A1 (en) Multi-antenna transceiver system for multi-band operation
KR101351589B1 (ko) 다중 안테나 송수신 시스템
US11171682B2 (en) Dual polarization millimeter-wave frontend integrated circuit
US11539383B2 (en) Bidirectional image-rejection active array with reduced LO requirement
US11018702B2 (en) Multi-radio access technology circuit
WO2014078311A2 (en) Frequency synthesis using a phase locked loop

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination