US4844325A - Method and apparatus for die-bonding semiconductor chip bonding - Google Patents
Method and apparatus for die-bonding semiconductor chip bonding Download PDFInfo
- Publication number
- US4844325A US4844325A US07/168,968 US16896888A US4844325A US 4844325 A US4844325 A US 4844325A US 16896888 A US16896888 A US 16896888A US 4844325 A US4844325 A US 4844325A
- Authority
- US
- United States
- Prior art keywords
- chip
- semiconductor chip
- preform
- die
- collet
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 34
- 238000000034 method Methods 0.000 title claims abstract description 26
- 239000007789 gas Substances 0.000 claims abstract description 23
- 239000011261 inert gas Substances 0.000 claims abstract description 4
- 238000007664 blowing Methods 0.000 claims description 9
- 229920005989 resin Polymers 0.000 claims description 5
- 239000011347 resin Substances 0.000 claims description 5
- 230000009194 climbing Effects 0.000 claims description 4
- 239000003822 epoxy resin Substances 0.000 claims description 3
- 229920000647 polyepoxide Polymers 0.000 claims description 3
- 239000011248 coating agent Substances 0.000 claims description 2
- 238000000576 coating method Methods 0.000 claims description 2
- 238000003825 pressing Methods 0.000 claims description 2
- 230000015572 biosynthetic process Effects 0.000 claims 1
- 238000010438 heat treatment Methods 0.000 claims 1
- 239000006023 eutectic alloy Substances 0.000 description 6
- 229910015365 Au—Si Inorganic materials 0.000 description 5
- 238000005476 soldering Methods 0.000 description 4
- 238000004891 communication Methods 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 230000003647 oxidation Effects 0.000 description 2
- 238000007254 oxidation reaction Methods 0.000 description 2
- 229910000679 solder Inorganic materials 0.000 description 2
- 229910020220 Pb—Sn Inorganic materials 0.000 description 1
- 239000004840 adhesive resin Substances 0.000 description 1
- 229920006223 adhesive resin Polymers 0.000 description 1
- 230000002457 bidirectional effect Effects 0.000 description 1
- 238000005219 brazing Methods 0.000 description 1
- 230000000295 complement effect Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 239000000945 filler Substances 0.000 description 1
- 239000012530 fluid Substances 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 239000000203 mixture Substances 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 239000002245 particle Substances 0.000 description 1
- 239000000758 substrate Substances 0.000 description 1
- 239000010409 thin film Substances 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the groups H01L21/18 - H01L21/326 or H10D48/04 - H10D48/07 e.g. sealing of a cap to a base of a container
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67011—Apparatus for manufacture or treatment
- H01L21/67144—Apparatus for mounting on conductive members, e.g. leadframes or conductors on insulating substrates
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/68—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for positioning, orientation or alignment
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies
- H01L24/75—Apparatus for connecting with bump connectors or layer connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/83053—Bonding environment
- H01L2224/83054—Composition of the atmosphere
- H01L2224/83075—Composition of the atmosphere being inert
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/8319—Arrangement of the layer connectors prior to mounting
- H01L2224/83192—Arrangement of the layer connectors prior to mounting wherein the layer connectors are disposed only on another item or body to be connected to the semiconductor or solid-state body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/013—Alloys
- H01L2924/0132—Binary Alloys
- H01L2924/01322—Eutectic Alloys, i.e. obtained by a liquid transforming into two solid phases
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/102—Material of the semiconductor or solid state bodies
- H01L2924/1025—Semiconducting materials
- H01L2924/10251—Elemental semiconductors, i.e. Group IV
- H01L2924/10253—Silicon [Si]
Definitions
- the present invention relates to a novel composition of an apparatus for die bonding which is performed as a step in the process of assembling a semiconductor chip in a package.
- the chip In assembling a semiconductor chip in a package, the chip has to be fixed on a die pad at a predetermined location in the package prior to wire bonding and this step is called die bonding.
- Die bonding methods are classified into three general types, the eutectic alloy method, the soldering method, and the resin bonding method.
- the Au-Si eutectic alloy method an Au-plated die pad is heated at about 400° C. in a N 2 or N 2 +H 2 atmosphere with the back surface of the Si chip being pressed against the surface of the Au layer so as to form a Au-Si eutectic alloy layer that establishes a bond between the chip and the die pad.
- the back surface of a semiconductor chip is metallized with a thin film of Ni-Au or Ti-Ni-Au, and the chip and the substrate metal with a small piece of Pb-Sn solder held therebetween are heated at 200°-300° C. in a N 2 or a N 2 +H 2 atmosphere, thereby bonding the chip to the die pad.
- the resin bonding method is a fairly new technique and employed having the particles of an electroconductive material (e.g. Ag) dispersed therein.
- the adhesive resin is coated on the die pad by either stamping or with a dispenser and the chip temporarily fixed on the die pad by pressing is heated so as to cure the resin.
- the chip is properly positioned and fixed on the die pad by being sucked with a collet (grip means) while, the chip is connected to the package electrically or thermally.
- the chip sucked with the collet is thermally compressed to a preform (e.g. Au/Si layer, brazing filler material or epoxy resin) on the die pad, but this often causes the preform to go beyond the interface between the chip and the die pad and either solidify in ball form around the chip or climb the lateral side of the chip soiling the device in either case.
- a preform e.g. Au/Si layer, brazing filler material or epoxy resin
- An object, therefore, of the present invention is to provide an apparatus that is capable of die-bonding a semiconductor chip without soiling it.
- a die bonding apparatus that essentially includes a collet comprising a semiconductor chip gripping section having a cavity so shaped as to enable the gripping of a semiconductor chip; an aspiration hole communicating with a space defined by the cavity and the semiconductor chip; exhaust means communicating with the aspiration hole and which allows the semiconductor chip to be vacuum-sucked into the cavity in said collet; and gas supply means communicating with said aspiration hole in said collet.
- This apparatus is so designed as to be capable of selectively performing the following operations: (i) evacuating the space defined by said cavity in said collet and allowing the semiconductor chip to be vacuum-sucked into the said cavity, and (ii) blowing a gas from the space to the area around the semiconductor chip.
- FIG. 1(a) is a fragmentary side view of the collet in a die-bonding apparatus according to one embodiment of the present invention
- FIG. 1(b) is a plan view of the collet as seen from below;
- FIG. 2(a-c) shows the sequence of performing die-bonding with the apparatus of the present invention.
- FIG. 1(a) is a fragmentary side view of the collet 11 in a die-bonding apparatus 10 according to one embodiment of the present invention
- FIG. 1(b) is a plan view of the collet 11 as seen from below.
- the die-bonding apparatus 10 of the present invention is equipped with a collet 11 having a cavity 12 with a rectangular shape complementary to the profile of a semiconductor chip to be bonded to the die pad 90.
- the cavity 12 in the collet 11 with one end open is continuous to a communicating hole 20 via the pyramid-shaped portion 16, and the communicating hole 20 is connected via a switching valve 50 to both a vacuum pump 30 which effects vacuum suction and to a supply source 40 of a gas to be blown.
- the open end 14 of the cavity 12 in the collet 11 as seen from the front is provided with a plurality of vacuum sucking and gas blowing grooves 60 formed around a central tubular hollow portion 20.
- FIG. 2 shows the sequence of performing die-bonding with the apparatus of the present invention.
- the process starts with coating a Ag-containing epoxy resin as a preform 80 on the die pad 90 either by stamping or with a dispenser.
- the valve 50 is so adjusted as to establish communication between the vacuum pump 30 and the collet 11 and the semiconductor chip 70 is held in position in the collet 11 by vacuum suction create with the vacuum pump 30.
- the collet 11 holding the chip 70 is then moved to a position right above the preform 80 and lowered down so that the chip 70 is fixed on the preform 80 as shown in FIG. 2(b).
- the valve 50 is switched to establish communication between the gas supply source 40 and the collet 11.
- An inert gas such as N 2 is supplied through the hollow portion 20 and the grooves 60 in the collet 11 and blown against that part 82 of the preform 80 that has gone beyond the interface between the chip 70 and the die pad 90.
- N 2 blowing the assembly is heated so as to cure the preform.
- any raised part 82 of the preform 80 that has gone beyond the interface between the chip 70 and the die pad 90 will become flat.
- the collet 11 is connected to the gas supply source 40 via the communicating hole 20 and a suitable gas is blown from the supply source 40 against the part 82 of the preform 80 that has gone beyond the interface between the chip 70 and the die pad 90, thereby preventing the soiling of the device.
- a suitable gas is blown from the supply source 40 against the part 82 of the preform 80 that has gone beyond the interface between the chip 70 and the die pad 90, thereby preventing the soiling of the device.
- N 2 is used as the gas to be blown and this offers the additional advantage that a N 2 gas layer is formed on the preform 80 so as to prevent its oxidation however any suitable gas may be used.
- An embodiment of the present invention has been described with reference to die bonding by the use of an electroconductive resin. It should, however, be noted that the apparatus of the present invention can also be used when die bonding is performed by the Au-Si eutectic alloy method or the solder method and as in the case of the illustrated embodiment, the soiling of the device can be prevented.
- the preform 80 is heated to a fluid state. If a suitable gas is blown against this molten preform 80 in accordance with the present invention, the chip 70, preform 80 and the die pad 90 will be cooled fast enough to realize rapid bonding between the chip 70 and the die pad 90.
- the collet 11 is shaped like a pyramid but equally good results can be attained by employing a bidirectional collet.
- the process of die bonding with the apparatus of the present invention consists of sucking a semiconductor chip 70 with suction means, fixing the chip 70 on the surface of a certain die pad 90 with a preform 80 being placed between the die pad 90 and the semiconductor chip 70, and blowing a gas against the preform 80.
- any raised part 82 of the preform 80 that goes beyond the interface between the chip 70 and the die pad 90 will become flat without solidifying in ball form or climbing the lateral side of the chip 70. In other words, the soiling of the device which has a frequent problem in the prior art can be prevented.
- the heated preform 80 is rapidly cooled with the blown gas and the chip 70 and the die pad 90 can be bonded at an increased speed.
- an inert gas or forming gas such as N 2 is blown against the preform 80, an additional advantage is offered in that a N 2 gas layer is formed on the preform 80 to prevent its oxidation.
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Die Bonding (AREA)
- Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
Abstract
Description
Claims (7)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP62063214A JPS63228728A (en) | 1987-03-18 | 1987-03-18 | Die bonding equipment for semiconductor chips |
| JP62-63214 | 1987-03-18 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| US4844325A true US4844325A (en) | 1989-07-04 |
Family
ID=13222723
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| US07/168,968 Expired - Fee Related US4844325A (en) | 1987-03-18 | 1988-03-16 | Method and apparatus for die-bonding semiconductor chip bonding |
Country Status (5)
| Country | Link |
|---|---|
| US (1) | US4844325A (en) |
| EP (1) | EP0283000A3 (en) |
| JP (1) | JPS63228728A (en) |
| KR (1) | KR910002830B1 (en) |
| CA (1) | CA1285079C (en) |
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5207372A (en) * | 1991-09-23 | 1993-05-04 | International Business Machines | Method for soldering a semiconductor device to a circuitized substrate |
| US5222649A (en) * | 1991-09-23 | 1993-06-29 | International Business Machines | Apparatus for soldering a semiconductor device to a circuitized substrate |
| US5231753A (en) * | 1991-03-12 | 1993-08-03 | Ando Electric Co., Ltd. | IC contact mechanism |
| US5320273A (en) * | 1993-08-02 | 1994-06-14 | Ford Motor Company | Gas flow distribution system for molten solder dispensing process |
| US6223968B1 (en) * | 1996-09-16 | 2001-05-01 | International Business Machines Corporation | Solder bonding/debonding nozzle insert |
| US6360934B1 (en) * | 2000-02-10 | 2002-03-26 | Sun Microsystems, Inc. | Apparatus and method for removing a soldered device from a printed circuit board |
| US20100213248A1 (en) * | 2005-06-30 | 2010-08-26 | Fujitsu Limited | Micro component removing method |
Families Citing this family (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP3297078B2 (en) * | 1991-05-24 | 2002-07-02 | 株式会社東芝 | X-ray image tube and method of manufacturing the same |
| JP2809066B2 (en) * | 1993-10-28 | 1998-10-08 | 松下電工株式会社 | Semiconductor device mounting apparatus and mount collet used therein |
| DE10042661B4 (en) * | 1999-09-10 | 2006-04-13 | Esec Trading S.A. | Methods and apparatus for mounting semiconductor chips |
| RU2194337C1 (en) * | 2001-06-22 | 2002-12-10 | Федеральное государственное унитарное предприятие "Научно-производственное предприятие "Исток" | Chip wiring device |
| JP5053004B2 (en) * | 2007-09-05 | 2012-10-17 | キヤノンマシナリー株式会社 | Semiconductor chip mounting apparatus and method |
| CN106768991B (en) * | 2017-03-10 | 2020-04-07 | 东莞市凯格精机股份有限公司 | Method for finely detecting working state of suction nozzle |
| US20210265300A1 (en) * | 2018-08-31 | 2021-08-26 | Bondtech Co., Ltd. | Bonding system and bonding method |
Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3705457A (en) * | 1970-11-02 | 1972-12-12 | Electrovert Mfg Co Ltd | Wave soldering using inert gas to protect pretinned and soldered surfaces of relatively flat workpieces |
| US4274576A (en) * | 1979-11-13 | 1981-06-23 | International Business Machines Corporation | Cryogenic chip removal technique |
| US4295596A (en) * | 1979-12-19 | 1981-10-20 | Western Electric Company, Inc. | Methods and apparatus for bonding an article to a metallized substrate |
| US4564135A (en) * | 1983-12-29 | 1986-01-14 | Rca Corporation | Chip carrier soldering tool |
| US4634043A (en) * | 1984-09-20 | 1987-01-06 | At&T Technologies, Inc. | Engaging second articles to engaged first articles |
| US4752025A (en) * | 1987-05-22 | 1988-06-21 | Austin American Technology | Surface mount assembly repair terminal |
Family Cites Families (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS53108371A (en) * | 1977-03-04 | 1978-09-21 | Hitachi Ltd | Pellet attacher |
| DD145823A1 (en) * | 1979-09-05 | 1981-01-07 | Ruediger Uhlmann | APPENDIX FOR CONTACTING CHIPS |
| JPS5868942A (en) * | 1981-10-20 | 1983-04-25 | Matsushita Electric Ind Co Ltd | Die bonding device |
-
1987
- 1987-03-18 JP JP62063214A patent/JPS63228728A/en active Pending
-
1988
- 1988-03-12 KR KR1019880002610A patent/KR910002830B1/en not_active Expired
- 1988-03-16 EP EP88104194A patent/EP0283000A3/en not_active Withdrawn
- 1988-03-16 US US07/168,968 patent/US4844325A/en not_active Expired - Fee Related
- 1988-03-17 CA CA000561782A patent/CA1285079C/en not_active Expired - Lifetime
Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3705457A (en) * | 1970-11-02 | 1972-12-12 | Electrovert Mfg Co Ltd | Wave soldering using inert gas to protect pretinned and soldered surfaces of relatively flat workpieces |
| US4274576A (en) * | 1979-11-13 | 1981-06-23 | International Business Machines Corporation | Cryogenic chip removal technique |
| US4295596A (en) * | 1979-12-19 | 1981-10-20 | Western Electric Company, Inc. | Methods and apparatus for bonding an article to a metallized substrate |
| US4564135A (en) * | 1983-12-29 | 1986-01-14 | Rca Corporation | Chip carrier soldering tool |
| US4634043A (en) * | 1984-09-20 | 1987-01-06 | At&T Technologies, Inc. | Engaging second articles to engaged first articles |
| US4752025A (en) * | 1987-05-22 | 1988-06-21 | Austin American Technology | Surface mount assembly repair terminal |
Cited By (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5231753A (en) * | 1991-03-12 | 1993-08-03 | Ando Electric Co., Ltd. | IC contact mechanism |
| US5207372A (en) * | 1991-09-23 | 1993-05-04 | International Business Machines | Method for soldering a semiconductor device to a circuitized substrate |
| US5222649A (en) * | 1991-09-23 | 1993-06-29 | International Business Machines | Apparatus for soldering a semiconductor device to a circuitized substrate |
| US5320273A (en) * | 1993-08-02 | 1994-06-14 | Ford Motor Company | Gas flow distribution system for molten solder dispensing process |
| US6223968B1 (en) * | 1996-09-16 | 2001-05-01 | International Business Machines Corporation | Solder bonding/debonding nozzle insert |
| US6360934B1 (en) * | 2000-02-10 | 2002-03-26 | Sun Microsystems, Inc. | Apparatus and method for removing a soldered device from a printed circuit board |
| US6607113B2 (en) | 2000-02-10 | 2003-08-19 | Sun Microsystems, Inc. | Apparatus and method for removing a soldered device from a printed circuit board |
| US20100213248A1 (en) * | 2005-06-30 | 2010-08-26 | Fujitsu Limited | Micro component removing method |
| US7963434B2 (en) * | 2005-06-30 | 2011-06-21 | Fujitsu Limited | Micro component removing method |
Also Published As
| Publication number | Publication date |
|---|---|
| EP0283000A2 (en) | 1988-09-21 |
| JPS63228728A (en) | 1988-09-22 |
| EP0283000A3 (en) | 1990-02-07 |
| CA1285079C (en) | 1991-06-18 |
| KR910002830B1 (en) | 1991-05-06 |
| KR880011913A (en) | 1988-10-31 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| AS | Assignment |
Owner name: SUMITOMO ELECTRIC INDUSTRIES, LTD., 15, KITAHAMA 5 Free format text: ASSIGNMENT OF ASSIGNORS INTEREST.;ASSIGNORS:NISHIGUCHI, MASANORI;SEKIGUCHI, TAKESHI;FUJIHIRA, MITSUAKI;REEL/FRAME:004848/0914 Effective date: 19880307 Owner name: SUMITOMO ELECTRIC INDUSTRIES, LTD.,JAPAN Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNORS:NISHIGUCHI, MASANORI;SEKIGUCHI, TAKESHI;FUJIHIRA, MITSUAKI;REEL/FRAME:004848/0914 Effective date: 19880307 |
|
| FEPP | Fee payment procedure |
Free format text: PAYOR NUMBER ASSIGNED (ORIGINAL EVENT CODE: ASPN); ENTITY STATUS OF PATENT OWNER: LARGE ENTITY |
|
| FPAY | Fee payment |
Year of fee payment: 4 |
|
| REMI | Maintenance fee reminder mailed | ||
| LAPS | Lapse for failure to pay maintenance fees | ||
| FP | Lapsed due to failure to pay maintenance fee |
Effective date: 19970709 |
|
| STCH | Information on status: patent discontinuation |
Free format text: PATENT EXPIRED DUE TO NONPAYMENT OF MAINTENANCE FEES UNDER 37 CFR 1.362 |