US3893018A - Compensated electronic voltage source - Google Patents

Compensated electronic voltage source Download PDF

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Publication number
US3893018A
US3893018A US426968A US42696873A US3893018A US 3893018 A US3893018 A US 3893018A US 426968 A US426968 A US 426968A US 42696873 A US42696873 A US 42696873A US 3893018 A US3893018 A US 3893018A
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Prior art keywords
transistor
collector
coupled
emitter
base
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US426968A
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Robert R Marley
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Motorola Solutions Inc
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Motorola Inc
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Priority to US426968A priority Critical patent/US3893018A/en
Priority to GB4424174A priority patent/GB1446796A/en
Priority to DE2457753A priority patent/DE2457753C2/de
Priority to FR7440278A priority patent/FR2255652B1/fr
Priority to JP49145506A priority patent/JPS5847723B2/ja
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    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F3/00—Non-retroactive systems for regulating electric variables by using an uncontrolled element, or an uncontrolled combination of elements, such element or such combination having self-regulating properties
    • G05F3/02—Regulating voltage or current
    • G05F3/08—Regulating voltage or current wherein the variable is dc
    • G05F3/10—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics
    • G05F3/16—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices
    • G05F3/20—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations
    • G05F3/30—Regulators using the difference between the base-emitter voltages of two bipolar transistors operating at different current densities

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  • ABSTRACT A voltage and temperature stable integrated voltage regulator circuit ofi'sets the negative temperature coefficient of the base-to-emitter voltage of one transistor with a positive temperature coefficient derived from the base-to-emitter voltage differential AV between a pair of additional transistors. Other transistors are used to produce a pair of regulated stable output voltages, each having a predetermined voltage with respect to a different one of the two input voltage terminals across which the regulator circuit is connected. Circuit components are provided to cause the two output voltages to be voltage and temperature stable or to have a predetermined controllable temperature coefficient.
  • a modification of this circuit has been made to produce two output voltages of the type which are commonly required for emitter coupled logic (ECL) transistor logic circuits.
  • the two output voltages required for such ECL circuits are used, respectively, to supply a bias voltage (V,,,,) to the gates and to supply a bias voltage (V for the current source of the circuits.
  • V bias voltage
  • V bias voltage
  • V bias voltage
  • the known regulators used with ECL circuits do not provide output voltages which track with temperature the characteristics of the ECL circuits itself. Since the ECL circuit exhibits a predetermined variation in characteristics with temperature it is desirable for some applications that the circuit providing the bias voltages also exhibits a matching or tracking temperature characteristic to ensure that the operating characteristics of the ECL circuits remain the same over a wide ambient temperature range.
  • a voltage regulator circuit has first and second voltage input terminals which are adapted to be connected across an unregulated direct current voltage source.
  • a first transistorized circuit is coupled with the first and second input terminals and has an output terminal providing a voltage with a positive temperature coefficient.
  • a shunt regulator transistor has its base connected to the output terminal of the first transistorized circuit. The emitter of the shunt regulator transistor is coupled with the second of the input terminal and its collector is connected through compensating circuit to the first input terminal.
  • the compensating circuit offsets variations in the voltage across the base-emitter junction of the shunt regulator transistor with variations in the voltage appearing on the second input terminal.
  • An emitter-follower circuit includes an output transistor with its base coupled to the collector of the shunt regulator transistor, its collector coupled with the first input terminal and its emitter coupled with the second input terminal by way of the first transistorized circuit.
  • FIG. 1 is a circuit diagram of a prior art circuit
  • FIGS. 2, 3 and 4 are circuit diagrams of preferred embodiments of this invention illustrating different techniques for compensation of voltage regulators.
  • FIG. 1 a prior art voltage regulator circuit used as a bias driver for an ECL digital logic system.
  • V1 and V2 two regulated output voltages which are identified in FIG. 1 as V1 and V2.
  • the voltage V1 is established with respect to ground or reference potential and the voltage V2 is established with respect to a negative direct current supply potential V illustrated in FIG. 1.
  • the reference potential and negative supply potential -V are applied respectively to a pair of input terminals 10 and II which constitute the voltage input tenninals for the circuit.
  • the lower portion of the circuit includes first and second NPN transistors T1 and T2 interconnected to operate at different current densities, so that a positive temperature coefficient of the base-to-emitter voltage differential AV is produced between them. This is done by interconnecting the collector and base of the transistor T1 to cause it to operate as a diode, with its emitter connected directly to the V input voltage supply terminal ll.
  • the different current densities are achieved by connecting a resistor R2 between the emitter of the transistor T2 and the terminal 11, while the base of the transistor T2 is connected directly to the collector of the transistor T1.
  • the voltage drop across the resistor R2 is proportional to the baseemitter voltage differential AV
  • the current gains of the transistors are chosen to be high; so that the voltage drop across the collector resistor R1 of the transistor T2 also is proportional to AV
  • the current [(2) is supplied to the resistor R1 through the collector-emitter path of a third NPN transistor T3 and a load resistor R3, coupled to the input terminal 10.
  • the current I( 1) for the transistor diode TI is supplied through the collector-emitter paths of a pair of NPN transistors T4 and T5 and a resistor R4.
  • the collector of the transistor T2 is connected to the base of an NPN shunt regulator transistor T6, which has its emitter connected to the input terminal 11 and its collector connected through a load resistor R5 to the terminal 10.
  • the positive temperature coefficient of the voltage applied from the collector of the transistor T2 to the base of the transistor T6 is adjusted by the adjustment of the differential current densities of the transistors T1 and T2 to produce a voltage drop across the resistor R1, which, when it is added to the voltage drop across the base-emitter junction of the transistor T6, results in a voltage on the collector of the transistor T6 which is proportional to the energy band gap of the semiconductor material of the transistors.
  • This voltage has a zero temperature coefficient and is coupled to the bases of the two emitter-follower transistors T3 and T5.
  • the emitters of the transistors T3 and T5 are coupled respectively to the resistors R1 and R4 in the current paths supplying the currents 1(2) and 1(1) to the transistors T2 and T1.
  • the collector of the transistor T3 also is connected to the base of the transistor T4, which results in the reference voltage V1 being expressed as:
  • da is the base-to-emitter voltage of the transistor T4 and R is the voltage across R
  • the currents I and I are voltage independent due to the nature of the circuit interconnections.
  • the voltage V also is essentially voltage independent.
  • the current l(3) is produced by the shunt regulator transistor T6 and varies significantly with any variations in the negative voltage (-V) applied to the input terminal 11. Because of the relatively large current variations in the current I(3) resulting from the shunt regulator operation of the transistor T6, the emitter-base forward voltage (b6 of the transistor T6 also varies substantially. This term appears in the output voltage V2 supplied by the regulator circuit shown in FIG. I.
  • the voltage V2 may be derived as follows:
  • R l is the voltage drop across the resistor RI
  • Equation (3) is the emitter-base voltage of the transistor T3
  • d5 is the base-emitter voltage of the transistor T5.
  • the voltage V] is substantially independent of supply voltage variations
  • the voltage V2 is not independent and varies significantly to the same extent that the term (#6, the emitter-base forward voltage of the transistor T6, varies with variations in the negative voltage applied to the terminal l I. If both of the voltages V1 and V2 are made substantially independent of temperature variations and supply voltage variations, greater system noise immunity can be obtained in computer systems which use such a bias driver circuit to supply the operating potentials for the logic circuits, such as ECL logic, of the system.
  • the circuit of FIG. 2 will be considered first, and so far as the components of the circuit of FIG. 2 are the same as those of the circuit of FIG. I, no additional description of those components will be made.
  • the voltage V1 in FIG. 2 is generated in the same manner as it is in the circuit of FIG. I.
  • the voltage V2, however, in FIG. 2 is developed from a modified circuit which includes a transistor diode T7 connected in series between the emitter of the transistor T3 and the resistor RI.
  • a second transistor diode T8 is connected in series between the lower terminal of the resistor R5 and the collector of the transistor T6.
  • the base-collector junction of the transistor diode T8 is connected to the base of the transistor T3 to provide voltage drive for that transistor, while the base of the transistor T5 continues to be connected to the collector of the transistor T6.
  • the addition of the two transistor diodes T7 and T8 changes the relationship of the output voltage V2 in accordance with the following expression:
  • One transistor base-emitter voltage term 1 re mains in each of these output voltages because such a term is desirable in ECL circuits to match the characteristics of the ECL circuits which are supplied with these two bias voltages.
  • the transistor diode T7 is required to produce sufficient voltage drop across R4 and the transistor diode T1 to turn on the transistor T1 when the transistor diode T8 is added to the circuit to cancel the effects of the transistor T6.
  • FIG. 3 there is shown another version of the circuit for producing V2 with a controllable temperature tracking rate or temperature coefficient for both of the output voltages VI and V2. No additional description will be made of those circuit components which already have been described.
  • FIG. 3 differs from FIG. 2 in that the transistor diode T7 has been eliminated and is replaced with a transistor T9 having its collector connected to the junction of the base of the transistor T3 and the collector of the tran sistor diode T8. Its base is connected to the collector of the transistor T2.
  • the shunt regulator transistor T6 no longer has its base connected directly to the collector of the transistor T2, but the base of the transistor T6 is connected to the junction of the emitter of the transistor T9.
  • a large value resistor R6 operates as a power supply insensitive current source for the transistor T9, and a resistor R7 is connected across the base and emitter electrodes of the transistor T9.
  • the transistor diode T8 of FIG. 3 operates to cancel out the base-emitter voltage effects of the transistor T6 from the output voltage V2 in the same manner as described above in conjunction with FIG. 2.
  • the circuit configuration of FIG. 3 operates to enable a choice of a temperature tracking rate which varies from a zero temperature coefficient to a negative temperature coefficient of approximately -2.7 millivolts per degree Centigrade for the two output voltages V] and V2 (at nominal output voltage of 1.3 volts).
  • This provides the greatest flexibility for the circuit in its utilization as a bias voltage driver circuit for logic circuits which in turn may exhibit positive or negative coefficients of temperature in their operation. It is desirable to have the bias or regulator circuit track the circuits with which it is used to minimize temperature effects.
  • the operation of the circuit of FIG. 3 is such that the transistor combination of the transistors T1 and T2 continues to generate a small voltage across the resistor R2 which has a positive temperature coefficient due to the difference in the device current densities of the transistors TI and T2.
  • the gain ratio of the resistors R] and R3 amplifies this voltage as it is needed for the circuit. Because the resistor R6 and the emitter-base voltage d 6 of transistor T6 set the current of the transistor T9, the V voltage of the transistor T9 is essentially just temperature dependent.
  • the resistor R7 which is connected across this V voltage thus produces a current which has a negative temperature coefficient in voltage across the resistor R1.
  • the voltage across the resistors RI and R3 can be varied from a positive temperature coefficient to a negative temperature coefficient and allows a wide variation of temperature tracking rates for the circuit. This variation can be effected in large part by making the resistor R7 a variable resistor.
  • FIG. 4 there is shown another embodiment in which the sensitivity of the shunt regulator transistor T6 to variations in the supply voltage (-V) is compensated for without the addition of the separate transistor diode T8 which is illustrated in FIGS. 2 and 3.
  • the collector of the transistor T2 is connected directly to the base of the shunt regulator transistor T6 in the same manner as in FIG. I.
  • the collector of the shunt regulator transistor T6, however, is not connected directly to the resistor R5 but instead is connected to the base of a substrate PNP transistor T10 and through a resistor R8 to the junction of the emitter of the transistor T10 with the resistor R5.
  • the collector of the transistor T10 is connected directly to the voltage supply tenninal II.
  • a pair of resistors R9 and R10 can be connected between the collectors of the transistors T1 and T2, respectively, and the negative supply terminal 1].
  • the ratio of the values of the resistors R9 and R10 can be varied in conjunction with the value of the resistor R1 to adjust the output voltage produced by the circuit of FIG. 4 from one which has a positive temperature coefficient to a negative temperature coefficient over a wide variation of temperature tracking rates for the circuit.
  • Resistors R9 and R10 also can be varied in absolute value to change the voltage levels at the outputs for V1 and V2. If these features are not desired, the resistors R9 and R10 can be eliminated and the circuit will oper ate substantially as a zero temperature coefficient circuit.
  • the circuit of FIG. 4 does not require the additional diode junction of the transistors T7 or T9 of FIGS. 2 and 3, so it is capable of operation with a minimum supply voltage which is lower by one V voltage drop than the circuits of FIGS. 2 and 3. This is desirable for low voltage applications.
  • the location of the transistor T10 of the circuit of FIG. 4 results in excellent high frequency roll-off, so that the tendency of the circuit to oscillate is minimized. This would not be the case if a PNP transistor current source were connected between the input terminal 10 and the collector of the transistor T6 in place of the resistor R5.
  • circuits illustrated in FIGS. 2, 3 and 4 which have been described above, exhibit excellent insensitivity to variations in the supply voltage (V) applied to the input terminal I] as opposed to the circuit shown in FIG. 1.
  • circuits of FlGS. 3 and 4 permit the selection of a wide range of desired temperature tracking rates between negative coefficients of temperature and positive coefficients of temperature, while the circuits of H68. 2 and 4 are illustrative of a fully compensated bias drivers or voltage regulator circuits.
  • the circuits of FIG. 2 and 3 use an offsetting diode to produce the insensitivity of the circuit to variations in the supply voltage (V), while the circuit shown in FIG. 4 achieves this result by the use of a current stabi lizing technique.
  • the net result on the operation of the circuits is the same for both of these approaches and it is the elimination of the problem of variations in the supply voltage (V) from affecting the output voltages produced by the circuits.
  • a voltage regulator circuit having first and second voltage input terminals for connection across an unregulated direct current voltage source including in combination:
  • first transistor circuit means coupled with said first and second voltage input terminals and having an output terminal supplying a voltage having a predetermined positive temperature coefficient
  • a shunt regulator transistor with emitter. base and collector electrodes, the emitter thereof coupled with said second input terminal and the base thereof coupled with the output terminal of said first transistor circuit means;
  • first resistance means coupled with said first diode means at a first junction in a series circuit, in the order named, between said first input terminal and the output terminal of said first transistor circuit means;
  • compensating means coupled between said first junction and the collector of said shunt regulator transistor for offsetting variations of the voltage across the base-emitter junction of said shunt regulator transistor with variations in the voltage appearing on said second input terminal;
  • output circuit means including an output transistor having base, collector and emitter electrodes, the base thereof coupled with the collector of said shunt regulator transistor, the collector thereof coupled with said first voltage input terminal and the emitter thereof coupled with said second voltage input terminal.
  • iaid compensating means comprises second diode neans.
  • the combination according to claim 4 further including third diode means coupled in series with said first diode means between said first junction and the base of said shunt regulator transistor, and wherein said first transistor circuit means causes substantially equal current to flow through said first and third diode means and said output transistor in said output circuit means.
  • said first, second and third diode means and the baseemitter junctions of said shunt regulator transistor and said output transistor all are connected between said first and second input terminals in the forward current conducting direction.
  • said third diode means comprises the base-emitter junction of a third transistor and wherein a shunt resistance means is connected in parallel with said baseemitter junction.
  • a voltage regulator circuit having first and second input terminals for connection across an unregulated direct current voltage source, including in combination:
  • first resistance means first and second transistor means, each having base,
  • sixth and seventh transistor means each having base
  • collector, and emitter electrodes with the collector-emitter paths of said seventh and sixth transistor means connected in series circuit in the order named between said first and second input terminals, the bases of said third and seventh transistor means being coupled with the collector of said seventh transistor means, the collector of said sixth transistor means being coupled with the base of said first transistor means, and the base of said sixth transistor means being coupled with the collector of said fifth transistor means to form a voltage regulator circuit having at least one output terminal at the emitter of said first transistor.
  • the combination according to claim 8 further including a fourth resistance means and an eighth transistor means having base, collector, and emitter electrodes, with the collector thereof coupled with said first input terminal, the emitter thereof coupled with the collector of said first transistor means, and the base thereof coupled with the collector of said third transistor means and through said fourth resistance means to said first input terminal, the resistance of said third and fourth resistance means being equal and the junction of the emitter of said eighth transistor means and the collector of said first transistor means comprising a second output terminal for said regulator circuit.
  • a voltage regulator circuit having first and second input terminals adapted to be connected respectively to a point of reference potential and an unregulated DC voltage source, including in combination:
  • a first transistor having base, collector, and emitter electrodes, with the collector and emitter of said first transistor, said first resistance, and said first diode means connected in a first series circuit, in the order named, between said first input tenninal and said second input terminal;
  • second and third transistors each having base, collector, and emitter electrodes, with the collector and emitter of said second transistor, said third resistance means, the collector and emitter of said third transistor, and said second resistance means connected in a second series circuit, in the order named, between said first and second input terminals, the base of said third transistor being connected to the junction of said first resistance means with said first diode means;
  • a fourth transistor having base, collector, and emitter electrodes, said second diode means coupled in a third series circuit with the collector and emitter of said fourth transistor, in the order named, between said first and second input terminals, the collector of said fourth transistor coupled with the base of said first transistor, the base of said second transistor coupled with said second diode means;
  • third diode means coupled between the collector of said third transistor and the base of said fourth transistor.
  • the combination according to claim 12 further including a fifth resistance means coupled across said third diode means; and a sixth resistance means coupled between said second diode means and said first input terminal.
  • said first, second and third diode means comprise fifth, sixth and seventh transistors, respectively; with the emitter of said fifth transistor being coupled to said second input terminal, and the base and collector thereof being coupled to said first resistance means; with the emitter of said sixth transistor being coupled to the collector of said fourth transistor, and the collector and 5 base of said sixth transistor both being coupled with the base of said second transistor and the collector of said seventh transistor; with the base of said seventh transistor being coupled with the collector of said third tran' sistor, and the emitter of said seventh transistor being coupled with the base of said fourth transistor.
  • said fifth resistance means coupled across the base and emitter electrodes of said seventh transistor comprises a variable resistor.
  • the combination according to claim 17 further including a sixth resistance means coupled between said first input terminal and the collector of said sixth transistor; seventh resistance means coupled between the collector of said second transistor and said first input terminal, said third and seventh resistance means having the same value of resistance; and an eighth transistor having collector, base and emitter electrodes, with the base thereof coupled with the collector of said second transistor, the collector thereof coupled with said first input terminal, and the emitter thereof coupled with the collector of said first transistor, a second output terminal being provided at the emitter of said eighth transistor.
  • a voltage regulator circuit having first and second input terminals for connection across an unregulated direct current voltage source including in combi nation: 1
  • first and second transistor means each having base
  • third and fourth transistor means each having base
  • collector and emitter electrodes with the collector-emitter path of said third transistor means, said third resistance means, the collector emitter path of said fourth transistor means, and said second resistance means coupled in series circuit, in the order named, between said first and second voltage supply terminals, the base of said fourth transistor means being coupled with the collector of said second transistor means;
  • fifth transistor means having base, collector and emitter electrodes, with the base thereof coupled with the collector of said fourth transistor means. and said fourth and fifth resistance means coupled in series circuit with the collector-emitter path of said fifth transistor means, in the order named. between said first and second input terminals, said first, second, third, fourth and fifth transistor means all being of the same conductivity type; and sixth transistor means of a conductivity type opposite to the conductivity type of said fifth transistor means and having base, collector and emitter electrodes, the emitter of said sixth transistor means coupled with the bases of said first and third transistor means and coupled with a junction between said fourth and fifth resistance means, the base coupled with the collector of said fifth transistor means and the collector of said sixth transistor means coupled with said second input terminal.
  • said first, second, third. fourth and fifth transistor means are NPN transistors and said sixth transistor means is a PNP transistor.
  • the combination according to claim 20 further including an additional resistance means and a seventh NPN transistor having base, collector and emitter electrodes, with the collector thereof coupled with said first input terminal, the emitter thereof coupled with the collector of said first transistor, and the base thereof coupled with the collector of said third transistor and further coupled through said additional resistance means to said first input terminal.

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  • Microelectronics & Electronic Packaging (AREA)
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  • Radar, Positioning & Navigation (AREA)
  • Automation & Control Theory (AREA)
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US426968A 1973-12-20 1973-12-20 Compensated electronic voltage source Expired - Lifetime US3893018A (en)

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Application Number Priority Date Filing Date Title
US426968A US3893018A (en) 1973-12-20 1973-12-20 Compensated electronic voltage source
GB4424174A GB1446796A (en) 1973-12-20 1974-10-11 Compensated electronic voltage source
DE2457753A DE2457753C2 (de) 1973-12-20 1974-12-06 Spannungsregelschaltung
FR7440278A FR2255652B1 (ja) 1973-12-20 1974-12-09
JP49145506A JPS5847723B2 (ja) 1973-12-20 1974-12-18 アンテイカデンゲンカイロ

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DE (1) DE2457753C2 (ja)
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GB (1) GB1446796A (ja)

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DE2533199A1 (de) * 1975-07-24 1977-01-27 Siemens Ag Schaltungsanordnung zur erzeugung einer von aenderungen der versorgungsspannung unabhaengigen hilfsspannung
DE2646366A1 (de) * 1975-10-21 1977-04-28 Philips Nv Stromstabilisierungsschaltung
US4091321A (en) * 1976-12-08 1978-05-23 Motorola Inc. Low voltage reference
US4100477A (en) * 1976-11-29 1978-07-11 Burroughs Corporation Fully regulated temperature compensated voltage regulator
DE2849153A1 (de) * 1978-11-13 1980-05-14 Siemens Ag Schaltungsanordnung zur erzeugung einer konstanten hilfsgleichspannung
US4249122A (en) * 1978-07-27 1981-02-03 National Semiconductor Corporation Temperature compensated bandgap IC voltage references
US4277739A (en) * 1979-06-01 1981-07-07 National Semiconductor Corporation Fixed voltage reference circuit
US4280090A (en) * 1980-03-17 1981-07-21 Silicon General, Inc. Temperature compensated bipolar reference voltage circuit
US4325018A (en) * 1980-08-14 1982-04-13 Rca Corporation Temperature-correction network with multiple corrections as for extrapolated band-gap voltage reference circuits
EP0075221A2 (de) * 1981-09-21 1983-03-30 Siemens Aktiengesellschaft Schaltungsanordnung zur Erzeugung einer temperaturunabhängigen Referenzspannung
US4422033A (en) * 1980-12-18 1983-12-20 Licentia Patent-Verwaltungs-Gmbh Temperature-stabilized voltage source
US4491780A (en) * 1983-08-15 1985-01-01 Motorola, Inc. Temperature compensated voltage reference circuit
DE3329664A1 (de) * 1983-08-17 1985-03-07 Telefunken electronic GmbH, 7100 Heilbronn Schaltung zum umwandeln von gleichsignalen
WO1985004062A1 (en) * 1984-03-01 1985-09-12 Advanced Micro Devices, Inc. Current source arrangement for three-level emitter-coupled logic and four-level current mode logic
US4636710A (en) * 1985-10-15 1987-01-13 Silvo Stanojevic Stacked bandgap voltage reference
EP0326955A1 (en) * 1988-02-02 1989-08-09 National Semiconductor Corporation Bicmos voltage reference generator
US5049806A (en) * 1988-12-28 1991-09-17 Kabushiki Kaisha Toshiba Band-gap type voltage generating circuit for an ECL circuit
US5119094A (en) * 1989-11-20 1992-06-02 Analog Devices, Inc. Termination circuit for an r-2r, ladder that compensates for the temperature drift caused by different current densities along the ladder, using one type of biopolar transistor
US5175488A (en) * 1991-05-10 1992-12-29 Digital Equipment Corporation Master ECL bias voltage regulator
US5206581A (en) * 1989-11-02 1993-04-27 Kabushiki Kaisha Toshiba Constant voltage circuit
US5278491A (en) * 1989-08-03 1994-01-11 Kabushiki Kaisha Toshiba Constant voltage circuit
US20090295465A1 (en) * 2004-11-11 2009-12-03 Koninklijke Philips Electronics N.V. All npn-transistor ptat current source
CN109992035A (zh) * 2018-01-03 2019-07-09 立积电子股份有限公司 参考电压产生器
US10901447B2 (en) 2019-04-23 2021-01-26 Richwave Technology Corp. Power amplifier and temperature compensation method for the power amplifier
CN114546019A (zh) * 2021-08-24 2022-05-27 南京航空航天大学 一种温度系数可调的基准电压源

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DE3107581A1 (de) * 1981-02-27 1982-09-16 Tokyo Shibaura Denki K.K., Kawasaki, Kanagawa Pegelschiebeschaltung
JPH0648448B2 (ja) * 1983-12-27 1994-06-22 株式会社東芝 帰還型バイアス回路
JPS61149829U (ja) * 1985-03-09 1986-09-16
JP2604359B2 (ja) * 1986-08-04 1997-04-30 日本電気株式会社 基準電圧発生回路
JPH03179514A (ja) * 1989-11-02 1991-08-05 Toshiba Corp 定電圧回路

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US3794861A (en) * 1972-01-28 1974-02-26 Advanced Memory Syst Inc Reference voltage generator circuit
US3787734A (en) * 1972-05-26 1974-01-22 Ibm Voltage regulator and constant current source for a current switch logic system
US3781648A (en) * 1973-01-10 1973-12-25 Fairchild Camera Instr Co Temperature compensated voltage regulator having beta compensating means

Cited By (34)

* Cited by examiner, † Cited by third party
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CN114546019B (zh) * 2021-08-24 2022-12-23 南京航空航天大学 一种温度系数可调的基准电压源

Also Published As

Publication number Publication date
JPS5095754A (ja) 1975-07-30
FR2255652B1 (ja) 1979-05-11
DE2457753A1 (de) 1975-06-26
GB1446796A (en) 1976-08-18
FR2255652A1 (ja) 1975-07-18
DE2457753C2 (de) 1984-12-13
JPS5847723B2 (ja) 1983-10-24

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