US2485069A - Translating material of silicon base - Google Patents

Translating material of silicon base Download PDF

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US2485069A
US2485069A US545854A US54585444A US2485069A US 2485069 A US2485069 A US 2485069A US 545854 A US545854 A US 545854A US 54585444 A US54585444 A US 54585444A US 2485069 A US2485069 A US 2485069A
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Prior art keywords
silicon
ingot
boron
electrical
slab
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US545854A
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English (en)
Inventor
Jack H Scaff
Henry C Theuerer
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AT&T Corp
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Bell Telephone Laboratories Inc
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Application filed by Bell Telephone Laboratories Inc filed Critical Bell Telephone Laboratories Inc
Priority to US545854A priority Critical patent/US2485069A/en
Priority to GB29998/45A priority patent/GB602140A/en
Priority to NL127210A priority patent/NL73819C/xx
Priority to BE467508D priority patent/BE467508A/xx
Priority to CH263769D priority patent/CH263769A/fr
Priority to FR938431D priority patent/FR938431A/fr
Priority to DEP28874D priority patent/DE840407C/de
Application granted granted Critical
Publication of US2485069A publication Critical patent/US2485069A/en
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    • C—CHEMISTRY; METALLURGY
    • C01—INORGANIC CHEMISTRY
    • C01B—NON-METALLIC ELEMENTS; COMPOUNDS THEREOF; METALLOIDS OR COMPOUNDS THEREOF NOT COVERED BY SUBCLASS C01C
    • C01B33/00—Silicon; Compounds thereof
    • C01B33/02—Silicon
    • C—CHEMISTRY; METALLURGY
    • C30—CRYSTAL GROWTH
    • C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B9/00—Single-crystal growth from melt solutions using molten solvents
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01B—CABLES; CONDUCTORS; INSULATORS; SELECTION OF MATERIALS FOR THEIR CONDUCTIVE, INSULATING OR DIELECTRIC PROPERTIES
    • H01B3/00—Insulators or insulating bodies characterised by the insulating materials; Selection of materials for their insulating or dielectric properties
    • H01B3/02—Insulators or insulating bodies characterised by the insulating materials; Selection of materials for their insulating or dielectric properties mainly consisting of inorganic substances
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/24—Alloying of impurity materials, e.g. doping materials, electrode materials, with a semiconductor body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/324—Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/02—Containers; Seals
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/02—Containers; Seals
    • H01L23/06—Containers; Seals characterised by the material of the container or its electrical properties
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/02—Containers; Seals
    • H01L23/10—Containers; Seals characterised by the material or arrangement of seals between parts, e.g. between cap and base of the container or between leads and walls of the container
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D48/00—Individual devices not covered by groups H10D1/00 - H10D44/00
    • H10D48/30—Devices controlled by electric currents or voltages
    • H10D48/32—Devices controlled by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H10D48/34—Bipolar devices
    • H10D48/345—Bipolar transistors having ohmic electrodes on emitter-like, base-like, and collector-like regions
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/60—Impurity distributions or concentrations
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/80—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials
    • H10D62/83—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group IV materials, e.g. B-doped Si or undoped Ge
    • H10D62/834—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group IV materials, e.g. B-doped Si or undoped Ge further characterised by the dopants
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D99/00—Subject matter not provided for in other groups of this subclass
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/831—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector the layer connector being supplied to the parts to be connected in the bonding apparatus
    • H01L2224/83101—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector the layer connector being supplied to the parts to be connected in the bonding apparatus as prepeg comprising a layer connector, e.g. provided in an insulating plate member
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/301—Electrical effects
    • H01L2924/3011—Impedance

Definitions

  • This invention relates to electrical translating materials and devices and to methods of making them.
  • the objects of the invention are to improve the electrical properties of conducting and translating materials; to improve the operating characteristics of translating devices; to increase the translating and conversion eillciency of these materials and devices; to improve their operation as electrical rectiflers by reducing their resistance to the flow of signal currents; to enlarge their field of application; to improve the methods of making them: and in other respects to obtain improvements in materials and devices of this character and in the methods of making them.
  • Another feature of the invention is the method of preparing crystallized silicon rectifier material in which silicon of high purity is fused and cast in ingots from which rectifying crystal elements are derived and in which a small percentage of an element, such as boron, is added to the silicon before fusion for the purpose of controlling the polarity and other electrical characteristics of the resultant material.
  • Another feature of the invention is a conducting and translating element for signaling systems comprising a body oi silicon to which a deilnite small percentage of an element such as boron has been added for the purpose of reducing the electrical impedance of said silicon body.
  • Another feat/ure is the method of making electrical conducting or translating material for usc where hardness, durability, electrical or thermal stability, or the capability of developing high thermoelectric power is desired which comprises fusing ingots of high-purity silicon alloyed with small predetermined percentages of boron for the purpose of greatly reducing the electrical resistance of the material and bringing it within the required limits.
  • Fig. 2 illustrates a circuit arrangement for testing the resistance of the material
  • Fig. 3 illustrates a block of fused silicon taken from the lngot
  • Fig. 4 shows a slab cut from the block of Fig. 3;
  • Figs. 5 and 6 disclose apparatus for polishing the surface of the silicon slab
  • Fig. '7 illustrates a heat chamber for treating the silicon slabs
  • Fig. 8 shows an etching bath
  • Fig. 9 discloses an assembled rectifier unit.
  • one of the preliminary steps in the process is to calcu late the exact amount of alloy material. such as boron. that will need to be added to the highpurity silicon to give a resultant material havlng the desired resistance Y characteristics, To this end a sample of the high-purity silicon is used to prepare a. test ingot Without the addition of the alloy material. From this preliminary ingot a. test specimen i is cut, one-quarter inch from the top of the ingot, to predetermined dimensions, and the specific resistance is measured by standard measuring apparatus Il).
  • alloy material such as boron.
  • the specific resistance will usually be between 0.1 and 0.2 ohm-centimeter, when the test specimen is made of silicon of a purity somewhat higher than 99.8 per cent. In certain cases where silicon of extreme purity is used a specific resistance as high as 2.0 ohm-centimeters maybe found.
  • the specific resistance of a similar specimen can be reduced to 0.03 ohm-centimeter by adding about 0.003 per cent boron to the melt, or to 0.01 ohm-centimeter by adding about 0.01 per cent boron.
  • the addition of 0.005 per cent boron will reduce the specific resistance of the test specimen to 0.03 ohm-centimeter.
  • these boron percentages are very small compared with the eifect they have on the resistance of the final material. In fact, they are as small or smaller than the percentages of some of the component impurities which in total constitute the residue of .2 per cent in the high-purity material. With a purity substantially in excess of 99.8 per cent these boron additions may easily be made without reducing the purity below that percentage. If, therefore lt is desired to obtain material with a specic resistance of 0.03 ohm-centimeter, a master alloy is first prepared by fusing an inset of high-purity silicon to which l per cent of boron powder has been added.
  • This boro-silicon ingot is then crushed in a steel die and ground to a fine powder in a suitable mortar.
  • the ilnai ingot 2 is prepared by adding to the crucible 30 a mixture of the high-purity silicon powder and the powdered master alloy in such a ratio that the total contains, say, 0.003 per cent boron, or some other percentage depending upon the final specific resistance desired.
  • the purpose of first preparing the master alloy is' to increase the accuracy with which the measurements of the ratio are made.
  • a suitable method for fusing the powdered material and forming the ingot 2 is described in detail in the Theuerer application Serial No. 517,060, filed January 5, 1944, now Patent No. 2,475,810, dad J lily 12, 1949.
  • a block 4 is cut therefrom; and assuming the material is to be used for rect.rs.
  • a thin slab 5 is cut therefrom.
  • Diamond saws are usually employed for this purpose, and best results are obtained when the large surface of the slab is normal to the axis of the ingot.
  • the next step in the preparation of the slab 5 for use in rectier units is to polish one of its large faces to a high nish.
  • the slab 5 is cemented to a fiat steel block 6 with a suitable thermoplastic cement.
  • the exposed surface of the slab E is then polished by rubbing it over the surface of an abrasive paper I secured to a flat plate 8. the paper 'l being changed from one degree of ilneness to another as the process proceeds.
  • the polishing surface may be lubricated with a mixture of light oil and kerosene.
  • the final step inthe polishing operation is performed by applying the slab 5 to a rubbing lap 9, having its surface covered with polishing paper I0 of extreme i'lneness.
  • the slab 5 is pressed against the polishing surface with a definite force and is moved in a circle eccentric to the lap 9 and in the direction opposite to the direction of rotation of the lap.
  • a scum of fine particles of silicon suspended in the lubricant forms over the surface of the slab.
  • the scum dries and distributes itself over the surface of the lap to form the final polishing medium. Once this surface is formed a very few seconds of additional polishing are necessary to produce a high iinish on the slab 5.
  • the slab is now removed from the block 6 and cleaned.
  • the next step in the preparation of the slab 5 is to oxidiae the polished surface thereof.
  • the slab is placed in a heat chamber H where it is subjected to a temperature of about 1050 C., for a period of two hours.
  • a normal atmosphere it maintained in the chamber by means of in let and outlet pipes i2 and i3 and any suitable external controlling apparatus.
  • the effect of this heat treatment is to form a thin coating of vitreous oxide material over the polished surface of the slab 5 and to produce thereunder a thin layer of silicon material which is characterized by its high impedance and exceptional rectincation properties.
  • the slab I is ground with abrasive material to remove completely the vitreous oxide layer.
  • the ground back of the slab is then plated with nickel. and the slab is cut into small wafers of dimensions suitable for use in the rectifier units.
  • the wafer i4 thus prepared is soldered with its nickeled surface to the threaded stud il of the metallic base I6.
  • Figs. 8 and 9. Following the soldering of the wafer to the threaded stud of the base member and before the rectifier unit is assembled, as seen in Fig. 9. the vitreous oxide layer covering the polished upper surface of the wafer I4 is removed by etching the entire base assembly in a bath il of hydroiiuoric acid and water. After the vitreous layer has been removed the base member i6 is screwed into the ceramic cylinder i8. In a similar manner the stud lil, which is integral with the cap 20, is firmly screwed into the opposite end-of the cylinder I8.
  • the cap 20 contains a central bore for receiving the cylindrical contact holder 2
  • is adjusted until the tip end of the tungsten Wire 22, the opposite end of which is soldered into the holder 2i, makes contact with the polished surface of the wafer i4.
  • the stud screws 23 are tightened to seize the holder 2i. The unit is then tapped lightly on its side until the desired characteristic is obtained.
  • the oxidation stage may be omitted, and in this case one surface of slab 5, as cut from the ingot, is prepared for eiectroplating by grinding with an abrasive such as 60G-grit aluminum oxide in water, subsequently etching this ground face in a hot solution of 10 per cent sodium hydroxide, and then electroplating this etched surface with nickel.
  • the slab is then cut into small wafers I4.
  • the wafer thus prepared is soldered to the threaded member i5 of the metallic base i6 and its free surface lapped fiat on dry SOO-grit silicon carbide abrasive paper.
  • I'he lapped face is then etched by applying thereto a drop of a solution of 20 per cent concentrated hydrofluoric acid in conf centrated nitric acid. Subsequently the etchant is removed by rinsing, and the surface of the crystal dried.
  • the base member i6 is now ready for assembly into the ceramic cylinder as described earlier.
  • alloyed material described herein may be used for many purposes in the electrical arts. In particular it will be found useful as a conducting and translating material where hardness, durability, electrical or thermal stability. is required, where high values of thermo-electric power are involved. or where an easily controlled resistance characteristie is desirable. In such cases. elements of any desired size and shape may be taken from the ingot 2.
  • the method of making a translating device for electric waves which comprises casting an ingot from a quantity of silicon of high purity, adding to said quantity of silicon before casting, a definite percentage of boron for the purpose of controlling the electrical resistance of the cast material, shaping an element of the cast siliconboron material from said ingot, and treating said element to produce on the surface thereof a thin integral layer of silicon of high electrical resistance.
  • the method of making a rectifying device which comprises fusing and casting an ingot from a quantity of silicon having therein a number of inherent impurities, the total of which constitutes a fraction of one per cent of the whole, adding to said quantity of silicon before the casting operation a quantity of boron, the percentage of which is substantially less than that of said impurities, for the purpose of controlling the electrical characteristics of the cast material, shaping an element of the cast silicon-boron material from said ingot, and heat-treating said element to produce on the surface thereof a thin layer of material of high electrical resistance.
  • the method of making rectifying elements for translating devices which comprises casting an ingot from a quantity of silicon of high Purity, and adding to said quantity of silicon before the casting operation a definite percentage of boron for the purpose of controlling the electrical resistance of the cast material and shaping the rectifying element from the resulting siliconboron ingot.
  • the method of making material for electrical translating devices which comprises casting an ingot from a quantity of silicon of high purity, adding to said quantity of silicon before the casting operation a denite percentage of boron, and controlling the casting operation to retain boron in the finished ingot for the purpose of reducing the electrical resistance and controlling the electrical polarity of the cast material.
  • An element for the translation of electric energy comprising a body of silicon to which a definite small percentage of boron has been added and retained for the purpose of reducing the electrical impedance of said body.
  • An element for the translation of electric energy comprising a body of silicon to which a definite small percentage of boron has been added and retained for the purpose of reducing the electrical impedance of said body, said body having on the surface thereof a thin layer of silicon of h igh impedance.
  • the method of making material for electrical conducting devices which comprises casting an ingot from a quantity of silicon of high purity, adding to said quantity of silicon before the casting operation a definite percentage of boron, and casting in a manner to retain boron in the finished ingot for the purpose of reducing the electrical resistance of the cast material.
  • translating devices for electric waves which comprises casting an ingot from a quantity oi silicon oi high purity, whereby zones of electropositive and oi' electronegative material are formed, and dividing the insot into a plurality o! translating devices; the steps of controlling the relativevolumes of said zones that comprise adding to said quantity of lil REFERENCES CITED
  • a method of making translating devices for electric waves which comprises casting an ingot from a quantity oi silicon oi high purity, whereby zones of electropositive and oi' electronegative material are formed, and dividing the insot into a plurality o! translating devices; the steps of controlling the relativevolumes of said zones that comprise adding to said quantity of lil REFERENCES CITED

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Chemical & Material Sciences (AREA)
  • Manufacturing & Machinery (AREA)
  • Organic Chemistry (AREA)
  • Inorganic Chemistry (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Materials Engineering (AREA)
  • Metallurgy (AREA)
  • Crystals, And After-Treatments Of Crystals (AREA)
  • Silicon Compounds (AREA)
US545854A 1944-07-20 1944-07-20 Translating material of silicon base Expired - Lifetime US2485069A (en)

Priority Applications (7)

Application Number Priority Date Filing Date Title
US545854A US2485069A (en) 1944-07-20 1944-07-20 Translating material of silicon base
GB29998/45A GB602140A (en) 1944-07-20 1945-11-09 Process for producing silicon and electrical translating elements made therefrom
NL127210A NL73819C (en(2012)) 1944-07-20 1946-08-23
BE467508D BE467508A (en(2012)) 1944-07-20 1946-08-24
CH263769D CH263769A (fr) 1944-07-20 1946-08-26 Procédé de fabrication d'une matière à base de silicium destinée à être utilisée dans la fabrication d'éléments d'appareils électriques.
FR938431D FR938431A (fr) 1944-07-20 1946-09-28 Redresseur au silicium
DEP28874D DE840407C (de) 1944-07-20 1948-12-31 Siliziumkoerper fuer elektrische Zwecke

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Application Number Priority Date Filing Date Title
US545854A US2485069A (en) 1944-07-20 1944-07-20 Translating material of silicon base

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US2485069A true US2485069A (en) 1949-10-18

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US545854A Expired - Lifetime US2485069A (en) 1944-07-20 1944-07-20 Translating material of silicon base

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US (1) US2485069A (en(2012))
BE (1) BE467508A (en(2012))
CH (1) CH263769A (en(2012))
DE (1) DE840407C (en(2012))
FR (1) FR938431A (en(2012))
GB (1) GB602140A (en(2012))
NL (1) NL73819C (en(2012))

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US2802760A (en) * 1955-12-02 1957-08-13 Bell Telephone Labor Inc Oxidation of semiconductive surfaces for controlled diffusion
US2815303A (en) * 1953-07-24 1957-12-03 Raythcon Mfg Company Method of making junction single crystals
US2824269A (en) * 1956-01-17 1958-02-18 Bell Telephone Labor Inc Silicon translating devices and silicon alloys therefor
US2861017A (en) * 1953-09-30 1958-11-18 Honeywell Regulator Co Method of preparing semi-conductor devices
US2864729A (en) * 1954-03-03 1958-12-16 Int Standard Electric Corp Semi-conducting crystals for rectifiers and transistors and its method of preparation

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
BE537841A (en(2012)) * 1954-05-03 1900-01-01
BE551335A (en(2012)) * 1955-09-29
US3448349A (en) * 1965-12-06 1969-06-03 Texas Instruments Inc Microcontact schottky barrier semiconductor device

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US1037713A (en) * 1911-06-26 1912-09-03 Carborundum Co Method of making silicon articles.
USRE18579E (en) * 1932-08-23 Demodulator and method op demodulation
GB551209A (en) * 1941-02-04 1943-02-12 Western Electric Co Rectifying contact detector systems for very short electric waves
US2419561A (en) * 1941-08-20 1947-04-29 Gen Electric Co Ltd Crystal contact of which one element is mainly silicon

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
USRE18579E (en) * 1932-08-23 Demodulator and method op demodulation
US1037713A (en) * 1911-06-26 1912-09-03 Carborundum Co Method of making silicon articles.
GB551209A (en) * 1941-02-04 1943-02-12 Western Electric Co Rectifying contact detector systems for very short electric waves
US2419561A (en) * 1941-08-20 1947-04-29 Gen Electric Co Ltd Crystal contact of which one element is mainly silicon

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US2815303A (en) * 1953-07-24 1957-12-03 Raythcon Mfg Company Method of making junction single crystals
US2861017A (en) * 1953-09-30 1958-11-18 Honeywell Regulator Co Method of preparing semi-conductor devices
US2864729A (en) * 1954-03-03 1958-12-16 Int Standard Electric Corp Semi-conducting crystals for rectifiers and transistors and its method of preparation
US2802760A (en) * 1955-12-02 1957-08-13 Bell Telephone Labor Inc Oxidation of semiconductive surfaces for controlled diffusion
US2824269A (en) * 1956-01-17 1958-02-18 Bell Telephone Labor Inc Silicon translating devices and silicon alloys therefor

Also Published As

Publication number Publication date
FR938431A (fr) 1948-09-15
BE467508A (en(2012)) 1946-09-30
CH263769A (fr) 1949-09-15
DE840407C (de) 1952-06-03
GB602140A (en) 1948-05-20
NL73819C (en(2012)) 1953-08-15

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