US2560594A - Semiconductor translator and method of making it - Google Patents

Semiconductor translator and method of making it Download PDF

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US2560594A
US2560594A US50896A US5089648A US2560594A US 2560594 A US2560594 A US 2560594A US 50896 A US50896 A US 50896A US 5089648 A US5089648 A US 5089648A US 2560594 A US2560594 A US 2560594A
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slab
making
semiconductive
filament
semiconductor
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Gerald L Pearson
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AT&T Corp
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Bell Telephone Laboratories Inc
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/70—Bipolar devices
    • H01L29/72—Transistor-type devices, i.e. able to continuously respond to applied control signals
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/304—Mechanical treatment, e.g. grinding, polishing, cutting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/70—Bipolar devices
    • H01L29/72—Transistor-type devices, i.e. able to continuously respond to applied control signals
    • H01L29/73—Bipolar junction transistors

Definitions

  • This invention relates to devices for translating or controlling electrical signals and to methods of making such devices, and more particularly to semiconductor circuit elements of the type disclosed in the application Serial No. 50,897, filed September 24, 1948, of G. L. Pearson and W. Shockley, now Patent No. 2,502,479, and methods of making such elements.
  • One general object of this invention is to improve semiconductor type translators suitable for translating or controlling, for example amplifying, generating or modulating, electric signals.
  • More specific objects of this invention are to simplify the construction of such translators, increase the ruggedness and stability thereof, enable and facilitate the fabrication of semi-conductor circuit elements of small dimensions and expedite the manufacture of circuit elements of semiconductive material and including two or more portions of difi'erent electrical properties.
  • One feature of this invention involves a translating device comprising a body of insulating material having a thin semiconductor secured thereto, the semiconductor comprising a filament having at least one enlarged end section, means for making connections to opposite ends of the filament, and means for making a rectifying connection to the filament intermediate of the end connections.
  • Another feature of this invention includes fabricating steps by which a body of semiconductive material is shaped into a filament having one or more enlarged portions integral therewith.
  • Another feature of this invention pertains to methods of making semiconductive circuit elements of prescribed configurations and having portions of small and preassigned dimensions.
  • a further feature of this invention relates to methods of readily altering the electrical characteristics of prescribed limited portions of a body of semiconductive material to produce rectifying junctions between contiguous parts of the body.
  • Fig. 1 is a diagrammatic view of one illustrative embodiment of the invention
  • Fig. 2 is a diagrammatic view of another illustrative embodiment of the invention.
  • Fig. 3 is a circuit diagram illustrating one way in which the devices of Figs. 1 and 2 may be em-- ployed;
  • Fig. 4 is a plan view of a semiconductor element, such as is used in the device of Fig 1;
  • Fig. 5 is a plan view of a semiconductive element, such as is used in the device of Fig. 2;
  • Fig. 6 is a plan view of apparatus which may be used in making a semiconductor element as shown in Figs. 1 and 4;
  • Fig. 7 is a sectional view on line l--'! 01 Fig. 6;
  • Fig. 8 is a plan view of apparatus which may be used in making a semiconductor element as shown in Figs. 2 and 5;
  • Fig. 9 is a plan view of a semiconductive element similar to the one shown in Fig. 5.
  • Semiconduction may be classified also as of two types, one known as conduction by electrons or by the excess process of conduction and the other known as conduction by holes or the defect process of semiconduction.
  • holes which refers to carriers of positive electric charges as distinguished from carriers, such as electrons, of negative charges, is more fully explained in the application of W. Shockley, Serial No. 35,423 filed-June 26, 1948.
  • Semiconductors which have been found suitable for use in devices of this invention include germanium and like materials containing minute quantities of significant impurities which comprise one way of determining the conductivity type (either N or P-type) of the semiconductive material.
  • the conductivity type may also be determined by energy relations within the semiconductor.
  • N-type and P-type are applied to semiconductive materials which tend to pass current easily when the material is respectively negative or positive with respect to a conductive connection thereto and with diiflculty when the 3 reverse is true, and which also have consistent Hall and thermoelectric eiIects.
  • impurities are here used to denote those impurities which aifect the electrical characteristics of the material such as its resistivity, photosensitivity, rectification and the like, as distinguished from other impurities which have no apparent effect on these charac teristics.
  • impurities is intended to include intentionally added constituents as well as any which may be included in the basic material as found in nature or as commercially available.
  • barrier or electrical barrier used in the description and discussion of devices in accordance with this invention is applied to a high resistance interfacial condition between contacting semiconductors of respectively opposite conductivity types or between a semiconductor and a metallic conductor whereby current passes with relative ease in one direction and with relative difiiculty in the other.
  • Semiconductive material suitable for use in devices in accordance with this invention are germanium material prepared in accordance with methods disclosed in the application of J. H. Scaff and H. C. Theuerer Serial No. 638,351 filed December 29, 1945, and silicon material prepared in accordance with United States Patents 2,402,661 and 2,402,662 to R. S. Chi, and the application of J. H. Scafi and H. C. Theuerer Serial No. 793,744 filed December 24, 1947.
  • the device shown in Fig. 1 comprises a slab In of glass or other suitable insulating material on which the semiconductor element II is mounted centrally of one face by an adhesive, such as sealing wax or the like. Germanium containing significant impurities, such as used for point contact rectifiers or other suitable semiconductive material having similar characteristics, may be used for the element II.
  • This element has an attenuated or filamentary portion l2 and large area end portions l3 and I4. These end portions are provided with electrodes l5 and I6, respectively, which may be metallic films of solder,
  • a typical device may be .005 inch thick throughout with a filamentary section .005 inch wide and .025 inch long, the end portions being .050 inch by .125 inch, the proportions being as shown in Fig. 4.
  • a pointed metal electrode H of tungsten, Phosphor bronze or like suitable metal makes rectifying contact to the filament l2.
  • This electrode may be like the whisker used in point contact rectifiers and may be similarly mounted if so desired.
  • the device illustrated in Fig. 2 comprises a slab III of insulating material, such as glass or other suitable material, on which is mounted a semiconductor element HA.
  • the adhesive used for mounting may be sealing wax or the like or, where a high temperature adhesive is required, may be of sodium silicate and finely divided aluminum oxide, or other suitable high temperature adhesive.
  • This element has an attenuated or filamentary portion l2 and large area end portions l3 and I4 provided with electrodes l5 and 16 as in the device of Fig. 1.
  • this embodiment employs an extension "A on the side of the filament I2.
  • This extension is of semiconductive material of opposite conductivity type to that of the filament l2.
  • the extension is of P-type material.
  • the extension A may be provided with an electrode l8 like the electrodes l5 and Hi.
  • Fig. 3 there is shown a circuit in which the devices of Figs. 1 and 2 may be used.
  • E, B and C the corresponding electrodes of each have been labeled E, B and C, respectively, to denote them as emitter, base and collector connections in accordance with nomenclature used with respect to devices of this type.
  • the emitter E is connected through the secondary of transformer T and battery 20 to the base I5.
  • the collector C is connected through a load resistor R1. and battery 2
  • a signal introduced through the transformer T appears considerably amplified across the load resistor RL.
  • the biases are as shown in Fig. 3, i. e., positive on the emitter and negative on the collector. If P-type material is used, the biases will be reversed and the stub or projection on the filament as in Figs. 2 and 5 will be of N-type material.
  • a thin slab of semiconductor such as high back voltage, rectifier germanium, may be used.
  • An illustrative size is a 0.125 inch square somewhat more than 0.005 inch thick.
  • One side of the slab is ground smooth and this side may be now etched with a suitable etchant such as the one subsequently indicated, and cemented to a flat plate of glass using sealing wax or another suitable adhesive. The etching of this part of the device may also be done later as will be subsequently indicated. After mounting the slab is then grounded to a uniform thickness, for example of the order of 0.005 inch.
  • Metallic films which are to serve as electrodes may now be applied or may be applied later. These films may be electroplated rhodium, copper or other suitable metal, or films of solder or other conductive material that may be suitably applied without damage to the semiconductor. If solder is used, a high temperature adhesive between the element and the backing plate must be used or the element removed from the plate for soldering.
  • the slab is removed for soldering, after the electrodes are applied, they are covered with a mask such as a polystyrene film and the back of the slab is etched, if this has not been done previously as indicated above.
  • the etchant may be one used for preparing crystal rectifier surfaces and may comprise 10 cubic centimeters of nitric acid, 5 cubic centimeters of hydrofluoric acid and 200 milligrams of copper nitrate in 10 cubic centimeters of water applied for one to four minutes. The etchant is then washed from the slab and the slab is then dried.
  • the Semiconductive slab is then remounted on the glass plate for subsequent processing.
  • 11 a high temperature adhesive is used or the electo protect certain parts from the subsequent abrading.
  • is covered with a mask comprising a metal member 32 which, in a specific case, may be of 0.005 inch nickel wire, and an adhesive coated fabric 33.
  • the material commonly called adhesive tape will serve.
  • the fabric part of the mask is provided with an opening 34 which is of the same width as the required length of the filamentary portion l2 (Figs. 1 and 4) of the semiconductor element, which is .025 inch in the case illustrated.
  • the opening 34 is long enough to extend beyond the semiconductive slab on both sides.
  • the unmasked semiconductive material is then completely removed. This may be done by abrading with a blast of grit such as 180 mesh silicon carbide at from to pounds air pressure. A blasting for fcur' or five minutes will usually remove all of the material necessary. The abrading maybe carried slightly into the glass plate to assure clean bottom edges on the semiconductor.
  • the adhesive on the mask may then be made non-adhesive by suitable means and the mask removed. If a rubber base adhesive tape is used, immersion in toluene will serve.
  • a complete metallic mask having a recess for receiving the slab may be clamped onto the glass plate.
  • any blasting grit and other debris may be cleaned oif and the front of the element then etched with a suitable etchant such as the one previously noted.
  • the element and its backing may be mounted in a suitable holder (not shown) and a point contact as I'l in Fig. 1 may be applied thereto to complete the .unit.
  • Enough current is passed through this area to heat it to a dull red color which may be maintained momentarily before the element is cooled.
  • the current may be applied from a controllable 'source and increased until the dull red color -is obtained.
  • the conductivity type conversion may also be made on the slab of semiconductor before it is shaped, by localized heating in a flame. For example, one edge of the slab may be heated in a Bunsen flame until the edge of the dull red area spreading therefrom reaches the location at which the P-N barrier is desired. The slab is then marked in accordance with the location of this barrier and shaped by the method previously described.
  • the mask of Fig. 8 may be altered so that the abrading will isolate all of the P-type material from the N- type material except at the barrier between HA and I2.
  • the mask may be made with a T slot in place of a Y slot. With this arrangeously described process are required. Since the configuration of the element is different in the two cases the masking means may be as shown in Fig. 8.
  • the fabric portion 33A of this mask has ment the large area part of HA will be rectangular and the portions l3 and I4 will project beyond the filament l2 on one side only as shown in Fig. 9.
  • the surfaces of the semiconductors should be etched after this treatment.
  • a semiconductive block having the thickness desired for these portions may be used.
  • those portions of the block a Y-shaped slot 34A and the metal member 32A is provided with a stub 31. If nickel wire is used as indicated in the previously described process, the stub 31 may be welded to the side of the member 32A.
  • portion "A of the semiconductorelement must be of opposite conductivity type material to the rest of the body,-
  • the portion "A (Figs. 2 and 5) of the semiconductor element may be electrically heated by connecting it in circuit with a source of current.
  • One connection may be made to the edge from which the filament is to be made may be ground or otherwise reduced to filament thickness before masking and abrading.
  • a semiconductor translator having an attenuated portion that comprises shaping a block of semiconductive material by thinning at least a central portion thereof, reducing the width of the thinned portion to substantially the same dimensions as its thickness to provide a semiconductive body including a filament and at least one portion of greater cross-section than the filament, and making at least three spaced connections to said body including one to each enlarged portion.
  • the method of making a semiconductive circuit element that comprises producing a plane surface on one face of a slab of semiconductive material, mounting the slab on an insulating backing with this plane face towards the backing, applying masking means to the free surface of the slab, said masking means including a portion of substantially the same width as the slab thickness, and a portion considerably wider than this dimension and abrading away the exposed portions of the slab leaving a semiconductive body having a filamentary portion and a portion of greater cross-section than the filamentary portion.
  • a semiconductive circuit element including a filamentary portion and a portion having a greater cross-section than the filamentary portion that comprises reducing the thickness of at least a portion of a slab of semiconductive material to that required for the filamentary portion, mounting the slab, protecting the portions of the slab which are to form the element and removing the remainder thereof by abrasive blasting.
  • a translating device comprising a block of insulating material, a thin body of semiconductive material secured to a face of the block, said body comprising a filament having enlarged end sections, means for making a connection respectively to each end section, and means for making a rectifying connection to the filament intermediate of the end sections.
  • a translatin device as defined in claim 4 in which the means for making rectifying connection comprises an integral portion of the semiconductive body extending from the filament but of opposite conductivity type.
  • a translating device comprising a block of insulating material having a thin body of semiconductive material including a filamentary portion and enlarged end portions secured to one face thereof, that comprises smoothing and etching one surface of a slab of semiconductive material, mounting the slab on the block of the insulating material, reducing the slab to the required thickness of the filamentary portion, applying to the slab a mask defining the filamentary and enlarged portions, removing the unmasked semiconductive material by abrasive nection is made by applying a metallic point contact to the surface of the filamentary portion.
  • a semiconductor circuit element comprising a body of N-type germanium material having a filamentary portion with a rectifying connection thereto
  • the steps of making the rectifying connection that comprise providing the filamentary portion with an integral projection of N-type germanium material and converting the projection to P-type material by heating only the projection to a dull red color and cooling it.
  • the methodof making a circuit element that comprises reducing a portion of a semiconductor to filamentary dimensions, providing electrical connections respectively at opposite ends blasting, etching the surface of the remaining of the filamentary portion, providing at least one intermediate connection to the filamentary portion between the end connections, and conditioning each intermediate connection to provide an electrical barrier between it and the filamentary portion.
  • a translating device comprising a block of insulating material, a thin body of semiconductive material secured to a face of the block, said body comprising a filament having an enlarged end section, connections to each end of said filament including a connection to said enlarged section, and an electrical barrier connection to the filament intermediate said first-mentioned connections.

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  • Condensed Matter Physics & Semiconductors (AREA)
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Description

July 17, 1951 G. PEARSON 2,560,594
SEMICONDUCTOR TRANSLATOR AND METHOD OF MAKING IT Filed Sept. 24, 1948 2 Sheets-Sheet l F/a/ I .umlllliilliii INVEI7VTOR By a. L. PEARSON ATTORNEY July 17, 1951 O G. PEARSON 2,550,594.
SEMICONDUCTOR TRANSLATOR AND METHOD OF MAKING IT Filed Sept. 24, 1948 ZSheetS-Sheet 2 FIG. 6 C
-J/ Z 4 as J2 J4 F/G.7 30
lNl ENTOR G. L. PEARSON Patented July 17, 1951 SENIICONDUCTOR TRANSLATOR AND METHOD OF MAKING IT Gerald L. Pearson, Millington, N. J., assignor to Bell Telephone Laboratories, Incorporated, New York, N. Y., a corporation of New York Application September 24, 1948, Serial No. 50,896
This invention relates to devices for translating or controlling electrical signals and to methods of making such devices, and more particularly to semiconductor circuit elements of the type disclosed in the application Serial No. 50,897, filed September 24, 1948, of G. L. Pearson and W. Shockley, now Patent No. 2,502,479, and methods of making such elements.
One general object of this invention is to improve semiconductor type translators suitable for translating or controlling, for example amplifying, generating or modulating, electric signals.
More specific objects of this invention are to simplify the construction of such translators, increase the ruggedness and stability thereof, enable and facilitate the fabrication of semi-conductor circuit elements of small dimensions and expedite the manufacture of circuit elements of semiconductive material and including two or more portions of difi'erent electrical properties.
One feature of this invention involves a translating device comprising a body of insulating material having a thin semiconductor secured thereto, the semiconductor comprising a filament having at least one enlarged end section, means for making connections to opposite ends of the filament, and means for making a rectifying connection to the filament intermediate of the end connections.
Another feature of this invention includes fabricating steps by which a body of semiconductive material is shaped into a filament having one or more enlarged portions integral therewith.
Another feature of this invention pertains to methods of making semiconductive circuit elements of prescribed configurations and having portions of small and preassigned dimensions.
A further feature of this invention relates to methods of readily altering the electrical characteristics of prescribed limited portions of a body of semiconductive material to produce rectifying junctions between contiguous parts of the body.
Other objects and features of this invention will appear more fully and clearly from the following description of illustrative embodiments thereof taken in connection with the appended drawings in which:
Fig. 1 is a diagrammatic view of one illustrative embodiment of the invention;
Fig. 2 is a diagrammatic view of another illustrative embodiment of the invention;
Fig. 3 is a circuit diagram illustrating one way in which the devices of Figs. 1 and 2 may be em-- ployed;
14 Claims. (Cl. 175366) Fig. 4 is a plan view of a semiconductor element, such as is used in the device of Fig 1;
Fig. 5 is a plan view of a semiconductive element, such as is used in the device of Fig. 2;
Fig. 6 is a plan view of apparatus which may be used in making a semiconductor element as shown in Figs. 1 and 4;
Fig. 7 is a sectional view on line l--'! 01 Fig. 6;
Fig. 8 is a plan view of apparatus which may be used in making a semiconductor element as shown in Figs. 2 and 5; and
Fig. 9 is a plan view of a semiconductive element similar to the one shown in Fig. 5.
As an aid to a better understanding of the description of specific embodiments of this invention, a brief discussion of pertinent principles and phenomena, and an explanation of certain terms employed in the description, are in order.
As is known, see for example Crystal Rectifiers by H. C. Torrey and C. A. Whitmer, volume 15 of the M. I. T. Radiation Laboratories series, there are two kinds of semiconduction, referred to as intrinsic and extrinsic. Although some of the semiconductive materials contemplated within the purview of this invention may exhibit both kinds of semiconduction, the kind referred to as extrinsic is of principal import.
Semiconduction may be classified also as of two types, one known as conduction by electrons or by the excess process of conduction and the other known as conduction by holes or the defect process of semiconduction. The term holes, which refers to carriers of positive electric charges as distinguished from carriers, such as electrons, of negative charges, is more fully explained in the application of W. Shockley, Serial No. 35,423 filed-June 26, 1948.
Semiconductors which have been found suitable for use in devices of this invention include germanium and like materials containing minute quantities of significant impurities which comprise one way of determining the conductivity type (either N or P-type) of the semiconductive material. The conductivity type may also be determined by energy relations within the semiconductor. For a more detailed explanation, relerenee is made to the application of J. Bardeen and W. H. Brattain Serial No. 33,466 filed June 17, 1948, now Patent No. 2,524,035.
The terms N-type and P-type are applied to semiconductive materials which tend to pass current easily when the material is respectively negative or positive with respect to a conductive connection thereto and with diiflculty when the 3 reverse is true, and which also have consistent Hall and thermoelectric eiIects.
The expression significant impurities is here used to denote those impurities which aifect the electrical characteristics of the material such as its resistivity, photosensitivity, rectification and the like, as distinguished from other impurities which have no apparent effect on these charac teristics. The term impurities is intended to include intentionally added constituents as well as any which may be included in the basic material as found in nature or as commercially available.
The term barrier or electrical barrier used in the description and discussion of devices in accordance with this invention is applied to a high resistance interfacial condition between contacting semiconductors of respectively opposite conductivity types or between a semiconductor and a metallic conductor whereby current passes with relative ease in one direction and with relative difiiculty in the other.
For a further discussion of devices of this character, reference is made to the applications of W. Shockley and of G. L. Pearson and W. Shockley previously noted.
Semiconductive material suitable for use in devices in accordance with this invention are germanium material prepared in accordance with methods disclosed in the application of J. H. Scaff and H. C. Theuerer Serial No. 638,351 filed December 29, 1945, and silicon material prepared in accordance with United States Patents 2,402,661 and 2,402,662 to R. S. Chi, and the application of J. H. Scafi and H. C. Theuerer Serial No. 793,744 filed December 24, 1947.
The devices to be described are relatively small which has necessitated some exaggeration of proportions in the interest of clarity in the illustrations.
The device shown in Fig. 1 comprises a slab In of glass or other suitable insulating material on which the semiconductor element II is mounted centrally of one face by an adhesive, such as sealing wax or the like. Germanium containing significant impurities, such as used for point contact rectifiers or other suitable semiconductive material having similar characteristics, may be used for the element II. This element has an attenuated or filamentary portion l2 and large area end portions l3 and I4. These end portions are provided with electrodes l5 and I6, respectively, which may be metallic films of solder,
electroplated metal or the like. A typical device may be .005 inch thick throughout with a filamentary section .005 inch wide and .025 inch long, the end portions being .050 inch by .125 inch, the proportions being as shown in Fig. 4.
A pointed metal electrode H of tungsten, Phosphor bronze or like suitable metal makes rectifying contact to the filament l2. This electrode may be like the whisker used in point contact rectifiers and may be similarly mounted if so desired.
The device illustrated in Fig. 2 comprises a slab III of insulating material, such as glass or other suitable material, on which is mounted a semiconductor element HA. The adhesive used for mounting may be sealing wax or the like or, where a high temperature adhesive is required, may be of sodium silicate and finely divided aluminum oxide, or other suitable high temperature adhesive.
This element has an attenuated or filamentary portion l2 and large area end portions l3 and I4 provided with electrodes l5 and 16 as in the device of Fig. 1.
In place of the metallic point electrode ll of Fig. 1, this embodiment employs an extension "A on the side of the filament I2. This extension is of semiconductive material of opposite conductivity type to that of the filament l2. For example, if the filament is of N-type material the extension is of P-type material. The extension A may be provided with an electrode l8 like the electrodes l5 and Hi.
In Fig. 3 there is shown a circuit in which the devices of Figs. 1 and 2 may be used. In order to correlate Figs. 1, 2 and 3 the corresponding electrodes of each have been labeled E, B and C, respectively, to denote them as emitter, base and collector connections in accordance with nomenclature used with respect to devices of this type. The emitter E is connected through the secondary of transformer T and battery 20 to the base I5. The collector C is connected through a load resistor R1. and battery 2| to the base B. With a relatively small bias (0.1 to 1 volt) on E and a relatively large bias of the order of 10 to 100,
volts on C, a signal introduced through the transformer T appears considerably amplified across the load resistor RL. With semiconductor units as shown in Figs. 4 and 5 comprising primarily N-type material, the biases are as shown in Fig. 3, i. e., positive on the emitter and negative on the collector. If P-type material is used, the biases will be reversed and the stub or projection on the filament as in Figs. 2 and 5 will be of N-type material.
To make an element as shown in Fig. 4 for a device such as the one illustrated in Fig. 1, a thin slab of semiconductor, such as high back voltage, rectifier germanium, may be used. An illustrative size is a 0.125 inch square somewhat more than 0.005 inch thick.
One side of the slab is ground smooth and this side may be now etched with a suitable etchant such as the one subsequently indicated, and cemented to a flat plate of glass using sealing wax or another suitable adhesive. The etching of this part of the device may also be done later as will be subsequently indicated. After mounting the slab is then grounded to a uniform thickness, for example of the order of 0.005 inch.
Metallic films which are to serve as electrodes may now be applied or may be applied later. These films may be electroplated rhodium, copper or other suitable metal, or films of solder or other conductive material that may be suitably applied without damage to the semiconductor. If solder is used, a high temperature adhesive between the element and the backing plate must be used or the element removed from the plate for soldering.
If the slab is removed for soldering, after the electrodes are applied, they are covered with a mask such as a polystyrene film and the back of the slab is etched, if this has not been done previously as indicated above.
The etchant may be one used for preparing crystal rectifier surfaces and may comprise 10 cubic centimeters of nitric acid, 5 cubic centimeters of hydrofluoric acid and 200 milligrams of copper nitrate in 10 cubic centimeters of water applied for one to four minutes. The etchant is then washed from the slab and the slab is then dried.
The Semiconductive slab is then remounted on the glass plate for subsequent processing. 11 a high temperature adhesive is used or the electo protect certain parts from the subsequent abrading.
As shown in Figs. 6 and 7, the semiconductive slab 30, mounted on the glass plate 3|, is covered with a mask comprising a metal member 32 which, in a specific case, may be of 0.005 inch nickel wire, and an adhesive coated fabric 33. The material commonly called adhesive tape will serve. The fabric part of the mask is provided with an opening 34 which is of the same width as the required length of the filamentary portion l2 (Figs. 1 and 4) of the semiconductor element, which is .025 inch in the case illustrated. The opening 34 is long enough to extend beyond the semiconductive slab on both sides.
The unmasked semiconductive material is then completely removed. This may be done by abrading with a blast of grit such as 180 mesh silicon carbide at from to pounds air pressure. A blasting for fcur' or five minutes will usually remove all of the material necessary. The abrading maybe carried slightly into the glass plate to assure clean bottom edges on the semiconductor.
The adhesive on the mask may then be made non-adhesive by suitable means and the mask removed. If a rubber base adhesive tape is used, immersion in toluene will serve.
Other masking means may be used. For example, a complete metallic mask having a recess for receiving the slab may be clamped onto the glass plate.
After the element is completely shaped and the mask removed, any blasting grit and other debris may be cleaned oif and the front of the element then etched with a suitable etchant such as the one previously noted.
The element and its backing may be mounted in a suitable holder (not shown) and a point contact as I'l in Fig. 1 may be applied thereto to complete the .unit.
To make a semiconductor element as shown in Figs. 2 and 5, certain variations in the previ- 6 of "A remote from the filament l2 and the other made by a movable contact placed at the Junction of HA and I2.
Enough current is passed through this area to heat it to a dull red color which may be maintained momentarily before the element is cooled. The current may be applied from a controllable 'source and increased until the dull red color -is obtained.
Since this operation takes place with the semiconductor on its backing, a high temperature adhesive must be used as previously indicated in connection with soldering. Due to the relatively' thin section of material involved, the heating is sufliciently controllable to insure a relatively sharp line of demarcation between the twp types of material with the barrier at the edge of the area that appears red during the heating.
The conductivity type conversion may also be made on the slab of semiconductor before it is shaped, by localized heating in a flame. For example, one edge of the slab may be heated in a Bunsen flame until the edge of the dull red area spreading therefrom reaches the location at which the P-N barrier is desired. The slab is then marked in accordance with the location of this barrier and shaped by the method previously described.
Since with this type of heating it may be diificult or inexpedient to confine the conversion to an area of the shape of NA in Fig. 5, the mask of Fig. 8 may be altered so that the abrading will isolate all of the P-type material from the N- type material except at the barrier between HA and I2. For example, if the flame heating has converted substantially half of the slab from N to P-type material, the mask may be made with a T slot in place of a Y slot. With this arrangeously described process are required. Since the configuration of the element is different in the two cases the masking means may be as shown in Fig. 8. The fabric portion 33A of this mask has ment the large area part of HA will be rectangular and the portions l3 and I4 will project beyond the filament l2 on one side only as shown in Fig. 9.
If the N to 1? conversion is by heating, the surfaces of the semiconductors should be etched after this treatment.
If it is desired to have those portions of the device other than the filament thicker than the filament, a semiconductive block having the thickness desired for these portions may be used.
In such a situation, those portions of the block a Y-shaped slot 34A and the metal member 32A is provided with a stub 31. If nickel wire is used as indicated in the previously described process, the stub 31 may be welded to the side of the member 32A.
Since in this device the portion "A of the semiconductorelement must be of opposite conductivity type material to the rest of the body,-
tivation of P-type impurities in the germanium which are inactive in the N-type material.
The portion "A (Figs. 2 and 5) of the semiconductor element may be electrically heated by connecting it in circuit with a source of current. One connection may be made to the edge from which the filament is to be made may be ground or otherwise reduced to filament thickness before masking and abrading.
Although" this invention has been disclosed by means of illustrative embodiments thereof, such embodiments are not intended as limitations on the scope of the invention. 7
What is claimed is:
1.. The method of making a semiconductor translator having an attenuated portion that comprises shaping a block of semiconductive material by thinning at least a central portion thereof, reducing the width of the thinned portion to substantially the same dimensions as its thickness to provide a semiconductive body including a filament and at least one portion of greater cross-section than the filament, and making at least three spaced connections to said body including one to each enlarged portion.
2. The method of making a semiconductive circuit element that comprises producing a plane surface on one face of a slab of semiconductive material, mounting the slab on an insulating backing with this plane face towards the backing, applying masking means to the free surface of the slab, said masking means including a portion of substantially the same width as the slab thickness, and a portion considerably wider than this dimension and abrading away the exposed portions of the slab leaving a semiconductive body having a filamentary portion and a portion of greater cross-section than the filamentary portion.
3. The method of making a semiconductive circuit element including a filamentary portion and a portion having a greater cross-section than the filamentary portion that comprises reducing the thickness of at least a portion of a slab of semiconductive material to that required for the filamentary portion, mounting the slab, protecting the portions of the slab which are to form the element and removing the remainder thereof by abrasive blasting.
4. A translating device comprising a block of insulating material, a thin body of semiconductive material secured to a face of the block, said body comprising a filament having enlarged end sections, means for making a connection respectively to each end section, and means for making a rectifying connection to the filament intermediate of the end sections.
5. A translating device as defined in claim 4 in which the means for making rectifying connection comprises a metallic point making contact to the filament.
6. A translatin device as defined in claim 4 in which the means for making rectifying connection comprises an integral portion of the semiconductive body extending from the filament but of opposite conductivity type.
7. The method of making a translating device comprising a block of insulating material having a thin body of semiconductive material including a filamentary portion and enlarged end portions secured to one face thereof, that comprises smoothing and etching one surface of a slab of semiconductive material, mounting the slab on the block of the insulating material, reducing the slab to the required thickness of the filamentary portion, applying to the slab a mask defining the filamentary and enlarged portions, removing the unmasked semiconductive material by abrasive nection is made by applying a metallic point contact to the surface of the filamentary portion.
9. The method of making a translating device as defined in claim 'I in which the rectifying connection is made by providing an integral portion of semiconductive material like that of the filamentary portion and projecting from a side thereof, and converting said integral portion to material of opposite conductivity type to that of the filament.
10. In a method of making a semiconductor circuit element comprising a body of N-type germanium material having a filamentary portion with a rectifying connection thereto, the steps of making the rectifying connection that comprise providing the filamentary portion with an integral projection of N-type germanium material and converting the projection to P-type material by heating only the projection to a dull red color and cooling it.
11. The methodof making a circuit element that comprises reducing a portion of a semiconductor to filamentary dimensions, providing electrical connections respectively at opposite ends blasting, etching the surface of the remaining of the filamentary portion, providing at least one intermediate connection to the filamentary portion between the end connections, and conditioning each intermediate connection to provide an electrical barrier between it and the filamentary portion.
12. The method of producing a barrier at a preassigned region in a body of semiconductive material initially of one conductivity type which comprises heating a limited portion of said body extending from said region to a temperature sufficient to change the conductivity type of said portion.
13. The method of producing a barrier at a prescribed region in a body of semiconductive material initially of one conductivity type which comprises passing a fiash of current through a limited portion of said body immediately adjacent said region.
14. A translating device comprising a block of insulating material, a thin body of semiconductive material secured to a face of the block, said body comprising a filament having an enlarged end section, connections to each end of said filament including a connection to said enlarged section, and an electrical barrier connection to the filament intermediate said first-mentioned connections.
GERALD L. PEARSON.
No references cited.
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US2629802A (en) * 1951-12-07 1953-02-24 Rca Corp Photocell amplifier construction
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US2623102A (en) * 1948-06-26 1952-12-23 Bell Telephone Labor Inc Circuit element utilizing semiconductive materials
US2648805A (en) * 1949-05-30 1953-08-11 Siemens Ag Controllable electric resistance device
US2675509A (en) * 1949-07-26 1954-04-13 Rca Corp High-frequency response semiconductor device
US2609428A (en) * 1949-08-31 1952-09-02 Rca Corp Base electrodes for semiconductor devices
US2965820A (en) * 1950-02-17 1960-12-20 Rca Corp High gain semi-conductor devices
US2753496A (en) * 1950-02-21 1956-07-03 Teszner Stanislas Complexes of multip electrode semi-conductors
US2697269A (en) * 1950-07-24 1954-12-21 Bell Telephone Labor Inc Method of making semiconductor translating devices
US2950425A (en) * 1950-09-14 1960-08-23 Bell Telephone Labor Inc Semiconductor signal translating devices
US2740940A (en) * 1950-12-08 1956-04-03 Bell Telephone Labor Inc High speed negative resistance
US2859140A (en) * 1951-07-16 1958-11-04 Sylvania Electric Prod Method of introducing impurities into a semi-conductor
US2656496A (en) * 1951-07-31 1953-10-20 Bell Telephone Labor Inc Semiconductor translating device
US2629802A (en) * 1951-12-07 1953-02-24 Rca Corp Photocell amplifier construction
US2771382A (en) * 1951-12-12 1956-11-20 Bell Telephone Labor Inc Method of fabricating semiconductors for signal translating devices
US2736849A (en) * 1951-12-31 1956-02-28 Hazeltine Research Inc Junction-type transistors
US2842723A (en) * 1952-04-15 1958-07-08 Licentia Gmbh Controllable asymmetric electrical conductor systems
US2897105A (en) * 1952-04-19 1959-07-28 Ibm Formation of p-n junctions
US2796562A (en) * 1952-06-02 1957-06-18 Rca Corp Semiconductive device and method of fabricating same
US2695930A (en) * 1952-06-19 1954-11-30 Bell Telephone Labor Inc High-frequency transistor circuit
DE954624C (en) * 1952-06-19 1956-12-20 Western Electric Co High frequency semiconductor amplifier
US2703855A (en) * 1952-07-29 1955-03-08 Licentia Gmbh Unsymmetrical conductor arrangement
DE1031893B (en) * 1952-08-01 1958-06-12 Standard Elektrik Ag Process for the outer shaping of semiconductor arrangements, in particular for rectifier and amplifier purposes with semiconductors made of germanium or silicon
US2818536A (en) * 1952-08-23 1957-12-31 Hughes Aircraft Co Point contact semiconductor devices and methods of making same
US2725315A (en) * 1952-11-14 1955-11-29 Bell Telephone Labor Inc Method of fabricating semiconductive bodies
US2698780A (en) * 1953-02-03 1955-01-04 Bell Telephone Labor Inc Method of treating germanium for translating devices
US2849342A (en) * 1953-03-17 1958-08-26 Rca Corp Semiconductor devices and method of making them
US2849341A (en) * 1953-05-01 1958-08-26 Rca Corp Method for making semi-conductor devices
US2725316A (en) * 1953-05-18 1955-11-29 Bell Telephone Labor Inc Method of preparing pn junctions in semiconductors
US3094634A (en) * 1953-06-30 1963-06-18 Rca Corp Radioactive batteries
US2792539A (en) * 1953-07-07 1957-05-14 Sprague Electric Co Transistor construction
US2836520A (en) * 1953-08-17 1958-05-27 Westinghouse Electric Corp Method of making junction transistors
US2817607A (en) * 1953-08-24 1957-12-24 Rca Corp Method of making semi-conductor bodies
DE1039646B (en) * 1953-10-19 1958-09-25 Siemens Ag Method for producing a semiconductor arrangement with several transitions between zones of different conductivity types
US2854362A (en) * 1953-12-03 1958-09-30 Frank A Brand Formation of junction in semi-conductor
US2829992A (en) * 1954-02-02 1958-04-08 Hughes Aircraft Co Fused junction semiconductor devices and method of making same
US3015590A (en) * 1954-03-05 1962-01-02 Bell Telephone Labor Inc Method of forming semiconductive bodies
US2842467A (en) * 1954-04-28 1958-07-08 Ibm Method of growing semi-conductors
US2904704A (en) * 1954-06-17 1959-09-15 Gen Electric Semiconductor devices
DE1046196B (en) * 1954-11-27 1958-12-11 Siemens Ag Process for the production of a semiconductor for surface rectifiers, transistors or the like with several areas of different conductivity
US2931743A (en) * 1955-05-02 1960-04-05 Philco Corp Method of fusing metal body to another body
US2855334A (en) * 1955-08-17 1958-10-07 Sprague Electric Co Method of preparing semiconducting crystals having symmetrical junctions
US2954486A (en) * 1957-12-03 1960-09-27 Bell Telephone Labor Inc Semiconductor resistance element
US2970896A (en) * 1958-04-25 1961-02-07 Texas Instruments Inc Method for making semiconductor devices
US3021461A (en) * 1958-09-10 1962-02-13 Gen Electric Semiconductor device
US3088435A (en) * 1959-10-20 1963-05-07 Texas Instruments Inc Masking device useful for making transistors
US3088852A (en) * 1959-10-20 1963-05-07 Texas Instruments Inc Masking and fabrication technique
US3209428A (en) * 1961-07-20 1965-10-05 Westinghouse Electric Corp Process for treating semiconductor devices
US3319139A (en) * 1964-08-18 1967-05-09 Hughes Aircraft Co Planar transistor device having a reentrant shaped emitter region with base connection in the reentrant portion
US3513042A (en) * 1965-01-15 1970-05-19 North American Rockwell Method of making a semiconductor device by diffusion
US3496631A (en) * 1967-02-08 1970-02-24 Gordon Kowa Cheng Chen Manufacture of semi-conductor devices
US20070099047A1 (en) * 2005-11-02 2007-05-03 Chun-Chin Tung Regulated fuel cell device

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