US20200396465A1 - Interaction between ibc and affine - Google Patents

Interaction between ibc and affine Download PDF

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US20200396465A1
US20200396465A1 US17/005,521 US202017005521A US2020396465A1 US 20200396465 A1 US20200396465 A1 US 20200396465A1 US 202017005521 A US202017005521 A US 202017005521A US 2020396465 A1 US2020396465 A1 US 2020396465A1
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technique
block
picture
affine
ibc
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Kai Zhang
Li Zhang
Hongbin Liu
Yue Wang
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Beijing ByteDance Network Technology Co Ltd
ByteDance Inc
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Beijing ByteDance Network Technology Co Ltd
ByteDance Inc
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Assigned to BEIJING BYTEDANCE NETWORK TECHNOLOGY CO., LTD. reassignment BEIJING BYTEDANCE NETWORK TECHNOLOGY CO., LTD. ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: LIU, HONGBIN, WANG, YUE
Publication of US20200396465A1 publication Critical patent/US20200396465A1/en
Priority to US17/412,771 priority Critical patent/US11973962B2/en
Priority to US18/528,070 priority patent/US20240121410A1/en
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Definitions

  • This patent document is directed generally to video coding technologies.
  • Motion compensation is a technique in video processing to predict a frame in a video, given the previous and/or future frames by accounting for motion of the camera and/or objects in the video. Motion compensation can be used in the encoding and decoding of video data for video compression.
  • the disclosed technology may be used to provide a method for video encoding using intra-block copy.
  • This method includes determining whether a current block of the current picture is to be encoded using a motion compensation algorithm, and encoding, based on the determining, the current block by selectively applying an intra-block copy to the current block.
  • the disclosed technology may be used to provide another method for video encoding using intra-block copy.
  • This method includes determining whether a current block of the current picture is to be encoded using an intra-block copy, and encoding, based on the determining, the current block by selectively applying a motion compensation algorithm to the current block.
  • the disclosed technology may be used to provide a method for video decoding using intra-block copy.
  • This method includes determining whether a current block of the current picture is to be decoded using a motion compensation algorithm, and decoding, based on the determining, the current block by selectively applying an intra-block copy to the current block.
  • the disclosed technology may be used to provide another method for video decoding using intra-block copy.
  • This method includes determining whether a current block of the current picture is to be decoded using an intra-block copy, and decoding, based on the determining, the current block by selectively applying a motion compensation algorithm to the current block.
  • a method of video processing includes determining that a block being decoded representing a portion of the visual information is coded using a first coding technique; and decoding the coded representation by using a first decoding technique corresponding to the first coding technique and by excluding use of a second decoding technique corresponding to a second coding technique; wherein one of the first and second coding techniques corresponds to an intra-block copy (IBC) technique that uses a second block of a same video picture for coding the block being decoded and the other corresponds to an affine coding technique that uses an affine motion model for coding the block being decoded.
  • IBC intra-block copy
  • a method of visual information processing includes determining that a block being decoded representing a portion of an encoded picture of visual information is coded using an intra-block copy (IBC) technique that uses a second block of the picture for coding the block being decoded and an affine coding technique that uses an affine motion model for coding the block being decoded; and decoding the coded representation by using an IBC decoding technique corresponding to the IBC decoding technique and an affine decoding technique corresponding to the affine coding technique.
  • IBC intra-block copy
  • the above-described method is embodied in the form of processor-executable code and stored in a computer-readable program medium.
  • a device that is configured or operable to perform the above-described method.
  • the device may include a processor that is programmed to implement this method.
  • a video decoder apparatus may implement a method as described herein.
  • FIG. 1 shows an example of an intra-block copy technique.
  • FIG. 2 shows an example of a simplified affine motion model.
  • FIG. 3 shows an example of an affine motion vector field (MVF) per sub-block.
  • FIG. 4 shows an example of motion vector prediction (MVP) for the AF_INTER affine motion mode.
  • FIGS. 5A and 5B show example candidates for the AF_MERGE affine motion mode.
  • FIG. 6 shows a flowchart of an example method for video encoding using intra-block copy in accordance with the disclosed technology.
  • FIG. 7 shows a flowchart of another example method for video encoding using intra-block copy in accordance with the disclosed technology.
  • FIG. 8 shows a flowchart of an example method for video decoding using intra-block copy in accordance with the disclosed technology.
  • FIG. 9 shows a flowchart of another example method for video decoding using intra-block copy in accordance with the disclosed technology.
  • FIG. 10 is a block diagram illustrating an example of the architecture for a computer system or other control device that can be utilized to implement various portions of the presently disclosed technology.
  • FIG. 11 shows a block diagram of an example embodiment of a mobile device that can be utilized to implement various portions of the presently disclosed technology.
  • FIG. 12 shows a flowchart for an example method of visual information processing.
  • FIG. 13 shows a flowchart for an example method of visual information processing.
  • a picture of the visual information can be a frame in a video, a portion of an image, an object in a three-dimensional scene, a portion of the three-dimensional scene, etc.
  • a block can be portion of the picture of the visual information such as a coding unit (CU), a largest coding unit (LCU), a sample, a prediction unit (PU) etc. as described in this application.
  • a sub-block of the visual information can be a PU such as a sub-CU, a sample, etc.
  • the PU can be a pixel, a voxel, or a smallest quantum of resolution of the visual information.
  • Video codecs typically include an electronic circuit or software that compresses or decompresses digital video, and are continually being improved to provide higher coding efficiency.
  • a video codec converts uncompressed video to a compressed format or vice versa. There are complex relationships between the video quality, the amount of data used to represent the video (determined by the bit rate), the complexity of the encoding and decoding algorithms, sensitivity to data losses and errors, ease of editing, random access, and end-to-end delay (latency).
  • the compressed format usually conforms to a standard video compression specification, e.g., the High Efficiency Video Coding (HEVC) standard (also known as H.265 or MPEG-H Part 2), the Versatile Video Coding standard to be finalized, or other current and/or future video coding standards.
  • HEVC High Efficiency Video Coding
  • MPEG-H Part 2 the Versatile Video Coding standard to be finalized, or other current and/or future video coding standards.
  • Embodiments of the disclosed technology may be applied to existing video coding standards (e.g., HEVC, H.265) and future standards to improve runtime performance.
  • Section headings are used in the present document to improve readability of the description and do not in any way limit the discussion or the embodiments (and/or implementations) to the respective sections only.
  • reference picture set RPS
  • buffer description RPS
  • An RPS is a set of picture indicators that is signaled in each slice header and consists of one set of short-term pictures and one set of long-term pictures.
  • the pictures in the DPB are marked as specified by the RPS.
  • the pictures in the DPB that are indicated in the short-term picture part of the RPS are kept as short-term pictures.
  • the short-term or long-term pictures in the DPB that are indicated in the long-term picture part in the RPS are converted to or kept as long-term pictures.
  • pictures in the DPB for which there is no indicator in the RPS are marked as unused for reference.
  • An RPS consists of a set of picture order count (POC) values that are used for identifying the pictures in the DPB. Besides signaling POC information, the RPS also signals one flag for each picture. Each flag indicates whether the corresponding picture is available or unavailable for reference for the current picture. Note that even though a reference picture is signaled as unavailable for the current picture, it is still kept in the DPB and may be made available for reference later on and used for decoding future pictures.
  • POC picture order count
  • the list RefPicSetStCurrBefore consists of short-term pictures that are available for reference for the current picture and have POC values that are lower than the POC value of the current picture.
  • RefPicSetStCurrAfter consist of available short-term pictures with a POC value that is higher than the POC value of the current picture.
  • RefPicSetStFoll is a list that contains all short-term pictures that are made unavailable for the current picture but may be used as reference pictures for decoding subsequent pictures in decoding order.
  • the lists RefPicSetLtCurr and RefPicSetLtFoll contain long-term pictures that are available and unavailable for reference for the current picture, respectively.
  • num_short_term_ref_pic_sets specifies the number of st_ref_pic_set( ) syntax structures included in the SPS.
  • the value of num_short_term_ref_pic_sets shall be in the range of 0 to 64, inclusive.
  • a decoder may allocate memory for a total number of num_short_term_ref_pic_sets+1 st_ref_pic_set( ) syntax structures since there may be a st_ref_pic_set( ) syntax structure directly signaled in the slice headers of a current picture.
  • a st_ref_pic_set( ) syntax structure directly signaled in the slice headers of a current picture has an index equal to num_short_term_ref_pic_sets.
  • long_term_ref_pies_present_flag 0 specifies that no long-term reference picture is used for inter prediction of any coded picture in the CVS.
  • long_term_ref_pics_present_flag 1 specifies that long-term reference pictures may be used for inter prediction of one or more coded pictures in the CVS.
  • num_long_term_ref_pics_sps specifies the number of candidate long-term reference pictures that are specified in the SPS.
  • the value of num_long_term_ref_pics_sps shall be in the range of 0 to 32, inclusive.
  • lt_ref_pic_poc_lsb_sps[i] specifies the picture order count modulo MaxPicOrderCntLsb of the i-th candidate long-term reference picture specified in the SPS.
  • the number of bits used to represent lt_ref_pic_poc_lsb_sps[i] is equal to log_2_max_pic_order_cnt_lsb_minus4+4.
  • used_by_curr_pic_lt_sps_flag[i] 0 specifies that the i-th candidate long-term reference picture specified in the SPS is not used for reference by a picture that includes in its long-term reference picture set (RPS) the i-th candidate long-term reference picture specified in the SPS.
  • RPS long-term reference picture set
  • short_term_ref_pic_set_sps_flag 1 specifies that the short-term RPS of the current picture is derived based on one of the st_ref_pic_set( ) syntax structures in the active SPS that is identified by the syntax element short_term_ref_pic_set_idx in the slice header.
  • short_term_ref_pic_set_sps_flag 0 specifies that the short-term RPS of the current picture is derived based on the st_ref_pic_set( ) syntax structure that is directly included in the slice headers of the current picture.
  • num_short_term_ref_pic_sets is equal to 0
  • the value of short_term_ref_pic_set_sps_flag shall be equal to 0.
  • short_term_ref_pic_set_idx specifies the index, into the list of the st_ref_pic_set( ) syntax structures included in the active SPS, of the st_ref_pic_set( ) syntax structure that is used for derivation of the short-term RPS of the current picture.
  • the syntax element short_term_ref_pic_set_idx is represented by Ceil(Log 2(num_short_term_ref_pic_sets)) bits. When not present, the value of short_term_ref_pic_set_idx is inferred to be equal to 0.
  • the value of short_term_ref_pic_set_idx shall be in the range of 0 to num_short_term_ref_pic_sets ⁇ 1, inclusive.
  • variable CurrRpsldx is derived as follows:
  • num_long_term_sps specifies the number of entries in the long-term RPS of the current picture that are derived based on the candidate long-term reference pictures specified in the active SPS.
  • the value of num_long_term_sps shall be in the range of 0 to num_long_term_ref_pics_sps, inclusive. When not present, the value of num_long_term_sps is inferred to be equal to 0.
  • num_long_term_pics specifies the number of entries in the long-term RPS of the current picture that are directly signaled in the slice header. When not present, the value of num_long_term_pics is inferred to be equal to 0.
  • nuh_layer_id when nuh_layer_id is equal to 0, the value of num_long_term_pics shall be less than or equal to sps_max_dec_pic_buffering_minus1[Temporand]-NumNegativePics[CurrRpsIdx]-NumPositivePics[CurrRpsIdx]-num_long_term_sps-TwoVersionsOfCurrDecPicFlag.
  • lt_idx_sps[i] specifies an index, into the list of candidate long-term reference pictures specified in the active SPS, of the i-th entry in the long-term RPS of the current picture.
  • the number of bits used to represent lt_idx_sps[i] is equal to Ceil(Log 2(num_long_term_ref_pics_sps)).
  • the value of lt_idx_sps[i] is inferred to be equal to 0.
  • the value of lt_idx_sps[i] shall be in the range of 0 to num_long_term_ref_pics_sps ⁇ 1, inclusive.
  • poc_lsb_lt[i] specifies the value of the picture order count modulo MaxPicOrderCntLsb of the i-th entry in the long-term RPS of the current picture.
  • the length of the poc_lsb_lt[i] syntax element is log_2_max_pic_order_cnt_lsb_minus4+4 bits.
  • used_by_curr_pic_lt_flag[i] 0 specifies that the i-th entry in the long-term RPS of the current picture is not used for reference by the current picture.
  • the variables PocLsbLt[i] and UsedByCurrPicLt[i] are derived as follows:
  • delta_poc_msb_present_flag[i] 1 specifies that delta_poc_msb_cycle_lt[i] is present.
  • delta_poc_msb_present_flag[i] 0 specifies that delta_poc_msb_cycle_lt[i] is not present.
  • prevTid0Pic be the previous picture in decoding order that has TemporalId equal to 0 and is not a RASL, RADL or SLNR picture.
  • setOfPrevPocVals be a set consisting of the following:
  • delta_poc_msb_present_flag[i] shall be equal to 1.
  • delta_poc_msb_cycle_lt[i] is used to determine the value of the most significant bits of the picture order count value of the i-th entry in the long-term RPS of the current picture.
  • delta_poc_msb_cycle_lt[i] is not present, it is inferred to be equal to 0.
  • variable DeltaPocMsbCycleLt[i] is derived as follows:
  • the motion vector prediction is only allowed if the target reference picture type and the predicted reference picture type is the same. In other words, when the types are different, motion vector prediction is disallowed.
  • AMVP Advanced Motion Vector Prediction
  • the motion vector mvLXA and the availability flag availableFlagLXA are derived in the following ordered steps:
  • the sample location (xNbA0, yNbA0) is set equal to (xPb ⁇ 1, yPb+nPbH) and the sample location (xNbA1, yNbA1) is set equal to (xNbA0, yNbA0 ⁇ 1).
  • the motion vector mvLXB and the availability flag availableFlagLXB are derived in the following ordered steps:
  • the sample locations (xNbB0, yNbB0), (xNbB1, yNbB1) and (xNbB2, yNbB2) are set equal to (xPb+nPbW, yPb ⁇ 1), (xPb+nPbW ⁇ 1, yPb ⁇ 1) and (xPb ⁇ 1, yPb ⁇ 1), respectively.
  • availableFlagLXB is set equal to 0 and the following applies for (xNbBk, yNbBk) from (xNbB0, yNbB0) to (xNbB2, yNbB2) or until availableFlagLXB is equal to 1:
  • Temporal Motion Vector Prediction is another example of motion vector prediction that includes an existing implementation.
  • the relevant portion of the existing TMVP implementation is detailed below.
  • variable availableFlagLXCol is set equal to 1
  • refPicListCol[refIdxCol] is set to be the picture with reference index refIdxCol in the reference picture list listCol of the slice containing prediction block colPb in the collocated picture specified by ColPic.
  • Intra-block copy has been extends the concept of motion compensation from inter-frame coding to intra-frame coding.
  • the current block is predicted by a reference block in the same picture when IBC is applied.
  • the samples in the reference block must have been already reconstructed before the current block is coded or decoded.
  • IBC is not so efficient for most camera-captured sequences, it shows significant coding gains for screen content. The reason is that there are lots of reduplicated patterns, such as icons and text characters in a screen content picture. IBC can remove the redundancy between these reduplicated patterns effectively.
  • an inter-coded coding unit can apply IBC if it chooses the current picture as its reference picture.
  • the MV is renamed as block vector (BV) in this case, and a BV always has an integer-pixel precision.
  • BV block vector
  • the current picture is marked as a “long-term” reference picture in the Decoded Picture Buffer (DPB).
  • DPB Decoded Picture Buffer
  • pps_curr_pic_ref_enabled_flag 1 specifies that a picture referring to the PPS may be included in a reference picture list of a slice of the picture itself.
  • pps_curr_pic_ref_enabled_flag 0 specifies that a picture referring to the PPS is never included in a reference picture list of a slice of the picture itself.
  • the value of pps_curr_pic_ref_enabled_flag is inferred to be equal to 0.
  • variable TwoVersionsOfCurrDecPicFlag is derived as follows:
  • Decoding process The current decoded picture after the invocation of the in-loop filter process is stored in the DPB in an empty picture storage buffer, the DPB fullness is incremented by one and this picture is marked as “used for short-term reference”.
  • JEM Joint Exploration Model
  • JEM Joint Exploration Model
  • affine prediction alternative temporal motion vector prediction
  • STMVP spatial-temporal motion vector prediction
  • BIO bi-directional optical flow
  • FRUC Frame-Rate Up Conversion
  • LAMVR Locally Adaptive Motion Vector Resolution
  • OBMC Overlapped Block Motion Compensation
  • LIC Local Illumination Compensation
  • DMVR Decoder-side Motion Vector Refinement
  • FIG. 2 shows an example of an affine motion field of a block 200 described by two control point motion vectors V 0 and Vi.
  • the motion vector field (MVF) of the block 200 can be described by the following equation:
  • (v 0x , v 0y ) is motion vector of the top-left corner control point
  • (v 1x , v 1y ) is motion vector of the top-right corner control point.
  • sub-block based affine transform prediction can be applied.
  • the sub-block size M ⁇ N is derived as follows:
  • MvPre is the motion vector fraction accuracy (e.g., 1/16 in JEM).
  • (v 2x , v 2y ) is motion vector of the bottom-left control point, calculated according to Eq. (1).
  • M and N can be adjusted downward if necessary to make it a divisor of w and h, respectively.
  • FIG. 3 shows an example of affine MVF per sub-block for a block 300 .
  • the motion vector of the center sample of each sub-block can be calculated according to Eq. (1), and rounded to the motion vector fraction accuracy (e.g., 1/16 in JEM).
  • the motion compensation interpolation filters can be applied to generate the prediction of each sub-block with derived motion vector.
  • the high accuracy motion vector of each sub-block is rounded and saved as the same accuracy as the normal motion vector.
  • AF_INTER mode In the JEM, there are two affine motion modes: AF_INTER mode and AF_MERGE mode. For CUs with both width and height larger than 8, AF_INTER mode can be applied. An affine flag in CU level is signaled in the bitstream to indicate whether AF_INTER mode is used.
  • AF_INTER mode a candidate list with motion vector pair ⁇ (v 0 , v 1 )
  • FIG. 4 shows an example of motion vector prediction (MVP) for a block 400 in the AF_INTER mode.
  • v 0 is selected from the motion vectors of the sub-block A, B, or C.
  • the motion vectors from the neighboring blocks can be scaled according to the reference list.
  • the motion vectors can also be scaled according to the relationship among the Picture Order Count (POC) of the reference for the neighboring block, the POC of the reference for the current CU, and the POC of the current CU.
  • POC Picture Order Count
  • the approach to select v 1 from the neighboring sub-block D and E is similar. If the number of candidate list is smaller than 2, the list is padded by the motion vector pair composed by duplicating each of the AMVP candidates.
  • the candidates can be firstly sorted according to the neighboring motion vectors (e.g., based on the similarity of the two motion vectors in a pair candidate). In some implementations, the first two candidates are kept.
  • a Rate Distortion (RD) cost check is used to determine which motion vector pair candidate is selected as the control point motion vector prediction (CPMVP) of the current CU.
  • An index indicating the position of the CPMVP in the candidate list can be signaled in the bitstream. After the CPMVP of the current affine CU is determined, affine motion estimation is applied and the control point motion vector (CPMV) is found. Then the difference of the CPMV and the CPMVP is signaled in the bitstream.
  • CPMV control point motion vector
  • FIG. 5A shows an example of the selection order of candidate blocks for a current CU 500 .
  • the selection order can be from left ( 501 ), above ( 502 ), above right ( 503 ), left bottom ( 504 ) to above left ( 505 ) of the current CU 500 .
  • FIG. 5B shows another example of candidate blocks for a current CU 500 in the AF_MERGE mode. If the neighboring left bottom block 501 is coded in affine mode, as shown in FIG.
  • the motion vectors v 2 , v 3 and v 4 of the top left corner, above right corner, and left bottom corner of the CU containing the sub-block 501 are derived.
  • the motion vector v 0 of the top left corner on the current CU 500 is calculated based on v2, v3 and v4.
  • the motion vector v1 of the above right of the current CU can be calculated accordingly.
  • the MVF of the current CU can be generated.
  • an affine flag can be signaled in the bitstream when there is at least one neighboring block is coded in affine mode.
  • FIG. 6 shows a flowchart of an exemplary method for video encoding using intra-block copy.
  • the method 600 includes, at step 610 , determining whether a current block of the current picture is to be encoded using a motion compensation algorithm.
  • the method 600 includes, in step 620 , encoding, based on the determining, the current block by selectively applying an intra-block copy to the current block. More generally, whether or not to apply the intra-block copy to the current block is based on whether the current block is to be encoded using a specific motion compensation algorithm.
  • FIG. 7 shows a flowchart of another exemplary method video encoding using intra-block copy.
  • the method 700 includes, at step 710 , determining whether a current block of the current picture is to be encoded using an intra-block copy.
  • the method 700 includes, in step 720 , encoding, based on the determining, the current block by selectively applying a motion compensation algorithm to the current block. More generally, whether or not to encode the current block using the motion compensation algorithm is based on whether the current block is to be encoded using the intra-block copy.
  • FIG. 8 shows a flowchart of an exemplary method for video decoding using intra-block copy.
  • the method 800 includes, at step 810 , determining whether a current block of the current picture is to be decoded using a motion compensation algorithm.
  • the method 800 includes, in step 820 , decoding, based on the determining, the current block by selectively applying an intra-block copy to the current block. More generally, whether or not to apply the intra-block copy to the current block is based on whether the current block is to be decoded using a specific motion compensation algorithm.
  • FIG. 9 shows a flowchart of another exemplary method video decoding using intra-block copy.
  • the method 900 includes, at step 910 , determining whether a current block of the current picture is to be decoded using an intra-block copy.
  • the method 900 includes, in step 920 , decoding, based on the determining, the current block by selectively applying a motion compensation algorithm to the current block. More generally, whether or not to decode the current block using the motion compensation algorithm is based on whether the current block is to be decoded using the intra-block copy.
  • the methods 600 , 700 , 800 and 900 may further include are further the step of determining whether the motion compensation algorithm is compatible with the intra-block copy.
  • the compatibility of the intra-block copy and the motion compensation algorithms are elucidated in the following examples described for different specific motion compensation algorithms.
  • Example 1 After determining that the current picture must be stored in the buffer for a duration corresponding to the duration of a long-term reference picture, the current picture is not marked as a “long-term” reference picture in a buffer (e.g., a decoded picture buffer). Instead, it is marked as a new type of reference picture different from “short-term” or “long-term”. For example, it may be marked as a “current” reference picture, a “self” reference picture, an “instant” reference picture, an “intra block copy” reference picture, and so on.
  • a buffer e.g., a decoded picture buffer
  • prediction e.g., motion information prediction
  • prediction between pictures with the new picture type and short-term pictures
  • prediction e.g., motion information prediction
  • Example 2 It is proposed that affine prediction cannot be applied for IBC coded blocks. In this case, when a block is coded with IBC mode, the signaling of indications of affine prediction is skipped.
  • affine_flag may be signaled.
  • affine_flag only controls whether the affine prediction is used for the non-IBC inter-prediction, i.e., inter-prediction which is not from the current picture.
  • whether and how to apply affine prediction for IBC coded blocks can be transmitted from the encoder to the decoder at sequence level, picture level, slice level, Coding Tree Unit (CTU) a. k. a. Largest Coding Unit (LCU) level, region level, CU level, or PU level.
  • the information can be signaled in Sequence Parameter Set (SPS), Picture Parameter Set (PPS), Slice Header (SH), CTU (a. k. a. LCU), region, CU or PU.
  • Example 3 It is proposed that IBC cannot be applied for a block with affine prediction. In this case, when a block is coded with affine mode, the signaling of indications of IBC is skipped.
  • any reference picture of the current block cannot be the current picture.
  • at least one reference picture of the current block is not identical to the current picture.
  • whether and how to apply IBC for a block with affine prediction can be transmitted from the encoder to the decoder at sequence level, picture level, slice level, Coding Tree Unit (CTU) (e.g., Largest Coding Unit (LCU) level, region level, CU level, or PU level).
  • CTU Coding Tree Unit
  • the information can be signaled in Sequence Parameter Set (SPS), Picture Parameter Set (PPS), Slice Header (SH), CTU (a. k. a. LCU), region, CU or PU.
  • affine prediction can be applied for IBC coded blocks.
  • the indications of affine and IBC may be both signaled.
  • affine prediction is applied for a IBC coded block, the following may further apply:
  • the MV Prediction (MVP) for control points can only be derived from previously decoded MVs with the current picture as the reference picture.
  • MV scaling is disabled for MVP derivation.
  • MVP for control points of a block with an affine prediction but not IBC-coded can only be derived from previously decoded MVs with reference pictures not identical to the current picture.
  • a MV inside the block derived from MVs at the control points are truncated or rounded to the integer-pixel precision.
  • OBMC is not applied.
  • the y component of the MV at control points (e.g., ⁇ right arrow over (v 1 ) ⁇ ) is not signaled and is always considered as zero.
  • a block can be a contiguous or a noncontiguous collection of pixels, voxels, sub-pixels, and/or sub-voxels.
  • a block can be rectilinear, such as a 4 ⁇ 4 square, 6 ⁇ 4 rectangle, or curvilinear, such as an ellipse.
  • a portion of the visual information can be a subset of visual information.
  • a coded representation as used in this application, can be a bitstream representing the visual information that has been encoded using one of the techniques described in this application.
  • An indicator as used in this application, can be a flag or a field in the coded representation or can be multiple separate flags or fields.
  • a decoding technique as used in this application can be applied by a decoder and can be implemented in hardware or software.
  • the decoding technique can undo in reverse sequence everything a coder does.
  • an appropriate decoding technique is applied to an encoded representation, a visual information can be obtained as a result.
  • An initial block in the plurality of blocks is a block occurring before the first block in the coded representation.
  • a predetermined component can be an x-axis, a y-axis or a z-axis component of a motion vector.
  • a visual information decoding method comprising: determining ( 1302 ) that a block being decoded representing a portion of the visual information is coded using a first coding technique; and decoding ( 1304 ) the coded representation by using a first decoding technique corresponding to the first coding technique and by excluding use of a second decoding technique corresponding to a second coding technique; wherein one of the first and second coding techniques corresponds to an intra-block copy (IBC) technique that uses a second block of a same video picture for coding the block being decoded and the other corresponds to an affine coding technique that uses an affine motion model for coding the block being decoded.
  • IBC intra-block copy
  • a visual information processing method comprising: determining ( 1202 ) that a block being decoded representing a portion of an encoded picture of visual information is coded using an intra-block copy (IBC) technique that uses a second block of the picture for coding the block being decoded and an affine coding technique that uses an affine motion model for coding the block being decoded; and decoding ( 1204 ) the coded representation by using an IBC decoding technique corresponding to the IBC decoding technique and an affine decoding technique corresponding to the affine coding technique.
  • IBC intra-block copy
  • the IBC decoding technique comprising: obtaining a plurality of blocks representing the encoded picture and an indicator of use of the IBC technique; decoding a plurality of initial blocks in the encoded picture; and after decoding the plurality of initial blocks, decoding a first block in the remaining of the plurality of blocks based on the decoded initial blocks.
  • a method of video processing comprising: determining that an indicator associated with an encoded picture comprises an alternate type of reference picture indicator signaling an encoding technique applied to the encoded picture is an IBC technique, wherein the alternate type of reference picture indicator is different from a long-term reference picture indicator and a short-term reference picture indicator, wherein a picture comprising the long-term reference picture indicator is stored in a memory for a first duration, and wherein a picture comprising the short-term reference picture indicator is stored in the memory for a second duration that is shorter than the first duration.
  • the method of example 5 comprising: obtaining a first indicator comprising the long-term reference picture indicator or the long-term reference picture indicator associated with a first picture; obtaining a second indicator comprising the alternate type of reference picture indicator associated with a second picture; avoiding decoding the second picture based on the first picture; avoiding decoding the first picture based on the second picture.
  • the method of example 6, comprising: obtaining a first indicator comprising the long-term reference picture indicator or the long-term reference picture indicator associated with a first picture; obtaining a second indicator comprising the alternate type of reference picture indicator associated with a second picture; skipping a scaling process of motion vectors associated with the first picture when decoding the second picture; and skipping the scaling process of motion vectors associated with the second picture when decoding the first picture.
  • the method of example 8 comprising: obtaining a plurality of reference pictures used to decode a block of the encoded picture comprising a plurality of blocks; when at least one reference picture in the plurality of reference pictures comprises the encoded picture, decoding the block without applying the affine decoding technique.
  • the method of example 8 comprising: obtaining a plurality of reference pictures used to decode a block of the encoded picture comprising a plurality of blocks; in case that a block is associated with multiple sets of motion information, wherein the multiple sets of motion information comprise more than two sets of motion information, and each reference picture in the plurality of reference pictures is the encoded picture, decoding the block without applying the affine decoding technique.
  • the method of example 8 comprising: obtaining a plurality of reference pictures used to decode a block of the encoded picture comprising a plurality of blocks, the plurality of reference pictures comprising the encoded picture and another picture in the visual information; obtaining a first indicator signaling that the affine coding technique is applied to the block; decoding the block using the affine decoding technique and the another picture in the visual information.
  • the method of example 13, comprising: obtaining one or more reference pictures used to decode a block of the encoded picture comprising a plurality of blocks and the indicator associated with the encoded picture; in case that the indicator associated with the encoded picture signals that the affine coding technique is applied to the encoded picture, assuming that the one or more reference pictures do not contain the encoded picture.
  • the method of example 13, comprising: obtaining one or more reference pictures used to decode a block of the encoded picture comprising a plurality of blocks and the indicator associated with the encoded picture; in case that the indicator associated with the encoded picture signals that the affine coding technique is applied to the encoded picture, assuming that at least one reference picture in the one or more reference pictures is different from the encoded picture.
  • the method of example 16 comprising: obtaining an initial block in a plurality of blocks representing the encoded picture; decoding an initial motion vector of an initial control point associated with the initial block; obtaining a first block in the plurality of blocks representing the encoded picture, and a first indicator signaling that the IBC technique is applied to the first block; disabling motion vector scaling; and upon disabling motion vector scaling, creating a motion vector prediction (MVP) of a first control point associated with the first block based on the initial motion vector of the initial control point associated with initial block.
  • MVP motion vector prediction
  • examples 16-17 comprising: obtaining a plurality of blocks representing the encoded picture; obtaining a motion vector of a control point associated with a block in the plurality of blocks, wherein the motion vector is signaled in an integer precision; making a motion vector prediction based on the motion vector; and rounding the motion vector prediction to an integer-pixel precision.
  • examples 16-17 comprising: obtaining a block in a plurality of blocks representing the encoded picture; deriving a motion vector at a control point associated with the block from a neighboring motion vector at a neighboring control point; and rounding the motion vector to an integer-pixel precision.
  • a method for encoding a visual information comprising: encoding the visual information into a plurality of encoded pictures and a plurality of indicators signaling one or more encoding techniques applied, the plurality of indicators comprising an intra-block copy (IBC) technique indicator and an affine coding technique indicator, wherein a first block of a first picture associated with the visual information is encoded using the IBC technique and a second block of a second picture associated with the visual information is encoded using the affine coding technique, wherein the IBC technique uses a different block of the first picture to encode the first block of the first picture and the affine coding technique uses a third picture associated with the visual information to encode the second block.
  • IBC intra-block copy
  • the IBC technique comprising: dividing the first picture into a plurality of blocks; encoding an initial block in the plurality of blocks; and upon encoding the initial block, encoding a first block in the plurality of blocks based on the initial block.
  • the method comprising: encoding an indicator in a plurality of indicators associated with an encoded picture in a plurality of encoded pictures, the indicator comprising an alternate type of reference picture indicator signaling an encoding technique applied to the encoded picture is an IBC technique, wherein the alternate type of reference picture indicator is different from a long-term reference picture indicator and a short-term reference picture indicator, wherein a picture comprising the long-term reference picture indicator is stored in a memory for a first duration, and wherein a picture comprising the short-term reference picture indicator is stored in the memory for a second duration that is shorter than the first duration.
  • the method of example 25, comprising: obtaining a first indicator comprising the long-term reference picture indicator or the long-term reference picture indicator associated with a first picture; obtaining a second indicator comprising the alternate type of reference picture indicator associated with a second picture; avoiding encoding the second picture based on the first picture; and avoiding encoding the first picture based on the second picture.
  • the method of example 28 comprising: encoding a plurality of reference pictures used to encode the block of the first picture; in case that at least one reference picture in the plurality of reference pictures comprises the first picture, skipping encoding an indicator of use of the affine coding technique.
  • the method of example 28 comprising: encoding a plurality of reference pictures used to encode a block of the first picture; when a block is associated with multiple sets of motion information, wherein the multiple sets of motion information comprise more than two sets of motion information, and each reference picture in the plurality of reference pictures is the first picture, skipping encoding an indicator signaling the affine coding technique.
  • the method of example 28 comprising: encoding a plurality of reference pictures used to encode a block of the first picture, the plurality of reference pictures comprising the first picture and another picture in the visual information; encoding a first indicator signaling that the affine coding technique is applied to the block; and applying the affine coding technique to the block of the first picture and the another picture in the visual information.
  • example 33 comprising: encoding one or more reference pictures used to encode a block of the second picture, wherein the one or more reference pictures excludes the second picture; and encoding an indicator in the plurality of indicators to signal that the affine coding technique is used to encode the second picture.
  • example 33 comprising: encoding one or more reference pictures used to encode a block of the second picture, wherein at least one reference picture in the one or more reference pictures is different from the second picture; and encoding an indicator in the plurality of indicators to signal that the affine coding technique is used to encode the second picture.
  • example 36 comprising: dividing the first picture into a plurality of blocks; encoding a motion vector of a control point associated with an initial block in the plurality of blocks; and encoding a motion vector of a control point associated with a first block in the plurality of blocks based on the motion vector of the control point associated with the initial block; and disabling motion vector scaling.
  • examples 36-39 comprising: dividing the first picture into a plurality of blocks; encoding a block in the plurality of blocks using the affine coding technique; encoding a motion vector of a control point associated with the block in the plurality of blocks using an integer precision; encoding a motion vector of a point inside the block based on the motion vector of the control point associated with the block by rounding the motion vector of the point inside the block to the integer-pixel precision.
  • Examples 1-42 comprising: transmitting an indicator between an encoder and a decoder, the indicator signaling whether and how to apply the affine coding technique for IBC technique coded blocks at a sequence level, a picture level, a slice level, a Coding Tree Unit (CTU), a region level, a CU level, or a PU level.
  • CTU Coding Tree Unit
  • SPS Sequence Parameter Set
  • PPS Picture Parameter Set
  • SH Slice Header
  • tile group header a CTU, a region, a CU or a PU.
  • a video processing apparatus comprising a processor configured to implement a method recited in any one or more of examples 1 to 44.
  • the video processing apparatus may be a video encoder.
  • the video processing apparatus may be a video decoder.
  • the video processing apparatus may be a video transcoder.
  • a computer readable medium having processor-executable code stored thereon, the code, upon execution, causing a processor to implement a method recited in any one or more of examples 1 to 44.
  • FIG. 10 is a block diagram illustrating an example of the architecture for a computer system or other control device 1000 that can be utilized to implement various portions of the presently disclosed technology, including (but not limited to) methods 600 , 700 , 800 , 900 , 1200 and 1300 .
  • the computer system 1000 includes one or more processors 1005 and memory 1010 connected via an interconnect 1025 .
  • the interconnect 1025 may represent any one or more separate physical buses, point to point connections, or both, connected by appropriate bridges, adapters, or controllers.
  • the interconnect 1025 may include, for example, a system bus, a Peripheral Component Interconnect (PCI) bus, a HyperTransport or industry standard architecture (ISA) bus, a small computer system interface (SCSI) bus, a universal serial bus (USB), IIC (I2C) bus, or an Institute of Electrical and Electronics Engineers (IEEE) standard 674 bus, sometimes referred to as “Firewire.”
  • PCI Peripheral Component Interconnect
  • ISA HyperTransport or industry standard architecture
  • SCSI small computer system interface
  • USB universal serial bus
  • I2C IIC
  • IEEE Institute of Electrical and Electronics Engineers
  • the processor(s) 1005 may include central processing units (CPUs) to control the overall operation of, for example, the host computer. In certain embodiments, the processor(s) 1005 accomplish this by executing software or firmware stored in memory 1010 .
  • the processor(s) 1005 may be, or may include, one or more programmable general-purpose or special-purpose microprocessors, digital signal processors (DSPs), programmable controllers, application specific integrated circuits (ASICs), programmable logic devices (PLDs), or the like, or a combination of such devices.
  • the memory 1010 can be or include the main memory of the computer system.
  • the memory 1010 represents any suitable form of random access memory (RAM), read-only memory (ROM), flash memory, or the like, or a combination of such devices.
  • the memory 1010 may contain, among other things, a set of machine instructions which, when executed by processor 1005 , causes the processor 1005 to perform operations to implement embodiments of the presently disclosed technology.
  • the network adapter 1015 provides the computer system 1000 with the ability to communicate with remote devices, such as the storage clients, and/or other storage servers, and may be, for example, an Ethernet adapter or Fiber Channel adapter.
  • FIG. 11 shows a block diagram of an example embodiment of a mobile device 1100 that can be utilized to implement various portions of the presently disclosed technology, including (but not limited to) methods 600 , 700 , 800 and 900 .
  • the mobile device 1100 can be a laptop, a smartphone, a tablet, a camcorder, or other types of devices that are capable of processing videos.
  • the mobile device 1100 includes a processor or controller 1101 to process data, and memory 1102 in communication with the processor 1101 to store and/or buffer data.
  • the processor 1101 can include a central processing unit (CPU) or a microcontroller unit (MCU).
  • the processor 1101 can include a field-programmable gate-array (FPGA).
  • FPGA field-programmable gate-array
  • the mobile device 1100 includes or is in communication with a graphics processing unit (GPU), video processing unit (VPU) and/or wireless communications unit for various visual and/or communications data processing functions of the smartphone device.
  • the memory 1102 can include and store processor-executable code, which when executed by the processor 1101 , configures the mobile device 1100 to perform various operations, e.g., such as receiving information, commands, and/or data, processing information and data, and transmitting or providing processed information/data to another device, such as an actuator or external display.
  • the memory 1102 can store information and data, such as instructions, software, values, images, and other data processed or referenced by the processor 1101 .
  • various types of Random Access Memory (RAM) devices, Read Only Memory (ROM) devices, Flash Memory devices, and other suitable storage media can be used to implement storage functions of the memory 1102 .
  • the mobile device 1100 includes an input/output (I/O) unit 1103 to interface the processor 1101 and/or memory 1102 to other modules, units or devices.
  • I/O input/output
  • the I/O unit 1103 can interface the processor 1101 and memory 1102 with to utilize various types of wireless interfaces compatible with typical data communication standards, e.g., such as between the one or more computers in the cloud and the user device.
  • the mobile device 1100 can interface with other devices using a wired connection via the I/O unit 1103 .
  • the mobile device 1100 can also interface with other external interfaces, such as data storage, and/or visual or audio display devices 1104 , to retrieve and transfer data and information that can be processed by the processor, stored in the memory, or exhibited on an output unit of a display device 1104 or an external device.
  • the display device 1104 can display a video frame that includes a block (a CU, PU or TU) that applies the intra-block copy based on whether the block is encoded using a motion compensation algorithm, and in accordance with the disclosed technology.
  • a video decoder apparatus may implement a method of video decoding in which the intra-block copy as described herein is used for video decoding.
  • the method may be similar to the above-described methods 600 , 700 , 800 , 900 , 1200 and 1300 .
  • a decoder-side method of video decoding may use the intra-block copy for improving video quality by determining whether a current block of the current picture is to be decoded using a motion compensation algorithm, and decoding, based on the determining, the current block by selectively applying an intra-block copy to the current block.
  • a decoder-side method of video decoding may use the intra-block copy for improving video quality by determining whether a current block of the current picture is to be decoded using an intra-block copy, and decoding, based on the determining, the current block by selectively applying a motion compensation algorithm to the current block.
  • the video decoding methods may be implemented using a decoding apparatus that is implemented on a hardware platform as described with respect to FIG. 10 and FIG. 11 .
  • VTM-1.0 is a reference software for the video coding standard named Versatile Video Coding (VVC).
  • VVC Versatile Video Coding
  • Y”, “U”, “V” represent colors in the YUV color encoding system which encodes a color image or video taking human perception into account.
  • the EncT and DecT represent a ratio of the encoding and decoding time using the IBC compared to the encoding and decoding time without the IBC, respectively.
  • the various classes represent a grouping of standard video sequences used in testing performance of various video coding techniques.
  • the negative percentages under the “Y”, “U”, “V” columns represent bit-rate savings when IBC is added to VTM-1.0.
  • the percentages under the EncT and DecT columns that are over 100% show how much the encoding/decoding with IBC is slower than encoding/decoding without IBC. For example, a percentage of 150% means that the encoding/decoding with IBC is 50% slower than the encoding/decoding without the IBC.
  • the percentage below 100% shows how much the encoding/decoding with IBC is faster than encoding/decoding without the IBC.
  • Two classes, class F and class SCC, highlighted in green in the table above, show that bit-rate savings exceed 3%.
  • Implementations of the subject matter and the functional operations described in this patent document can be implemented in various systems, digital electronic circuitry, or in computer software, firmware, or hardware, including the structures disclosed in this specification and their structural equivalents, or in combinations of one or more of them. Implementations of the subject matter described in this specification can be implemented as one or more computer program products, i.e., one or more modules of computer program instructions encoded on a tangible and non-transitory computer readable medium for execution by, or to control the operation of, data processing apparatus.
  • the computer readable medium can be a machine-readable storage device, a machine-readable storage substrate, a memory device, a composition of matter effecting a machine-readable propagated signal, or a combination of one or more of them.
  • data processing unit or “data processing apparatus” encompasses all apparatus, devices, and machines for processing data, including by way of example a programmable processor, a computer, or multiple processors or computers.
  • the apparatus can include, in addition to hardware, code that creates an execution environment for the computer program in question, e.g., code that constitutes processor firmware, a protocol stack, a database management system, an operating system, or a combination of one or more of them.
  • a computer program (also known as a program, software, software application, script, or code) can be written in any form of programming language, including compiled or interpreted languages, and it can be deployed in any form, including as a stand-alone program or as a module, component, subroutine, or other unit suitable for use in a computing environment.
  • a computer program does not necessarily correspond to a file in a file system.
  • a program can be stored in a portion of a file that holds other programs or data (e.g., one or more scripts stored in a markup language document), in a single file dedicated to the program in question, or in multiple coordinated files (e.g., files that store one or more modules, sub programs, or portions of code).
  • a computer program can be deployed to be executed on one computer or on multiple computers that are located at one site or distributed across multiple sites and interconnected by a communication network.
  • the processes and logic flows described in this specification can be performed by one or more programmable processors executing one or more computer programs to perform functions by operating on input data and generating output.
  • the processes and logic flows can also be performed by, and apparatus can also be implemented as, special purpose logic circuitry, e.g., an FPGA (field programmable gate array) or an ASIC (application specific integrated circuit).
  • processors suitable for the execution of a computer program include, by way of example, both general and special purpose microprocessors, and any one or more processors of any kind of digital computer.
  • a processor will receive instructions and data from a read only memory or a random access memory or both.
  • the essential elements of a computer are a processor for performing instructions and one or more memory devices for storing instructions and data.
  • a computer will also include, or be operatively coupled to receive data from or transfer data to, or both, one or more mass storage devices for storing data, e.g., magnetic, magneto optical disks, or optical disks.
  • mass storage devices for storing data, e.g., magnetic, magneto optical disks, or optical disks.
  • a computer need not have such devices.
  • Computer readable media suitable for storing computer program instructions and data include all forms of nonvolatile memory, media and memory devices, including by way of example semiconductor memory devices, e.g., EPROM, EEPROM, and flash memory devices.
  • semiconductor memory devices e.g., EPROM, EEPROM, and flash memory devices.
  • the processor and the memory can be supplemented by, or incorporated in, special purpose logic circuitry.

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