US20210006780A1 - Interaction between pairwise average merging candidates and ibc - Google Patents
Interaction between pairwise average merging candidates and ibc Download PDFInfo
- Publication number
- US20210006780A1 US20210006780A1 US17/031,451 US202017031451A US2021006780A1 US 20210006780 A1 US20210006780 A1 US 20210006780A1 US 202017031451 A US202017031451 A US 202017031451A US 2021006780 A1 US2021006780 A1 US 2021006780A1
- Authority
- US
- United States
- Prior art keywords
- motion
- motion vector
- block
- picture
- current
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Abandoned
Links
Images
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
- H04N19/10—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding
- H04N19/169—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding characterised by the coding unit, i.e. the structural portion or semantic portion of the video signal being the object or the subject of the adaptive coding
- H04N19/17—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding characterised by the coding unit, i.e. the structural portion or semantic portion of the video signal being the object or the subject of the adaptive coding the unit being an image region, e.g. an object
- H04N19/176—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding characterised by the coding unit, i.e. the structural portion or semantic portion of the video signal being the object or the subject of the adaptive coding the unit being an image region, e.g. an object the region being a block, e.g. a macroblock
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
- H04N19/10—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding
- H04N19/102—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding characterised by the element, parameter or selection affected or controlled by the adaptive coding
- H04N19/103—Selection of coding mode or of prediction mode
- H04N19/107—Selection of coding mode or of prediction mode between spatial and temporal predictive coding, e.g. picture refresh
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
- H04N19/10—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding
- H04N19/102—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding characterised by the element, parameter or selection affected or controlled by the adaptive coding
- H04N19/103—Selection of coding mode or of prediction mode
- H04N19/105—Selection of the reference unit for prediction within a chosen coding or prediction mode, e.g. adaptive choice of position and number of pixels used for prediction
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
- H04N19/10—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding
- H04N19/102—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding characterised by the element, parameter or selection affected or controlled by the adaptive coding
- H04N19/117—Filters, e.g. for pre-processing or post-processing
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
- H04N19/10—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding
- H04N19/102—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding characterised by the element, parameter or selection affected or controlled by the adaptive coding
- H04N19/119—Adaptive subdivision aspects, e.g. subdivision of a picture into rectangular or non-rectangular coding blocks
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
- H04N19/10—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding
- H04N19/102—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding characterised by the element, parameter or selection affected or controlled by the adaptive coding
- H04N19/132—Sampling, masking or truncation of coding units, e.g. adaptive resampling, frame skipping, frame interpolation or high-frequency transform coefficient masking
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
- H04N19/10—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding
- H04N19/134—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding characterised by the element, parameter or criterion affecting or controlling the adaptive coding
- H04N19/136—Incoming video signal characteristics or properties
- H04N19/137—Motion inside a coding unit, e.g. average field, frame or block difference
- H04N19/139—Analysis of motion vectors, e.g. their magnitude, direction, variance or reliability
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
- H04N19/10—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding
- H04N19/134—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding characterised by the element, parameter or criterion affecting or controlling the adaptive coding
- H04N19/157—Assigned coding mode, i.e. the coding mode being predefined or preselected to be further used for selection of another element or parameter
- H04N19/159—Prediction type, e.g. intra-frame, inter-frame or bidirectional frame prediction
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
- H04N19/10—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding
- H04N19/134—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding characterised by the element, parameter or criterion affecting or controlling the adaptive coding
- H04N19/167—Position within a video image, e.g. region of interest [ROI]
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
- H04N19/42—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals characterised by implementation details or hardware specially adapted for video compression or decompression, e.g. dedicated software implementation
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
- H04N19/44—Decoders specially adapted therefor, e.g. video decoders which are asymmetric with respect to the encoder
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
- H04N19/46—Embedding additional information in the video signal during the compression process
- H04N19/463—Embedding additional information in the video signal during the compression process by compressing encoding parameters before transmission
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
- H04N19/50—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using predictive coding
- H04N19/503—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using predictive coding involving temporal prediction
- H04N19/51—Motion estimation or motion compensation
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
- H04N19/50—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using predictive coding
- H04N19/503—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using predictive coding involving temporal prediction
- H04N19/51—Motion estimation or motion compensation
- H04N19/513—Processing of motion vectors
- H04N19/517—Processing of motion vectors by encoding
- H04N19/52—Processing of motion vectors by encoding by predictive encoding
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
- H04N19/50—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using predictive coding
- H04N19/503—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using predictive coding involving temporal prediction
- H04N19/51—Motion estimation or motion compensation
- H04N19/523—Motion estimation or motion compensation with sub-pixel accuracy
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
- H04N19/50—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using predictive coding
- H04N19/503—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using predictive coding involving temporal prediction
- H04N19/51—Motion estimation or motion compensation
- H04N19/583—Motion compensation with overlapping blocks
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
- H04N19/50—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using predictive coding
- H04N19/593—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using predictive coding involving spatial prediction techniques
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
- H04N19/70—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals characterised by syntax aspects related to video coding, e.g. related to compression standards
Definitions
- This patent document is directed generally to video coding technologies.
- Motion compensation is a technique in video processing to predict a frame in a video, given the previous and/or future frames by accounting for motion of the camera and/or objects in the video. Motion compensation can be used in the encoding and decoding of video data for video compression.
- the disclosed technology may be used to provide a method for video encoding using intra-block copy.
- This method includes determining whether a current block of the current picture is to be encoded using a motion compensation algorithm, and encoding, based on the determining, the current block by selectively applying an intra-block copy to the current block.
- the disclosed technology may be used to provide another method for video encoding using intra-block copy.
- This method includes determining whether a current block of the current picture is to be encoded using an intra-block copy, and encoding, based on the determining, the current block by selectively applying a motion compensation algorithm to the current block.
- the disclosed technology may be used to provide a method for video decoding using intra-block copy.
- This method includes determining whether a current block of the current picture is to be decoded using a motion compensation algorithm, and decoding, based on the determining, the current block by selectively applying an intra-block copy to the current block.
- the disclosed technology may be used to provide another method for video decoding using intra-block copy.
- This method includes determining whether a current block of the current picture is to be decoded using an intra-block copy, and decoding, based on the determining, the current block by selectively applying a motion compensation algorithm to the current block.
- a visual information decoding method includes determining that a block being decoded representing a portion of an encoded picture of visual information is coded using a motion candidate associated with a motion vector, wherein the motion vector is derived as a weighted average of a plurality of motion vectors, wherein all of the plurality of motion vectors refer to a same picture type, and wherein a first picture type represents a current picture and a second picture type represents a reference pictures different from the current picture; and decoding the block being decoded by using the motion candidate.
- a visual information encoding method includes obtaining a block to encode representing a portion of a picture of visual information; encoding the block to encode using a motion candidate associated with a motion vector, wherein the motion vector is derived as a weighted average of a plurality of motion vectors, wherein all of the plurality of motion vectors refer to same picture type, and wherein a first picture type represents a current picture and a second picture type represents a reference picture different from the current picture
- the above-described method is embodied in the form of processor-executable code and stored in a computer-readable program medium.
- a device that is configured or operable to perform the above-described method.
- the device may include a processor that is programmed to implement this method.
- a video decoder apparatus may implement a method as described herein.
- FIG. 1 shows an example of an intra-block copy technique.
- FIG. 2 shows an example of a coding unit (CU) with sub-blocks and neighboring blocks used by the spatial-temporal motion vector prediction (STMVP) algorithm.
- CU coding unit
- STMVP spatial-temporal motion vector prediction
- FIG. 3 shows a flowchart of an example method for video encoding using intra-block copy in accordance with the disclosed technology.
- FIG. 4 shows a flowchart of another example method for video encoding using intra-block copy in accordance with the disclosed technology.
- FIG. 5 shows a flowchart of an example method for video decoding using intra-block copy in accordance with the disclosed technology.
- FIG. 6 shows a flowchart of another example method for video decoding using intra-block copy in accordance with the disclosed technology.
- FIG. 7 is a block diagram illustrating an example of the architecture for a computer system or other control device that can be utilized to implement various portions of the presently disclosed technology.
- FIG. 8 shows a block diagram of an example embodiment of a mobile device that can be utilized to implement various portions of the presently disclosed technology.
- FIG. 9 shows a flowchart of an example method for video decoding in accordance with the disclosed technology.
- FIG. 10 shows a flowchart of an example method for video encoding in accordance with the disclosed technology.
- a picture of the visual information can be a frame in a video, a portion of an image, an object in a three-dimensional scene, a portion of the three-dimensional scene, etc.
- a block can be portion of the picture of the visual information such as a coding unit (CU), a largest coding unit (LCU), a sample, a prediction unit (PU) etc. as described in this application.
- a sub-block of the visual information can be a PU such as a sub-CU, a sample, etc.
- the PU can be a pixel, a voxel, or a smallest quantum of resolution of the visual information.
- Video codecs typically include an electronic circuit or software that compresses or decompresses digital video, and are continually being improved to provide higher coding efficiency.
- a video codec converts uncompressed video to a compressed format or vice versa. There are complex relationships between the video quality, the amount of data used to represent the video (determined by the bit rate), the complexity of the encoding and decoding algorithms, sensitivity to data losses and errors, ease of editing, random access, and end-to-end delay (latency).
- the compressed format usually conforms to a standard video compression specification, e.g., the High Efficiency Video Coding (HEVC) standard (also known as H.265 or MPEG-H Part 2), the Versatile Video Coding standard to be finalized, or other current and/or future video coding standards.
- HEVC High Efficiency Video Coding
- MPEG-H Part 2 the Versatile Video Coding standard to be finalized, or other current and/or future video coding standards.
- Embodiments of the disclosed technology may be applied to existing video coding standards (e.g., HEVC, H.265) and future standards to improve runtime performance.
- Section headings are used in the present document to improve readability of the description and do not in any way limit the discussion or the embodiments (and/or implementations) to the respective sections only.
- reference picture set RPS
- buffer description RPS
- An RPS is a set of picture indicators that is signaled in each slice header and consists of one set of short-term pictures and one set of long-term pictures.
- the pictures in the DPB are marked as specified by the RPS.
- the pictures in the DPB that are indicated in the short-term picture part of the RPS are kept as short-term pictures.
- the short-term or long-term pictures in the DPB that are indicated in the long-term picture part in the RPS are converted to or kept as long-term pictures.
- pictures in the DPB for which there is no indicator in the RPS are marked as unused for reference.
- An RPS consists of a set of picture order count (POC) values that are used for identifying the pictures in the DPB. Besides signaling POC information, the RPS also signals one flag for each picture. Each flag indicates whether the corresponding picture is available or unavailable for reference for the current picture. Note that even though a reference picture is signaled as unavailable for the current picture, it is still kept in the DPB and may be made available for reference later on and used for decoding future pictures.
- POC picture order count
- the list RefPicSetStCurrBefore consists of short-term pictures that are available for reference for the current picture and have POC values that are lower than the POC value of the current picture.
- RefPicSetStCurrAfter consist of available short-term pictures with a POC value that is higher than the POC value of the current picture.
- RefPicSetStFoll is a list that contains all short-term pictures that are made unavailable for the current picture but may be used as reference pictures for decoding subsequent pictures in decoding order.
- the lists RefPicSetLtCurr and RefPicSetLtFoll contain long-term pictures that are available and unavailable for reference for the current picture, respectively.
- num_short_term_ref_pic_sets specifies the number of st_ref_ pic_set( ) syntax structures included in the SPS.
- the value of num_short_term_ref_pic_sets shall be in the range of 0 to 64, inclusive.
- a decoder may allocate memory for a total number of num_short_term_ref_pic_sets+1 st_ref_pic_set( ) syntax structures since there may be a st_ref_pic_set( ) syntax structure directly signaled in the slice headers of a current picture.
- a st_ref_pic_set( ) syntax structure directly signaled in the slice headers of a current picture has an index equal to num_short_term_ref_pic_sets.
- long_term_ref_pics_present_flag 0 specifies that no long-term reference picture is used for inter prediction of any coded picture in the CVS.
- long_term_ref_pics_present_flag 1 specifies that long-term reference pictures may be used for inter prediction of one or more coded pictures in the CVS.
- num_long_term_ref_pics_sps specifies the number of candidate long-term reference pictures that are specified in the SPS.
- the value of num_long_term_ref_pics_sps shall be in the range of 0 to 32, inclusive.
- lt_ref_pic_poc_lsb_sps[i] specifies the picture order count modulo MaxPicOrderCntLsb of the i-th candidate long-term reference picture specified in the SPS.
- the number of bits used to represent lt_ref_pic_poc_lsb_sps[i] is equal to log2_max_pic_order_cnt_lsb_minus4+4.
- used_by_curr_pic_lt_sps_flag[i] 0 specifies that the i-th candidate long-term reference picture specified in the SPS is not used for reference by a picture that includes in its long-term reference picture set (RPS) the i-th candidate long-term reference picture specified in the SPS.
- RPS long-term reference picture set
- short_term_ref_pic_set_sps_flag 1 specifies that the short-term RPS of the current picture is derived based on one of the st_ref_pic_set( ) syntax structures in the active SPS that is identified by the syntax element short_term_ref_pic_set_idx in the slice header.
- short_term_ref_pic_set_sps_flag 0 specifies that the short-term RPS of the current picture is derived based on the st_ref_pic_set( ) syntax structure that is directly included in the slice headers of the current picture.
- num_short_term_ref_pic_sets is equal to 0
- the value of short_term_ref_pic_set_sps_flag shall be equal to 0.
- short_term_ref_pic_set_idx specifies the index, into the list of the st_ref_pic_set( ) syntax structures included in the active SPS, of the st_ref_pic_set( ) syntax structure that is used for derivation of the short-term RPS of the current picture.
- the syntax element short_term_ref_pic_set_idx is represented by Ceil(Log2(num_short_term_ref_pic_sets)) bits. When not present, the value of short_term_ref_pic_set_idx is inferred to be equal to 0.
- the value of short_term_ref_pic_set_idx shall be in the range of 0 to num_short_term_ref_pic_sets ⁇ 1, inclusive.
- variable CurrRpsIdx is derived as follows:
- num_long_term_sps specifies the number of entries in the long-term RPS of the current picture that are derived based on the candidate long-term reference pictures specified in the active SPS.
- the value of num_long_term_sps shall be in the range of 0 to num_long_term_ref_pics_sps, inclusive. When not present, the value of num_long_term_sps is inferred to be equal to 0.
- num_long_term_pics specifies the number of entries in the long-term RPS of the current picture that are directly signaled in the slice header. When not present, the value of num_long_term_pics is inferred to be equal to 0.
- nuh_layer_id when nuh_layer_id is equal to 0, the value of num_long_term_pics shall be less than or equal to sps_max_dec_pic_buffering_minus1[TemporalId] ⁇ NumNegativePics[CurrRpsIdx] ⁇ NumPositivePics[CurrRpsIdx] ⁇ num_long_term_sps ⁇ TwoVersionsOfCurrDecPicFlag.
- lt_idx_sps[i] specifies an index, into the list of candidate long-term reference pictures specified in the active SPS, of the i-th entry in the long-term RPS of the current picture.
- the number of bits used to represent lt_idx_sps[i] is equal to Ceil(Log2(num_long_term_ref_pics_sps)).
- the value of lt_idx_sps[i] is inferred to be equal to 0.
- the value of lt_idx_sps[i] shall be in the range of 0 to num_long_term_ref_pics_sps ⁇ 1, inclusive.
- poc_lsb_lt[i] specifies the value of the picture order count modulo MaxPicOrderCntLsb of the i-th entry in the long-term RPS of the current picture.
- the length of the poc_lsb_lt[i] syntax element is log2_max_pic_order_cnt_lsb_minus4+4 bits.
- used_by_curr_pic_lt_flag[i] 0 specifies that the i-th entry in the long-term RPS of the current picture is not used for reference by the current picture.
- the variables PocLsbLt[i] and UsedByCurrPicLt[i] are derived as follows:
- delta_poc_msb_present_flag[i] 1 specifies that delta_poc_msb_cycle_lt[i] is present.
- delta_poc_msb_present_flag[i] 0 specifies that delta_poc_msb_cycle_lt[i] is not present.
- prevTid0Pic be the previous picture in decoding order that has TemporalId equal to 0 and is not a RASL, RADL or SLNR picture.
- setOfPrevPocVals be a set consisting of the following:
- delta_poc_msb_present_flag[i] shall be equal to 1.
- delta_poc_msb_cycle_lt[i] is used to determine the value of the most significant bits of the picture order count value of the i-th entry in the long-term RPS of the current picture.
- delta_poc_msb_cycle_lt[i] is not present, it is inferred to be equal to 0.
- variable DeltaPocMsbCycleLt[i] is derived as follows:
- the motion vector prediction is only allowed if the target reference picture type and the predicted reference picture type is the same. In other words, when the types are different, motion vector prediction is disallowed.
- AMVP Advanced Motion Vector Prediction
- the motion vector mvLXA and the availability flag availableFlagLXA are derived in the following ordered steps:
- the motion vector mvLXB and the availability flag availableFlagLXB are derived in the following ordered steps:
- Temporal Motion Vector Prediction is another example of motion vector prediction that includes an existing implementation.
- the relevant portion of the existing TMVP implementation is detailed below.
- Intra-block copy has been extends the concept of motion compensation from inter-frame coding to intra-frame coding.
- the current block is predicted by a reference block in the same picture when IBC is applied.
- the samples in the reference block must have been already reconstructed before the current block is coded or decoded.
- IBC is not so efficient for most camera-captured sequences, it shows significant coding gains for screen content. The reason is that there are lots of reduplicated patterns, such as icons and text characters in a screen content picture. IBC can remove the redundancy between these reduplicated patterns effectively.
- an inter-coded coding unit can apply IBC if it chooses the current picture as its reference picture.
- the MV is renamed as block vector (BV) in this case, and a BV always has an integer-pixel precision.
- BV block vector
- the current picture is marked as a “long-term” reference picture in the Decoded Picture Buffer (DPB).
- DPB Decoded Picture Buffer
- pps_curr_pic_ref_enabled_flag 1 specifies that a picture referring to the PPS may be included in a reference picture list of a slice of the picture itself.
- pps_curr_pic_ref_enabled_flag 0 specifies that a picture referring to the PPS is never included in a reference picture list of a slice of the picture itself.
- the value of pps_curr_pic_ref_enabled_flag is inferred to be equal to 0.
- variable TwoVersionsOfCurrDecPicFlag is derived as follows:
- Decoding process The current decoded picture after the invocation of the in-loop filter process is stored in the DPB in an empty picture storage buffer, the DPB fullness is incremented by one and this picture is marked as “used for short-term reference”.
- JEM Joint Exploration Model
- JEM Joint Exploration Model
- affine prediction alternative temporal motion vector prediction
- STMVP spatial-temporal motion vector prediction
- BIO bi-directional optical flow
- FRUC Frame-Rate Up Conversion
- LAMVR Locally Adaptive Motion Vector Resolution
- OBMC Overlapped Block Motion Compensation
- LIC Local Illumination Compensation
- DMVR Decoder-side Motion Vector Refinement
- FIG. 2 shows an example of one CU with four sub-blocks and neighboring blocks.
- an 8 ⁇ 8 CU 700 that includes four 4 ⁇ 4 sub-CUs A ( 701 ), B (702), C ( 703 ), and D ( 704 ).
- the neighboring 4 ⁇ 4 blocks in the current frame are labelled as a ( 711 ), b ( 712 ), c ( 713 ), and d ( 714 ).
- the motion derivation for sub-CU A starts by identifying its two spatial neighbors.
- the first neighbor is the N ⁇ N block above sub-CU A 701 (block c 713 ). If this block c ( 713 ) is not available or is intra coded the other NxN blocks above sub-CU A ( 701 ) are checked (from left to right, starting at block c 713 ).
- the second neighbor is a block to the left of the sub-CU A 701 (block b 712 ). If block b ( 712 ) is not available or is intra coded other blocks to the left of sub-CU A 701 are checked (from top to bottom, staring at block b 712 ).
- TMVP temporal motion vector predictor
- FIG. 3 shows a flowchart of an exemplary method for video encoding using intra-block copy.
- the method 1600 includes, at step 1610 , determining whether a current block of the current picture is to be encoded using a motion compensation algorithm.
- the method 1600 includes, in step 1620 , encoding, based on the determining, the current block by selectively applying an intra-block copy to the current block. More generally, whether or not to apply the intra-block copy to the current block is based on whether the current block is to be encoded using a specific motion compensation algorithm.
- FIG. 4 shows a flowchart of another exemplary method video encoding using intra-block copy.
- the method 1700 includes, at step 1710 , determining whether a current block of the current picture is to be encoded using an intra-block copy.
- the method 1700 includes, in step 1720 , encoding, based on the determining, the current block by selectively applying a motion compensation algorithm to the current block. More generally, whether or not to encode the current block using the motion compensation algorithm is based on whether the current block is to be encoded using the intra-block copy.
- FIG. 5 shows a flowchart of an exemplary method for video decoding using intra-block copy.
- the method 1800 includes, at step 1810 , determining whether a current block of the current picture is to be decoded using a motion compensation algorithm.
- the method 1800 includes, in step 1820 , decoding, based on the determining, the current block by selectively applying an intra-block copy to the current block. More generally, whether or not to apply the intra-block copy to the current block is based on whether the current block is to be decoded using a specific motion compensation algorithm.
- FIG. 6 shows a flowchart of another exemplary method video decoding using intra-block copy.
- the method 1900 includes, at step 1910 , determining whether a current block of the current picture is to be decoded using an intra-block copy.
- the method 1900 includes, in step 1920 , decoding, based on the determining, the current block by selectively applying a motion compensation algorithm to the current block. More generally, whether or not to decode the current block using the motion compensation algorithm is based on whether the current block is to be decoded using the intra-block copy.
- the methods 900 , 1000 , 1600 , 1700 , 1800 , 1900 , described in the context of FIGS. 3-6, 9 and 10 may further include are further the step of determining whether the motion compensation algorithm is compatible with the intra-block copy.
- the compatibility of the intra-block copy and the motion compensation algorithms are elucidated in the following examples described for different specific motion compensation algorithms.
- a block can be a contiguous or a noncontiguous collection of pixels, voxels, sub-pixels, and/or sub-voxels.
- a block can be rectilinear, such as a 4 ⁇ 4 square, 6 ⁇ 4 rectangle, or curvilinear, such as an ellipse.
- a portion of the visual information can be a subset of visual information.
- a coded representation as used in this application, can be a bitstream representing the visual information that has been encoded using one of the techniques described in this application.
- An indicator as used in this application, can be a flag or a field in the coded representation or can be multiple separate flags or fields.
- a decoding technique as used in this application can be applied by a decoder and can be implemented in hardware or software.
- the decoding technique can undo in reverse sequence everything a coder does.
- an appropriate decoding technique is applied to an encoded representation, a visual information can be obtained as a result.
- a visual information decoding method (e.g., method 900 in FIG. 9 ), comprising: determining ( 902 ) that a block being decoded representing a portion of an encoded picture of visual information is coded using a motion candidate associated with a motion vector, wherein the motion vector is derived as a weighted average of a plurality of motion vectors, wherein all of the plurality of motion vectors refer to a same picture type, and wherein a first picture type represents a current picture and a second picture type represents a reference pictures different from the current picture; and decoding ( 904 ) the block being decoded by using the motion candidate.
- the motion vector comprises a motion vector of a sub-block in a block coded with the spatial-temporal motion vector prediction (STMVP) encoding technique.
- STMVP spatial-temporal motion vector prediction
- a visual information encoding method comprising: obtaining ( 1002 ) a block to encode representing a portion of a picture of visual information; encoding ( 1004 ) the block to encode using a motion candidate associated with a motion vector, wherein the motion vector is derived as a weighted average of a plurality of motion vectors, wherein all of the plurality of motion vectors refer to same picture type, and wherein a first picture type represents a current picture and a second picture type represents a reference picture different from the current picture.
- the motion vector comprising a motion vector of a sub-block in a block coded with an STMVP encoding technique.
- said deriving the motion vector comprising: calculating a weighted average of the one or more motion vectors, the weighting based on proximity to the sub-block; and assigning the weighted average to the motion vector.
- a video processing apparatus comprising a processor configured to implement a method recited in any one or more of clauses 1 to 23.
- a computer readable medium having processor-executable code stored thereon, the code, upon execution, causing a processor to implement a method recited in any one or more of clauses 1 to 23.
- Example 1 It is proposed that the averaged (or other kinds of derivation function, like weighted average) motion vector can only be derived from MVs all referring to the current picture or all referring to a reference picture not identical to the current picture.
- VVC Versatile Video Coding
- a pairwise merge candidate is adopted.
- the MV of a pairwise merge candidate is derive as the average of the MV of a first merge candidate and the MV of a second merge candidate.
- FIG. 7 is a block diagram illustrating an example of the architecture for a computer system or other control device 2000 that can be utilized to implement various portions of the presently disclosed technology, including (but not limited to) methods 1600 , 1700 , 1800 and 1900 .
- the computer system 2000 includes one or more processors 2005 and memory 2010 connected via an interconnect 2025 .
- the interconnect 2025 may represent any one or more separate physical buses, point to point connections, or both, connected by appropriate bridges, adapters, or controllers.
- the interconnect 2025 may include, for example, a system bus, a Peripheral Component Interconnect (PCI) bus, a HyperTransport or industry standard architecture (ISA) bus, a small computer system interface (SCSI) bus, a universal serial bus (USB), IIC (I 2 C) bus, or an Institute of Electrical and Electronics Engineers (IEEE) standard 674 bus, sometimes referred to as “Firewire.”
- PCI Peripheral Component Interconnect
- ISA HyperTransport or industry standard architecture
- SCSI small computer system interface
- USB universal serial bus
- IIC I 2 C
- IEEE Institute of Electrical and Electronics Engineers
- the processor(s) 2005 may include central processing units (CPUs) to control the overall operation of, for example, the host computer. In certain embodiments, the processor(s) 2005 accomplish this by executing software or firmware stored in memory 2010 .
- the processor(s) 2005 may be, or may include, one or more programmable general-purpose or special-purpose microprocessors, digital signal processors (DSPs), programmable controllers, application specific integrated circuits (ASICs), programmable logic devices (PLDs), or the like, or a combination of such devices.
- the memory 2010 can be or include the main memory of the computer system.
- the memory 2010 represents any suitable form of random access memory (RAM), read-only memory (ROM), flash memory, or the like, or a combination of such devices.
- the memory 2010 may contain, among other things, a set of machine instructions which, when executed by processor 2005 , causes the processor 2005 to perform operations to implement embodiments of the presently disclosed technology.
- the network adapter 2015 provides the computer system 2000 with the ability to communicate with remote devices, such as the storage clients, and/or other storage servers, and may be, for example, an Ethernet adapter or Fiber Channel adapter.
- FIG. 8 shows a block diagram of an example embodiment of a mobile device 2100 that can be utilized to implement various portions of the presently disclosed technology, including (but not limited to) methods 1600 , 1700 , 1800 and 1900 .
- the mobile device 2100 can be a laptop, a smartphone, a tablet, a camcorder, or other types of devices that are capable of processing videos.
- the mobile device 2100 includes a processor or controller 2101 to process data, and memory 2102 in communication with the processor 2101 to store and/or buffer data.
- the processor 2101 can include a central processing unit (CPU) or a microcontroller unit (MCU).
- the processor 2101 can include a field-programmable gate-array (FPGA).
- FPGA field-programmable gate-array
- the mobile device 2100 includes or is in communication with a graphics processing unit (GPU), video processing unit (VPU) and/or wireless communications unit for various visual and/or communications data processing functions of the smartphone device.
- the memory 2102 can include and store processor-executable code, which when executed by the processor 2101 , configures the mobile device 2100 to perform various operations, e.g., such as receiving information, commands, and/or data, processing information and data, and transmitting or providing processed information/data to another device, such as an actuator or external display.
- the memory 2102 can store information and data, such as instructions, software, values, images, and other data processed or referenced by the processor 2101 .
- various types of Random Access Memory (RAM) devices, Read Only Memory (ROM) devices, Flash Memory devices, and other suitable storage media can be used to implement storage functions of the memory 2102 .
- the mobile device 2100 includes an input/output (I/O) unit 2103 to interface the processor 2101 and/or memory 2102 to other modules, units or devices.
- I/O input/output
- the I/O unit 2103 can interface the processor 2101 and memory 2102 with to utilize various types of wireless interfaces compatible with typical data communication standards, e.g., such as between the one or more computers in the cloud and the user device.
- the mobile device 2100 can interface with other devices using a wired connection via the I/O unit 2103 .
- the mobile device 2100 can also interface with other external interfaces, such as data storage, and/or visual or audio display devices 2104 , to retrieve and transfer data and information that can be processed by the processor, stored in the memory, or exhibited on an output unit of a display device 2104 or an external device.
- the display device 2104 can display a video frame that includes a block (a CU, PU or TU) that applies the intra-block copy based on whether the block is encoded using a motion compensation algorithm, and in accordance with the disclosed technology.
- a video decoder apparatus may implement a method of video decoding in which the intra-block copy as described herein is used for video decoding.
- the method may be similar to the above-described methods 900 , 1000 , 1600 , 1700 , 1800 and 1900 .
- a decoder-side method of video decoding may use the intra-block copy for improving video quality by determining whether a current block of the current picture is to be decoded using a motion compensation algorithm, and decoding, based on the determining, the current block by selectively applying an intra-block copy to the current block.
- a decoder-side method of video decoding may use the intra-block copy for improving video quality by determining whether a current block of the current picture is to be decoded using an intra-block copy, and decoding, based on the determining, the current block by selectively applying a motion compensation algorithm to the current block.
- the video decoding methods may be implemented using a decoding apparatus that is implemented on a hardware platform as described with respect to FIG. 7 and FIG. 8 .
- VTM-1.0 is a reference software for the video coding standard named Versatile Video Coding (VVC).
- VVC Versatile Video Coding
- Y”, “U”, “V” represent colors in the YUV color encoding system which encodes a color image or video taking human perception into account.
- the EncT and DecT represent a ratio of the encoding and decoding time using the IBC compared to the encoding and decoding time without the IBC, respectively.
- the various classes represent a grouping of standard video sequences used in testing performance of various video coding techniques.
- the negative percentages under the “Y”, “U”, “V” columns represent bit-rate savings when IBC is added to VTM-1.0.
- the percentages under the EncT and DecT columns that are over 100% show how much the encoding/decoding with IBC is slower than encoding/decoding without IBC. For example, a percentage of 150% means that the encoding/decoding with IBC is 50% slower than the encoding/decoding without the IBC.
- the percentage below 100% shows how much the encoding/decoding with IBC is faster than encoding/decoding without the IBC.
- Two classes, class F and class SCC, highlighted in green in the table above, show that bit-rate savings exceed 3%.
- Implementations of the subject matter and the functional operations described in this patent document can be implemented in various systems, digital electronic circuitry, or in computer software, firmware, or hardware, including the structures disclosed in this specification and their structural equivalents, or in combinations of one or more of them. Implementations of the subject matter described in this specification can be implemented as one or more computer program products, i.e., one or more modules of computer program instructions encoded on a tangible and non-transitory computer readable medium for execution by, or to control the operation of, data processing apparatus.
- the computer readable medium can be a machine-readable storage device, a machine-readable storage substrate, a memory device, a composition of matter effecting a machine-readable propagated signal, or a combination of one or more of them.
- data processing unit or “data processing apparatus” encompasses all apparatus, devices, and machines for processing data, including by way of example a programmable processor, a computer, or multiple processors or computers.
- the apparatus can include, in addition to hardware, code that creates an execution environment for the computer program in question, e.g., code that constitutes processor firmware, a protocol stack, a database management system, an operating system, or a combination of one or more of them.
- a computer program (also known as a program, software, software application, script, or code) can be written in any form of programming language, including compiled or interpreted languages, and it can be deployed in any form, including as a stand-alone program or as a module, component, subroutine, or other unit suitable for use in a computing environment.
- a computer program does not necessarily correspond to a file in a file system.
- a program can be stored in a portion of a file that holds other programs or data (e.g., one or more scripts stored in a markup language document), in a single file dedicated to the program in question, or in multiple coordinated files (e.g., files that store one or more modules, sub programs, or portions of code).
- a computer program can be deployed to be executed on one computer or on multiple computers that are located at one site or distributed across multiple sites and interconnected by a communication network.
- the processes and logic flows described in this specification can be performed by one or more programmable processors executing one or more computer programs to perform functions by operating on input data and generating output.
- the processes and logic flows can also be performed by, and apparatus can also be implemented as, special purpose logic circuitry, e.g., an FPGA (field programmable gate array) or an ASIC (application specific integrated circuit).
- processors suitable for the execution of a computer program include, by way of example, both general and special purpose microprocessors, and any one or more processors of any kind of digital computer.
- a processor will receive instructions and data from a read only memory or a random access memory or both.
- the essential elements of a computer are a processor for performing instructions and one or more memory devices for storing instructions and data.
- a computer will also include, or be operatively coupled to receive data from or transfer data to, or both, one or more mass storage devices for storing data, e.g., magnetic, magneto optical disks, or optical disks.
- mass storage devices for storing data, e.g., magnetic, magneto optical disks, or optical disks.
- a computer need not have such devices.
- Computer readable media suitable for storing computer program instructions and data include all forms of nonvolatile memory, media and memory devices, including by way of example semiconductor memory devices, e.g., EPROM, EEPROM, and flash memory devices.
- semiconductor memory devices e.g., EPROM, EEPROM, and flash memory devices.
- the processor and the memory can be supplemented by, or incorporated in, special purpose logic circuitry.
Abstract
Description
- This application is a continuation of International Application No. PCT/IB2019/054604, filed on Jun. 4, 2019, which claims the priority to and benefits of International Patent Application No. PCT/CN2018/089920, filed on Jun. 5, 2018. All the aforementioned patent applications are hereby incorporated by reference in their entireties.
- This patent document is directed generally to video coding technologies.
- Motion compensation is a technique in video processing to predict a frame in a video, given the previous and/or future frames by accounting for motion of the camera and/or objects in the video. Motion compensation can be used in the encoding and decoding of video data for video compression.
- Devices, systems and methods related to intra-block copy for motion compensation are described.
- In one representative aspect, the disclosed technology may be used to provide a method for video encoding using intra-block copy. This method includes determining whether a current block of the current picture is to be encoded using a motion compensation algorithm, and encoding, based on the determining, the current block by selectively applying an intra-block copy to the current block.
- In another representative aspect, the disclosed technology may be used to provide another method for video encoding using intra-block copy. This method includes determining whether a current block of the current picture is to be encoded using an intra-block copy, and encoding, based on the determining, the current block by selectively applying a motion compensation algorithm to the current block.
- In yet another representative aspect, the disclosed technology may be used to provide a method for video decoding using intra-block copy. This method includes determining whether a current block of the current picture is to be decoded using a motion compensation algorithm, and decoding, based on the determining, the current block by selectively applying an intra-block copy to the current block.
- In yet another representative aspect, the disclosed technology may be used to provide another method for video decoding using intra-block copy. This method includes determining whether a current block of the current picture is to be decoded using an intra-block copy, and decoding, based on the determining, the current block by selectively applying a motion compensation algorithm to the current block.
- In yet another representative aspect, a visual information decoding method is disclosed. The method includes determining that a block being decoded representing a portion of an encoded picture of visual information is coded using a motion candidate associated with a motion vector, wherein the motion vector is derived as a weighted average of a plurality of motion vectors, wherein all of the plurality of motion vectors refer to a same picture type, and wherein a first picture type represents a current picture and a second picture type represents a reference pictures different from the current picture; and decoding the block being decoded by using the motion candidate.
- In yet another representative aspect, a visual information encoding method is disclosed. The method includes obtaining a block to encode representing a portion of a picture of visual information; encoding the block to encode using a motion candidate associated with a motion vector, wherein the motion vector is derived as a weighted average of a plurality of motion vectors, wherein all of the plurality of motion vectors refer to same picture type, and wherein a first picture type represents a current picture and a second picture type represents a reference picture different from the current picture
- In yet another representative aspect, the above-described method is embodied in the form of processor-executable code and stored in a computer-readable program medium.
- In yet another representative aspect, a device that is configured or operable to perform the above-described method is disclosed. The device may include a processor that is programmed to implement this method.
- In yet another representative aspect, a video decoder apparatus may implement a method as described herein.
- The above and other aspects and features of the disclosed technology are described in greater detail in the drawings, the description and the claims.
-
FIG. 1 shows an example of an intra-block copy technique. -
FIG. 2 shows an example of a coding unit (CU) with sub-blocks and neighboring blocks used by the spatial-temporal motion vector prediction (STMVP) algorithm. -
FIG. 3 shows a flowchart of an example method for video encoding using intra-block copy in accordance with the disclosed technology. -
FIG. 4 shows a flowchart of another example method for video encoding using intra-block copy in accordance with the disclosed technology. -
FIG. 5 shows a flowchart of an example method for video decoding using intra-block copy in accordance with the disclosed technology. -
FIG. 6 shows a flowchart of another example method for video decoding using intra-block copy in accordance with the disclosed technology. -
FIG. 7 is a block diagram illustrating an example of the architecture for a computer system or other control device that can be utilized to implement various portions of the presently disclosed technology. -
FIG. 8 shows a block diagram of an example embodiment of a mobile device that can be utilized to implement various portions of the presently disclosed technology. -
FIG. 9 shows a flowchart of an example method for video decoding in accordance with the disclosed technology. -
FIG. 10 shows a flowchart of an example method for video encoding in accordance with the disclosed technology. - Section headings are used in the present document for the ease of understanding and do not limit scope of the technologies and embodiments discussed in each section to just that section.
- Due to the increasing demand of higher resolution visual information, such as video, images, three-dimensional scenes, etc., video coding methods and techniques are ubiquitous in modern technology. The techniques described in this application can apply to various visual information including video, images, three-dimensional scenes, etc. A picture of the visual information can be a frame in a video, a portion of an image, an object in a three-dimensional scene, a portion of the three-dimensional scene, etc. A block can be portion of the picture of the visual information such as a coding unit (CU), a largest coding unit (LCU), a sample, a prediction unit (PU) etc. as described in this application. A sub-block of the visual information can be a PU such as a sub-CU, a sample, etc. The PU can be a pixel, a voxel, or a smallest quantum of resolution of the visual information. Video codecs typically include an electronic circuit or software that compresses or decompresses digital video, and are continually being improved to provide higher coding efficiency. A video codec converts uncompressed video to a compressed format or vice versa. There are complex relationships between the video quality, the amount of data used to represent the video (determined by the bit rate), the complexity of the encoding and decoding algorithms, sensitivity to data losses and errors, ease of editing, random access, and end-to-end delay (latency). The compressed format usually conforms to a standard video compression specification, e.g., the High Efficiency Video Coding (HEVC) standard (also known as H.265 or MPEG-H Part 2), the Versatile Video Coding standard to be finalized, or other current and/or future video coding standards.
- Embodiments of the disclosed technology may be applied to existing video coding standards (e.g., HEVC, H.265) and future standards to improve runtime performance. Section headings are used in the present document to improve readability of the description and do not in any way limit the discussion or the embodiments (and/or implementations) to the respective sections only.
- In HEVC, there are two types of reference pictures, short-term and long-term. A reference picture may be marked as “unused for reference” when it becomes no longer needed for prediction reference. A completely new approach for reference picture management, referred to as reference picture set (RPS) or buffer description has been introduced by HEVC.
- The process of marking pictures as “used for short-term reference”, “used for long-term reference”, or “unused for reference” is done using the RPS concept. An RPS is a set of picture indicators that is signaled in each slice header and consists of one set of short-term pictures and one set of long-term pictures. After the first slice header of a picture has been decoded, the pictures in the DPB are marked as specified by the RPS. The pictures in the DPB that are indicated in the short-term picture part of the RPS are kept as short-term pictures. The short-term or long-term pictures in the DPB that are indicated in the long-term picture part in the RPS are converted to or kept as long-term pictures. And finally, pictures in the DPB for which there is no indicator in the RPS are marked as unused for reference. Thus, all pictures that have been decoded that may be used as references for prediction of any subsequent pictures in decoding order must be included in the RPS.
- An RPS consists of a set of picture order count (POC) values that are used for identifying the pictures in the DPB. Besides signaling POC information, the RPS also signals one flag for each picture. Each flag indicates whether the corresponding picture is available or unavailable for reference for the current picture. Note that even though a reference picture is signaled as unavailable for the current picture, it is still kept in the DPB and may be made available for reference later on and used for decoding future pictures.
- From the POC information and the availability flag, five lists of reference pictures as shown in Table 1 can be created. The list RefPicSetStCurrBefore consists of short-term pictures that are available for reference for the current picture and have POC values that are lower than the POC value of the current picture. RefPicSetStCurrAfter consist of available short-term pictures with a POC value that is higher than the POC value of the current picture. RefPicSetStFoll is a list that contains all short-term pictures that are made unavailable for the current picture but may be used as reference pictures for decoding subsequent pictures in decoding order. Finally, the lists RefPicSetLtCurr and RefPicSetLtFoll contain long-term pictures that are available and unavailable for reference for the current picture, respectively.
-
TABLE 1 List of Reference Picture lists Long-term or Availability List name short-term flag POC RefPicSetStCurrBefore Short-term Available Lower RefPicSetStCurrAfter Short-term Available Higher RefPicSetStFoll Short-term Unavailable — RefPicSetLtCurr Long-term Available — RefPicSetLtFoll Long-term Unavailable — - The syntax for the general sequence parameter set is shown below:
-
Descriptor seq_parameter_set_rbsp( ) { sps_video_parameter_set_id u(4) sps_max_sub_layers_minus1 u(3) sps_temporal_id_nesting_flag u(1) profile_tier_level( 1, sps_max_sub_layers_minus1 ) sps_seq_parameter_set_id ue(v) chroma_format_idc ue(v) if( chroma_format_idc == 3 ) ... } ... amp_enabled_flag u(1) sample_adaptive_offset_enabled_flag u(1) pcm_enabled_flag u(1) if( pcm_enabled_flag ) { ... } num_short_term_ref_pic_sets ue(v) for( i = 0; i < num_short_term_ref_pic_sets; i++) st_ref_pic_set( i ) long_term_ref_pics_present_flag u(1) if( long_term_ref_pics_present_flag ) { num_long_term_ref_pics_sps ue(v) for( i = 0; i < num_long_term_ref_pics_sps; i++ ) { lt_ref_pic_poc_lsb_sps[ i ] u(v) used_by_curr_pic_lt_sps_flag[ i ] u(1) } } sps_temporal_mvp_enabled_flag u(1) ... } - The syntax for the general slice segment header is shown below:
-
Descriptor slice_segment_header( ) { first_slice_segment_in_pic_flag u(1) if( nal_unit_type >= BLA_W_LP && nal_unit_type <= RSV_IRAP_VCL23 ) no_output_of_prior_pics_flag u(1) slice_pic_parameter_set_id ue(v) if( !first_slice_segment_in_pic_flag ) { if( dependent_slice_segments_enabled_flag ) dependent_slice_segment_flag u(1) slice_segment_address u(v) } if( !dependent_slice_segment_flag ) { for( i = 0; i < num_extra_slice_header_bits; i++ ) slice_reserved_flag[ i ] u(1) slice_type ue(v) if( output_flag_present_flag ) pic_output_flag u(1) if( separate_colour_plane_flag == 1 ) colour_plane_id u(2) if( nal_unit_type != IDR_W_RADL && nal_unit_type != IDR_N_LP ) { slice_pic_order_cnt_lsb u(v) short_term_ref_pic_set_sps_flag u(1) if( !short_term_ref_pic_set_sps_flag ) st_ref_pic_set( num_short_term_ref_pic_sets ) else if( num_short_term_ref_pic_sets > 1 ) short_term_ref_pic_set_idx u(v) if( long_term_ref_pics_present_flag ) { if( num_long_term_ref_pics_sps > 0 ) num_long_term_sps ue(v) num_long_term_pics ue(v) for( i = 0; i < num_long_term_sps + num_long_term_pics; i++ ) { if( i < num_long_term_sps ) { if( num_long_term_ref_pics_sps > 1 ) lt_idx_sps[ i ] u(v) } else { poc_lsb_lt[ i ] u(v) used_by_curr_pic_lt_flag[ i ] u(1) } delta_poc_msb_present_flag[ i ] u(1) if( delta_poc_msb_present_flag[ i ] ) delta_poc_msb_cycle_lt[ i ] ue(v) } } ... - The semantics used in the syntax tables above are defined as:
- num_short_term_ref_pic_sets specifies the number of st_ref_ pic_set( ) syntax structures included in the SPS. The value of num_short_term_ref_pic_sets shall be in the range of 0 to 64, inclusive.
- In some embodiments, a decoder may allocate memory for a total number of num_short_term_ref_pic_sets+1 st_ref_pic_set( ) syntax structures since there may be a st_ref_pic_set( ) syntax structure directly signaled in the slice headers of a current picture. A st_ref_pic_set( ) syntax structure directly signaled in the slice headers of a current picture has an index equal to num_short_term_ref_pic_sets.
- long_term_ref_pics_present_flag equal to 0 specifies that no long-term reference picture is used for inter prediction of any coded picture in the CVS. long_term_ref_pics_present_flag equal to 1 specifies that long-term reference pictures may be used for inter prediction of one or more coded pictures in the CVS.
- num_long_term_ref_pics_sps specifies the number of candidate long-term reference pictures that are specified in the SPS. The value of num_long_term_ref_pics_sps shall be in the range of 0 to 32, inclusive.
- lt_ref_pic_poc_lsb_sps[i] specifies the picture order count modulo MaxPicOrderCntLsb of the i-th candidate long-term reference picture specified in the SPS. The number of bits used to represent lt_ref_pic_poc_lsb_sps[i] is equal to log2_max_pic_order_cnt_lsb_minus4+4.
- used_by_curr_pic_lt_sps_flag[i] equal to 0 specifies that the i-th candidate long-term reference picture specified in the SPS is not used for reference by a picture that includes in its long-term reference picture set (RPS) the i-th candidate long-term reference picture specified in the SPS.
- short_term_ref_pic_set_sps_flag equal to 1 specifies that the short-term RPS of the current picture is derived based on one of the st_ref_pic_set( ) syntax structures in the active SPS that is identified by the syntax element short_term_ref_pic_set_idx in the slice header. short_term_ref_pic_set_sps_flag equal to 0 specifies that the short-term RPS of the current picture is derived based on the st_ref_pic_set( ) syntax structure that is directly included in the slice headers of the current picture. When num_short_term_ref_pic_sets is equal to 0, the value of short_term_ref_pic_set_sps_flag shall be equal to 0.
- short_term_ref_pic_set_idx specifies the index, into the list of the st_ref_pic_set( ) syntax structures included in the active SPS, of the st_ref_pic_set( ) syntax structure that is used for derivation of the short-term RPS of the current picture. The syntax element short_term_ref_pic_set_idx is represented by Ceil(Log2(num_short_term_ref_pic_sets)) bits. When not present, the value of short_term_ref_pic_set_idx is inferred to be equal to 0. The value of short_term_ref_pic_set_idx shall be in the range of 0 to num_short_term_ref_pic_sets−1, inclusive.
- In some embodiments, the variable CurrRpsIdx is derived as follows:
-
- If short_term_ref_pic_set_sps_flag is equal to 1, CurrRpsIdx is set equal to short_term_ref_pic_set_idx.
- Otherwise, CurrRpsIdx is set equal to num_short_term_ref_pic_sets.
- num_long_term_sps specifies the number of entries in the long-term RPS of the current picture that are derived based on the candidate long-term reference pictures specified in the active SPS. The value of num_long_term_sps shall be in the range of 0 to num_long_term_ref_pics_sps, inclusive. When not present, the value of num_long_term_sps is inferred to be equal to 0.
- num_long_term_pics specifies the number of entries in the long-term RPS of the current picture that are directly signaled in the slice header. When not present, the value of num_long_term_pics is inferred to be equal to 0.
- In some embodiments, when nuh_layer_id is equal to 0, the value of num_long_term_pics shall be less than or equal to sps_max_dec_pic_buffering_minus1[TemporalId]−NumNegativePics[CurrRpsIdx]−NumPositivePics[CurrRpsIdx]−num_long_term_sps−TwoVersionsOfCurrDecPicFlag.
- lt_idx_sps[i] specifies an index, into the list of candidate long-term reference pictures specified in the active SPS, of the i-th entry in the long-term RPS of the current picture. The number of bits used to represent lt_idx_sps[i] is equal to Ceil(Log2(num_long_term_ref_pics_sps)). When not present, the value of lt_idx_sps[i] is inferred to be equal to 0. The value of lt_idx_sps[i] shall be in the range of 0 to num_long_term_ref_pics_sps−1, inclusive.
- poc_lsb_lt[i] specifies the value of the picture order count modulo MaxPicOrderCntLsb of the i-th entry in the long-term RPS of the current picture. The length of the poc_lsb_lt[i] syntax element is log2_max_pic_order_cnt_lsb_minus4+4 bits.
- used_by_curr_pic_lt_flag[i] equal to 0 specifies that the i-th entry in the long-term RPS of the current picture is not used for reference by the current picture.
- In some embodiments, the variables PocLsbLt[i] and UsedByCurrPicLt[i] are derived as follows:
-
- If i is less than num_long_term_sps, PocLsbLt[i] is set equal to lt_ref_pic_poc_lsb_sps[lt_idx_sps[i]] and UsedByCurrPicLt[i] is set equal to used_by_curr_pic_lt_sps_flag[lt_idx_sps[i]].
- Otherwise, PocLsbLt[i] is set equal to poc_lsb_lt[i] and UsedByCurrPicLt[i] is set equal to used_by_curr_pic_lt_flag[i].
- delta_poc_msb_present_flag[i] equal to 1 specifies that delta_poc_msb_cycle_lt[i] is present. delta_poc_msb_present_flag[i] equal to 0 specifies that delta_poc_msb_cycle_lt[i] is not present.
- In some embodiments, let prevTid0Pic be the previous picture in decoding order that has TemporalId equal to 0 and is not a RASL, RADL or SLNR picture. Let setOfPrevPocVals be a set consisting of the following:
-
- the PicOrderCntVal of prevTid0Pic,
- the PicOrderCntVal of each picture in the RPS of prevTid0Pic,
- the PicOrderCntVal of each picture that follows prevTid0Pic in decoding order and precedes the current picture in decoding order.
- In some embodiments, when there is more than one value in setOfPrevPocVals for which the value modulo MaxPicOrderCntLsb is equal to PocLsbLt[i], delta_poc_msb_present_flag[i] shall be equal to 1.
- delta_poc_msb_cycle_lt[i] is used to determine the value of the most significant bits of the picture order count value of the i-th entry in the long-term RPS of the current picture. When delta_poc_msb_cycle_lt[i] is not present, it is inferred to be equal to 0.
- In some embodiments, the variable DeltaPocMsbCycleLt[i] is derived as follows:
-
- if(i==0||i==num_long_term_sps) DeltaPocMsbCycleLt[i]=delta_poc_msb_cycle_lt[i] else DeltaPocMsbCycleLt[i]=delta_poc_msb_cycle_lt[i]+DeltaPocMsbCycleLt[i−1]
- In some embodiments, the motion vector prediction is only allowed if the target reference picture type and the predicted reference picture type is the same. In other words, when the types are different, motion vector prediction is disallowed.
- Advanced Motion Vector Prediction (AMVP) is an example of motion vector prediction that includes an existing implementation. The relevant portion of the existing AMVP implementation is detailed below.
- The motion vector mvLXA and the availability flag availableFlagLXA are derived in the following ordered steps:
-
- (1) The sample location (xNbA0, yNbA0) is set equal to (xPb−1, yPb+nPbH) and the sample location (xNbA1, yNbA1) is set equal to (xNbA0, yNbA0−1).
- (7) When availableFlagLXA is equal to 0, the following applies for (xNbAk, yNbAk) from (xNbA0, yNbA0) to (xNbA1, yNbA1) or until availableFlagLXA is equal to 1:
- When availableAk is equal to TRUE and availableFlagLXA is equal to 0, the following applies:
- If PredFlagLX[xNbAk][yNbAk] is equal to 1 and LongTermRefPic(currPic, currPb, refIdxLX, RefPicListX) is equal to LongTermRefPic(currPic, currPb, RefIdxLX[xNbAk][yNbAk], RefPicListX), availableFlagLXA is set equal to 1 and the following assignments are made:
- mvLXA=MvLX[xNbAk][yNbAk]
- refIdxA=RefIdxLX[xNbAk][yNbAk]
- refPicListA=RefPicListX
- Otherwise, when PredFlagLY[xNbAk][yNbAk] (with Y=!X) is equal to 1 and LongTermRefPic(currPic, currPb, refIdxLX, RefPicListX) is equal to LongTermRefPic(currPic, currPb, RefIdxLY[xNbAk][yNbAk], RefPicListY), availableFlagLXA is set to 1.
- The motion vector mvLXB and the availability flag availableFlagLXB are derived in the following ordered steps:
-
- (1) The sample locations (xNbB0, yNbB0), (xNbB1, yNbB1) and (xNbB2, yNbB2) are set equal to (xPb+nPbW, yPb−1), (xPb+nPbW−1, yPb−1) and (xPb−1, yPb−1), respectively.
- (5) When isScaledFlagLX is equal to 0, availableFlagLXB is set equal to 0 and the following applies for (xNbBk, yNbBk) from (xNbB0, yNbB0) to (xNbB2, yNbB2) or until availableFlagLXB is equal to 1:
- The availability derivation process for a prediction block as specified in clause 6.4.2 is invoked with the luma location (xCb, yCb), the current luma coding block size nCbS, the luma location (xPb, yPb), the luma prediction block width nPbW, the luma prediction block height nPbH, the luma location (xNbY, yNbY) set equal to (xNbBk, yNbBk) and the partition index partIdx as inputs, and the output is assigned to the prediction block availability flag availableBk.
- When availableBk is equal to TRUE and availableFlagLXB is equal to 0, the following applies:
- If PredFlagLX[xNbBk][yNbBk] is equal to 1 and LongTermRefPic(currPic, currPb, refIdxLX, RefPicListX) is equal to LongTermRefPic(currPic, currPb, RefIdxLX[xNbBk][yNbBk], RefPicListX), availableFlagLXB is set equal to 1 and the following assignments are made:
- mvLXB=MvLX[xNbBk][yNbBk]
- refIdxB=RefIdxLX[xNbBk][yNbBk]
- refPicListB=RefPicListX
- Otherwise, when PredFlagLY[xNbBk][yNbBk] (with Y=!X) is equal to 1 and LongTermRefPic(currPic, currPb, refIdxLX, RefPicListX) is equal to LongTermRefPic(currPic, currPb, RefIdxLY[xNbBk][yNbBk], RefPicListY), availableFlagLXB is set equal to 1 and the following assignments are made:
- mvLXB=MvLY[xNbBk][yNbBk].
- Temporal Motion Vector Prediction (TMVP) is another example of motion vector prediction that includes an existing implementation. The relevant portion of the existing TMVP implementation is detailed below.
- The variables mvLXCol and availableFlagLXCol are derived as follows:
-
- If LongTermRefPic(currPic, currPb, refIdxLX, LX) is not equal to LongTermRefPic(ColPic, colPb, refIdxCol, listCol), both components of mvLXCol are set equal to 0 and availableFlagLXCol is set equal to 0.
- Otherwise, the variable availableFlagLXCol is set equal to 1, refPicListCol[refIdxCol] is set to be the picture with reference index refIdxCol in the reference picture list listCol of the slice containing prediction block colPb in the collocated picture specified by ColPic.
- Intra-block copy (IBC) has been extends the concept of motion compensation from inter-frame coding to intra-frame coding. As shown in
FIG. 1 , the current block is predicted by a reference block in the same picture when IBC is applied. The samples in the reference block must have been already reconstructed before the current block is coded or decoded. Although IBC is not so efficient for most camera-captured sequences, it shows significant coding gains for screen content. The reason is that there are lots of reduplicated patterns, such as icons and text characters in a screen content picture. IBC can remove the redundancy between these reduplicated patterns effectively. - In HEVC-SCC, an inter-coded coding unit (CU) can apply IBC if it chooses the current picture as its reference picture. The MV is renamed as block vector (BV) in this case, and a BV always has an integer-pixel precision. To be compatible with main profile HEVC, the current picture is marked as a “long-term” reference picture in the Decoded Picture Buffer (DPB). It should be noted that similarly, in multiple view/3D video coding standards, the inter-view reference picture is also marked as a “long-term” reference picture.
- Semantics related to IBC in PPS. pps_curr_pic_ref_enabled_flag equal to 1 specifies that a picture referring to the PPS may be included in a reference picture list of a slice of the picture itself. pps_curr_pic_ref_enabled_flag equal to 0 specifies that a picture referring to the PPS is never included in a reference picture list of a slice of the picture itself. When not present, the value of pps_curr_pic_ref_enabled_flag is inferred to be equal to 0.
- It is a requirement of bitstream conformance that when sps_curr_pic_ref_enabled_flag is equal to 0, the value of pps_curr_pic_ref_enabled_flag shall be equal to 0.
- The variable TwoVersionsOfCurrDecPicFlag is derived as follows:
- TwoVersionsOfCurrDecPicFlag=pps_curr_pic_ref_enabled_flag && (sample_adaptive_offset enabled_flag||!pps_deblocking_filter_disabled_flag||deblocking_filter_override_enabled_flag)
- When sps_max_dec_pic_buffering_minus1[TemporalId] is equal to 0, the value of TwoVersionsOfCurrDecPicFlag shall be equal to 0.
- Decoding process. The current decoded picture after the invocation of the in-loop filter process is stored in the DPB in an empty picture storage buffer, the DPB fullness is incremented by one and this picture is marked as “used for short-term reference”.
- When TwoVersionsOfCurrDecPicFlag is equal to 1, the current decoded picture before the invocation of the in-loop filter process as specified in clause F.8.7[1] is stored in the DPB in an empty picture storage buffer, the DPB fullness is incremented by one, and this picture is marked as “used for long-term reference”.
- In some embodiments, future video coding technologies are explored using a reference software known as the Joint Exploration Model (JEM). In JEM, sub-block based prediction is adopted in several coding tools, such as affine prediction, alternative temporal motion vector prediction (ATMVP), spatial-temporal motion vector prediction (STMVP), bi-directional optical flow (BIO), Frame-Rate Up Conversion (FRUC), Locally Adaptive Motion Vector Resolution (LAMVR), Overlapped Block Motion Compensation (OBMC), Local Illumination Compensation (LIC), and Decoder-side Motion Vector Refinement (DMVR).
- In the STMVP method, the motion vectors of the sub-CUs are derived recursively, following raster scan order.
FIG. 2 shows an example of one CU with four sub-blocks and neighboring blocks. Consider an 8×8CU 700 that includes four 4×4 sub-CUs A (701), B (702), C (703), and D (704). The neighboring 4×4 blocks in the current frame are labelled as a (711), b (712), c (713), and d (714). - The motion derivation for sub-CU A starts by identifying its two spatial neighbors. The first neighbor is the N×N block above sub-CU A 701 (block c 713). If this block c (713) is not available or is intra coded the other NxN blocks above sub-CU A (701) are checked (from left to right, starting at block c 713). The second neighbor is a block to the left of the sub-CU A 701 (block b 712). If block b (712) is not available or is intra coded other blocks to the left of
sub-CU A 701 are checked (from top to bottom, staring at block b 712). The motion information obtained from the neighboring blocks for each list is scaled to the first reference frame for a given list. Next, temporal motion vector predictor (TMVP) ofsub-block A 701 is derived by following the same procedure of TMVP derivation as specified in HEVC. The motion information of the collocated block atblock D 704 is fetched and scaled accordingly. Finally, after retrieving and scaling the motion information, all available motion vectors are averaged separately for each reference list. The averaged motion vector is assigned as the motion vector of the current sub-CU. -
FIG. 3 shows a flowchart of an exemplary method for video encoding using intra-block copy. Themethod 1600 includes, atstep 1610, determining whether a current block of the current picture is to be encoded using a motion compensation algorithm. Themethod 1600 includes, instep 1620, encoding, based on the determining, the current block by selectively applying an intra-block copy to the current block. More generally, whether or not to apply the intra-block copy to the current block is based on whether the current block is to be encoded using a specific motion compensation algorithm. -
FIG. 4 shows a flowchart of another exemplary method video encoding using intra-block copy. Themethod 1700 includes, atstep 1710, determining whether a current block of the current picture is to be encoded using an intra-block copy. Themethod 1700 includes, instep 1720, encoding, based on the determining, the current block by selectively applying a motion compensation algorithm to the current block. More generally, whether or not to encode the current block using the motion compensation algorithm is based on whether the current block is to be encoded using the intra-block copy. -
FIG. 5 shows a flowchart of an exemplary method for video decoding using intra-block copy. Themethod 1800 includes, atstep 1810, determining whether a current block of the current picture is to be decoded using a motion compensation algorithm. Themethod 1800 includes, instep 1820, decoding, based on the determining, the current block by selectively applying an intra-block copy to the current block. More generally, whether or not to apply the intra-block copy to the current block is based on whether the current block is to be decoded using a specific motion compensation algorithm. -
FIG. 6 shows a flowchart of another exemplary method video decoding using intra-block copy. Themethod 1900 includes, atstep 1910, determining whether a current block of the current picture is to be decoded using an intra-block copy. Themethod 1900 includes, instep 1920, decoding, based on the determining, the current block by selectively applying a motion compensation algorithm to the current block. More generally, whether or not to decode the current block using the motion compensation algorithm is based on whether the current block is to be decoded using the intra-block copy. - The
methods FIGS. 3-6, 9 and 10 may further include are further the step of determining whether the motion compensation algorithm is compatible with the intra-block copy. The compatibility of the intra-block copy and the motion compensation algorithms are elucidated in the following examples described for different specific motion compensation algorithms. - Listed below are some examples of the technology described in this application listed in a clause format. A block, as used in this application, can be a contiguous or a noncontiguous collection of pixels, voxels, sub-pixels, and/or sub-voxels. For example, a block can be rectilinear, such as a 4×4 square, 6×4 rectangle, or curvilinear, such as an ellipse.
- A portion of the visual information, as used in this application, can be a subset of visual information. A coded representation, as used in this application, can be a bitstream representing the visual information that has been encoded using one of the techniques described in this application. An indicator, as used in this application, can be a flag or a field in the coded representation or can be multiple separate flags or fields.
- A decoding technique, as used in this application can be applied by a decoder and can be implemented in hardware or software. The decoding technique can undo in reverse sequence everything a coder does. When an appropriate decoding technique is applied to an encoded representation, a visual information can be obtained as a result.
- 1. A visual information decoding method (e.g.,
method 900 inFIG. 9 ), comprising: determining (902) that a block being decoded representing a portion of an encoded picture of visual information is coded using a motion candidate associated with a motion vector, wherein the motion vector is derived as a weighted average of a plurality of motion vectors, wherein all of the plurality of motion vectors refer to a same picture type, and wherein a first picture type represents a current picture and a second picture type represents a reference pictures different from the current picture; and decoding (904) the block being decoded by using the motion candidate. - 2. The method of clause 1, comprising applying equal weights to all the plurality of motion vectors.
- 3. The method of clause 1, comprising applying un-equal weights to the plurality of motion vectors.
- 4. The method of clause 1, further comprising decoding a first block using the Intra-block copy (IBC) mode based on a first motion vector associated with the first picture type.
- 5. The method of clause 1, further comprising decoding a first block not using the Intra-block copy (IBC) based on a first motion vector associated with the second picture type.
- 6. In the method of clause 1, wherein the motion vector comprises a motion vector of a pair-wise merge candidate.
- 7. The method of clause 6, further comprising generating the motion vector of the pair-wise merge candidate by averaging a first motion vector of a first merge candidate and a second motion vector of a second merge candidate.
- 8. The method of clause 1, wherein the motion vector comprises a motion vector of a sub-block in a block coded with the spatial-temporal motion vector prediction (STMVP) encoding technique.
- 9. The method of clause 8, further comprising decoding a second encoded block using the STMVP decoding technique by: obtaining a first plurality of encoded blocks representing the second encoded picture including an encoded block being decoded; obtaining a first plurality of encoded sub-blocks representing the encoded block being decoded; obtaining a plurality of spatial neighbors of an encoded sub-block in the first plurality of encoded sub-blocks, and a motion vector of the encoded sub-block; and decoding the encoded sub-block based on the motion vector and the plurality of spatial neighbors.
- 10. The method of clause 1, further comprising: obtaining one or more pictures in the visual information and one or more motion vectors associated with the one or more pictures in the visual information, wherein each picture in the one or more pictures comprises a picture being decoded, or each picture in the one or more pictures comprises a picture different from the picture being decoded.
- 11. A visual information encoding method (e.g.,
method 1000 inFIG. 10 ), comprising: obtaining (1002) a block to encode representing a portion of a picture of visual information; encoding (1004) the block to encode using a motion candidate associated with a motion vector, wherein the motion vector is derived as a weighted average of a plurality of motion vectors, wherein all of the plurality of motion vectors refer to same picture type, and wherein a first picture type represents a current picture and a second picture type represents a reference picture different from the current picture. - 12. The method of clause 11, further comprising applying equal weights to all the plurality of motion vectors.
- 13. The method of clause 11, further comprising applying un-equal weights to the plurality of motion vectors.
- 14. The method of clause 11, further comprising encoding a first block using the Intra-block copy (IBC) mode based on a first motion vector associated with the first picture type.
- 15. The method of clause 11, further comprising encoding a first block not using the Intra-block copy (IBC) based on a first motion vector associated with the second picture type.
- 16. The method of clause 11, the motion vector comprising a motion vector of a pair-wise merge candidate.
- 17. The method of clause 16, further comprising generating the motion vector of the pair-wise merge candidate by averaging a first motion vector of a first merge candidate and a second motion vector of a second merge candidate.
- 18. The method of clause 11, the motion vector comprising a motion vector of a sub-block in a block coded with an STMVP encoding technique.
- 19. The method of clause 11, further comprising encoding the first block using the IBC technique by: dividing the first picture into a first plurality of blocks; encoding an initial block in the first plurality of blocks; and upon encoding the initial block, encoding a first block in the first plurality of blocks based on the initial block.
- 20. The method of clause 11, further comprising encoding the second block using the STMVP technique by: dividing the second picture into a second plurality of blocks including a block being encoded; dividing the block being encoded into a plurality of sub-blocks; identifying a plurality of spatial neighbors of a sub-block in the plurality of sub-blocks, wherein a plurality of indicators associated with the plurality of spatial neighbors indicate that the plurality of spatial neighbors is available for use in the STMVP technique; obtaining a motion information associated with the plurality of spatial neighbors; and encoding a motion vector of the sub-block based on the motion information associated with the plurality of spatial neighbors.
- 21. The method of clause 11, further comprising: obtaining one or more motion vectors associated with one or more pictures in the visual information, wherein the one or more pictures consist of a picture being encoded, or the one or more pictures consist of a picture different from the picture being encoded; and deriving a motion vector of the sub-block based on the one or more motion vectors associated with one or more pictures in the visual information.
- 22. The method of clause 21, said deriving the motion vector comprising: calculating an average of the one or more motion vectors; and assigning the average to the motion vector.
- 23. The method of clause 21, said deriving the motion vector comprising: calculating a weighted average of the one or more motion vectors, the weighting based on proximity to the sub-block; and assigning the weighted average to the motion vector.
- 24. A video processing apparatus comprising a processor configured to implement a method recited in any one or more of clauses 1 to 23.
- 25. A computer readable medium having processor-executable code stored thereon, the code, upon execution, causing a processor to implement a method recited in any one or more of clauses 1 to 23.
- Further embodiments and variations of the methods and apparatus described in clauses 1 to 25 are discussed in the following examples.
- Example 1. It is proposed that the averaged (or other kinds of derivation function, like weighted average) motion vector can only be derived from MVs all referring to the current picture or all referring to a reference picture not identical to the current picture.
- In Versatile Video Coding (VVC), a pairwise merge candidate is adopted. The MV of a pairwise merge candidate is derive as the average of the MV of a first merge candidate and the MV of a second merge candidate.
-
FIG. 7 is a block diagram illustrating an example of the architecture for a computer system orother control device 2000 that can be utilized to implement various portions of the presently disclosed technology, including (but not limited to)methods FIG. 7 , thecomputer system 2000 includes one ormore processors 2005 andmemory 2010 connected via aninterconnect 2025. Theinterconnect 2025 may represent any one or more separate physical buses, point to point connections, or both, connected by appropriate bridges, adapters, or controllers. Theinterconnect 2025, therefore, may include, for example, a system bus, a Peripheral Component Interconnect (PCI) bus, a HyperTransport or industry standard architecture (ISA) bus, a small computer system interface (SCSI) bus, a universal serial bus (USB), IIC (I2C) bus, or an Institute of Electrical and Electronics Engineers (IEEE) standard 674 bus, sometimes referred to as “Firewire.” - The processor(s) 2005 may include central processing units (CPUs) to control the overall operation of, for example, the host computer. In certain embodiments, the processor(s) 2005 accomplish this by executing software or firmware stored in
memory 2010. The processor(s) 2005 may be, or may include, one or more programmable general-purpose or special-purpose microprocessors, digital signal processors (DSPs), programmable controllers, application specific integrated circuits (ASICs), programmable logic devices (PLDs), or the like, or a combination of such devices. - The
memory 2010 can be or include the main memory of the computer system. Thememory 2010 represents any suitable form of random access memory (RAM), read-only memory (ROM), flash memory, or the like, or a combination of such devices. In use, thememory 2010 may contain, among other things, a set of machine instructions which, when executed byprocessor 2005, causes theprocessor 2005 to perform operations to implement embodiments of the presently disclosed technology. - Also connected to the processor(s) 2005 through the
interconnect 2025 is a (optional)network adapter 2015. Thenetwork adapter 2015 provides thecomputer system 2000 with the ability to communicate with remote devices, such as the storage clients, and/or other storage servers, and may be, for example, an Ethernet adapter or Fiber Channel adapter. -
FIG. 8 shows a block diagram of an example embodiment of amobile device 2100 that can be utilized to implement various portions of the presently disclosed technology, including (but not limited to)methods mobile device 2100 can be a laptop, a smartphone, a tablet, a camcorder, or other types of devices that are capable of processing videos. Themobile device 2100 includes a processor orcontroller 2101 to process data, andmemory 2102 in communication with theprocessor 2101 to store and/or buffer data. For example, theprocessor 2101 can include a central processing unit (CPU) or a microcontroller unit (MCU). In some implementations, theprocessor 2101 can include a field-programmable gate-array (FPGA). In some implementations, themobile device 2100 includes or is in communication with a graphics processing unit (GPU), video processing unit (VPU) and/or wireless communications unit for various visual and/or communications data processing functions of the smartphone device. For example, thememory 2102 can include and store processor-executable code, which when executed by theprocessor 2101, configures themobile device 2100 to perform various operations, e.g., such as receiving information, commands, and/or data, processing information and data, and transmitting or providing processed information/data to another device, such as an actuator or external display. - To support various functions of the
mobile device 2100, thememory 2102 can store information and data, such as instructions, software, values, images, and other data processed or referenced by theprocessor 2101. For example, various types of Random Access Memory (RAM) devices, Read Only Memory (ROM) devices, Flash Memory devices, and other suitable storage media can be used to implement storage functions of thememory 2102. In some implementations, themobile device 2100 includes an input/output (I/O)unit 2103 to interface theprocessor 2101 and/ormemory 2102 to other modules, units or devices. For example, the I/O unit 2103 can interface theprocessor 2101 andmemory 2102 with to utilize various types of wireless interfaces compatible with typical data communication standards, e.g., such as between the one or more computers in the cloud and the user device. In some implementations, themobile device 2100 can interface with other devices using a wired connection via the I/O unit 2103. Themobile device 2100 can also interface with other external interfaces, such as data storage, and/or visual oraudio display devices 2104, to retrieve and transfer data and information that can be processed by the processor, stored in the memory, or exhibited on an output unit of adisplay device 2104 or an external device. For example, thedisplay device 2104 can display a video frame that includes a block (a CU, PU or TU) that applies the intra-block copy based on whether the block is encoded using a motion compensation algorithm, and in accordance with the disclosed technology. - In some embodiments, a video decoder apparatus may implement a method of video decoding in which the intra-block copy as described herein is used for video decoding. The method may be similar to the above-described
methods - In some embodiments, a decoder-side method of video decoding may use the intra-block copy for improving video quality by determining whether a current block of the current picture is to be decoded using a motion compensation algorithm, and decoding, based on the determining, the current block by selectively applying an intra-block copy to the current block.
- In other embodiments, a decoder-side method of video decoding may use the intra-block copy for improving video quality by determining whether a current block of the current picture is to be decoded using an intra-block copy, and decoding, based on the determining, the current block by selectively applying a motion compensation algorithm to the current block.
- In some embodiments, the video decoding methods may be implemented using a decoding apparatus that is implemented on a hardware platform as described with respect to
FIG. 7 andFIG. 8 . - Below are improvements measured by incorporating IBC into VTM-1.0, which is a reference software for the video coding standard named Versatile Video Coding (VVC). VTM stands for VVC Test Model.
-
Over VTM-1.0 Y U V EncT DecT Class A1 −0.33% −0.50% −0.49% 162% 100% Class A2 −0.96% −1.17% −0.77% 159% 98% Class B −0.94% −1.14% −1.34% 162% 102% Class C −1.03% −1.58% −1.92% 160% 101% Class E −1.48% −1.46% −1.80% 160% 104% Overall −0.95% −1.19% −1.31% 161% 101% Class D −0.57% −0.73% −0.91% 161% 100% Class F (optional) −20.25% −20.15% −20.93% 194% 95% Class SCC 1080 p −52.94% −53.26% −53.37% 217% 74% - In the above table, “Y”, “U”, “V” represent colors in the YUV color encoding system which encodes a color image or video taking human perception into account. The EncT and DecT represent a ratio of the encoding and decoding time using the IBC compared to the encoding and decoding time without the IBC, respectively. Specifically,
-
- EncT=TestEncodingTime/anchorEncodingTime
- DecT=TestEncodingTime/anchorEncodingTime.
- The various classes, such as Class A1, Class A2, etc., represent a grouping of standard video sequences used in testing performance of various video coding techniques. The negative percentages under the “Y”, “U”, “V” columns represent bit-rate savings when IBC is added to VTM-1.0. The percentages under the EncT and DecT columns that are over 100% show how much the encoding/decoding with IBC is slower than encoding/decoding without IBC. For example, a percentage of 150% means that the encoding/decoding with IBC is 50% slower than the encoding/decoding without the IBC. The percentage below 100% shows how much the encoding/decoding with IBC is faster than encoding/decoding without the IBC. Two classes, class F and class SCC, highlighted in green in the table above, show that bit-rate savings exceed 3%.
- From the foregoing, it will be appreciated that specific embodiments of the presently disclosed technology have been described herein for purposes of illustration, but that various modifications may be made without deviating from the scope of the invention. Accordingly, the presently disclosed technology is not limited except as by the appended claims.
- Implementations of the subject matter and the functional operations described in this patent document can be implemented in various systems, digital electronic circuitry, or in computer software, firmware, or hardware, including the structures disclosed in this specification and their structural equivalents, or in combinations of one or more of them. Implementations of the subject matter described in this specification can be implemented as one or more computer program products, i.e., one or more modules of computer program instructions encoded on a tangible and non-transitory computer readable medium for execution by, or to control the operation of, data processing apparatus. The computer readable medium can be a machine-readable storage device, a machine-readable storage substrate, a memory device, a composition of matter effecting a machine-readable propagated signal, or a combination of one or more of them. The term “data processing unit” or “data processing apparatus” encompasses all apparatus, devices, and machines for processing data, including by way of example a programmable processor, a computer, or multiple processors or computers. The apparatus can include, in addition to hardware, code that creates an execution environment for the computer program in question, e.g., code that constitutes processor firmware, a protocol stack, a database management system, an operating system, or a combination of one or more of them.
- A computer program (also known as a program, software, software application, script, or code) can be written in any form of programming language, including compiled or interpreted languages, and it can be deployed in any form, including as a stand-alone program or as a module, component, subroutine, or other unit suitable for use in a computing environment. A computer program does not necessarily correspond to a file in a file system. A program can be stored in a portion of a file that holds other programs or data (e.g., one or more scripts stored in a markup language document), in a single file dedicated to the program in question, or in multiple coordinated files (e.g., files that store one or more modules, sub programs, or portions of code). A computer program can be deployed to be executed on one computer or on multiple computers that are located at one site or distributed across multiple sites and interconnected by a communication network.
- The processes and logic flows described in this specification can be performed by one or more programmable processors executing one or more computer programs to perform functions by operating on input data and generating output. The processes and logic flows can also be performed by, and apparatus can also be implemented as, special purpose logic circuitry, e.g., an FPGA (field programmable gate array) or an ASIC (application specific integrated circuit).
- Processors suitable for the execution of a computer program include, by way of example, both general and special purpose microprocessors, and any one or more processors of any kind of digital computer. Generally, a processor will receive instructions and data from a read only memory or a random access memory or both. The essential elements of a computer are a processor for performing instructions and one or more memory devices for storing instructions and data. Generally, a computer will also include, or be operatively coupled to receive data from or transfer data to, or both, one or more mass storage devices for storing data, e.g., magnetic, magneto optical disks, or optical disks. However, a computer need not have such devices. Computer readable media suitable for storing computer program instructions and data include all forms of nonvolatile memory, media and memory devices, including by way of example semiconductor memory devices, e.g., EPROM, EEPROM, and flash memory devices. The processor and the memory can be supplemented by, or incorporated in, special purpose logic circuitry.
- It is intended that the specification, together with the drawings, be considered exemplary only, where exemplary means an example. As used herein, the singular forms “a”, “an” and “the” are intended to include the plural forms as well, unless the context clearly indicates otherwise. Additionally, the use of “or” is intended to include “and/or”, unless the context clearly indicates otherwise.
- While this patent document contains many specifics, these should not be construed as limitations on the scope of any invention or of what may be claimed, but rather as descriptions of features that may be specific to particular embodiments of particular inventions. Certain features that are described in this patent document in the context of separate embodiments can also be implemented in combination in a single embodiment. Conversely, various features that are described in the context of a single embodiment can also be implemented in multiple embodiments separately or in any suitable subcombination. Moreover, although features may be described above as acting in certain combinations and even initially claimed as such, one or more features from a claimed combination can in some cases be excised from the combination, and the claimed combination may be directed to a subcombination or variation of a subcombination.
- Similarly, while operations are depicted in the drawings in a particular order, this should not be understood as requiring that such operations be performed in the particular order shown or in sequential order, or that all illustrated operations be performed, to achieve desirable results. Moreover, the separation of various system components in the embodiments described in this patent document should not be understood as requiring such separation in all embodiments.
- Only a few implementations and examples are described and other implementations, enhancements and variations can be made based on what is described and illustrated in this patent document.
Claims (20)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US17/700,086 US20220217363A1 (en) | 2018-06-05 | 2022-03-21 | Interaction between pairwise average merging candidates and ibc |
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN2018089920 | 2018-06-05 | ||
CNPCT/CN2018/089920 | 2018-06-05 | ||
PCT/IB2019/054604 WO2019234600A1 (en) | 2018-06-05 | 2019-06-04 | Interaction between pairwise average merging candidates and intra-block copy (ibc) |
Related Parent Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/IB2019/054604 Continuation WO2019234600A1 (en) | 2018-06-05 | 2019-06-04 | Interaction between pairwise average merging candidates and intra-block copy (ibc) |
Related Child Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US17/700,086 Continuation US20220217363A1 (en) | 2018-06-05 | 2022-03-21 | Interaction between pairwise average merging candidates and ibc |
Publications (1)
Publication Number | Publication Date |
---|---|
US20210006780A1 true US20210006780A1 (en) | 2021-01-07 |
Family
ID=67185524
Family Applications (9)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US17/005,521 Abandoned US20200396465A1 (en) | 2018-06-05 | 2020-08-28 | Interaction between ibc and affine |
US17/011,157 Active US11202081B2 (en) | 2018-06-05 | 2020-09-03 | Interaction between IBC and BIO |
US17/011,131 Active US11523123B2 (en) | 2018-06-05 | 2020-09-03 | Interaction between IBC and ATMVP |
US17/019,629 Abandoned US20200413048A1 (en) | 2018-06-05 | 2020-09-14 | Interaction between ibc and dmvr |
US17/031,451 Abandoned US20210006780A1 (en) | 2018-06-05 | 2020-09-24 | Interaction between pairwise average merging candidates and ibc |
US17/201,896 Active US11509915B2 (en) | 2018-06-05 | 2021-03-15 | Interaction between IBC and ATMVP |
US17/529,607 Active US11831884B2 (en) | 2018-06-05 | 2021-11-18 | Interaction between IBC and BIO |
US17/700,086 Pending US20220217363A1 (en) | 2018-06-05 | 2022-03-21 | Interaction between pairwise average merging candidates and ibc |
US18/528,070 Pending US20240121410A1 (en) | 2018-06-05 | 2023-12-04 | Interaction Between IBC And Affine |
Family Applications Before (4)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US17/005,521 Abandoned US20200396465A1 (en) | 2018-06-05 | 2020-08-28 | Interaction between ibc and affine |
US17/011,157 Active US11202081B2 (en) | 2018-06-05 | 2020-09-03 | Interaction between IBC and BIO |
US17/011,131 Active US11523123B2 (en) | 2018-06-05 | 2020-09-03 | Interaction between IBC and ATMVP |
US17/019,629 Abandoned US20200413048A1 (en) | 2018-06-05 | 2020-09-14 | Interaction between ibc and dmvr |
Family Applications After (4)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US17/201,896 Active US11509915B2 (en) | 2018-06-05 | 2021-03-15 | Interaction between IBC and ATMVP |
US17/529,607 Active US11831884B2 (en) | 2018-06-05 | 2021-11-18 | Interaction between IBC and BIO |
US17/700,086 Pending US20220217363A1 (en) | 2018-06-05 | 2022-03-21 | Interaction between pairwise average merging candidates and ibc |
US18/528,070 Pending US20240121410A1 (en) | 2018-06-05 | 2023-12-04 | Interaction Between IBC And Affine |
Country Status (8)
Country | Link |
---|---|
US (9) | US20200396465A1 (en) |
EP (1) | EP3788787A1 (en) |
JP (3) | JP7104186B2 (en) |
KR (1) | KR20210016581A (en) |
CN (11) | CN110572646B (en) |
GB (4) | GB2588023B (en) |
TW (8) | TWI740155B (en) |
WO (8) | WO2019234600A1 (en) |
Cited By (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US11172196B2 (en) | 2018-09-24 | 2021-11-09 | Beijing Bytedance Network Technology Co., Ltd. | Bi-prediction with weights in video coding and decoding |
US11197003B2 (en) | 2018-06-21 | 2021-12-07 | Beijing Bytedance Network Technology Co., Ltd. | Unified constrains for the merge affine mode and the non-merge affine mode |
US11197007B2 (en) | 2018-06-21 | 2021-12-07 | Beijing Bytedance Network Technology Co., Ltd. | Sub-block MV inheritance between color components |
US11202081B2 (en) | 2018-06-05 | 2021-12-14 | Beijing Bytedance Network Technology Co., Ltd. | Interaction between IBC and BIO |
US11284068B2 (en) | 2018-12-03 | 2022-03-22 | Beijing Bytedance Network Technology Co., Ltd. | Indication method of maximum number of candidates |
WO2023132615A1 (en) * | 2022-01-04 | 2023-07-13 | 현대자동차주식회사 | Video encoding/decoding method and device for constructing merge candidate list by generating pairwise merge candidates |
US11792421B2 (en) | 2018-11-10 | 2023-10-17 | Beijing Bytedance Network Technology Co., Ltd | Rounding in pairwise average candidate calculations |
US11973962B2 (en) | 2018-06-05 | 2024-04-30 | Beijing Bytedance Network Technology Co., Ltd | Interaction between IBC and affine |
Families Citing this family (45)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2019244052A1 (en) | 2018-06-19 | 2019-12-26 | Beijing Bytedance Network Technology Co., Ltd. | Different precisions for different reference list |
KR20240005126A (en) * | 2018-07-17 | 2024-01-11 | 후아웨이 테크놀러지 컴퍼니 리미티드 | Motion model signaling |
CN110891179B (en) | 2018-09-08 | 2023-11-14 | 北京字节跳动网络技术有限公司 | Calculating motion vector predictors |
WO2020054591A1 (en) * | 2018-09-14 | 2020-03-19 | パナソニック インテレクチュアル プロパティ コーポレーション オブ アメリカ | Encoding device, decoding device, encoding method, and decoding method |
KR102635047B1 (en) | 2018-09-19 | 2024-02-07 | 베이징 바이트댄스 네트워크 테크놀로지 컴퍼니, 리미티드 | Syntax reuse for affine modes with adaptive motion vector resolution |
TW202029771A (en) | 2018-09-23 | 2020-08-01 | 大陸商北京字節跳動網絡技術有限公司 | General applications related to affine motion |
CN110944181B (en) | 2018-09-23 | 2023-03-10 | 北京字节跳动网络技术有限公司 | Multiple assumptions for affine models |
TWI821408B (en) | 2018-09-23 | 2023-11-11 | 大陸商北京字節跳動網絡技術有限公司 | Mv planar mode with block level |
US11317099B2 (en) | 2018-10-05 | 2022-04-26 | Tencent America LLC | Method and apparatus for signaling an offset in video coding for intra block copy and/or inter prediction |
WO2020084470A1 (en) | 2018-10-22 | 2020-04-30 | Beijing Bytedance Network Technology Co., Ltd. | Storage of motion parameters with clipping for affine mode |
CN112889269B (en) * | 2018-10-23 | 2023-10-27 | 腾讯美国有限责任公司 | Video decoding method and device |
KR20210089153A (en) | 2018-11-13 | 2021-07-15 | 베이징 바이트댄스 네트워크 테크놀로지 컴퍼니, 리미티드 | History-based motion candidate list construction for in-screen block copying |
CN113170192B (en) | 2018-11-15 | 2023-12-01 | 北京字节跳动网络技术有限公司 | Affine MERGE and MVD |
WO2020098813A1 (en) | 2018-11-16 | 2020-05-22 | Beijing Bytedance Network Technology Co., Ltd. | Usage for history-based affine parameters |
CN113039801B (en) | 2018-11-17 | 2023-12-19 | 北京字节跳动网络技术有限公司 | Construction of Merge with motion vector difference candidates |
WO2020108649A1 (en) | 2018-11-29 | 2020-06-04 | Beijing Bytedance Network Technology Co., Ltd. | Interaction between intra block copy mode and inter prediction tools |
WO2020112620A2 (en) * | 2018-11-29 | 2020-06-04 | Interdigital Vc Holdings, Inc. | Motion vector predictor candidates ordering in merge list |
WO2020125751A1 (en) | 2018-12-21 | 2020-06-25 | Beijing Bytedance Network Technology Co., Ltd. | Information signaling in current picture referencing mode |
CN113170195A (en) | 2018-12-22 | 2021-07-23 | 北京字节跳动网络技术有限公司 | Intra block copy mode with dual tree partitioning |
JP7235877B2 (en) | 2019-01-31 | 2023-03-08 | 北京字節跳動網絡技術有限公司 | Context for Encoding Affine Mode Adaptive Motion Vector Resolution |
CN113396592B (en) | 2019-02-02 | 2023-11-14 | 北京字节跳动网络技术有限公司 | Buffer management for intra block copying in video codec |
WO2020156540A1 (en) | 2019-02-02 | 2020-08-06 | Beijing Bytedance Network Technology Co., Ltd. | Buffer management for intra block copy in video coding |
WO2020164627A1 (en) | 2019-02-17 | 2020-08-20 | Beijing Bytedance Network Technology Co., Ltd. | Motion candidate list construction for intra block copy mode |
WO2020169109A1 (en) | 2019-02-22 | 2020-08-27 | Beijing Bytedance Network Technology Co., Ltd. | Sub-table for history-based affine mode |
JP7405861B2 (en) | 2019-03-01 | 2023-12-26 | 北京字節跳動網絡技術有限公司 | Direction-based prediction for intra block copy in video coding |
CN117640927A (en) | 2019-03-04 | 2024-03-01 | 北京字节跳动网络技术有限公司 | Implementation aspects in intra block replication in video codec |
KR102609947B1 (en) | 2019-04-02 | 2023-12-04 | 베이징 바이트댄스 네트워크 테크놀로지 컴퍼니, 리미티드 | Bidirectional optical flow-based video coding and decoding |
WO2020211867A1 (en) | 2019-04-19 | 2020-10-22 | Beijing Bytedance Network Technology Co., Ltd. | Delta motion vector in prediction refinement with optical flow process |
KR20210152470A (en) | 2019-04-19 | 2021-12-15 | 베이징 바이트댄스 네트워크 테크놀로지 컴퍼니, 리미티드 | Gradient calculation of different motion vector refinements |
CN113711608B (en) | 2019-04-19 | 2023-09-01 | 北京字节跳动网络技术有限公司 | Suitability of predictive refinement procedure with optical flow |
CA3146016A1 (en) | 2019-07-06 | 2021-01-14 | Beijing Bytedance Network Technology Co., Ltd. | Virtual prediction buffer for intra block copy in video coding |
MX2022000110A (en) | 2019-07-10 | 2022-02-10 | Beijing Bytedance Network Tech Co Ltd | Sample identification for intra block copy in video coding. |
CN117579816A (en) | 2019-07-11 | 2024-02-20 | 北京字节跳动网络技术有限公司 | Bit stream consistency constraints for intra block copying in video codec |
WO2021013239A1 (en) | 2019-07-25 | 2021-01-28 | Beijing Bytedance Network Technology Co., Ltd. | Size restriction for intra-block copy virtual buffer |
WO2021013240A1 (en) | 2019-07-25 | 2021-01-28 | Beijing Bytedance Network Technology Co., Ltd. | Mapping restriction for intra-block copy virtual buffer |
CN117579825A (en) | 2019-09-05 | 2024-02-20 | 北京字节跳动网络技术有限公司 | Range constraints for block vectors in intra block copy mode |
JP7323709B2 (en) | 2019-09-09 | 2023-08-08 | 北京字節跳動網絡技術有限公司 | Encoding and decoding intra-block copies |
JP7307274B2 (en) | 2019-09-23 | 2023-07-11 | 北京字節跳動網絡技術有限公司 | Configuring Intra-Block Copy Virtual Buffers Based on Virtual Pipeline Data Units |
CN115362674A (en) | 2020-03-18 | 2022-11-18 | 抖音视界有限公司 | Intra block copy buffer and palette predictor update |
CN116233464B (en) * | 2020-04-08 | 2024-03-19 | 北京达佳互联信息技术有限公司 | Method, apparatus, and non-transitory computer readable storage medium for video encoding |
CN117528069A (en) * | 2020-05-22 | 2024-02-06 | 腾讯科技(深圳)有限公司 | Displacement vector prediction method, device and equipment |
KR20220112984A (en) | 2021-02-05 | 2022-08-12 | 주식회사 엘지에너지솔루션 | Method for adhering of tape for secondary battery |
CN113038131B (en) * | 2021-03-15 | 2023-04-07 | 北京奇艺世纪科技有限公司 | Video encoding method, video encoding device, computer equipment and storage medium |
EP4320860A1 (en) * | 2021-04-09 | 2024-02-14 | InterDigital CE Patent Holdings, SAS | Intra block copy with template matching for video encoding and decoding |
WO2023046127A1 (en) * | 2021-09-25 | 2023-03-30 | Beijing Bytedance Network Technology Co., Ltd. | Method, apparatus, and medium for video processing |
Family Cites Families (217)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH08186825A (en) | 1994-12-28 | 1996-07-16 | Nippon Hoso Kyokai <Nhk> | Moving vector detection method |
KR100624355B1 (en) | 1999-04-26 | 2006-09-18 | 코닌클리케 필립스 일렉트로닉스 엔.브이. | Sub-pixel accurate motion vector estimation and motion-compensated interpolation |
US7382899B2 (en) | 2002-07-31 | 2008-06-03 | Koninklijke Philips Electronics N. V. | System and method for segmenting |
ES2788382T3 (en) | 2002-11-25 | 2020-10-21 | Godo Kaisha Ip Bridge 1 | Method for encoding and decoding B-images in direct mode |
US8064520B2 (en) | 2003-09-07 | 2011-11-22 | Microsoft Corporation | Advanced bi-directional predictive coding of interlaced video |
CN100344163C (en) | 2004-06-16 | 2007-10-17 | 华为技术有限公司 | Video coding-decoding processing method |
CN1777283A (en) | 2004-12-31 | 2006-05-24 | 上海广电(集团)有限公司 | Microblock based video signal coding/decoding method |
US8954943B2 (en) | 2006-01-26 | 2015-02-10 | International Business Machines Corporation | Analyze and reduce number of data reordering operations in SIMD code |
JP4826315B2 (en) | 2006-03-31 | 2011-11-30 | ソニー株式会社 | Image processing apparatus and method, and program |
US8184715B1 (en) | 2007-08-09 | 2012-05-22 | Elemental Technologies, Inc. | Method for efficiently executing video encoding operations on stream processor architectures |
EP2223527A1 (en) * | 2007-12-21 | 2010-09-01 | Telefonaktiebolaget LM Ericsson (publ) | Adaptive intra mode selection |
CN101605255B (en) * | 2008-06-12 | 2011-05-04 | 华为技术有限公司 | Method and device for encoding and decoding video |
US20110002386A1 (en) | 2009-07-06 | 2011-01-06 | Mediatek Singapore Pte. Ltd. | Video encoder and method for performing intra-prediction and video data compression |
JP5234368B2 (en) | 2009-09-30 | 2013-07-10 | ソニー株式会社 | Image processing apparatus and method |
JP2011147049A (en) * | 2010-01-18 | 2011-07-28 | Sony Corp | Image processing apparatus and method, and program |
BR112012019560B1 (en) | 2010-02-05 | 2021-08-24 | Telefonaktiebolaget Lm Ericsson | METHOD FOR MANAGING CANDIDATES FOR PREDICTED MOVEMENT VECTOR, AND, VIDEO ENCODING AND DECODING APPARATUS |
KR101630688B1 (en) | 2010-02-17 | 2016-06-16 | 삼성전자주식회사 | Apparatus for motion estimation and method thereof and image processing apparatus |
CN101895751B (en) * | 2010-07-06 | 2012-02-08 | 北京大学 | Method and device for intra-frame prediction and intra-frame prediction-based encoding/decoding method and system |
US20120287999A1 (en) | 2011-05-11 | 2012-11-15 | Microsoft Corporation | Syntax element prediction in error correction |
US9866859B2 (en) | 2011-06-14 | 2018-01-09 | Texas Instruments Incorporated | Inter-prediction candidate index coding independent of inter-prediction candidate list construction in video coding |
GB201113527D0 (en) | 2011-08-04 | 2011-09-21 | Imagination Tech Ltd | External vectors in a motion estimation system |
CN103891291A (en) | 2011-08-30 | 2014-06-25 | 诺基亚公司 | An apparatus, a method and a computer program for video coding and decoding |
EP3754982B1 (en) * | 2011-09-29 | 2024-05-01 | SHARP Kabushiki Kaisha | Image decoding device, image decoding method, image encoding method and image encoding device for performing bi-prediction to uni-prediction conversion |
JP5768662B2 (en) * | 2011-10-31 | 2015-08-26 | 富士通株式会社 | Moving picture decoding apparatus, moving picture encoding apparatus, moving picture decoding method, moving picture encoding method, moving picture decoding program, and moving picture encoding program |
JP2013098933A (en) | 2011-11-04 | 2013-05-20 | Sony Corp | Image processing device and method |
CA2855027C (en) | 2011-11-08 | 2017-01-24 | Kt Corporation | A technique for encoding and decoding video by interpolating a reference picture block by applying different interpolation tap filters in vertical and horizontal directions to thereference block |
KR20230175325A (en) * | 2011-11-11 | 2023-12-29 | 엘지전자 주식회사 | Method and device for transmitting image information, and decoding method and device using same |
JP5895469B2 (en) | 2011-11-18 | 2016-03-30 | 富士通株式会社 | Video encoding device and video decoding device |
KR20130058524A (en) | 2011-11-25 | 2013-06-04 | 오수미 | Method for generating chroma intra prediction block |
US9451252B2 (en) | 2012-01-14 | 2016-09-20 | Qualcomm Incorporated | Coding parameter sets and NAL unit headers for video coding |
CN110830797B (en) | 2012-01-18 | 2023-09-15 | 韩国电子通信研究院 | Video decoding device, video encoding device and method for transmitting bit stream |
US9503720B2 (en) * | 2012-03-16 | 2016-11-22 | Qualcomm Incorporated | Motion vector coding and bi-prediction in HEVC and its extensions |
US9325991B2 (en) | 2012-04-11 | 2016-04-26 | Qualcomm Incorporated | Motion vector rounding |
EP2837186B1 (en) | 2012-04-12 | 2018-08-22 | HFI Innovation Inc. | Method and apparatus for block partition of chroma subsampling formats |
PL2847996T3 (en) * | 2012-05-09 | 2021-04-19 | Sun Patent Trust | Method of performing motion vector prediction, encoding and decoding methods, and apparatuses thereof |
US20130329007A1 (en) | 2012-06-06 | 2013-12-12 | Qualcomm Incorporated | Redundancy removal for advanced motion vector prediction (amvp) in three-dimensional (3d) video coding |
CN104488272B (en) | 2012-07-02 | 2018-03-16 | 三星电子株式会社 | It is used to encode video or the method and apparatus of the motion vector for decoding video for predicting |
KR102062506B1 (en) | 2012-08-29 | 2020-01-03 | 브이아이디 스케일, 인크. | Method and apparatus of motion vector prediction for scalable video coding |
US9491461B2 (en) | 2012-09-27 | 2016-11-08 | Qualcomm Incorporated | Scalable extensions to HEVC and temporal motion vector prediction |
AU2012232992A1 (en) | 2012-09-28 | 2014-04-17 | Canon Kabushiki Kaisha | Method, apparatus and system for encoding and decoding the transform units of a coding unit |
JP2015530805A (en) | 2012-09-28 | 2015-10-15 | インテル コーポレイション | Inter-layer pixel sample prediction |
CN105052134B (en) * | 2012-10-01 | 2019-09-03 | Ge视频压缩有限责任公司 | A kind of telescopic video encoding and decoding method and computer readable storage medium |
US9615089B2 (en) * | 2012-12-26 | 2017-04-04 | Samsung Electronics Co., Ltd. | Method of encoding and decoding multiview video sequence based on adaptive compensation of local illumination mismatch in inter-frame prediction |
US9294777B2 (en) | 2012-12-30 | 2016-03-22 | Qualcomm Incorporated | Progressive refinement with temporal scalability support in video coding |
US9674542B2 (en) | 2013-01-02 | 2017-06-06 | Qualcomm Incorporated | Motion vector prediction for video coding |
US20140254678A1 (en) | 2013-03-11 | 2014-09-11 | Aleksandar Beric | Motion estimation using hierarchical phase plane correlation and block matching |
US9521425B2 (en) | 2013-03-19 | 2016-12-13 | Qualcomm Incorporated | Disparity vector derivation in 3D video coding for skip and direct modes |
US9491460B2 (en) | 2013-03-29 | 2016-11-08 | Qualcomm Incorporated | Bandwidth reduction for video coding prediction |
WO2014166116A1 (en) | 2013-04-12 | 2014-10-16 | Mediatek Inc. | Direct simplified depth coding |
CA2909550C (en) | 2013-07-15 | 2018-04-24 | Mediatek Singapore Pte. Ltd. | Method of disparity derived depth coding in 3d video coding |
US9628795B2 (en) | 2013-07-17 | 2017-04-18 | Qualcomm Incorporated | Block identification using disparity vector in video coding |
WO2015006967A1 (en) | 2013-07-19 | 2015-01-22 | Mediatek Singapore Pte. Ltd. | Simplified view synthesis prediction for 3d video coding |
CN104488271B (en) | 2013-07-26 | 2019-05-07 | 北京大学深圳研究生院 | A kind of more hypothesis motion compensation process based on P frame |
WO2015010319A1 (en) | 2013-07-26 | 2015-01-29 | 北京大学深圳研究生院 | P frame-based multi-hypothesis motion compensation encoding method |
AU2013228045A1 (en) * | 2013-09-13 | 2015-04-02 | Canon Kabushiki Kaisha | Method, apparatus and system for encoding and decoding video data |
US9667996B2 (en) | 2013-09-26 | 2017-05-30 | Qualcomm Incorporated | Sub-prediction unit (PU) based temporal motion vector prediction in HEVC and sub-PU design in 3D-HEVC |
US9762927B2 (en) | 2013-09-26 | 2017-09-12 | Qualcomm Incorporated | Sub-prediction unit (PU) based temporal motion vector prediction in HEVC and sub-PU design in 3D-HEVC |
CN103561263B (en) * | 2013-11-06 | 2016-08-24 | 北京牡丹电子集团有限责任公司数字电视技术中心 | Based on motion vector constraint and the motion prediction compensation method of weighted motion vector |
CN105723713A (en) | 2013-12-19 | 2016-06-29 | 夏普株式会社 | Merge-candidate derivation device, image decoding device, and image encoding device |
TWI536811B (en) * | 2013-12-27 | 2016-06-01 | 財團法人工業技術研究院 | Method and system for image processing, decoding method, encoder and decoder |
RU2669005C2 (en) * | 2014-01-03 | 2018-10-05 | МАЙКРОСОФТ ТЕКНОЛОДЖИ ЛАЙСЕНСИНГ, ЭлЭлСи | Block vector prediction in video and image coding/decoding |
WO2015109598A1 (en) | 2014-01-27 | 2015-07-30 | Mediatek Singapore Pte. Ltd. | Methods for motion parameter hole filling |
CN108632629B9 (en) | 2014-03-19 | 2021-06-15 | 株式会社Kt | Method of generating merge candidate list for multi-view video signal and decoding apparatus |
KR101863487B1 (en) | 2014-05-06 | 2018-05-31 | 에이치에프아이 이노베이션 인크. | Method of block vector prediction for intra block copy mode coding |
US10327001B2 (en) * | 2014-06-19 | 2019-06-18 | Qualcomm Incorporated | Systems and methods for intra-block copy |
KR102311815B1 (en) | 2014-06-19 | 2021-10-13 | 마이크로소프트 테크놀로지 라이센싱, 엘엘씨 | Unified intra block copy and inter prediction modes |
US20150373362A1 (en) * | 2014-06-19 | 2015-12-24 | Qualcomm Incorporated | Deblocking filter design for intra block copy |
US20150373350A1 (en) | 2014-06-20 | 2015-12-24 | Qualcomm Incorporated | Temporal motion vector prediction (tmvp) indication in multi-layer codecs |
WO2016008157A1 (en) | 2014-07-18 | 2016-01-21 | Mediatek Singapore Pte. Ltd. | Methods for motion compensation using high order motion model |
CN105282558B (en) * | 2014-07-18 | 2018-06-15 | 清华大学 | Pixel prediction method, coding method, coding/decoding method and its device in frame |
US10412387B2 (en) * | 2014-08-22 | 2019-09-10 | Qualcomm Incorporated | Unified intra-block copy and inter-prediction |
WO2016034058A1 (en) * | 2014-09-01 | 2016-03-10 | Mediatek Inc. | Method of intra picture block copy for screen content and video coding |
EP3175618A1 (en) | 2014-09-11 | 2017-06-07 | Euclid Discoveries, LLC | Perceptual optimization for model-based video encoding |
EP3198872A1 (en) * | 2014-09-26 | 2017-08-02 | VID SCALE, Inc. | Intra block copy coding with temporal block vector prediction |
US9918105B2 (en) | 2014-10-07 | 2018-03-13 | Qualcomm Incorporated | Intra BC and inter unification |
CN111741308B (en) * | 2014-10-31 | 2024-03-19 | 三星电子株式会社 | Method and apparatus for encoding/decoding motion vector |
SG11201703454XA (en) | 2014-11-18 | 2017-06-29 | Mediatek Inc | Method of bi-prediction video coding based on motion vectors from uni-prediction and merge candidate |
WO2016090568A1 (en) | 2014-12-10 | 2016-06-16 | Mediatek Singapore Pte. Ltd. | Binary tree block partitioning structure |
US11477477B2 (en) * | 2015-01-26 | 2022-10-18 | Qualcomm Incorporated | Sub-prediction unit based advanced temporal motion vector prediction |
WO2016123388A1 (en) | 2015-01-29 | 2016-08-04 | Vid Scale, Inc. | Palette coding modes and palette flipping |
JP2018050091A (en) | 2015-02-02 | 2018-03-29 | シャープ株式会社 | Image decoder, image encoder, and prediction vector conducting device |
WO2016138513A1 (en) * | 2015-02-27 | 2016-09-01 | Arris Enterprises, Inc. | Modification of unification of intra block copy and inter signaling related syntax and semantics |
US10958927B2 (en) * | 2015-03-27 | 2021-03-23 | Qualcomm Incorporated | Motion information derivation mode determination in video coding |
WO2016165069A1 (en) * | 2015-04-14 | 2016-10-20 | Mediatek Singapore Pte. Ltd. | Advanced temporal motion vector prediction in video coding |
US10511834B2 (en) | 2015-04-29 | 2019-12-17 | Hfi Innovation Inc. | Method and apparatus for Intra Block Copy reference list construction |
US20160337662A1 (en) * | 2015-05-11 | 2016-11-17 | Qualcomm Incorporated | Storage and signaling resolutions of motion vectors |
CN109005407B (en) | 2015-05-15 | 2023-09-01 | 华为技术有限公司 | Video image encoding and decoding method, encoding device and decoding device |
CN107615765A (en) * | 2015-06-03 | 2018-01-19 | 联发科技股份有限公司 | The method and apparatus of resource-sharing in video coding and decoding system between intra block replication mode and inter-frame forecast mode |
GB2539213A (en) * | 2015-06-08 | 2016-12-14 | Canon Kk | Schemes for handling an AMVP flag when implementing intra block copy coding mode |
EP4040791A1 (en) * | 2015-06-08 | 2022-08-10 | Vid Scale, Inc. | Intra block copy mode for screen content coding |
US10148977B2 (en) * | 2015-06-16 | 2018-12-04 | Futurewei Technologies, Inc. | Advanced coding techniques for high efficiency video coding (HEVC) screen content coding (SCC) extensions |
CN112887711B (en) * | 2015-07-27 | 2023-06-30 | 寰发股份有限公司 | Video encoding and decoding method and system |
CN107925758B (en) | 2015-08-04 | 2022-01-25 | Lg 电子株式会社 | Inter-frame prediction method and apparatus in video coding system |
EP3341913B1 (en) | 2015-08-25 | 2019-06-26 | InterDigital VC Holdings, Inc. | Inverse tone mapping based on luminance zones |
EP3332551A4 (en) * | 2015-09-02 | 2019-01-16 | MediaTek Inc. | Method and apparatus of motion compensation for video coding based on bi prediction optical flow techniques |
WO2017041271A1 (en) | 2015-09-10 | 2017-03-16 | Mediatek Singapore Pte. Ltd. | Efficient context modeling for coding a block of data |
US10375413B2 (en) * | 2015-09-28 | 2019-08-06 | Qualcomm Incorporated | Bi-directional optical flow for video coding |
CN108965871B (en) | 2015-09-29 | 2023-11-10 | 华为技术有限公司 | Image prediction method and device |
WO2017076221A1 (en) | 2015-11-05 | 2017-05-11 | Mediatek Inc. | Method and apparatus of inter prediction using average motion vector for video coding |
CN105306944B (en) | 2015-11-30 | 2018-07-06 | 哈尔滨工业大学 | Chromatic component Forecasting Methodology in hybrid video coding standard |
WO2017118409A1 (en) | 2016-01-07 | 2017-07-13 | Mediatek Inc. | Method and apparatus for affine merge mode prediction for video coding system |
CN105678808A (en) | 2016-01-08 | 2016-06-15 | 浙江宇视科技有限公司 | Moving object tracking method and device |
US9955186B2 (en) | 2016-01-11 | 2018-04-24 | Qualcomm Incorporated | Block size decision for video coding |
WO2017130696A1 (en) | 2016-01-29 | 2017-08-03 | シャープ株式会社 | Prediction image generation device, moving image decoding device, and moving image encoding device |
EP4138392A1 (en) * | 2016-02-05 | 2023-02-22 | HFI Innovation Inc. | Method and apparatus of motion compensation based on bi-directional optical flow techniques for video coding |
US10368083B2 (en) | 2016-02-15 | 2019-07-30 | Qualcomm Incorporated | Picture order count based motion vector pruning |
EP3417618A4 (en) | 2016-02-17 | 2019-07-24 | Telefonaktiebolaget LM Ericsson (publ) | Methods and devices for encoding and decoding video pictures |
JP6379186B2 (en) | 2016-02-17 | 2018-08-22 | テレフオンアクチーボラゲット エルエム エリクソン(パブル) | Method and apparatus for encoding and decoding video pictures |
WO2017143467A1 (en) | 2016-02-22 | 2017-08-31 | Mediatek Singapore Pte. Ltd. | Localized luma mode prediction inheritance for chroma coding |
WO2017156669A1 (en) | 2016-03-14 | 2017-09-21 | Mediatek Singapore Pte. Ltd. | Methods for motion vector storage in video coding |
CN114449288A (en) | 2016-03-16 | 2022-05-06 | 联发科技股份有限公司 | Method and apparatus for pattern-based motion vector derivation for video coding |
US11223852B2 (en) | 2016-03-21 | 2022-01-11 | Qualcomm Incorporated | Coding video data using a two-level multi-type-tree framework |
US10567759B2 (en) | 2016-03-21 | 2020-02-18 | Qualcomm Incorporated | Using luma information for chroma prediction with separate luma-chroma framework in video coding |
WO2017164297A1 (en) | 2016-03-25 | 2017-09-28 | パナソニックIpマネジメント株式会社 | Method and device for encoding of video using signal dependent-type adaptive quantization and decoding |
US11095898B2 (en) | 2016-03-28 | 2021-08-17 | Lg Electronics Inc. | Inter-prediction mode based image processing method, and apparatus therefor |
CN109314785B (en) | 2016-04-08 | 2023-06-30 | 韩国电子通信研究院 | Method and apparatus for deriving motion prediction information |
EP3439303B1 (en) | 2016-04-28 | 2020-12-30 | LG Electronics Inc. -1- | Inter prediction mode-based image processing method and apparatus therefor |
WO2017192898A1 (en) | 2016-05-05 | 2017-11-09 | Vid Scale, Inc. | Control-point based intra direction representation for intra coding |
US20170332000A1 (en) | 2016-05-10 | 2017-11-16 | Lytro, Inc. | High dynamic range light-field imaging |
KR102379874B1 (en) | 2016-05-13 | 2022-03-30 | 브이아이디 스케일, 인크. | Generalized multi-hypothesis prediction system and method for video coding |
US10560718B2 (en) * | 2016-05-13 | 2020-02-11 | Qualcomm Incorporated | Merge candidates for motion vector prediction for video coding |
CN109792535B (en) * | 2016-05-13 | 2023-03-28 | 夏普株式会社 | Predictive image generation device, moving image decoding device, and moving image encoding device |
US10560712B2 (en) | 2016-05-16 | 2020-02-11 | Qualcomm Incorporated | Affine motion prediction for video coding |
CA3024900C (en) * | 2016-05-17 | 2021-02-16 | Arris Enterprises Llc | Template matching for jvet intra prediction |
US20170339405A1 (en) * | 2016-05-20 | 2017-11-23 | Arris Enterprises Llc | System and method for intra coding |
US20200322599A1 (en) * | 2016-05-28 | 2020-10-08 | Mediatek Inc. | Method and apparatus of current picture referencing for video coding using affine motion compensation |
EP3482566B1 (en) | 2016-07-08 | 2024-02-28 | InterDigital Madison Patent Holdings, SAS | Systems and methods for region-of-interest tone remapping |
US10368107B2 (en) | 2016-08-15 | 2019-07-30 | Qualcomm Incorporated | Intra video coding using a decoupled tree structure |
US10326986B2 (en) | 2016-08-15 | 2019-06-18 | Qualcomm Incorporated | Intra video coding using a decoupled tree structure |
US10659802B2 (en) | 2016-08-15 | 2020-05-19 | Nokia Technologies Oy | Video encoding and decoding |
WO2018047668A1 (en) * | 2016-09-12 | 2018-03-15 | ソニー株式会社 | Image processing device and image processing method |
WO2018049594A1 (en) | 2016-09-14 | 2018-03-22 | Mediatek Inc. | Methods of encoder decision for quad-tree plus binary tree structure |
US11095892B2 (en) | 2016-09-20 | 2021-08-17 | Kt Corporation | Method and apparatus for processing video signal |
US10778999B2 (en) | 2016-09-30 | 2020-09-15 | Qualcomm Incorporated | Frame rate up-conversion coding mode with affine motion model |
EP3520402A4 (en) | 2016-10-03 | 2019-09-18 | Sharp Kabushiki Kaisha | Systems and methods for applying deblocking filters to reconstructed video data |
US10448010B2 (en) | 2016-10-05 | 2019-10-15 | Qualcomm Incorporated | Motion vector prediction for affine motion models in video coding |
WO2018070152A1 (en) | 2016-10-10 | 2018-04-19 | Sharp Kabushiki Kaisha | Systems and methods for performing motion compensation for coding of video data |
US10880546B2 (en) | 2016-10-11 | 2020-12-29 | Lg Electronics Inc. | Method and apparatus for deriving intra prediction mode for chroma component |
US10750190B2 (en) | 2016-10-11 | 2020-08-18 | Lg Electronics Inc. | Video decoding method and device in video coding system |
US20180109810A1 (en) * | 2016-10-17 | 2018-04-19 | Mediatek Inc. | Method and Apparatus for Reference Picture Generation and Management in 3D Video Compression |
WO2018097692A2 (en) * | 2016-11-28 | 2018-05-31 | 한국전자통신연구원 | Method and apparatus for encoding/decoding image, and recording medium in which bit stream is stored |
KR102283517B1 (en) | 2016-11-28 | 2021-07-29 | 한국전자통신연구원 | Method and apparatus for encoding/decoding image and recording medium for storing bitstream |
US20200021837A1 (en) | 2016-12-16 | 2020-01-16 | Sharp Kabushiki Kaisha | Video decoding apparatus and video coding apparatus |
US10750203B2 (en) | 2016-12-22 | 2020-08-18 | Mediatek Inc. | Method and apparatus of adaptive bi-prediction for video coding |
US10911761B2 (en) | 2016-12-27 | 2021-02-02 | Mediatek Inc. | Method and apparatus of bilateral template MV refinement for video coding |
US10681370B2 (en) | 2016-12-29 | 2020-06-09 | Qualcomm Incorporated | Motion vector generation for affine motion model for video coding |
US20190335170A1 (en) | 2017-01-03 | 2019-10-31 | Lg Electronics Inc. | Method and apparatus for processing video signal by means of affine prediction |
WO2018128379A1 (en) | 2017-01-03 | 2018-07-12 | 엘지전자(주) | Method and device for processing video signal by means of affine prediction |
US10931969B2 (en) | 2017-01-04 | 2021-02-23 | Qualcomm Incorporated | Motion vector reconstructions for bi-directional optical flow (BIO) |
US20180199057A1 (en) | 2017-01-12 | 2018-07-12 | Mediatek Inc. | Method and Apparatus of Candidate Skipping for Predictor Refinement in Video Coding |
US10701366B2 (en) | 2017-02-21 | 2020-06-30 | Qualcomm Incorporated | Deriving motion vector information at a video decoder |
US10523964B2 (en) | 2017-03-13 | 2019-12-31 | Qualcomm Incorporated | Inter prediction refinement based on bi-directional optical flow (BIO) |
US10701390B2 (en) | 2017-03-14 | 2020-06-30 | Qualcomm Incorporated | Affine motion information derivation |
CN117425006A (en) | 2017-03-22 | 2024-01-19 | 韩国电子通信研究院 | Prediction method and apparatus using reference block |
US10701391B2 (en) | 2017-03-23 | 2020-06-30 | Qualcomm Incorporated | Motion vector difference (MVD) prediction |
US10440396B2 (en) | 2017-03-28 | 2019-10-08 | Qualcomm Incorporated | Filter information sharing among color components |
US10542264B2 (en) | 2017-04-04 | 2020-01-21 | Arris Enterprises Llc | Memory reduction implementation for weighted angular prediction |
US10873760B2 (en) | 2017-04-07 | 2020-12-22 | Futurewei Technologies, Inc. | Motion vector (MV) constraints and transformation constraints in video coding |
US10805630B2 (en) | 2017-04-28 | 2020-10-13 | Qualcomm Incorporated | Gradient based matching for motion search and derivation |
US20180332298A1 (en) | 2017-05-10 | 2018-11-15 | Futurewei Technologies, Inc. | Bidirectional Prediction In Video Compression |
CN116866586A (en) * | 2017-05-17 | 2023-10-10 | 株式会社Kt | Method for decoding image and device for storing compressed video data |
US10904565B2 (en) | 2017-06-23 | 2021-01-26 | Qualcomm Incorporated | Memory-bandwidth-efficient design for bi-directional optical flow (BIO) |
RU2770185C2 (en) | 2017-06-26 | 2022-04-14 | ИНТЕРДИДЖИТАЛ ВиСи ХОЛДИНГЗ, ИНК. | Set of predictor candidates for motion compensation |
US11184636B2 (en) | 2017-06-28 | 2021-11-23 | Sharp Kabushiki Kaisha | Video encoding device and video decoding device |
US10477237B2 (en) | 2017-06-28 | 2019-11-12 | Futurewei Technologies, Inc. | Decoder side motion vector refinement in video coding |
US11172203B2 (en) | 2017-08-08 | 2021-11-09 | Mediatek Inc. | Intra merge prediction |
US10880573B2 (en) | 2017-08-15 | 2020-12-29 | Google Llc | Dynamic motion vector referencing for video coding |
WO2019050115A1 (en) | 2017-09-05 | 2019-03-14 | 엘지전자(주) | Inter prediction mode based image processing method and apparatus therefor |
JP2021005741A (en) | 2017-09-14 | 2021-01-14 | シャープ株式会社 | Image coding device and image decoding device |
KR101984687B1 (en) | 2017-09-21 | 2019-05-31 | 한국해양과학기술원 | Mooring device of floating marine structure for avoid ship collision and operation method thereof and installing method thereof |
US10785494B2 (en) | 2017-10-11 | 2020-09-22 | Qualcomm Incorporated | Low-complexity design for FRUC |
CN109963155B (en) | 2017-12-23 | 2023-06-06 | 华为技术有限公司 | Prediction method and device for motion information of image block and coder-decoder |
JP7125486B2 (en) | 2018-01-16 | 2022-08-24 | ヴィド スケール インコーポレイテッド | Motion-compensated bi-prediction based on local illumination compensation |
US10757417B2 (en) | 2018-01-20 | 2020-08-25 | Qualcomm Incorporated | Affine motion compensation in video coding |
US10687071B2 (en) | 2018-02-05 | 2020-06-16 | Tencent America LLC | Method and apparatus for video coding |
US11012715B2 (en) * | 2018-02-08 | 2021-05-18 | Qualcomm Incorporated | Intra block copy for video coding |
EP3741121A1 (en) | 2018-02-14 | 2020-11-25 | Huawei Technologies Co., Ltd. | Adaptive interpolation filter |
US10708592B2 (en) | 2018-04-02 | 2020-07-07 | Qualcomm Incorporated | Deblocking filter for video coding and processing |
US20190306502A1 (en) | 2018-04-02 | 2019-10-03 | Qualcomm Incorporated | System and method for improved adaptive loop filtering |
US10779002B2 (en) | 2018-04-17 | 2020-09-15 | Qualcomm Incorporated | Limitation of the MVP derivation based on decoder-side motion vector derivation |
US20190320181A1 (en) | 2018-04-17 | 2019-10-17 | Qualcomm Incorporated | Generation of motion vector predictors from multiple neighboring blocks in video coding |
US20190364295A1 (en) | 2018-05-25 | 2019-11-28 | Tencent America LLC | Method and apparatus for video coding |
US10986340B2 (en) * | 2018-06-01 | 2021-04-20 | Qualcomm Incorporated | Coding adaptive multiple transform information for video coding |
US11109025B2 (en) * | 2018-06-04 | 2021-08-31 | Tencent America LLC | Method and apparatus for sub-block based temporal motion vector prediction |
WO2019234600A1 (en) | 2018-06-05 | 2019-12-12 | Beijing Bytedance Network Technology Co., Ltd. | Interaction between pairwise average merging candidates and intra-block copy (ibc) |
JP7096373B2 (en) | 2018-06-07 | 2022-07-05 | 北京字節跳動網絡技術有限公司 | Partial cost calculation |
US11303923B2 (en) | 2018-06-15 | 2022-04-12 | Intel Corporation | Affine motion compensation for current picture referencing |
WO2019244052A1 (en) | 2018-06-19 | 2019-12-26 | Beijing Bytedance Network Technology Co., Ltd. | Different precisions for different reference list |
CN110636298B (en) | 2018-06-21 | 2022-09-13 | 北京字节跳动网络技术有限公司 | Unified constraints for Merge affine mode and non-Merge affine mode |
GB2589223B (en) | 2018-06-21 | 2023-01-25 | Beijing Bytedance Network Tech Co Ltd | Component-dependent sub-block dividing |
TWI747000B (en) | 2018-06-29 | 2021-11-21 | 大陸商北京字節跳動網絡技術有限公司 | Virtual merge candidates |
TWI719519B (en) | 2018-07-02 | 2021-02-21 | 大陸商北京字節跳動網絡技術有限公司 | Block size restrictions for dmvr |
US11606575B2 (en) | 2018-07-10 | 2023-03-14 | Qualcomm Incorporated | Multiple history based non-adjacent MVPs for wavefront processing of video coding |
US10491902B1 (en) | 2018-07-16 | 2019-11-26 | Tencent America LLC | Method and apparatus for history-based motion vector prediction |
US10440378B1 (en) | 2018-07-17 | 2019-10-08 | Tencent America LLC | Method and apparatus for history-based motion vector prediction with parallel processing |
US10362330B1 (en) | 2018-07-30 | 2019-07-23 | Tencent America LLC | Combining history-based motion vector prediction and non-adjacent merge prediction |
CN110809159B (en) | 2018-08-04 | 2022-06-07 | 北京字节跳动网络技术有限公司 | Clipping of updated or derived MVs |
US11336914B2 (en) | 2018-08-16 | 2022-05-17 | Qualcomm Incorporated | History-based candidate list with classification |
KR102635047B1 (en) | 2018-09-19 | 2024-02-07 | 베이징 바이트댄스 네트워크 테크놀로지 컴퍼니, 리미티드 | Syntax reuse for affine modes with adaptive motion vector resolution |
US11212550B2 (en) | 2018-09-21 | 2021-12-28 | Qualcomm Incorporated | History-based motion vector prediction for affine mode |
KR102616766B1 (en) | 2018-09-22 | 2023-12-27 | 엘지전자 주식회사 | Method and apparatus for processing video signals based on inter prediction |
WO2020058961A1 (en) | 2018-09-23 | 2020-03-26 | Beijing Bytedance Network Technology Co., Ltd. | Modification of motion vector with adaptive motion vector resolution |
CN110944170B (en) | 2018-09-24 | 2023-05-02 | 北京字节跳动网络技术有限公司 | Extended Merge prediction |
US11051034B2 (en) | 2018-10-08 | 2021-06-29 | Qualcomm Incorporated | History-based motion vector predictor |
US11284066B2 (en) | 2018-10-10 | 2022-03-22 | Tencent America LLC | Method and apparatus for intra block copy in intra-inter blending mode and triangle prediction unit mode |
US11032541B2 (en) | 2018-10-22 | 2021-06-08 | Tencent America LLC | Method and apparatus for video coding |
WO2020084462A1 (en) | 2018-10-22 | 2020-04-30 | Beijing Bytedance Network Technology Co., Ltd. | Restrictions on decoder side motion vector derivation based on block size |
CN117880513A (en) | 2018-10-22 | 2024-04-12 | 北京字节跳动网络技术有限公司 | Restriction of decoder-side motion vector derivation based on codec information |
CN111357294B (en) | 2018-10-23 | 2022-12-30 | 北京字节跳动网络技术有限公司 | Reduced entropy coding and decoding based on motion information lists of sub-blocks |
JP7277579B2 (en) | 2018-11-02 | 2023-05-19 | 北京字節跳動網絡技術有限公司 | Table maintenance for HMVP candidate storage |
EP4300965A3 (en) | 2018-11-05 | 2024-01-17 | Beijing Bytedance Network Technology Co., Ltd. | Interpolation for inter prediction with refinement |
WO2020094150A1 (en) | 2018-11-10 | 2020-05-14 | Beijing Bytedance Network Technology Co., Ltd. | Rounding in current picture referencing |
CN113170170A (en) | 2018-11-22 | 2021-07-23 | 北京字节跳动网络技术有限公司 | Hybrid method for inter-frame prediction with geometric partitioning |
US11032574B2 (en) | 2018-12-31 | 2021-06-08 | Tencent America LLC | Method and apparatus for video coding |
US11122260B2 (en) | 2019-02-22 | 2021-09-14 | Mediatek Inc. | Method and apparatus of Merge list generation for Intra Block Copy mode |
US11394999B2 (en) | 2019-03-11 | 2022-07-19 | Alibaba Group Holding Limited | Method, device, and system for determining prediction weight for merge mode |
AU2020237079B2 (en) | 2019-03-12 | 2023-05-11 | Tencent America LLC | Method and apparatus for video encoding or decoding |
-
2019
- 2019-06-04 WO PCT/IB2019/054604 patent/WO2019234600A1/en active Application Filing
- 2019-06-04 GB GB2018447.9A patent/GB2588023B/en active Active
- 2019-06-04 WO PCT/IB2019/054612 patent/WO2019234607A1/en active Application Filing
- 2019-06-04 KR KR1020207037940A patent/KR20210016581A/en not_active Application Discontinuation
- 2019-06-04 GB GB2018254.9A patent/GB2588003B/en active Active
- 2019-06-04 JP JP2020568474A patent/JP7104186B2/en active Active
- 2019-06-04 WO PCT/IB2019/054614 patent/WO2019234609A1/en active Application Filing
- 2019-06-04 EP EP19736806.1A patent/EP3788787A1/en active Pending
- 2019-06-04 WO PCT/IB2019/054611 patent/WO2019234606A1/en unknown
- 2019-06-04 WO PCT/IB2019/054602 patent/WO2019234598A1/en active Application Filing
- 2019-06-04 GB GB2018255.6A patent/GB2588004B/en active Active
- 2019-06-05 TW TW108119607A patent/TWI740155B/en active
- 2019-06-05 GB GB2018465.1A patent/GB2588317B/en active Active
- 2019-06-05 WO PCT/IB2019/054654 patent/WO2019234639A1/en active Application Filing
- 2019-06-05 TW TW108119603A patent/TWI708504B/en active
- 2019-06-05 CN CN201910487910.XA patent/CN110572646B/en active Active
- 2019-06-05 CN CN201910488488.XA patent/CN110572647B/en active Active
- 2019-06-05 TW TW108119572A patent/TWI704802B/en active
- 2019-06-05 TW TW108119583A patent/TWI750477B/en active
- 2019-06-05 CN CN202210923862.6A patent/CN115529458A/en active Pending
- 2019-06-05 CN CN201910487913.3A patent/CN110572669B/en active Active
- 2019-06-05 CN CN201910487926.0A patent/CN110572670B/en active Active
- 2019-06-05 CN CN201910488487.5A patent/CN110572671B/en active Active
- 2019-06-05 CN CN201910488491.1A patent/CN110572648B/en active Active
- 2019-06-05 WO PCT/IB2019/054650 patent/WO2019234636A1/en active Application Filing
- 2019-06-05 CN CN202210483116.XA patent/CN114666605A/en active Pending
- 2019-06-05 WO PCT/IB2019/054652 patent/WO2019234638A1/en active Application Filing
- 2019-06-05 CN CN201910487907.8A patent/CN110572668A/en active Pending
- 2019-06-05 TW TW108119586A patent/TWI715993B/en active
- 2019-06-05 TW TW108119598A patent/TWI708503B/en active
- 2019-06-05 CN CN201910487921.8A patent/CN110572658B/en active Active
- 2019-06-05 TW TW108119601A patent/TWI725445B/en active
- 2019-06-05 CN CN202210869850.XA patent/CN115442612A/en active Pending
- 2019-06-05 TW TW108119573A patent/TWI736902B/en active
-
2020
- 2020-08-28 US US17/005,521 patent/US20200396465A1/en not_active Abandoned
- 2020-09-03 US US17/011,157 patent/US11202081B2/en active Active
- 2020-09-03 US US17/011,131 patent/US11523123B2/en active Active
- 2020-09-14 US US17/019,629 patent/US20200413048A1/en not_active Abandoned
- 2020-09-24 US US17/031,451 patent/US20210006780A1/en not_active Abandoned
-
2021
- 2021-03-15 US US17/201,896 patent/US11509915B2/en active Active
- 2021-11-18 US US17/529,607 patent/US11831884B2/en active Active
-
2022
- 2022-03-21 US US17/700,086 patent/US20220217363A1/en active Pending
- 2022-07-07 JP JP2022109540A patent/JP7361845B2/en active Active
-
2023
- 2023-10-03 JP JP2023171770A patent/JP2023175898A/en active Pending
- 2023-12-04 US US18/528,070 patent/US20240121410A1/en active Pending
Cited By (18)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US11831884B2 (en) | 2018-06-05 | 2023-11-28 | Beijing Bytedance Network Technology Co., Ltd | Interaction between IBC and BIO |
US11202081B2 (en) | 2018-06-05 | 2021-12-14 | Beijing Bytedance Network Technology Co., Ltd. | Interaction between IBC and BIO |
US11973962B2 (en) | 2018-06-05 | 2024-04-30 | Beijing Bytedance Network Technology Co., Ltd | Interaction between IBC and affine |
US11509915B2 (en) | 2018-06-05 | 2022-11-22 | Beijing Bytedance Network Technology Co., Ltd. | Interaction between IBC and ATMVP |
US11523123B2 (en) | 2018-06-05 | 2022-12-06 | Beijing Bytedance Network Technology Co., Ltd. | Interaction between IBC and ATMVP |
US11197003B2 (en) | 2018-06-21 | 2021-12-07 | Beijing Bytedance Network Technology Co., Ltd. | Unified constrains for the merge affine mode and the non-merge affine mode |
US11197007B2 (en) | 2018-06-21 | 2021-12-07 | Beijing Bytedance Network Technology Co., Ltd. | Sub-block MV inheritance between color components |
US11968377B2 (en) | 2018-06-21 | 2024-04-23 | Beijing Bytedance Network Technology Co., Ltd | Unified constrains for the merge affine mode and the non-merge affine mode |
US11477463B2 (en) | 2018-06-21 | 2022-10-18 | Beijing Bytedance Network Technology Co., Ltd. | Component-dependent sub-block dividing |
US11895306B2 (en) | 2018-06-21 | 2024-02-06 | Beijing Bytedance Network Technology Co., Ltd | Component-dependent sub-block dividing |
US11659192B2 (en) | 2018-06-21 | 2023-05-23 | Beijing Bytedance Network Technology Co., Ltd | Sub-block MV inheritance between color components |
US11202065B2 (en) | 2018-09-24 | 2021-12-14 | Beijing Bytedance Network Technology Co., Ltd. | Extended merge prediction |
US11616945B2 (en) | 2018-09-24 | 2023-03-28 | Beijing Bytedance Network Technology Co., Ltd. | Simplified history based motion vector prediction |
US11172196B2 (en) | 2018-09-24 | 2021-11-09 | Beijing Bytedance Network Technology Co., Ltd. | Bi-prediction with weights in video coding and decoding |
US11792421B2 (en) | 2018-11-10 | 2023-10-17 | Beijing Bytedance Network Technology Co., Ltd | Rounding in pairwise average candidate calculations |
US11856185B2 (en) | 2018-12-03 | 2023-12-26 | Beijing Bytedance Network Technology Co., Ltd | Pruning method in different prediction mode |
US11284068B2 (en) | 2018-12-03 | 2022-03-22 | Beijing Bytedance Network Technology Co., Ltd. | Indication method of maximum number of candidates |
WO2023132615A1 (en) * | 2022-01-04 | 2023-07-13 | 현대자동차주식회사 | Video encoding/decoding method and device for constructing merge candidate list by generating pairwise merge candidates |
Also Published As
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US20210006780A1 (en) | Interaction between pairwise average merging candidates and ibc | |
US11973962B2 (en) | Interaction between IBC and affine |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
AS | Assignment |
Owner name: BYTEDANCE INC., CALIFORNIA Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNORS:ZHANG, KAI;ZHANG, LI;REEL/FRAME:053877/0700 Effective date: 20190513 Owner name: BEIJING BYTEDANCE NETWORK TECHNOLOGY CO., LTD., CHINA Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNORS:LIU, HONGBIN;WANG, YUE;REEL/FRAME:053877/0743 Effective date: 20190515 |
|
STPP | Information on status: patent application and granting procedure in general |
Free format text: RESPONSE TO NON-FINAL OFFICE ACTION ENTERED AND FORWARDED TO EXAMINER |
|
STPP | Information on status: patent application and granting procedure in general |
Free format text: FINAL REJECTION MAILED |
|
STPP | Information on status: patent application and granting procedure in general |
Free format text: RESPONSE AFTER FINAL ACTION FORWARDED TO EXAMINER |
|
STPP | Information on status: patent application and granting procedure in general |
Free format text: ADVISORY ACTION MAILED |
|
STPP | Information on status: patent application and granting procedure in general |
Free format text: DOCKETED NEW CASE - READY FOR EXAMINATION |
|
STPP | Information on status: patent application and granting procedure in general |
Free format text: NON FINAL ACTION MAILED |
|
STPP | Information on status: patent application and granting procedure in general |
Free format text: RESPONSE TO NON-FINAL OFFICE ACTION ENTERED AND FORWARDED TO EXAMINER |
|
STPP | Information on status: patent application and granting procedure in general |
Free format text: FINAL REJECTION MAILED |
|
STCB | Information on status: application discontinuation |
Free format text: ABANDONED -- FAILURE TO RESPOND TO AN OFFICE ACTION |