US20150366075A1 - Multi-level metalization on a ceramic substrate - Google Patents
Multi-level metalization on a ceramic substrate Download PDFInfo
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- US20150366075A1 US20150366075A1 US14/763,694 US201414763694A US2015366075A1 US 20150366075 A1 US20150366075 A1 US 20150366075A1 US 201414763694 A US201414763694 A US 201414763694A US 2015366075 A1 US2015366075 A1 US 2015366075A1
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- United States
- Prior art keywords
- ceramic substrate
- metallization
- high power
- power area
- copper
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- 238000001465 metallisation Methods 0.000 title claims abstract description 57
- 239000000758 substrate Substances 0.000 title claims abstract description 48
- 239000000919 ceramic Substances 0.000 title claims abstract description 43
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims abstract description 32
- 229910052802 copper Inorganic materials 0.000 claims abstract description 32
- 239000010949 copper Substances 0.000 claims abstract description 32
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 claims abstract description 5
- 229910052593 corundum Inorganic materials 0.000 claims abstract description 5
- 229910001845 yogo sapphire Inorganic materials 0.000 claims abstract description 5
- 238000004519 manufacturing process Methods 0.000 claims abstract description 4
- 238000000034 method Methods 0.000 claims description 20
- 239000011521 glass Substances 0.000 claims description 16
- 238000007639 printing Methods 0.000 claims description 14
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 claims description 4
- 230000003014 reinforcing effect Effects 0.000 claims description 4
- 238000007650 screen-printing Methods 0.000 claims description 4
- 229910001455 Ni+ Inorganic materials 0.000 claims description 3
- 229910052737 gold Inorganic materials 0.000 claims description 3
- 238000007649 pad printing Methods 0.000 claims description 3
- 230000002787 reinforcement Effects 0.000 claims description 3
- 229910052709 silver Inorganic materials 0.000 claims description 3
- 239000000853 adhesive Substances 0.000 claims description 2
- 230000001070 adhesive effect Effects 0.000 claims description 2
- 238000000137 annealing Methods 0.000 claims description 2
- 229910052757 nitrogen Inorganic materials 0.000 claims description 2
- 238000000926 separation method Methods 0.000 claims description 2
- 239000002184 metal Substances 0.000 claims 1
- 229910052751 metal Inorganic materials 0.000 claims 1
- 229910052759 nickel Inorganic materials 0.000 claims 1
- 238000000576 coating method Methods 0.000 abstract 1
- 229910000679 solder Inorganic materials 0.000 description 5
- 239000004065 semiconductor Substances 0.000 description 3
- 238000005476 soldering Methods 0.000 description 3
- 238000009825 accumulation Methods 0.000 description 2
- 238000004026 adhesive bonding Methods 0.000 description 1
- 230000015556 catabolic process Effects 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- 238000010276 construction Methods 0.000 description 1
- 150000001879 copper Chemical class 0.000 description 1
- PMHQVHHXPFUNSP-UHFFFAOYSA-M copper(1+);methylsulfanylmethane;bromide Chemical compound Br[Cu].CSC PMHQVHHXPFUNSP-UHFFFAOYSA-M 0.000 description 1
- 230000006866 deterioration Effects 0.000 description 1
- 238000004070 electrodeposition Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000013532 laser treatment Methods 0.000 description 1
- TWNQGVIAIRXVLR-UHFFFAOYSA-N oxo(oxoalumanyloxy)alumane Chemical compound O=[Al]O[Al]=O TWNQGVIAIRXVLR-UHFFFAOYSA-N 0.000 description 1
- 238000007747 plating Methods 0.000 description 1
Images
Classifications
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
- H05K3/12—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using thick film techniques, e.g. printing techniques to apply the conductive material or similar techniques for applying conductive paste or ink patterns
- H05K3/1216—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using thick film techniques, e.g. printing techniques to apply the conductive material or similar techniques for applying conductive paste or ink patterns by screen printing or stencil printing
-
- C—CHEMISTRY; METALLURGY
- C22—METALLURGY; FERROUS OR NON-FERROUS ALLOYS; TREATMENT OF ALLOYS OR NON-FERROUS METALS
- C22F—CHANGING THE PHYSICAL STRUCTURE OF NON-FERROUS METALS AND NON-FERROUS ALLOYS
- C22F1/00—Changing the physical structure of non-ferrous metals or alloys by heat treatment or by hot or cold working
- C22F1/08—Changing the physical structure of non-ferrous metals or alloys by heat treatment or by hot or cold working of copper or alloys based thereon
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
- H01L21/4814—Conductive parts
- H01L21/4846—Leads on or in insulating or insulated substrates, e.g. metallisation
- H01L21/4867—Applying pastes or inks, e.g. screen printing
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49838—Geometry or layout
- H01L23/49844—Geometry or layout for devices being provided for in H01L29/00
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/03—Use of materials for the substrate
- H05K1/0306—Inorganic insulating substrates, e.g. ceramic, glass
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/22—Secondary treatment of printed circuits
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T428/00—Stock material or miscellaneous articles
- Y10T428/24—Structurally defined web or sheet [e.g., overall dimension, etc.]
- Y10T428/24355—Continuous and nonuniform or irregular surface on layer or component [e.g., roofing, etc.]
Definitions
- the invention relates to a method for producing a copper multi-level metalization on a ceramic substrate composed of AIN or Al 2 O 3 , whereby high power areas with metalization having higher current-carrying capacity and low power areas with metalization having lower current-carrying capacity are created on one and the same ceramic substrate.
- Metalized ceramic substrates also referred to as printed circuit boards, having a thick copper layer (typically 200 to 300 ⁇ m) are required for power electronic applications, to ensure the required current-carrying capacity.
- the power semiconductor is soldered upon these. Only comparatively large conductor widths and distances can be implemented on these thick copper structures.
- An electronic circuit is required to control the power semiconductor.
- the components used for this purpose microwavecontroller, bus coupler, etc.
- metalized carrier substrates of same have finer and thinner electrical conducting paths and pitch spacings than the carrier substrates for power components. Therefore, they are mounted on a separate metalized substrate. Both carrier substrates are electrically connected with each other via wires. These connections age and incline to failure, which results in breakdown of the entire power module.
- Metalizations generally denote electrical conducting paths and planar metalizations on ceramic substrates, in which the conducting paths serve to conduct current and the planar metalizations function, for example, to solder the power semiconductors and connecting elements.
- Multi-level metalization on a ceramic substrate is understood as metalization of varying thickness. The thickness of the metalization is the extension thereof perpendicular to the surface of the ceramic substrate. This thickness is also described in terms of height or strength.
- the object of the invention is to improve a method according to the preamble of claim 1 , so that with simple means metalizations for high power areas and metalizations for low power areas can be printed on one and the same ceramic substrate (ceramic plate), whereby the high power areas with thick conducting structures should have a particularly good thermal conduction and potential for good heat accumulation.
- metalizations for high power areas and metalizations for low power areas can be printed together and partially electrically connected with each other on one and the same ceramic substrate (ceramic plate), whereby the high power areas with thick conducting structures should have a particularly good thermal conduction and potential for good heat accumulation.
- the high power and the low power areas are provided without current with a metalization such as Ni, NiP+Pd+Au, Ag or Ni+Au.
- the ceramic substrate can be processed by laser scribing before or after the printing.
- the metalization of the high power areas has an even surface with a roughness R z ⁇ 5 ⁇ m and thus the contact surface area of the component elements with the metalization is as large as possible, and with leveling is worn down preferably 100 to 150 ⁇ m.
- the leveling is done preferably by grinding.
- the glass proportion of the glass-containing copper-based paste is preferably between 4 and 8%, particularly preferably 6%.
- the metalization of the high power area preferably has a thickness of 180 to 220 ⁇ m.
- a ceramic substrate according to the invention composed of AIN or Al 2 O 3 having a copper multi-level metalization with high power areas, with a metalization having higher current-carrying capacity and low power areas, with a metalization having lower current-carrying capacity, produced by the method according to any one of claims 1 to 6 , is characterized in that the thickness of the metalization in the high power area is 180 to 220 ⁇ m and 20 to 50 ⁇ m in the low power area and the adhesive strength of the metalizations is above 40 N/qmm.
- the edge steepness of the metalization of the high power areas is at 120 ⁇ m with a total copper thickness of 200 ⁇ m.
- the method according to the invention describes a multiply applied copper paste metalization.
- the disclosed technical teachings enable the construction of high power areas together with low power areas next to each other on the same ceramic carrier and/or ceramic substrate composed of AIN or Al 2 O 3 .
- a common base metalization (high and low power areas) made of a glass-containing copper-based paste is constructed on a ceramic substrate using screen printing or other techniques such as pad printing.
- the glass portion of the copper-based paste is required for adhesiveness on the ceramic.
- the thickness of this base metalization according to the invention is 20-50 ⁇ m.
- the high power area 1 of the circuit (see the square on the left in FIG. 1 ) is also selectively further constructed or reinforced multiple or several times using screen- or stencil printing, preferably up to a total thickness of 300-500 ⁇ m.
- This copper reinforcing paste has no glass component, since it is applied or imprinted on the glass-containing copper-based paste.
- a solder reinforcement of the glass-containing copper-based paste would not be suitable, since solder has a lower conductivity than copper.
- the high power areas of the circuit are, if necessary, overprinted multiple times with the copper reinforcing paste until the required thickness is reached.
- the metalized ceramic substrate is annealed with the high and low power areas together at 850 to 950° C. under N 2 .
- the ceramic substrate and/or the high power areas are then mechanically leveled and can also be provided, as required, with currentless metalizations such as Ni, NIP+Pd+Au, Ag or Ni+Au.
- Multiple uses can be separated by laser scribing before or after the printing of the ceramic substrate.
- the leveling of high power areas with thicker conducting structure, for example by a grinding process, is required to create an even surface having a roughness R z ⁇ 5 ⁇ m for the components, which are normally mounted with a solder layer as thin as possible. The contact surface of the components to the metalization is thereby maximized.
- a leveled thinner metalization has a better thermal dissipation than a non-leveled thicker metalization. During leveling 100 ⁇ m to 150 ⁇ m can be completely removed, without deterioration of the thermal dissipation.
- the metalized ceramic substrate having high and low power areas is also referred to as a multi-level substrate.
- the bottom of such a multi-level substrate can of course also be structured metalized, to bind the substrate on the bottom side by soldering or gluing to a cooler.
- the entire electrical layout consisting of a high power area and a low power area is printed as metalization 50 ⁇ m high with a copper-based paste having a glass portion of 6% on a lasered ceramic substrate consisting of AIN having a thickness of 0.63 mm.
- Laser treatment of the ceramic substrate ensures, so that later a separation by severing along the break line is possible.
- the high power area or the metalization thereof, upon which the power component is later soldered is brought to a 350 pm metalization thickness by further multiple screen or stencil printing processes using a copper-based paste without glass component. Thereafter the metalized component is annealed at 910° C. for 8 min under N 2 .
- the high power area of the metalized and annealed ceramic substrate by itself is then in this example 310 ⁇ m high.
- the metalization of the low power area is 40 ⁇ m high.
- the high power area and/or copper thereof is then mechanically leveled by a grinding process, in order to produce a precise horizontal surface in the high power area.
- the copper then has a total thickness of 200 ⁇ m in the high power area after the leveling.
- the adhesiveness is above 60 N/qmm.
- the edge steepness of the high power area is 120 ⁇ m with a total copper thickness of 200 ⁇ m.
- the layer thickness of the high power area can be specifically reinforced, or this can be achieved by reducing the printing processes or the stencil height between layer thicknesses, if only a low current-carrying capacity is required.
- FIG. 1 depicts a cut-out from a ceramic substrate 4 made of aluminum nitride or aluminum oxide having an applied metalization, which includes a high power area 1 and a low power area 2 .
- the metalization shown is applied identically multiple times on the ceramic substrate in the high power area 1 and can be separated by severing along a break line 3 .
- High power areas 1 and low power areas 2 are disposed next to each other on the ceramic substrate.
- High power area 1 refers to an area, which has a high current-carrying capacity and a high thermal dissipation when used.
- Components are mounted on high power areas 1 such as LEDs and control transistors, which become very hot in operation and/or have high switching power. The high electrical power and dissipated heat of these components must be guided or discharged.
- Metalizations or conducting paths of low power areas 2 are characterized in that they may have a low thermal dissipation. These are, for example, the actual conducting paths of a circuit, often referred to as logic circuits.
- An essential feature of the invention is that the high power areas 1 are leveled by a grinding process, in order to produce a precise, undulation-free, horizontal surface with small R z (preferably approx. 5 ⁇ m). Only in this way is the heat of a power component also sufficiently dissipated by a thin layer of solder (preferably approx. 10 ⁇ m).
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Chemical & Material Sciences (AREA)
- Manufacturing & Machinery (AREA)
- Power Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Computer Hardware Design (AREA)
- General Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Crystallography & Structural Chemistry (AREA)
- Organic Chemistry (AREA)
- Materials Engineering (AREA)
- Metallurgy (AREA)
- Mechanical Engineering (AREA)
- Thermal Sciences (AREA)
- Geometry (AREA)
- Inorganic Chemistry (AREA)
- Manufacturing Of Printed Wiring (AREA)
- Electroplating Methods And Accessories (AREA)
- Other Surface Treatments For Metallic Materials (AREA)
- Structure Of Printed Boards (AREA)
- Laminated Bodies (AREA)
Abstract
The invention relates to a method for producing a copper multi-level metallization on a ceramic substrate (4) consisting of AIN or Al2O3. High power regions (1) with metallization having a high current-carrying capacity and low power regions (2) with metallic coatings having a low current-carrying capacity are created on one and the same ceramic substrate (4). According to the invention, the metallization is printed multiple times in the high power range.
Description
- The invention relates to a method for producing a copper multi-level metalization on a ceramic substrate composed of AIN or Al2O3, whereby high power areas with metalization having higher current-carrying capacity and low power areas with metalization having lower current-carrying capacity are created on one and the same ceramic substrate.
- Metalized ceramic substrates, also referred to as printed circuit boards, having a thick copper layer (typically 200 to 300 μm) are required for power electronic applications, to ensure the required current-carrying capacity. The power semiconductor is soldered upon these. Only comparatively large conductor widths and distances can be implemented on these thick copper structures.
- An electronic circuit is required to control the power semiconductor. The components used for this purpose (microcontroller, bus coupler, etc.) and metalized carrier substrates of same have finer and thinner electrical conducting paths and pitch spacings than the carrier substrates for power components. Therefore, they are mounted on a separate metalized substrate. Both carrier substrates are electrically connected with each other via wires. These connections age and incline to failure, which results in breakdown of the entire power module.
- Metalizations generally denote electrical conducting paths and planar metalizations on ceramic substrates, in which the conducting paths serve to conduct current and the planar metalizations function, for example, to solder the power semiconductors and connecting elements. Multi-level metalization on a ceramic substrate is understood as metalization of varying thickness. The thickness of the metalization is the extension thereof perpendicular to the surface of the ceramic substrate. This thickness is also described in terms of height or strength.
- Another hitherto scarcely used method consists in the application of an electrically insulating layer structured photochemically or by screen printing technology onto the thin copper layer of a conducting path with further electrochemical deposition of copper on the areas left blank. To date, the production of such a multi-stage substrate still requires an expensive galvanic processing and a multiple structuring with plating resists and photo-optical development and stripping of the resist.
- The object of the invention is to improve a method according to the preamble of claim 1, so that with simple means metalizations for high power areas and metalizations for low power areas can be printed on one and the same ceramic substrate (ceramic plate), whereby the high power areas with thick conducting structures should have a particularly good thermal conduction and potential for good heat accumulation.
- This object is achieved according to the invention by means of the features of claim 1.
- Characterized in that the following method steps
- a) printing a common base metalization for the high power and low power areas which is made of glass-containing copper-based paste using screen- or pad printing with a thickness of 20 to 50 μm,
- b) reinforcing the base metalization in the high power areas with multiple or several printings of a copper reinforcement paste without glass component on the base metalization using screen-or stencil printing up to a total copper thickness of 300 to 500 μm,
- c) annealing of the metalized ceramic substrates with the high power and low power areas together at 850 to 950° C. under nitrogen,
- d) mechanical leveling of the high power areas to create an even surface with a roughness Rz<5 μm.
- are carried out consecutively and with simple means metalizations for high power areas and metalizations for low power areas can be printed together and partially electrically connected with each other on one and the same ceramic substrate (ceramic plate), whereby the high power areas with thick conducting structures should have a particularly good thermal conduction and potential for good heat accumulation.
- To facilitate soldering, after the leveling the high power and the low power areas are provided without current with a metalization such as Ni, NiP+Pd+Au, Ag or Ni+Au.
- To prepare for a later division of the ceramic substrate into separate parts of the substrate, the ceramic substrate can be processed by laser scribing before or after the printing.
- As a result, the metalization of the high power areas has an even surface with a roughness Rz<5 μm and thus the contact surface area of the component elements with the metalization is as large as possible, and with leveling is worn down preferably 100 to 150 μm. The leveling is done preferably by grinding.
- To improve the adhesiveness of the glassy copper-based paste on the ceramic substrate, the glass proportion of the glass-containing copper-based paste is preferably between 4 and 8%, particularly preferably 6%.
- So that the contact surface of the components with the metalization during the soldering is as large as possible, after the leveling the metalization of the high power area preferably has a thickness of 180 to 220 μm.
- A ceramic substrate according to the invention composed of AIN or Al2O3 having a copper multi-level metalization with high power areas, with a metalization having higher current-carrying capacity and low power areas, with a metalization having lower current-carrying capacity, produced by the method according to any one of claims 1 to 6, is characterized in that the thickness of the metalization in the high power area is 180 to 220 μm and 20 to 50 μm in the low power area and the adhesive strength of the metalizations is above 40 N/qmm.
- The edge steepness of the metalization of the high power areas is at 120 μm with a total copper thickness of 200 μm.
- The method according to the invention describes a multiply applied copper paste metalization. The disclosed technical teachings enable the construction of high power areas together with low power areas next to each other on the same ceramic carrier and/or ceramic substrate composed of AIN or Al2O3.
- For this purpose, first a common base metalization (high and low power areas) made of a glass-containing copper-based paste is constructed on a ceramic substrate using screen printing or other techniques such as pad printing. The glass portion of the copper-based paste is required for adhesiveness on the ceramic. The thickness of this base metalization according to the invention is 20-50 μm.
- Subsequently, the high power area 1 of the circuit (see the square on the left in
FIG. 1 ) is also selectively further constructed or reinforced multiple or several times using screen- or stencil printing, preferably up to a total thickness of 300-500 μm. This copper reinforcing paste has no glass component, since it is applied or imprinted on the glass-containing copper-based paste. A solder reinforcement of the glass-containing copper-based paste would not be suitable, since solder has a lower conductivity than copper. The high power areas of the circuit are, if necessary, overprinted multiple times with the copper reinforcing paste until the required thickness is reached. - Then the metalized ceramic substrate is annealed with the high and low power areas together at 850 to 950° C. under N2. The ceramic substrate and/or the high power areas are then mechanically leveled and can also be provided, as required, with currentless metalizations such as Ni, NIP+Pd+Au, Ag or Ni+Au. Multiple uses can be separated by laser scribing before or after the printing of the ceramic substrate. The leveling of high power areas with thicker conducting structure, for example by a grinding process, is required to create an even surface having a roughness Rz<5 μm for the components, which are normally mounted with a solder layer as thin as possible. The contact surface of the components to the metalization is thereby maximized. It has been found that a leveled thinner metalization has a better thermal dissipation than a non-leveled thicker metalization. During leveling 100 μm to 150 μm can be completely removed, without deterioration of the thermal dissipation.
- The metalized ceramic substrate having high and low power areas is also referred to as a multi-level substrate. The bottom of such a multi-level substrate can of course also be structured metalized, to bind the substrate on the bottom side by soldering or gluing to a cooler.
- First of all, the entire electrical layout consisting of a high power area and a low power area is printed as metalization 50 μm high with a copper-based paste having a glass portion of 6% on a lasered ceramic substrate consisting of AIN having a thickness of 0.63 mm. Laser treatment of the ceramic substrate ensures, so that later a separation by severing along the break line is possible. Then only the high power area or the metalization thereof, upon which the power component is later soldered, is brought to a 350 pm metalization thickness by further multiple screen or stencil printing processes using a copper-based paste without glass component. Thereafter the metalized component is annealed at 910° C. for 8 min under N2.
- The high power area of the metalized and annealed ceramic substrate by itself is then in this example 310 μm high. The metalization of the low power area is 40 μm high. The high power area and/or copper thereof is then mechanically leveled by a grinding process, in order to produce a precise horizontal surface in the high power area. The copper then has a total thickness of 200 μm in the high power area after the leveling.
- The adhesiveness is above 60 N/qmm. The edge steepness of the high power area is 120 μm with a total copper thickness of 200 μm.
- By coordinated printing processes with stencil or printing screens of varying strength, the layer thickness of the high power area can be specifically reinforced, or this can be achieved by reducing the printing processes or the stencil height between layer thicknesses, if only a low current-carrying capacity is required.
-
FIG. 1 depicts a cut-out from aceramic substrate 4 made of aluminum nitride or aluminum oxide having an applied metalization, which includes a high power area 1 and a low power area 2. The metalization shown is applied identically multiple times on the ceramic substrate in the high power area 1 and can be separated by severing along a break line 3. - High power areas 1 and low power areas 2 are disposed next to each other on the ceramic substrate. High power area 1 refers to an area, which has a high current-carrying capacity and a high thermal dissipation when used. Components are mounted on high power areas 1 such as LEDs and control transistors, which become very hot in operation and/or have high switching power. The high electrical power and dissipated heat of these components must be guided or discharged.
- Metalizations or conducting paths of low power areas 2 are characterized in that they may have a low thermal dissipation. These are, for example, the actual conducting paths of a circuit, often referred to as logic circuits.
- An essential feature of the invention is that the high power areas 1 are leveled by a grinding process, in order to produce a precise, undulation-free, horizontal surface with small Rz (preferably approx. 5 μm). Only in this way is the heat of a power component also sufficiently dissipated by a thin layer of solder (preferably approx. 10 μm).
Claims (11)
1.-8. (canceled)
9. A method for producing a metallized ceramic substrate comprising a copper multi-level metallization on a ceramic substrate, wherein the ceramic substrate comprises a ceramic selected from the group consisting of AIN and Al2O3, whereby a high power area with metallization having higher current-carrying capacity and a low power area with metallization having lower current-carrying capacity are created on the same ceramic substrate, comprising the sequential steps of:
printing a common base metallization from a copper-based paste for the high power area and the low power area having a thickness of 20 to 50 μm with use of screen or pad printing;
reinforcing the base metallization in the high power area with multiple or several printings of a copper reinforcement paste without glass component on the base metallization using screen or stencil printing up to a total copper thickness of 300 to 500 μm;
annealing the metalized ceramic substrate with the high power area and the low power area together at 850 to 950° C. under nitrogen;
mechanical leveling of the high power areas to create an even surface having a roughness Rz<5 μm to yield a metallized ceramic substrate.
10. A method according to claim 9 , whereinafter the leveling the high power area and/or the low power areas are currentlessly provided with a metallization.
11. A method according to claim 9 , wherein the ceramic substrate is processed by laser scribing before or after the printing to prepare for a later separation of the ceramic substrate into individual sub-substrates.
12. A method according to claim 9 , wherein during the leveling 100 to 150 μm are removed.
13. A method according to claim 9 , wherein the proportion of glass of the glass-containing copper-based paste is between 4 and 8%.
14. A method according to claim 9 , whereinafter the leveling the metallization of the high power area has a thickness of 180 to 220 μm.
15. A metalized ceramic substrate produced by the method according to claim 9 , wherein the thickness of the metallization is 180 to 220 μm in the high power area and 20 to 50 μm in the low power area and the adhesive strength of the metallization is above 60 N/qmm.
16. A metalized ceramic substrate according to claim 15 , wherein the edge steepness of the metallization of the high power area is 120 μm with a total copper thickness of 200 μm.
17. A method according to claim 10 , wherein the metallization comprises metal selected from the group consisting of Ni, NiP+Pd+Au, Ag and Ni+Au.
18. A method according to claim 9 , wherein the proportion of glass of the glass-containing copper-based paste is 6%.
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE102013202008 | 2013-02-07 | ||
DE102013202008.2 | 2013-02-07 | ||
PCT/EP2014/052177 WO2014122137A1 (en) | 2013-02-07 | 2014-02-05 | Multi-level metalization on a ceramic substrate |
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PCT/EP2014/052177 A-371-Of-International WO2014122137A1 (en) | 2013-02-07 | 2014-02-05 | Multi-level metalization on a ceramic substrate |
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US15/627,703 Continuation US10568214B2 (en) | 2013-02-07 | 2017-06-20 | Method for producing multi-level metalization on a ceramic substrate |
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US20150366075A1 true US20150366075A1 (en) | 2015-12-17 |
Family
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US14/763,694 Abandoned US20150366075A1 (en) | 2013-02-07 | 2014-02-05 | Multi-level metalization on a ceramic substrate |
US15/627,703 Active US10568214B2 (en) | 2013-02-07 | 2017-06-20 | Method for producing multi-level metalization on a ceramic substrate |
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US15/627,703 Active US10568214B2 (en) | 2013-02-07 | 2017-06-20 | Method for producing multi-level metalization on a ceramic substrate |
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US (2) | US20150366075A1 (en) |
EP (1) | EP2954554B1 (en) |
JP (1) | JP2016507902A (en) |
CN (1) | CN105074913B (en) |
DE (1) | DE102014202007A1 (en) |
ES (1) | ES2630371T3 (en) |
PH (1) | PH12015501631A1 (en) |
TW (1) | TWI636716B (en) |
WO (1) | WO2014122137A1 (en) |
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CN108735707B (en) * | 2018-04-18 | 2020-11-06 | 华为技术有限公司 | Ceramic substrate, preparation method of ceramic substrate and power module |
DE102018127075B4 (en) | 2018-10-30 | 2021-12-30 | Auto-Kabel Management Gmbh | High current circuit |
WO2022162875A1 (en) * | 2021-01-29 | 2022-08-04 | サンケン電気株式会社 | Semiconductor power module |
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- 2014-02-05 ES ES14710196.8T patent/ES2630371T3/en active Active
- 2014-02-05 CN CN201480007836.2A patent/CN105074913B/en active Active
- 2014-02-05 DE DE102014202007.7A patent/DE102014202007A1/en not_active Withdrawn
- 2014-02-05 US US14/763,694 patent/US20150366075A1/en not_active Abandoned
- 2014-02-05 WO PCT/EP2014/052177 patent/WO2014122137A1/en active Application Filing
- 2014-02-05 JP JP2015556472A patent/JP2016507902A/en active Pending
- 2014-02-06 TW TW103103864A patent/TWI636716B/en active
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2015
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Also Published As
Publication number | Publication date |
---|---|
US10568214B2 (en) | 2020-02-18 |
US20170290169A1 (en) | 2017-10-05 |
PH12015501631B1 (en) | 2015-10-19 |
DE102014202007A1 (en) | 2014-08-07 |
JP2016507902A (en) | 2016-03-10 |
CN105074913B (en) | 2018-05-22 |
TWI636716B (en) | 2018-09-21 |
CN105074913A (en) | 2015-11-18 |
EP2954554A1 (en) | 2015-12-16 |
ES2630371T3 (en) | 2017-08-21 |
WO2014122137A1 (en) | 2014-08-14 |
TW201442582A (en) | 2014-11-01 |
EP2954554B1 (en) | 2017-04-12 |
PH12015501631A1 (en) | 2015-10-19 |
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