JPH0897553A - Structure for conductive pattern - Google Patents

Structure for conductive pattern

Info

Publication number
JPH0897553A
JPH0897553A JP25284494A JP25284494A JPH0897553A JP H0897553 A JPH0897553 A JP H0897553A JP 25284494 A JP25284494 A JP 25284494A JP 25284494 A JP25284494 A JP 25284494A JP H0897553 A JPH0897553 A JP H0897553A
Authority
JP
Japan
Prior art keywords
conductive pattern
ceramic substrate
glass component
copper
layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP25284494A
Other languages
Japanese (ja)
Inventor
Yoji Nagano
洋二 永野
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toyo Communication Equipment Co Ltd
Original Assignee
Toyo Communication Equipment Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toyo Communication Equipment Co Ltd filed Critical Toyo Communication Equipment Co Ltd
Priority to JP25284494A priority Critical patent/JPH0897553A/en
Publication of JPH0897553A publication Critical patent/JPH0897553A/en
Pending legal-status Critical Current

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Landscapes

  • Manufacturing Of Printed Wiring (AREA)

Abstract

PURPOSE: To prevent the peeling of a conductive pattern constituted in a multilayered structure from a ceramic substrate even when the substrate is heated and cooled by making the content of a glass component in the uppermost layer of the multilayered structure lower than that of the glass component in the lowermost layer which is in contact with the insulating substrate body. CONSTITUTION: A copper-made conductive pattern has a two-layer structure composed of a conductive pattern 6 which is formed of copper-based metallic paste containing a large amount of glass component and formed on the surface of a ceramic substrate 5 and another conductive pattern 7 which is formed of copper-based metallic paste containing a small amount of glass component and formed on the surface of the pattern 6. It is also possible to constitute the conductive pattern formed on the ceramic substrate 5 in a three or more layers near the terminal section of electronic parts, etc. When the conductive pattern is formed in a three or more layers, the conductive pattern is improved in strength of adhesion and resistance to temperature change when the contents of the glass component in the layers constituting the multilayered structure are gradually reduced from the layer adhering to the surface of the ceramic substrate.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上利用分野】本発明は絶縁体上の導電パターンに
電子部品等を備える回路基板に関し、殊に前記絶縁体か
ら導電パターンが剥離することのない回路基板に関す
る。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a circuit board provided with an electronic component or the like on a conductive pattern on an insulator, and more particularly to a circuit board in which the conductive pattern is not separated from the insulator.

【0002】[0002]

【従来の技術】近年、配線を印刷したプリント基板に電
子部品等を固定して、一定の機能を有するよう構成した
ハイブリッドICが提案され、実用化されている。該ハ
イブリッドICは図2に示す如く、セラミック90%以
上、セラミック焼結助剤等からなるセラミック基板1
に、導電性物質を十分含有した導電性ペーストをスクリ
ーン印刷手法等により塗布した後、加熱処理を施して硬
化した厚さ10〜20μmの導電パターン2を形成し、
該導電パターン2の所定の位置に所望の電子部品等3を
半田等の導電性接着剤4で固定するのが一般的である。
尚、前記導電パターンとしては銀パラジウム系と銅系が
代表的となっているが、銅系導電パターンの方が信頼性
が高いと一般的に認識されている。
2. Description of the Related Art In recent years, a hybrid IC has been proposed and put into practical use, in which electronic components and the like are fixed to a printed circuit board on which wiring is printed to have a certain function. As shown in FIG. 2, the hybrid IC has a ceramic substrate 1 composed of 90% or more of ceramic and a ceramic sintering aid or the like.
, A conductive paste sufficiently containing a conductive substance is applied by a screen printing method or the like, and then subjected to heat treatment to be cured to form a conductive pattern 2 having a thickness of 10 to 20 μm,
It is general that a desired electronic component or the like 3 is fixed to a predetermined position of the conductive pattern 2 with a conductive adhesive 4 such as solder.
The conductive patterns are typically silver-palladium-based and copper-based, but it is generally recognized that the copper-based conductive patterns have higher reliability.

【0003】前記ハイブリッドICの製造工程に於い
て、セラミック基板上の電子部品等を取り付ける位置を
間違えたり、取り付けるときに位置がずれる等の不具合
が発生することがある。このような場合、半田を加熱・
溶解すれば、前記電子部品等の取り付け位置の間違い、
或いは位置ずれ等の不具合を容易に修正できるが、この
修正を数回行なうと半田付けをしている電子部品等の各
端子近傍の銅系導電パターンがセラミック基板から剥離
するという欠点が発生し、場合によっては前記導電パタ
ーンが切断し、電子部品等の導通が不能になるという欠
点が発生した。
In the manufacturing process of the hybrid IC, there may occur a problem such as a wrong mounting position of the electronic component or the like on the ceramic substrate, or a shift of the position when mounting. In such a case, heat the solder
If it melts, the mounting position of the electronic parts etc.
Alternatively, it is possible to easily correct a defect such as a position shift, but if this correction is performed several times, a disadvantage occurs that the copper-based conductive pattern near each terminal of the electronic component etc. being soldered is separated from the ceramic substrate, In some cases, the conductive pattern is cut off, which causes a defect that the electronic parts and the like cannot be conducted.

【0004】これは前述した如く、セラミック基板上の
電子部品等の取り付け位置を修正するに際しては、半田
を溶解するために加熱及び冷却を実施しており、この加
熱・冷却を繰り返すことによってセラミック基板と銅系
導電パターンとの接着強度が低下して剥離するものと考
えられる。そこで、セラミック基板に銅系導電パターン
を形成し、該セラミック基板を繰り返し加熱・冷却する
温度サイクル試験を実施し前記接着強度の変化を測定し
た。
As described above, this is because heating and cooling are performed in order to melt the solder when the mounting positions of electronic parts and the like on the ceramic substrate are corrected, and the heating and cooling are repeated to repeat the heating and cooling. It is considered that the adhesive strength between the copper-based conductive pattern and the copper-based conductive pattern decreases and the copper-based conductive pattern peels off. Therefore, a copper-based conductive pattern was formed on the ceramic substrate, and a temperature cycle test of repeatedly heating and cooling the ceramic substrate was carried out to measure the change in the adhesive strength.

【0005】温度サイクルは図3に示す如く、−55℃
低温槽に30分間放置A、+25℃定温に5分間放置
B、+125℃高温槽に30分間放置C、+25℃定温
に5分間放置D(参照:MIL―STD―883B、試
験法1010.2条件(B))を1サイクルとした。該
温度サイクルの回数によって銅系導電パターン及びセラ
ミック基板の接着強度がどのように変化するのかを測定
した結果を図4に示す。セラミック基板と銅系導電パタ
ーンとの接着強度は、温度サイクル試験前は約1.6キ
ログラム/平方ミリメートルであったが、温度サイクル
200回実施後は約0.6キログラム/平方ミリメート
ルまで低下するという結果を得た。
The temperature cycle is -55 ° C. as shown in FIG.
Leave in low temperature tank for 30 minutes A, + 25 ° C constant temperature for 5 minutes B, + 125 ° C high temperature tank for 30 minutes C, + 25 ° C constant temperature in 5 minutes D (Ref: MIL-STD-883B, test method 1010.2 conditions (B)) was set as one cycle. FIG. 4 shows the result of measurement of how the adhesive strength of the copper-based conductive pattern and the ceramic substrate changes depending on the number of temperature cycles. The adhesive strength between the ceramic substrate and the copper-based conductive pattern was about 1.6 kilograms / square millimeter before the temperature cycle test, but decreased to about 0.6 kilograms / square millimeter after 200 temperature cycles. I got the result.

【0006】従って、前記温度サイクル試験で得た結果
より、ハイブリッドICを構成する電子部品等の修正作
業に於いて、半田を加熱・冷却することによって銅系導
電パターンが加熱・冷却され、その結果導電パターンが
セラミック基板から剥離し易いという現象を確認した。
Therefore, according to the result obtained by the temperature cycle test, in the repair work of the electronic parts and the like constituting the hybrid IC, the copper-based conductive pattern is heated and cooled by heating and cooling the solder, and as a result, It was confirmed that the conductive pattern was easily separated from the ceramic substrate.

【0007】そこで、セラミック基板から剥離しにくい
導電パターンを検討した。該導電パターン中に存在して
いるガラス成分に注目し、セラミック基板との接着強度
が得られるように従来よりガラス成分を多くした。しか
しながら、ガラス成分を多くすると、電子部品等を固定
する半田と導電パターンとの接着強度が劣化するという
欠点があった。
Therefore, a conductive pattern which is difficult to be separated from the ceramic substrate was studied. Attention was paid to the glass component present in the conductive pattern, and the glass component was increased compared with the conventional one so as to obtain the adhesive strength with the ceramic substrate. However, if the glass component is increased, there is a drawback that the adhesive strength between the solder for fixing the electronic component and the like and the conductive pattern is deteriorated.

【0008】[0008]

【発明の目的】本発明は上述した如き銅系導電パターン
が有する欠点を除去する為になされたものであって、加
熱・冷却を施してもセラミック基板から導電パターンが
剥離しない回路基板を提供することを目的とする。
SUMMARY OF THE INVENTION The present invention has been made to eliminate the drawbacks of the copper-based conductive pattern as described above, and provides a circuit board in which the conductive pattern does not peel off from the ceramic board even when heated and cooled. The purpose is to

【0009】[0009]

【発明の概要】上述の目的を達成するため本発明に係わ
る導電パターンの構造は、絶縁体基板上に導電パターン
を形成し、該導電パターン上に電子部品等を配設するた
めの回路基板に於いて、少なくとも前記電子部品等の端
子部と電気的に接続する領域の導電パターンを多層構造
とし、該多層構造とした導電パターンの前記絶縁基板体
と接する最下層よりも前記電子部品等を接続する最上層
の方が、ガラス成分の含有量が少なくなるよう構成した
ものである。
SUMMARY OF THE INVENTION To achieve the above object, the structure of a conductive pattern according to the present invention is applied to a circuit board for forming a conductive pattern on an insulating substrate and arranging electronic parts and the like on the conductive pattern. At least a conductive pattern in a region electrically connected to a terminal portion of the electronic component or the like has a multilayer structure, and the electronic component or the like is connected to a lowermost layer in contact with the insulating substrate of the conductive pattern having the multilayer structure. The uppermost layer is formed so that the content of the glass component is smaller.

【0010】[0010]

【発明の実施例】以下、本発明を実施例を示す図面と実
験結果とに基づいて詳細に説明する。図1は本発明の実
施例を示す導電パターンの側面図である。
BEST MODE FOR CARRYING OUT THE INVENTION The present invention will be described in detail below with reference to the drawings showing the embodiments and the experimental results. FIG. 1 is a side view of a conductive pattern showing an embodiment of the present invention.

【0011】即ち、セラミック基板5上に付着する導電
パターンをセラミック基板の表面から順にガラス成分の
多い銅系金属ペーストによる導電パターン6、該導電パ
ターン6よりガラス成分の少ない銅系金属ペーストによ
る導電パターン7の2層構造からなる銅系導電パターン
とする。
That is, the conductive pattern adhered on the ceramic substrate 5 is a conductive pattern 6 made of a copper-based metal paste containing a large amount of glass component in order from the surface of the ceramic substrate, and a conductive pattern made of a copper-based metal paste having a smaller glass component than the conductive pattern 6. 7 is a copper-based conductive pattern having a two-layer structure.

【0012】前述した如く本願発明は導電パターンに含
有されるガラス成分に着目したものであって、セラミッ
ク基板にガラス成分が多い銅系導電パターンを付着する
のでぬれ性が向上して接着強度が高くなり、ガラス成分
の少ない銅系導電パターンは半田とのぬれ性が向上して
電子部品等との接着強度が向上する。従来の銅系導電パ
ターンは単層であったためセラミック基板と半田の両方
に最低限必要な接着強度が得られるよう、その組成を決
定していたが、本願発明によりセラミック基板と導電パ
ターン、及び、導電パターンと半田を接着する強度を、
夫々より高くすることが可能な導電パターンを得た。
As described above, the present invention focuses on the glass component contained in the conductive pattern. Since the copper-based conductive pattern containing a large amount of glass component is attached to the ceramic substrate, the wettability is improved and the adhesive strength is high. Therefore, the copper-based conductive pattern having a small glass component has improved wettability with solder and improved adhesive strength with electronic components and the like. Since the conventional copper-based conductive pattern is a single layer, the composition was determined so as to obtain the minimum required adhesive strength for both the ceramic substrate and the solder, but according to the present invention, the ceramic substrate and the conductive pattern, and The strength to bond the conductive pattern and solder,
A conductive pattern that can be higher than each was obtained.

【0013】本願発明によって発振器を製造し、該発振
器に温度サイクルを施し、セラミック基板と導電パター
ンの剥離状態を確認する実験を行なった。温度サイクル
は従来技術で説明した温度サイクルと同じとし、温度サ
イクルサイクル終了後の母数を100個としたときの発
振器の不具合発生数を確認した結果を表1に示す。
An experiment was conducted in which an oscillator was manufactured according to the present invention, the oscillator was subjected to a temperature cycle, and the peeling state between the ceramic substrate and the conductive pattern was confirmed. The temperature cycle is the same as the temperature cycle described in the related art, and the result of confirming the number of malfunctions of the oscillator when the number of parameters after completion of the temperature cycle cycle is 100 is shown in Table 1.

【0014】[0014]

【表1】 [Table 1]

【0015】実験結果より、本願発明による銅系導電パ
ターンを利用することによって温度サイクルを実施す
る、即ち電子部品等を修正するために半田を溶解するこ
とを実施してもセラミック基板より銅系導電パターンが
剥離することのないハイブリッドICが実現可能となっ
た。
From the experimental results, even if the temperature cycle is carried out by utilizing the copper-based conductive pattern according to the present invention, that is, the solder is melted to correct the electronic parts, etc., the copper-based conductive pattern is more conductive than the ceramic substrate. It has become possible to realize a hybrid IC in which the pattern does not peel off.

【0016】また、必ずしもセラミック基板上に形成し
た導電パターン全体を2層構造の導電パターンとする必
要はなく、電子部品等の端子部近傍のみ2層構造とし、
他の部分は単層の導電パターンとしてもよい。
Further, the entire conductive pattern formed on the ceramic substrate does not necessarily have to be a conductive pattern having a two-layer structure, and only the vicinity of the terminal portion of the electronic component or the like has a two-layer structure.
The other portion may be a single layer conductive pattern.

【0017】セラミック基板上に形成した導電パターン
の電子部品等の端子部近傍を3層以上の構造としてもよ
く、セラミック基板の表面に付着する層から徐々にガラ
ス成分を少なくすれば、より接着強度が高く、温度変化
に耐える導電パターンが得られる。
The vicinity of the terminal portion of the electronic part or the like of the conductive pattern formed on the ceramic substrate may have a structure of three layers or more. If the glass component is gradually reduced from the layer adhering to the surface of the ceramic substrate, the adhesive strength is further increased. A conductive pattern having a high resistance to temperature changes can be obtained.

【0018】尚、以上本発明を銅系金属ペーストにより
導電パターンを構成するハイブリッドICに適用したも
のを例として説明したが、本発明はこれのみに限定され
るものではなく、銀パラジウム系導電パターン等の他の
材質で構成した導電パターンであってもよい。
Although the present invention has been described by way of example in which the present invention is applied to a hybrid IC having a conductive pattern made of a copper-based metal paste, the present invention is not limited to this and a silver-palladium-based conductive pattern is used. The conductive pattern may be made of another material such as.

【0019】[0019]

【発明の効果】本発明は以上説明した如く構成するもの
であるからハイブリッドICの製造工程に於いて、セラ
ミック基板上に形成した導電パターン上に電子部品等を
半田で固定した後、該半田を加熱・溶解して前記電子部
品等の取り付け位置間違い等の不具合を修正する上で著
しい効果を発揮し、高信頼性の導電パターンを得る。
Since the present invention is configured as described above, in the process of manufacturing a hybrid IC, after fixing an electronic component or the like with solder on a conductive pattern formed on a ceramic substrate, the solder is attached to the conductive pattern. A significant effect is exhibited in correcting defects such as incorrect mounting positions of the electronic parts by heating and melting, and a highly reliable conductive pattern is obtained.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明に係わる導電パターンの構成を示す側面
FIG. 1 is a side view showing a configuration of a conductive pattern according to the present invention.

【図2】従来のハイブリッドICの構成を示す側面図FIG. 2 is a side view showing the configuration of a conventional hybrid IC.

【図3】温度サイクルの詳細図FIG. 3 Detailed view of temperature cycle

【図4】温度サイクルによる導電パターンの付着強度特
性を示す実験データの図
FIG. 4 is a diagram of experimental data showing adhesion strength characteristics of conductive patterns by temperature cycling.

【符号の説明】[Explanation of symbols]

5……セラミック基板 6……ガラス成分の多い導電パターン 7……ガラス成分の少ない導電パターン 5 ... Ceramic substrate 6 ... Conductive pattern containing a large amount of glass component 7 ... Conductive pattern containing a small amount of glass component

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】絶縁体基板上に導電パターンを形成し、該
導電パターン上に電子部品等を配設するための回路基板
に於いて、少なくとも前記電子部品等の端子部と電気的
に接続する領域の導電パターンを多層構造とし、該多層
構造とした導電パターンの前記絶縁基板体と接する最下
層よりも最上層の方が、ガラス成分の含有量が少なくな
るよう構成したことを特徴とする導電パターンの構造。
1. A circuit board for forming a conductive pattern on an insulating substrate and arranging an electronic component or the like on the conductive pattern, which is electrically connected to at least a terminal portion of the electronic component or the like. The conductive pattern of the region has a multi-layered structure, and the uppermost layer of the conductive pattern of the multi-layered structure has a lower glass component content than the lowermost layer in contact with the insulating substrate, The structure of the pattern.
【請求項2】前記導電パターン各層を前記絶縁体表面側
最下層から最上層の方向に向かって徐々にガラス成分の
含有量が少なくなるよう構成したことを特徴とする請求
項1記載の導電パターンの構造。
2. The conductive pattern according to claim 1, wherein each layer of the conductive pattern is configured such that the content of the glass component gradually decreases from the lowermost layer on the surface side of the insulator toward the uppermost layer. Structure.
JP25284494A 1994-09-21 1994-09-21 Structure for conductive pattern Pending JPH0897553A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP25284494A JPH0897553A (en) 1994-09-21 1994-09-21 Structure for conductive pattern

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP25284494A JPH0897553A (en) 1994-09-21 1994-09-21 Structure for conductive pattern

Publications (1)

Publication Number Publication Date
JPH0897553A true JPH0897553A (en) 1996-04-12

Family

ID=17242976

Family Applications (1)

Application Number Title Priority Date Filing Date
JP25284494A Pending JPH0897553A (en) 1994-09-21 1994-09-21 Structure for conductive pattern

Country Status (1)

Country Link
JP (1) JPH0897553A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105074913A (en) * 2013-02-07 2015-11-18 陶瓷技术有限责任公司 Multi-level metalization on a ceramic substrate

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03237795A (en) * 1990-02-14 1991-10-23 Nec Corp Thick film printed wiring board
JPH04125955A (en) * 1990-09-17 1992-04-27 Nippondenso Co Ltd Semiconductor device and manufacture thereof
JPH05211387A (en) * 1991-08-23 1993-08-20 E I Du Pont De Nemours & Co Manufacture of thick-film/solder bonded part

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03237795A (en) * 1990-02-14 1991-10-23 Nec Corp Thick film printed wiring board
JPH04125955A (en) * 1990-09-17 1992-04-27 Nippondenso Co Ltd Semiconductor device and manufacture thereof
JPH05211387A (en) * 1991-08-23 1993-08-20 E I Du Pont De Nemours & Co Manufacture of thick-film/solder bonded part

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105074913A (en) * 2013-02-07 2015-11-18 陶瓷技术有限责任公司 Multi-level metalization on a ceramic substrate
US20150366075A1 (en) * 2013-02-07 2015-12-17 Ceramtec Gmbh Multi-level metalization on a ceramic substrate
US10568214B2 (en) 2013-02-07 2020-02-18 Ceramtec Gmbh Method for producing multi-level metalization on a ceramic substrate

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