US20120211805A1 - Cavity structures for mems devices - Google Patents

Cavity structures for mems devices Download PDF

Info

Publication number
US20120211805A1
US20120211805A1 US13032334 US201113032334A US20120211805A1 US 20120211805 A1 US20120211805 A1 US 20120211805A1 US 13032334 US13032334 US 13032334 US 201113032334 A US201113032334 A US 201113032334A US 20120211805 A1 US20120211805 A1 US 20120211805A1
Authority
US
Grant status
Application
Patent type
Prior art keywords
layer
device
silicon
cavity
sensor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
US13032334
Inventor
Bernhard Winkler
Andreas Zankl
Klemens Pruegl
Stefan Kolb
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Infineon Technologies AG
Original Assignee
Infineon Technologies AG
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date

Links

Images

Classifications

    • BPERFORMING OPERATIONS; TRANSPORTING
    • B81MICROSTRUCTURAL TECHNOLOGY
    • B81BMICROSTRUCTURAL DEVICES OR SYSTEMS, e.g. MICROMECHANICAL DEVICES
    • B81B7/00Microstructural systems; Auxiliary parts of microstructural devices or systems
    • B81B7/008MEMS characterised by an electronic circuit specially adapted for controlling or driving the same
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B81MICROSTRUCTURAL TECHNOLOGY
    • B81CPROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
    • B81C1/00Manufacture or treatment of devices or systems in or on a substrate
    • B81C1/00015Manufacture or treatment of devices or systems in or on a substrate for manufacturing microsystems
    • B81C1/00222Integrating an electronic processing unit with a micromechanical structure
    • B81C1/00246Monolithic integration, i.e. micromechanical structure and electronic processing unit are integrated on the same substrate
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/04Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
    • H01L27/06Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
    • H01L27/0611Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B81MICROSTRUCTURAL TECHNOLOGY
    • B81BMICROSTRUCTURAL DEVICES OR SYSTEMS, e.g. MICROMECHANICAL DEVICES
    • B81B2201/00Specific applications of microelectromechanical systems
    • B81B2201/02Sensors
    • B81B2201/0264Pressure sensors
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B81MICROSTRUCTURAL TECHNOLOGY
    • B81BMICROSTRUCTURAL DEVICES OR SYSTEMS, e.g. MICROMECHANICAL DEVICES
    • B81B2203/00Basic microelectromechanical structures
    • B81B2203/03Static structures
    • B81B2203/0315Cavities
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B81MICROSTRUCTURAL TECHNOLOGY
    • B81BMICROSTRUCTURAL DEVICES OR SYSTEMS, e.g. MICROMECHANICAL DEVICES
    • B81B2207/00Microstructural systems or auxiliary parts thereof
    • B81B2207/01Microstructural systems or auxiliary parts thereof comprising a micromechanical device connected to control or processing electronics, i.e. Smart-MEMS
    • B81B2207/015Microstructural systems or auxiliary parts thereof comprising a micromechanical device connected to control or processing electronics, i.e. Smart-MEMS the micromechanical device and the control or processing electronics being integrated on the same substrate
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B81MICROSTRUCTURAL TECHNOLOGY
    • B81CPROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
    • B81C1/00Manufacture or treatment of devices or systems in or on a substrate
    • B81C1/00015Manufacture or treatment of devices or systems in or on a substrate for manufacturing microsystems
    • B81C1/00134Manufacture or treatment of devices or systems in or on a substrate for manufacturing microsystems comprising flexible or deformable structures
    • B81C1/00158Diaphragms, membranes
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B81MICROSTRUCTURAL TECHNOLOGY
    • B81CPROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
    • B81C2203/00Forming microstructural systems
    • B81C2203/07Integrating an electronic processing unit with a micromechanical structure
    • B81C2203/0707Monolithic integration, i.e. the electronic processing unit is formed on or in the same substrate as the micromechanical structure
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B81MICROSTRUCTURAL TECHNOLOGY
    • B81CPROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
    • B81C2203/00Forming microstructural systems
    • B81C2203/07Integrating an electronic processing unit with a micromechanical structure
    • B81C2203/0707Monolithic integration, i.e. the electronic processing unit is formed on or in the same substrate as the micromechanical structure
    • B81C2203/0714Forming the micromechanical structure with a CMOS process
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B81MICROSTRUCTURAL TECHNOLOGY
    • B81CPROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
    • B81C2203/00Forming microstructural systems
    • B81C2203/07Integrating an electronic processing unit with a micromechanical structure
    • B81C2203/0707Monolithic integration, i.e. the electronic processing unit is formed on or in the same substrate as the micromechanical structure
    • B81C2203/0735Post-CMOS, i.e. forming the micromechanical structure after the CMOS circuit
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B81MICROSTRUCTURAL TECHNOLOGY
    • B81CPROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
    • B81C2203/00Forming microstructural systems
    • B81C2203/07Integrating an electronic processing unit with a micromechanical structure
    • B81C2203/0707Monolithic integration, i.e. the electronic processing unit is formed on or in the same substrate as the micromechanical structure
    • B81C2203/0757Topology for facilitating the monolithic integration
    • B81C2203/0771Stacking the electronic processing unit and the micromechanical structure

Abstract

Embodiments relate to MEMS devices, particularly MEMS devices integrated with related electrical devices on a single wafer. Embodiments utilize a modular process flow concept as part of a MEMS-first approach, enabling use of a novel cavity sealing process. The impact and potential detrimental effects on the electrical devices by the MEMS processing are thereby reduced or eliminated. At the same time, a highly flexible solution is provided that enables implementation of a variety of measurement principles, including capacitive and piezoresistive. A variety of sensor applications can therefore be addressed with improved performance and quality while remaining cost-effective.

Description

    TECHNICAL FIELD
  • [0001]
    The invention relates generally to microelectromechanical systems (MEMS) devices and more particularly to MEMS devices and electrical devices on a single wafer.
  • BACKGROUND
  • [0002]
    MEMS devices, such as sensors, and related electrical devices, such as an application-specific integrated circuit (ASIC), are typically implemented on separate chips because the fabrication processes for each are incompatible with the other. For example, in modern CMOS technologies it can be critical to avoid high temperatures in order to preserve doping profiles, whereas high temperature steps may be necessary in steps of the electrical device fabrication. There are many disadvantages associated with two-chip solutions, including more complex and expensive packaging and the inability to implement applications requiring processing of very small signals.
  • [0003]
    More recently, so-called “MEMS first” processes have been developed for integrating MEMS and electrical devices on a single chip. Such processes, however, still present drawbacks and disadvantages, leaving room for improvement.
  • [0004]
    Therefore, there is a need for improved systems and methods that enable MEMS and electrical devices to be implemented on a single wafer.
  • SUMMARY
  • [0005]
    Embodiments are directed to monolithic integrated MEMS sensor devices and electrical devices and method related thereto.
  • [0006]
    In an embodiment, a method comprises forming a microelectromechanical system (MEMS) device on a substrate by forming a sacrificial layer on the substrate, depositing a first silicon layer on the sacrificial layer, the first silicon layer comprising at least one release aperture, forming a cavity in the sacrificial layer via the at least one release aperture, and sealing the cavity by depositing a second silicon layer; and forming an electrical device on the substrate.
  • [0007]
    In an embodiment, a monolithic integrated sensor device comprises a microelectromechanical system (MEMS) sensor formed on a substrate, the MEMS sensor comprising a cavity formed in a sacrificial layer via at least one release aperture and sealed by a silicon layer; and an electrical device formed on the substrate.
  • [0008]
    In an embodiment, a method comprises obtaining a silicon substrate; forming an implanted layer on the silicon substrate; patterning a monocrystalline sacrificial layer on the implanted layer; depositing a first silicon layer on the sacrificial layer, the first silicon layer having at least one release aperture; etching the sacrificial layer through the release aperture to form a cavity; and sealing the cavity by depositing a second silicon layer on the first silicon layer.
  • BRIEF DESCRIPTION OF THE DRAWINGS
  • [0009]
    The invention may be more completely understood in consideration of the following detailed description of various embodiments of the invention in connection with the accompanying drawings, in which:
  • [0010]
    FIGS. 1A-1E depict stages in the fabrication of a capacitive MEMS device integrated with an electrical device according to an embodiment.
  • [0011]
    FIGS. 2A-2D depict stages in the fabrication of a capacitive MEMS device integrated with an electrical device according to an embodiment.
  • [0012]
    FIG. 3 depicts a piezoresistive MEMS device integrated with an electrical device according to an embodiment.
  • [0013]
    FIGS. 4A-4G depict stages in the fabrication of a capacitive MEMS device integrated with an electrical device according to an embodiment.
  • [0014]
    FIG. 5 depicts a piezoresistive MEMS device integrated with an electrical device according to an embodiment.
  • [0015]
    While the invention is amenable to various modifications and alternative forms, specifics thereof have been shown by way of example in the drawings and will be described in detail. It should be understood, however, that the intention is not to limit the invention to the particular embodiments described. On the contrary, the intention is to cover all modifications, equivalents, and alternatives falling within the spirit and scope of the invention as defined by the appended claims.
  • DETAILED DESCRIPTION
  • [0016]
    Embodiments relate to MEMS devices, particularly MEMS devices integrated with related electrical devices on a single wafer. Embodiments utilize a modular process flow concept as part of a MEMS-first approach, enabling use of a novel cavity sealing process. The impact and potential detrimental effects on the electrical devices by the MEMS processing are thereby reduced or eliminated. At the same time, a highly flexible solution is provided that enables implementation of a variety of measurement principles, including capacitive and piezoresistive. A variety of sensor applications can therefore be addressed with improved performance and quality while remaining cost-effective.
  • [0017]
    FIG. 1 depicts stages in the fabrication of a capacitive MEMS device 100 with a local sacrificial layer, such as oxide. FIG. 1A depicts a silicon substrate 102 having an implanted layer 104. In one embodiment, substrate 102 is a p-type substrate, and layer 104 is an n-type implanted layer, forming a pn-junction. A patterned sacrificial layer 106 is formed on layer 104. In one embodiment, sacrificial layer 106 comprises oxide.
  • [0018]
    In FIG. 1B, a silicon layer 108 has been deposited, for example by epitaxial growth in an embodiment. Silicon layer 108 comprises release apertures 110 through which a cavity 112 is formed by sacrificial layer etching. In embodiments, cavity 112 is about 50 nanometers (nm) to about 100 nm high (with respect to the orientation of the drawing on the page). An optional cavity passivation layer 114, such as silicon oxide or silicon nitride, is deposited and etched back to assist with later cavity sealing.
  • [0019]
    In FIG. 1C, a silicon layer 116 deposited by epitaxial growth seals cavity 112. Optional cavity passivation layer 114, if implemented in embodiments, can help to avoid silicon growth in cavity 112 under certain process conditions. As depicted in FIG. 1C, the result is a polycrystalline silicon sealed membrane 116 on top of cavity 112, with remaining sacrificial layer 108 and a monocrystalline silicon 118 on the other areas of the surface of substrate 102.
  • [0020]
    In FIG. 1D, because of the monocrystalline silicon formed next to membrane structure 116, electrical devices such as a MOS transistor 120 can be processed in common CMOS or BICMOS processes on the same wafer 102. Lateral electrical isolation can be achieved by isolation trenches 122, and electrical contact to top and bottom electrodes can be carried out by contacts structures 124.
  • [0021]
    In FIG. 1E, a common wafer finishing process with intermetal oxide 126, electrical contacts 128 and metallization 130 can be applied. After sensor release at 132 and passivation 134, a capacitive sensor device 136, such as a pressure sensor in an embodiment, is formed next to electrical devices, such as transistor 120, on the same wafer 102. In other embodiments, sensor device 136 can comprise another sensor technology, such as a piezoresistive sensor, and transistor 120 can comprise some other electrical device. While FIG. 1 is an example for monolithic integrated sensor technology, the concept also has the flexibility to create a discrete sensor device without electrical devices if necessary or desired in specific applications.
  • [0022]
    FIG. 2 depicts stages in the fabrication of a capacitive MEMS device 200 with a local monocrystalline sacrificial layer, such as silicon germanium (SiGe) or doped silicon in embodiments. In FIG. 2A, a silicon substrate 202 has an implanted layer 204. In an embodiment, substrate 202 is a p-type substrate, and layer 204 n-type, such that a vertical pn-junction is formed. A monocrystalline sacrificial layer 206 is patterned on layer 104. Sacrificial layer 206 can comprise SiGe or doped silicon with a different dopant type or doping concentration than the silicon material 204 interfacing layer 206.
  • [0023]
    Referring to FIG. 2B, the monocrystalline nature of sacrificial layer 206 permits formation of a monocrystalline layer 208 by epitaxial growth next to and on top of sacrificial layer 206. Through release apertures 210, a portion sacrificial layer 206 is removed to form cavity 212. Embodiments of this process sequence are discussed in DE 19700290, which is incorporated herein by reference in its entirety. In embodiments, cavity 212 is about 50 nm to about 100 nm high (with respect to the orientation of the drawing on the page).
  • [0024]
    Referring to FIG. 2C, cavity 212 and release apertures 210 are filled with a filling material 214, such as oxide, for isolation and removed from the wafer surface. Through release apertures 216 formed over remaining sacrificial layer 206, a cavity 218 is formed by another sacrificial layer etch. An optional cavity passivation layer 220, such a silicon oxide or silicon nitride, is deposited and etched back on the wafer surface to assist with later cavity sealing.
  • [0025]
    Referring to FIG. 2D, a silicon layer 222 deposted by epitaxial growth seals cavity 218. Cavity passivation layer 220 can help to avoid silicon growth inside cavity 218 under certain process conditions. The result is a monocrystalline silicon sealed membrane 224 on top of cavity 218 and a monocrystalline silicon 226 on other areas of the wafer surface.
  • [0026]
    Because of the monocrystalline silicon 226, electrical devices like a MOS transistor 228 can be formed on the same wafer 202 in common CMOS or BICMOS processes. Lateral electrical isolation can be provided by isolation trenches 230, with electrical contact to the bottom and top electrodes of the capacitive sensor device provided by contact structures 232.
  • [0027]
    A common wafer finishing process with intermetal oxide 234, electrical contacts 236 and metallization 238 can be applied. After sensor release 240 and passivation 242, a capacitive sensor device 244, such as a pressure sensor, has been formed with an electrical device, such as transistor 228, on the same wafer 202. In other embodiments, sensor device 244 can comprise another sensor technology and transistor 228 can comprise some other electrical device. While FIG. 2, like FIG. 1, is an example for monolithic integrated sensor technology, the concept also has the flexibility to create a discrete sensor device without electrical devices if necessary or desired in specific applications.
  • [0028]
    FIG. 3 depicts a piezoresistive MEMS device 300 with a monocrystalline sacrificial layer, such as silicon germanium (SiGe) or doped silicon in embodiments. In the embodiment of FIG. 3, in contrast with those of FIGS. 1 and 2, a monocrystalline sacrificial layer need not be patterned because isolation is not needed in this piezoresistive sensing embodiment as it was in the aforementioned capacitive sensing embodiments.
  • [0029]
    Device 300 comprises a silicon substrate 302 with an implanted layer 304. In an embodiment, substrate 302 is a p-type substrate, and layer 304 is an n-type implanted layer. A monocrystalline sacrificial layer 306 is formed on layer 304. Sacrificial layer 306 can comprise, for example, SiGe or doped silicon having a different dopant type and/or concentration than the silicon material at the interface of layers 304 and 306.
  • [0030]
    Monocrystalline sacrificial layer 306 enables formation of a monocrystalline layer 308 on layer 306 by epitaxial growth. Through release apertures 310, a cavity 312 can be formed by sacrificial etch, such as is described in DE19700290, which is incorporated herein by reference in its entirety. In embodiments, cavity 312 is about 50 nm to about 100 nm high (with respect to the orientation of the drawing on the page). An optional cavity passivation layer 314, such as silicon oxide or silicon nitride or some other suitable material, is deposited and etched back on the wafer surface to assist with later cavity sealing. A silicon layer 316 deposited by epitaxial growth seals cavity 312, with cavity passivation layer 314, if present, assisting to avoid silicon growth inside cavity 312 under certain process conditions. The result thus far is a monocrystalline silicon sealed membrane 316 on top of a cavity 312, with the monocrystalline silicon also on all other areas of the wafer surface. Implantation of piezoresistors 318 on monocrystalline membrane 316 provides a piezoresistive sensor device 320.
  • [0031]
    The monocrystalline silicon 316 enables electrical devices such as a MOS transistor 322 to be processed in common CMOS or BICMOS processing concepts on the same wafer 302. A common wafer finishing process with intermetal oxide 324, electrical contacts 326 and metallization 328 can be applied. After sensor release 330 and passivation 332, a piezoresistive sensor device 334, such as a pressure sensor, has been formed next an electrical device, such as a transistor 322, on the same wafer 302. In other embodiments, sensor device 334 can comprise another sensor technology and transistor 322 can comprise some other electrical device. While FIG. 3, like FIGS. 1 and 2, is an example for monolithic integrated sensor technology, the concept also has the flexibility to create a discrete sensor device without electrical devices and/or both capacitive and piezoresistive sensor devices on the same wafer if necessary or desired in specific applications.
  • [0032]
    FIG. 4 depicts stages in the fabrication of a capacitive MEMS device 400 formed on a silicon on insulator (SOI) substrate. While SOI can be more expensive than other technologies, it can provide a simplified process flow in embodiments.
  • [0033]
    Referring to FIG. 4A, an SOI substrate comprises a silicon substrate 402, a box oxide layer 404 and a thin silicon device layer 406. In embodiments, layer 406 is about 100 nm to about 400 nm thick.
  • [0034]
    In FIG. 4B, a doped layer 408 below box oxide layer 404 is formed by high-energy implantation. Layer 408 thus can form a bottom electrode for MEMS devices.
  • [0035]
    In FIG. 4C, a monocrystalline silicon layer 410 is formed by epitaxial growth.
  • [0036]
    In FIG. 4D, a cavity 412 is formed by sacrificial layer etch through release apertures 414. In embodiments, cavity 412 is about 50 nm to about 100 nm high (with respect to the orientation of the drawing on the page). An optional cavity passivation layer 416, such as silicon oxide, silicon nitride or some other suitable material, is deposited and etched back on the wafer surface and can later assist with cavity sealing.
  • [0037]
    In FIG. 4E, a silicon layer 418 is deposited by epitaxial growth and seals cavity 412. Cavity passivation layer 416 can help to prevent silicon growth inside cavity 412 under certain process conditions. What results is a monocrystalline silicon sealed membrane 418 on top of cavity 412 with a monocrystalline silicon (418) also on all other areas of the wafer surface.
  • [0038]
    In FIG. 4F, a MOS transistor 420 or another electrical device is formed in common CMOS or BICMOS processing on the same wafer 402, enabled by the monocrystalline silicon 418. Lateral electrical isolation between the MEMS device and transistor 420 can be accomplished by isolation trenches 422. Electrical contact with the top and bottom electrodes of the sensor device can be established by contact structures 424.
  • [0039]
    In FIG. 4G, a common wafer finishing process with intermetal oxide 426, electrical contacts 428 and metallization 430 can be applied. After sensor release 432 and passivation 434, a capacitive sensor device 436, such as a pressure sensor, is created beside and on the same wafer as electrical devices, such as transistor 420. In other embodiments, sensor device 436 can comprise another sensor technology, and transistor 420 can comprise some other electrical device. While FIG. 4, like FIGS. 1-3, is an example for monolithic integrated sensor technology, the concept also has the flexibility to create a discrete sensor device without electrical devices on the same wafer if necessary or desired in specific applications.
  • [0040]
    FIG. 5 depicts stages a piezoresistive MEMS device 500 formed on a SOI substrate. While SOI can be more expensive than other technologies, it can provide a simplified process flow in embodiments. An SOI substrate 502 has a box oxide layer 504 and a silicon device layer 506 formed thereon. In embodiments, layer 506 is about 100 nm to about 400 nm thick. A monocrystalline silicon layer 508 is formed on layer 504 by epitaxial growth. Through release apertures 510, a cavity 512 is formed by sacrificial layer etch. In embodiments, cavity 512 is about 50 nm to about 100 nm high (with respect to the orientation of the drawing on the page). An optional cavity passivation layer 514, such as silicon oxide, silicon nitride or some other suitable material, is deposited and etched back on the wafer surface to assist with later cavity sealing.
  • [0041]
    A silicon layer 516 is then deposited by epitaxial growth, sealing cavity 512. Cavity passivation layer 514 can help to avoid silicon growth inside cavity 512 under certain process conditions. The result is thus a monocrystalline silicon sealed membrane 516 on cavity 512, with monocrystalline silicon on all other areas of the wafer surface.
  • [0042]
    Implantation of piezoresistors 518 on the monocrystalline membrane 516 forms a piezoresistive sensor device 520.
  • [0043]
    Monocrystalline layer 516 enables electrical devices, such as a MOS transistor 522, to be processed in common CMOS or BICMOS on the same wafer 502. A common wafer finishing process with intermetal oxide 524, electrical contacts 526 and metallization 528 can be applied. After sensor release 530 and passivation 532, a piezoresistive sensor device 520, such as a pressure sensor, is formed next to an electrical device, such as transistor 522 or some other device, on the same wafer 502. In other embodiments, sensor device 520 can comprise another sensor technology, and transistor 522 can comprise some other electrical device. While FIG. 5, like FIGS. 1-4, is an example for monolithic integrated sensor technology, the concept also has the flexibility to create a discrete sensor device without electrical devices and/or both capacitive and piezoresistive sensor devices on the same wafer if necessary or desired in specific applications.
  • [0044]
    Embodiments thereby provide cost-efficient, flexible solutions for monolithic integration of MEMS structures in modern CMOS and BICMOS technologies. Negative interactions between MEMS and electrical processing steps are avoided, at least in part by utilizing a novel cavity sealing process. The smaller dimensions of the cavity that can be implemented in embodiments also improve the robustness of the device, reducing the risk of over-stress. Further, advantages in test stages of manufacturing can also be provided in embodiments by enabling use of an applied voltage rather than a physical pressure or acceleration load, thereby reducing test complexity and efforts. This is enabled at least in part by the narrower cavity. High flexibility for a variety of sensing principles, such as capacitive and piezoresistive, is provided based on the same MEMS technology platform.
  • [0045]
    Various embodiments of systems, devices and methods have been described herein. These embodiments are given only by way of example and are not intended to limit the scope of the invention. It should be appreciated, moreover, that the various features of the embodiments that have been described may be combined in various ways to produce numerous additional embodiments. Moreover, while various materials, dimensions, shapes, configurations and locations, etc. have been described for use with disclosed embodiments, others besides those disclosed may be utilized without exceeding the scope of the invention.
  • [0046]
    Persons of ordinary skill in the relevant arts will recognize that the invention may comprise fewer features than illustrated in any individual embodiment described above. The embodiments described herein are not meant to be an exhaustive presentation of the ways in which the various features of the invention may be combined. Accordingly, the embodiments are not mutually exclusive combinations of features; rather, the invention may comprise a combination of different individual features selected from different individual embodiments, as understood by persons of ordinary skill in the art.
  • [0047]
    Any incorporation by reference of documents above is limited such that no subject matter is incorporated that is contrary to the explicit disclosure herein. Any incorporation by reference of documents above is further limited such that no claims included in the documents are incorporated by reference herein. Any incorporation by reference of documents above is yet further limited such that any definitions provided in the documents are not incorporated by reference herein unless expressly included herein.
  • [0048]
    For purposes of interpreting the claims for the present invention, it is expressly intended that the provisions of Section 112, sixth paragraph of 35 U.S.C. are not to be invoked unless the specific terms “means for” or “step for” are recited in a claim.

Claims (25)

  1. 1. A method comprising:
    forming a microelectromechanical system (MEMS) device on a substrate by:
    forming a sacrificial layer on the substrate,
    depositing a first silicon layer on the sacrificial layer, the first silicon layer comprising at least one release aperture,
    forming a cavity in the sacrificial layer via the at least one release aperture, and
    sealing the cavity by depositing a second silicon layer; and
    forming an electrical device on the substrate.
  2. 2. The method of claim 1, further comprising depositing a cavity passivation layer in the cavity.
  3. 3. The method of claim 1, wherein forming the sacrificial layer comprises patterning the sacrificial layer.
  4. 4. The method of claim 1, wherein forming the sacrificial layer comprises forming a monocrystalline sacrificial layer.
  5. 5. The method of claim 1, wherein forming the electrical device further comprises utilizing the monocrystalline sacrificial layer.
  6. 6. The method of claim 1, wherein sealing the cavity further comprises depositing a second silicon layer comprises monocrystalline silicon.
  7. 7. The method of claim 1, wherein forming a MEMS device comprises forming a sensor device.
  8. 8. The method of claim 7, wherein forming a sensor device comprises forming at least one of a capacitive sensor device or a piezoresistive sensor device.
  9. 9. The method of claim 1, wherein forming an electrical device comprises forming at least one transistor.
  10. 10. The method of claim 1, wherein forming an electrical device comprises utilizing one of a CMOS or BICMOS process.
  11. 11. The method of claim 1, wherein forming a MEMS device further comprises filling a portion of the cavity via at least one release aperture.
  12. 12. The method of claim 1, further comprising forming an isolation trench between the MEMS device and the electrical device.
  13. 13. A monolithic integrated sensor device comprising:
    a microelectromechanical system (MEMS) sensor formed on a substrate, the MEMS sensor comprising a cavity formed in a sacrificial layer via at least one release aperture and sealed by a silicon layer; and
    an electrical device formed on the substrate.
  14. 14. The device of claim 13, wherein the silicon layer comprises a monocrystalline silicon layer.
  15. 15. The device of claim 14, wherein the monocrystalline silicon layer forms a part of the electrical device.
  16. 16. The device of claim 13, further comprising an isolation trench formed between the MEMS sensor and the electrical device.
  17. 17. The device of claim 13, wherein the MEMS sensor is one of a capacitive sensor or a piezoresistive sensor.
  18. 18. The device of claim 13, wherein the electrical device comprises a transistor.
  19. 19. The device of claim 13, further comprising a cavity passivation layer inside the cavity.
  20. 20. The device of claim 13, wherein the silicon layer comprises a membrane.
  21. 21. A method comprising:
    obtaining a silicon substrate;
    forming an implanted layer on the silicon substrate;
    patterning a monocrystalline sacrificial layer on the implanted layer;
    depositing a first silicon layer on the sacrificial layer, the first silicon layer having at least one release aperture;
    etching the sacrificial layer through the release aperture to form a cavity; and
    sealing the cavity by depositing a second silicon layer on the first silicon layer.
  22. 22. The method of claim 21, further comprising forming a microelectromechanical system (MEMS) sensor by carrying out the obtaining, forming, patterning, depositing, etching and sealing.
  23. 23. The method of claim 22, further comprising forming a monolithic integrated sensor device by forming an electrical device on the substrate.
  24. 24. The method of claim 23, wherein forming an electrical device further comprises utilizing the second silicon layer.
  25. 25. The method of claim 23, wherein forming a MEMS sensor further comprises forming at least one of a capacitive MEMS sensor or a piezoresistive MEMS sensor, and wherein forming an electrical device further comprises forming a transistor.
US13032334 2011-02-22 2011-02-22 Cavity structures for mems devices Abandoned US20120211805A1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
US13032334 US20120211805A1 (en) 2011-02-22 2011-02-22 Cavity structures for mems devices

Applications Claiming Priority (6)

Application Number Priority Date Filing Date Title
US13032334 US20120211805A1 (en) 2011-02-22 2011-02-22 Cavity structures for mems devices
CN 201210038129 CN102674237B (en) 2011-02-22 2012-02-17 Monolithically integrated sensor means and a forming method thereof and a cavity forming method of the structure
DE201210025750 DE102012025750A1 (en) 2011-02-22 2012-02-21 HOLLOW STRUCTURES FOR MEMS DEVICES
DE201210202643 DE102012202643B4 (en) 2011-02-22 2012-02-21 Cavity structures for MEMS devices
US14281251 US9145292B2 (en) 2011-02-22 2014-05-19 Cavity structures for MEMS devices
US14832426 US9598277B2 (en) 2011-02-22 2015-08-21 Cavity structures for MEMS devices

Related Child Applications (1)

Application Number Title Priority Date Filing Date
US14281251 Division US9145292B2 (en) 2011-02-22 2014-05-19 Cavity structures for MEMS devices

Publications (1)

Publication Number Publication Date
US20120211805A1 true true US20120211805A1 (en) 2012-08-23

Family

ID=46652034

Family Applications (3)

Application Number Title Priority Date Filing Date
US13032334 Abandoned US20120211805A1 (en) 2011-02-22 2011-02-22 Cavity structures for mems devices
US14281251 Active US9145292B2 (en) 2011-02-22 2014-05-19 Cavity structures for MEMS devices
US14832426 Active US9598277B2 (en) 2011-02-22 2015-08-21 Cavity structures for MEMS devices

Family Applications After (2)

Application Number Title Priority Date Filing Date
US14281251 Active US9145292B2 (en) 2011-02-22 2014-05-19 Cavity structures for MEMS devices
US14832426 Active US9598277B2 (en) 2011-02-22 2015-08-21 Cavity structures for MEMS devices

Country Status (3)

Country Link
US (3) US20120211805A1 (en)
CN (1) CN102674237B (en)
DE (2) DE102012025750A1 (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20150059484A1 (en) * 2013-01-29 2015-03-05 Chad S Dawson Microelectromechanical system devices having crack resistant membrane structures and methods for the fabrication thereof
US9136136B2 (en) 2013-09-19 2015-09-15 Infineon Technologies Dresden Gmbh Method and structure for creating cavities with extreme aspect ratios
US9422149B2 (en) 2014-07-25 2016-08-23 Semiconductor Manufacturing International (Shanghai) Corporation Trapped sacrificial structures and methods of manufacturing same using thin-film encapsulation
US9738513B2 (en) 2015-02-16 2017-08-22 Memsen Electronics Inc MEMS pressure sensor and method for forming the same

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20120211805A1 (en) * 2011-02-22 2012-08-23 Bernhard Winkler Cavity structures for mems devices
US8748999B2 (en) * 2012-04-20 2014-06-10 Taiwan Semiconductor Manufacturing Company, Ltd. Capacitive sensors and methods for forming the same
CN105339297A (en) * 2013-06-27 2016-02-17 索泰克公司 Methods of fabricating semiconductor structures including cavities filled with a sacrifical material
US9618561B2 (en) * 2014-03-05 2017-04-11 Infineon Technologies Ag Semiconductor device and method for detecting damaging of a semiconductor device
JP2015175833A (en) * 2014-03-18 2015-10-05 セイコーエプソン株式会社 Physical amount sensor, altimeter, electronic equipment, and traveling object
US9376314B2 (en) * 2014-06-26 2016-06-28 Infineon Technologies Dresden Gmbh Method for manufacturing a micromechanical system
US9382111B2 (en) * 2014-06-26 2016-07-05 Infineon Technologies Dresden Gmbh Micromechanical system and method for manufacturing a micromechanical system
CN106365106A (en) * 2016-09-23 2017-02-01 杭州士兰集成电路有限公司 Mems device and manufacturing method thereof

Citations (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4317126A (en) * 1980-04-14 1982-02-23 Motorola, Inc. Silicon pressure sensor
US6006607A (en) * 1998-08-31 1999-12-28 Maxim Integrated Products, Inc. Piezoresistive pressure sensor with sculpted diaphragm
US6122964A (en) * 1998-02-28 2000-09-26 Robert Bosch Gmbh Micromechanical comb structure
US6379990B1 (en) * 1997-01-03 2002-04-30 Infineon Technologies Ag Method of fabricating a micromechanical semiconductor configuration
US6653702B2 (en) * 2000-06-13 2003-11-25 Denso Corporation Semiconductor pressure sensor having strain gauge and circuit portion on semiconductor substrate
US6662663B2 (en) * 2002-04-10 2003-12-16 Hewlett-Packard Development Company, L.P. Pressure sensor with two membranes forming a capacitor
US20070072428A1 (en) * 2005-09-29 2007-03-29 Chilcott Dan W Method for manufacturing a micro-electro-mechanical structure
US20070170528A1 (en) * 2006-01-20 2007-07-26 Aaron Partridge Wafer encapsulated microelectromechanical structure and method of manufacturing same
US7288824B2 (en) * 2003-06-04 2007-10-30 Robert Bosch Gmbh Microelectromechanical systems, and devices having thin film encapsulated mechanical structures
US7300854B2 (en) * 2000-12-22 2007-11-27 Robert Bosch Gmbh Method for producing a semiconductor component having a movable mass in particular, and semiconductor component produced according to this method
US7629657B2 (en) * 2003-02-26 2009-12-08 Robert Bosch Gmbh Episeal pressure sensor
US7833405B2 (en) * 2000-12-23 2010-11-16 Robert Bosch Gmbh Micromechanical component and corresponding production method

Family Cites Families (49)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4966663A (en) 1988-09-13 1990-10-30 Nanostructures, Inc. Method for forming a silicon membrane with controlled stress
DE4000496A1 (en) 1989-08-17 1991-02-21 Bosch Gmbh Robert A method for structuring a halbleiterkoerpers
JP3151816B2 (en) 1990-08-06 2001-04-03 日産自動車株式会社 Etching method
US5129981A (en) 1991-03-14 1992-07-14 General Motors Corporation Method of selectively etching silicon
US5332469A (en) 1992-11-12 1994-07-26 Ford Motor Company Capacitive surface micromachined differential pressure sensor
DE4241045C1 (en) 1992-12-05 1994-05-26 Bosch Gmbh Robert A method for anisotropic etching of silicon
EP0683921B1 (en) 1993-02-04 2004-06-16 Cornell Research Foundation, Inc. Microstructures and single mask, single-crystal process for fabrication thereof
US5445718A (en) 1994-01-24 1995-08-29 General Motors Corporation Electrochemical etch-stop on n-type silicon by injecting holes from a shallow p-type layer
DE19700290A1 (en) 1997-01-03 1998-07-16 Siemens Ag The micromechanical semiconductor arrangement and method of manufacturing a micromechanical semiconductor arrangement
US6093330A (en) 1997-06-02 2000-07-25 Cornell Research Foundation, Inc. Microfabrication process for enclosed microstructures
US5968336A (en) 1997-10-30 1999-10-19 Micron Technology, Inc. Method for fabricating lithographic stencil masks
DE19826382C2 (en) 1998-06-12 2002-02-07 Bosch Gmbh Robert A method for anisotropic etching of silicon
EP0979992B1 (en) 1998-08-11 2003-10-08 Infineon Technologies AG Method of Manufacturing a Micromechanical Sensor
EP1077475A3 (en) 1999-08-11 2003-04-02 Applied Materials, Inc. Method of micromachining a multi-part cavity
US7427526B2 (en) 1999-12-20 2008-09-23 The Penn State Research Foundation Deposited thin films and their use in separation and sacrificial layer applications
US6750153B2 (en) 2000-10-24 2004-06-15 Nanosciences Corporation Process for producing macroscopic cavities beneath the surface of a silicon wafer
US6767614B1 (en) 2000-12-19 2004-07-27 Wolfgang M. J. Hofmann Multiple-level actuators and clamping devices
WO2002061486A1 (en) 2000-12-19 2002-08-08 Coventor, Incorporated Bulk micromachining process for fabricating an optical mems device with integrated optical aperture
US6511915B2 (en) 2001-03-26 2003-01-28 Boston Microsystems, Inc. Electrochemical etching process
US6712983B2 (en) 2001-04-12 2004-03-30 Memsic, Inc. Method of etching a deep trench in a substrate and method of fabricating on-chip devices and micro-machined structures using the same
JP3778128B2 (en) * 2002-05-14 2006-05-24 株式会社デンソー Method of manufacturing a semiconductor device having a membrane
US7514283B2 (en) * 2003-03-20 2009-04-07 Robert Bosch Gmbh Method of fabricating electromechanical device having a controlled atmosphere
DE10333960A1 (en) * 2003-07-25 2005-02-10 Robert Bosch Gmbh Apparatus for capacitive pressure measurement as well as Vefahren for producing a capacitive pressure measuring device
US6930367B2 (en) * 2003-10-31 2005-08-16 Robert Bosch Gmbh Anti-stiction technique for thin film and wafer-bonded encapsulated microelectromechanical systems
US20050172717A1 (en) * 2004-02-06 2005-08-11 General Electric Company Micromechanical device with thinned cantilever structure and related methods
US20050176198A1 (en) 2004-02-11 2005-08-11 Kudelka Stephan P. Method of fabricating bottle trench capacitors using an electrochemical etch with electrochemical etch stop
WO2006046194A1 (en) 2004-10-27 2006-05-04 Koninklijke Philips Electronics N. V. Reduction of air damping in mems device
US7214324B2 (en) 2005-04-15 2007-05-08 Delphi Technologies, Inc. Technique for manufacturing micro-electro mechanical structures
US7425507B2 (en) 2005-06-28 2008-09-16 Micron Technology, Inc. Semiconductor substrates including vias of nonuniform cross section, methods of forming and associated structures
US7514287B2 (en) 2005-10-03 2009-04-07 Touch Micro-System Technology Inc. Method of forming a cavity by two-step etching and method of reducing dimension of a MEMS device
WO2008001253A3 (en) * 2006-06-29 2008-04-10 Nxp Bv Integrated single-crystal mems device
WO2008010181A3 (en) 2006-07-17 2008-04-03 Koninkl Philips Electronics Nv Micro-fluidic system
US7829465B2 (en) 2006-08-09 2010-11-09 Shouliang Lai Method for plasma etching of positively sloped structures
CN101267689A (en) * 2007-03-14 2008-09-17 佳乐电子股份有限公司 Capacitor micro microphone chip
FR2914782B1 (en) 2007-04-04 2009-06-12 St Microelectronics Sa Process for deep anisotropic silicon etching
US7493822B2 (en) 2007-07-05 2009-02-24 Honeywell International Inc. Small gauge pressure sensor using wafer bonding and electrochemical etch stopping
JP5379850B2 (en) 2008-06-06 2013-12-25 オセ−テクノロジーズ ビーブイ A method of forming a nozzle and an ink chamber of the ink jet device by etching a single crystal substrate
CN102150037B (en) 2008-07-11 2014-06-04 康奈尔大学 Nanofluidic channels with integrated charge sensors and methods based thereon
CN102209683B (en) * 2008-11-10 2015-08-05 Nxp股份有限公司 Having side walls mems leakage protection device package
KR101094870B1 (en) 2008-12-17 2011-12-15 한국전자통신연구원 humidity sensor and manufacturing method thereof
EP2259018B1 (en) 2009-05-29 2017-06-28 Infineon Technologies AG Gap control for die or layer bonding using intermediate layers of a micro-electromechanical system
JP2011022137A (en) 2009-06-15 2011-02-03 Rohm Co Ltd Mems device and method of fabricating the same
US8193595B2 (en) * 2009-12-31 2012-06-05 Stmicroelectronics, Inc. Method of forming a die having an IC region adjacent a MEMS region
US20110207323A1 (en) 2010-02-25 2011-08-25 Robert Ditizio Method of forming and patterning conformal insulation layer in vias and etched structures
DE102010061795A1 (en) 2010-11-23 2012-05-24 Robert Bosch Gmbh A method of producing a micromechanical membrane structure and MEMS device
US8319254B2 (en) 2011-02-14 2012-11-27 Kionix, Inc. Micro-electromechanical system devices
US20120211805A1 (en) * 2011-02-22 2012-08-23 Bernhard Winkler Cavity structures for mems devices
US8709848B2 (en) 2011-04-15 2014-04-29 Freescale Semiconductor, Inc. Method for etched cavity devices
US8957490B2 (en) 2013-06-28 2015-02-17 Infineon Technologies Dresden Gmbh Silicon light trap devices

Patent Citations (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4317126A (en) * 1980-04-14 1982-02-23 Motorola, Inc. Silicon pressure sensor
US6379990B1 (en) * 1997-01-03 2002-04-30 Infineon Technologies Ag Method of fabricating a micromechanical semiconductor configuration
US6122964A (en) * 1998-02-28 2000-09-26 Robert Bosch Gmbh Micromechanical comb structure
US6006607A (en) * 1998-08-31 1999-12-28 Maxim Integrated Products, Inc. Piezoresistive pressure sensor with sculpted diaphragm
US6653702B2 (en) * 2000-06-13 2003-11-25 Denso Corporation Semiconductor pressure sensor having strain gauge and circuit portion on semiconductor substrate
US7300854B2 (en) * 2000-12-22 2007-11-27 Robert Bosch Gmbh Method for producing a semiconductor component having a movable mass in particular, and semiconductor component produced according to this method
US7833405B2 (en) * 2000-12-23 2010-11-16 Robert Bosch Gmbh Micromechanical component and corresponding production method
US6662663B2 (en) * 2002-04-10 2003-12-16 Hewlett-Packard Development Company, L.P. Pressure sensor with two membranes forming a capacitor
US7629657B2 (en) * 2003-02-26 2009-12-08 Robert Bosch Gmbh Episeal pressure sensor
US7859067B2 (en) * 2003-06-04 2010-12-28 Robert Bosch Gmbh Microelectromechanical device including an encapsulation layer of which a portion is removed to expose a substantially planar surface having a portion that is disposed outside and above a chamber and including a field region on which integrated circuits are formed and methods for fabricating same
US20080237756A1 (en) * 2003-06-04 2008-10-02 Aaron Partridge Microelectromechanical systems, and methods for encapsualting and fabricating same
US7288824B2 (en) * 2003-06-04 2007-10-30 Robert Bosch Gmbh Microelectromechanical systems, and devices having thin film encapsulated mechanical structures
US20070072428A1 (en) * 2005-09-29 2007-03-29 Chilcott Dan W Method for manufacturing a micro-electro-mechanical structure
US20070170528A1 (en) * 2006-01-20 2007-07-26 Aaron Partridge Wafer encapsulated microelectromechanical structure and method of manufacturing same

Non-Patent Citations (4)

* Cited by examiner, † Cited by third party
Title
Definition of standard downloaded from URL on 2 September, 2013. *
Prime Faraday Technology Watch. ISBN 1-84402-020-7. An Introduction to MEMS. January 2002. An Introduction to MEMS (Micro-electromechanical Systems). *
Rogers, T., et. al., "Selective Anodization Using Masked Deep Ion Implantation", J. Micromech. Micreng. 3 (1993), pp. 146-148. *
Semiconductor Materials Product Guide, MEMC at page 5 downloaded from URL < http://sunedisonsilicon.com/assets/file/products/semiconductor/SunEdison_Semiconductor_Brochure.pdf> On 29 August, 2013 *

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20150059484A1 (en) * 2013-01-29 2015-03-05 Chad S Dawson Microelectromechanical system devices having crack resistant membrane structures and methods for the fabrication thereof
US9926187B2 (en) * 2013-01-29 2018-03-27 Nxp Usa, Inc. Microelectromechanical system devices having crack resistant membrane structures and methods for the fabrication thereof
US9136136B2 (en) 2013-09-19 2015-09-15 Infineon Technologies Dresden Gmbh Method and structure for creating cavities with extreme aspect ratios
US9663355B2 (en) 2013-09-19 2017-05-30 Infineon Technologies Dresden Gmbh Method and structure for creating cavities with extreme aspect ratios
US9428377B2 (en) * 2014-07-25 2016-08-30 Semiconductor Manufacturing International (Shanghai) Corporation Methods and structures for thin-film encapsulation and co-integration of same with microelectronic devices and microelectromechanical systems (MEMS)
US20160362295A1 (en) * 2014-07-25 2016-12-15 Semiconductor Manufacturing International Corporation Methods and structures for thin-film encapsulation and co-integration of same with microelectronic devices and microelectromechanical systems (mems)
US9637371B2 (en) 2014-07-25 2017-05-02 Semiconductor Manufacturing International (Shanghai) Corporation Membrane transducer structures and methods of manufacturing same using thin-film encapsulation
US9422149B2 (en) 2014-07-25 2016-08-23 Semiconductor Manufacturing International (Shanghai) Corporation Trapped sacrificial structures and methods of manufacturing same using thin-film encapsulation
US9738513B2 (en) 2015-02-16 2017-08-22 Memsen Electronics Inc MEMS pressure sensor and method for forming the same

Also Published As

Publication number Publication date Type
DE102012025750A1 (en) 2015-09-03 application
US20150353344A1 (en) 2015-12-10 application
DE102012202643B4 (en) 2015-07-23 grant
US9145292B2 (en) 2015-09-29 grant
CN102674237A (en) 2012-09-19 application
CN102674237B (en) 2015-12-02 grant
US9598277B2 (en) 2017-03-21 grant
US20140252422A1 (en) 2014-09-11 application
DE102012202643A1 (en) 2012-09-13 application

Similar Documents

Publication Publication Date Title
Smith et al. Embedded micromechanical devices for the monolithic integration of MEMS with CMOS
US5587343A (en) Semiconductor sensor method
US7493822B2 (en) Small gauge pressure sensor using wafer bonding and electrochemical etch stopping
US5706565A (en) Method for making an all-silicon capacitive pressure sensor
US5798283A (en) Method for integrating microelectromechanical devices with electronic circuitry
US5936164A (en) All-silicon capacitive pressure sensor
US6518084B1 (en) Method of producing a micromechanical structure for a micro-electromechanical element
US20100109102A1 (en) Method and structure for forming a gyroscope and accelerometer
US5963788A (en) Method for integrating microelectromechanical devices with electronic circuitry
US6936491B2 (en) Method of fabricating microelectromechanical systems and devices having trench isolated contacts
US5831162A (en) Silicon micromachined motion sensor and method of making
US20040248344A1 (en) Microelectromechanical systems, and methods for encapsualting and fabricating same
US6952042B2 (en) Microelectromechanical device with integrated conductive shield
US6232140B1 (en) Semiconductor integrated capacitive acceleration sensor and relative fabrication method
US6472244B1 (en) Manufacturing method and integrated microstructures of semiconductor material and integrated piezoresistive pressure sensor having a diaphragm of polycrystalline semiconductor material
US6952041B2 (en) Anchors for microelectromechanical systems having an SOI substrate, and method of fabricating same
US20070042521A1 (en) Microelectromechanical devices and fabrication methods
US6713828B1 (en) Monolithic fully-integrated vacuum sealed BiCMOS pressure sensor
Chavan et al. A monolithic fully-integrated vacuum-sealed CMOS pressure sensor
US20080053236A1 (en) Capacitive pressure sensor and method therefor
US20030049878A1 (en) Micromechanical component and corresponding production method
US20060260408A1 (en) Integrated differential pressure sensor and manufacturing process thereof
US6046067A (en) Micromechanical device and method for its production
US5672551A (en) Method for manufacturing a semiconductor pressure sensor with single-crystal silicon diaphragm and single-crystal gage elements
US5172205A (en) Piezoresistive semiconductor device suitable for use in a pressure sensor

Legal Events

Date Code Title Description
AS Assignment

Owner name: INFINEON TECHNOLOGIES AG, GERMANY

Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNORS:WINKLER, BERNHARD;ZANKL, ANDREAS;PRUEGL, KLEMENS;AND OTHERS;SIGNING DATES FROM 20110217 TO 20110222;REEL/FRAME:025879/0815