CN111762752A - MEMS device and method of manufacturing the same - Google Patents
MEMS device and method of manufacturing the same Download PDFInfo
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- CN111762752A CN111762752A CN202010446652.3A CN202010446652A CN111762752A CN 111762752 A CN111762752 A CN 111762752A CN 202010446652 A CN202010446652 A CN 202010446652A CN 111762752 A CN111762752 A CN 111762752A
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B81—MICROSTRUCTURAL TECHNOLOGY
- B81B—MICROSTRUCTURAL DEVICES OR SYSTEMS, e.g. MICROMECHANICAL DEVICES
- B81B7/00—Microstructural systems; Auxiliary parts of microstructural devices or systems
- B81B7/02—Microstructural systems; Auxiliary parts of microstructural devices or systems containing distinct electrical or optical devices of particular relevance for their function, e.g. microelectro-mechanical systems [MEMS]
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B81—MICROSTRUCTURAL TECHNOLOGY
- B81C—PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
- B81C1/00—Manufacture or treatment of devices or systems in or on a substrate
- B81C1/00015—Manufacture or treatment of devices or systems in or on a substrate for manufacturing microsystems
- B81C1/00023—Manufacture or treatment of devices or systems in or on a substrate for manufacturing microsystems without movable or flexible elements
- B81C1/00095—Interconnects
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B81—MICROSTRUCTURAL TECHNOLOGY
- B81C—PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
- B81C3/00—Assembling of devices or systems from individually processed components
- B81C3/001—Bonding of two components
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01L—MEASURING FORCE, STRESS, TORQUE, WORK, MECHANICAL POWER, MECHANICAL EFFICIENCY, OR FLUID PRESSURE
- G01L1/00—Measuring force or stress, in general
- G01L1/18—Measuring force or stress, in general using properties of piezo-resistive materials, i.e. materials of which the ohmic resistance varies according to changes in magnitude or direction of force applied to the material
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01P—MEASURING LINEAR OR ANGULAR SPEED, ACCELERATION, DECELERATION, OR SHOCK; INDICATING PRESENCE, ABSENCE, OR DIRECTION, OF MOVEMENT
- G01P15/00—Measuring acceleration; Measuring deceleration; Measuring shock, i.e. sudden change of acceleration
- G01P15/02—Measuring acceleration; Measuring deceleration; Measuring shock, i.e. sudden change of acceleration by making use of inertia forces using solid seismic masses
- G01P15/08—Measuring acceleration; Measuring deceleration; Measuring shock, i.e. sudden change of acceleration by making use of inertia forces using solid seismic masses with conversion into electric or magnetic values
- G01P15/12—Measuring acceleration; Measuring deceleration; Measuring shock, i.e. sudden change of acceleration by making use of inertia forces using solid seismic masses with conversion into electric or magnetic values by alteration of electrical resistance
- G01P15/123—Measuring acceleration; Measuring deceleration; Measuring shock, i.e. sudden change of acceleration by making use of inertia forces using solid seismic masses with conversion into electric or magnetic values by alteration of electrical resistance by piezo-resistive elements, e.g. semiconductor strain gauges
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01P—MEASURING LINEAR OR ANGULAR SPEED, ACCELERATION, DECELERATION, OR SHOCK; INDICATING PRESENCE, ABSENCE, OR DIRECTION, OF MOVEMENT
- G01P15/00—Measuring acceleration; Measuring deceleration; Measuring shock, i.e. sudden change of acceleration
- G01P15/02—Measuring acceleration; Measuring deceleration; Measuring shock, i.e. sudden change of acceleration by making use of inertia forces using solid seismic masses
- G01P15/08—Measuring acceleration; Measuring deceleration; Measuring shock, i.e. sudden change of acceleration by making use of inertia forces using solid seismic masses with conversion into electric or magnetic values
- G01P2015/0862—Measuring acceleration; Measuring deceleration; Measuring shock, i.e. sudden change of acceleration by making use of inertia forces using solid seismic masses with conversion into electric or magnetic values being provided with particular means being integrated into a MEMS accelerometer structure for providing particular additional functionalities to those of a spring mass system
Abstract
The invention provides an MEMS device and a manufacturing method thereof, wherein the MEMS device is an integrated device of a piezoresistive pressure sensor and an inertial sensor, and comprises an inertial device layer and a cover body, wherein the structural layer inertial device layer is provided with an inertial sensor structure; the cover body is connected with the inertial device layer; the cover body is provided with a piezoresistive pressure sensor structure.
Description
Technical Field
The invention relates to the field of semiconductor manufacturing, in particular to an MEMS device and a manufacturing method thereof, and further relates to the MEMS device which is an integrated device of a piezoresistive pressure sensor and an inertial sensor.
Background
MEMS (Micro Electro Mechanical System) devices have been widely used in consumer electronics, medical treatment, and automobiles due to their small size, low cost, and good integration.
With the continuous development of smart phones, wearable electronics, and consumer electronics, electronic components with low power consumption, smaller integrated package size, higher integration level, and low cost are in demand. In the existing integrated device of the pressure sensor and the inertial sensor, the pressure sensor and the inertial sensor are horizontally integrated by adopting a surface micromachining process and a bulk silicon micromachining process, wherein Bosch is taken as a representative example, so that the area of a chip is increased; or a CMOS-MEMS integration process represented by Invensense is adopted to integrate the capacitive pressure sensor and the inertial sensor, but the accuracy of the pressure sensor is reduced; or the pressure sensor and the inertial sensor are manufactured separately and then packaged together at a packaging facility, which increases the cost of the integrated device.
Disclosure of Invention
In view of the problems in the prior art, the present invention provides a MEMS device comprising an inertial device layer and a cap, the structural layer inertial device layer being provided with an inertial sensor structure; the cover body is connected with the inertial device layer; the cover body is provided with a piezoresistive pressure sensor structure.
Further, the cover body comprises a first substrate layer, a structural layer and a connecting layer which are sequentially stacked; the structural layer is provided with a pressure induction film; the connecting layer is connected with the inertial device layer; the first substrate layer is provided with an opening which communicates the pressure sensing film with the outside.
Further, a piezoresistor area is arranged on the pressure sensing film.
Furthermore, the cover body further comprises a conductive layer, the conductive layer is respectively connected with the connecting layer and the pressure sensing film, and the conductive layer is electrically connected with the leading-out end of the piezoresistor area.
Furthermore, a metal wiring layer is arranged on the connecting layer, a lead hole communicated to the conducting layer is further formed in the connecting layer, and the metal wiring layer covers the lead hole and is electrically connected with the conducting layer.
Furthermore, the metal wiring layer further defines a bonding position, the inertial device layer is provided with a bonding metal matched with the bonding position, and the inertial device layer is connected with the cover body through eutectic bonding.
Furthermore, the MEMS device further comprises a second substrate layer, the second substrate layer is connected with the inertial device layer, and the second substrate layer, the inertial device layer and the cover body are sequentially stacked.
Further, the second substrate layer, the pressure sensitive membrane, the conductive layer and the connecting layer define a cavity in which the inertial sensor structure is located.
Further, the opening is arranged at a position facing the pressure sensing film, or at a position deviating from the pressure sensing film.
The invention also provides a manufacturing method of the MEMS device, which comprises the following steps:
providing a substrate sheet;
forming a porous silicon layer on the substrate sheet;
depositing a structural layer, and enabling the porous silicon layer to form a cavity;
forming a piezoresistor area and a pressure sensing film on the structural layer;
depositing a conductive layer, patterning the conductive layer to form a lead-out layer which is used as a supporting layer and an electrical lead-out structure of the pressure sensing film;
depositing a connecting layer, and forming a lead hole communicated to the lead-out layer on the connecting layer;
depositing metal and patterning to form metal wiring and bonding metal of the device;
etching the connecting layer to expose the pressure sensing film and form a groove;
eutectic bonding is carried out on the device chip with the inertia sensor structure through the bonding metal on the connecting layer, and the groove and the pressure sensing film are used for limiting a cavity where the inertia sensor structure is located;
and etching the substrate sheet to form an opening for communicating the pressure sensing film with the outside.
According to the MEMS device and the manufacturing method thereof, the integrated device of the piezoresistive pressure sensor and the inertial sensor is manufactured by fusing the surface micromachining process with the CMOS-MEMS process, so that the area of a chip is effectively controlled, the manufacture of the piezoresistive pressure sensor is not influenced by the manufacture of the inertial sensor, the problems of larger chip area and reduced precision of the piezoresistive pressure sensor in the existing integrated device of the piezoresistive pressure sensor and the inertial sensor are effectively solved, and the product cost is reduced.
The conception, the specific structure and the technical effects of the present invention will be further described with reference to the accompanying drawings to fully understand the objects, the features and the effects of the present invention.
Drawings
FIGS. 1-3 are schematic structural views of various process steps for fabricating a device wafer having inertial sensor structures in accordance with an embodiment of the present invention;
FIGS. 4-9 are schematic structural views of process steps for preparing a cover with a piezoresistive pressure sensor according to an embodiment of the present invention;
FIG. 10 is a schematic view of a bonded device wafer and cap in accordance with an embodiment of the present invention;
FIG. 11 is a schematic structural diagram of one embodiment of the present invention;
fig. 12 is a schematic structural view of another embodiment of the present invention.
Detailed Description
In the description of the embodiments of the present invention, it should be understood that the terms "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", "clockwise", "counterclockwise", etc., indicate orientations or positional relationships based on those shown in the drawings, and are only for convenience of description and simplicity of description, but do not indicate or imply that the referred devices or elements must have a specific orientation, be constructed and operated in a specific orientation, and thus, should not be construed as limiting the invention. The drawings are schematic diagrams or conceptual diagrams, and the relationship between the thickness and the width of each part, the proportional relationship between the parts and the like are not completely consistent with actual values.
With reference to figure 1 of the drawings,a substrate 1 is provided, and the substrate 1 may be a bulk (bulk) silicon substrate. Alternatively, the substrate 1 may comprise an elemental semiconductor, such as silicon or germanium in a crystal structure; compound semiconductors such as silicon germanium, silicon carbide, gallium arsenide, gallium phosphide, indium arsenide, and/or indium antimonide; or a combination of the foregoing. Possible substrates 1 also include silicon-on-insulator (SOI) substrates fabricated using separation by implantation of oxygen (SIMOX), wafer bonding, and/or other suitable methods. The substrate 1 may also comprise various dopants, possibly doped with a P-type dopant, such as boron or BF2N-type dopants such as phosphorus or arsenic and/or combinations thereof.
Adopt the photoetching glue as the mask, after with the photoetching glue patterning, adopt dark silicon etching technology sculpture to form recess 3 and recess 4, the degree of depth of recess 3 and recess 4 is 5 ~ 8 um. The photolithography process may employ UV photolithography or electron beam lithography, and the photolithography process may include photoresist coating (e.g., spin coating), soft baking, mask alignment, exposure, post-exposure baking, photoresist development, cleaning, drying (e.g., spin drying and/or hard baking), other suitable photolithography techniques, and/or combinations thereof. The etching process may include dry etching (e.g., reactive ion etching), wet etching, and/or other etching methods.
And removing the photoresist and depositing an oxide layer 2, specifically depositing silicon oxide. Exemplary layer Deposition processes include Chemical Vapor Deposition (CVD), which specifically also includes Atmospheric Pressure Chemical Vapor Deposition (APCVD), Low Pressure Chemical Vapor Deposition (LPCVD), Plasma Enhanced Chemical Vapor Deposition (PECVD); exemplary Layer Deposition processes also include Physical Vapor Deposition (PVD), Atomic Layer Deposition (ALD), thermal oxidation, e-beam evaporation, and/or other suitable Deposition techniques or combinations of the foregoing.
Referring to fig. 2, a single crystal silicon wafer is provided, in this example a single crystal silicon wafer with a doped <100> crystal orientation is used.
And bonding the substrate 1 and the monocrystalline silicon wafer together by adopting an SOI bonding process to form a device wafer, and thinning the outward surface of the monocrystalline silicon wafer in the device wafer to 14-25 um by adopting Chemical Mechanical Polishing (CMP) to form an inertia device structure layer 5.
And sputtering a metal layer, and patterning the metal layer through a photoetching/etching process to form a bonding metal layer 6. In this embodiment, Al-Ge bonding is adopted, and the bonding metal layer 6 is made of a germanium metal material. The term "patterning a specific material layer or forming a specific structure through a photolithography/etching process" as used herein means that the specific material layer is formed into a desired mask pattern or a specific structure through a photolithography process and a corresponding etching process, and the above processes include a photoresist removing process.
Referring to fig. 3, after patterning the photoresist using the photoresist as a mask, a structure pattern of the inertial sensor, including a suspended structure 7 and a suspended structure 8 of the inertial sensor, and an anchor point 25, is formed by Etching using a Deep Reactive Ion Etching (DRIE) process, thereby completing the manufacturing of the structure of the inertial sensor. For inertial sensors, which need to be sealed to operate in a closed environment, it is common practice to bond a cover to the inertial sensor structure on the other side with respect to the substrate 1, so that the corresponding inertial sensor structure is disposed in the sealed cavity defined by the substrate 1 and the cover.
The process flow for manufacturing the piezoresistive pressure sensor on the cover is detailed below.
Referring to fig. 4, a cover substrate 11 is provided, such as a silicon substrate, and a low-doped P-type monocrystalline silicon wafer is used in the present embodiment, but not limited thereto.
The oxide layer, in this embodiment about thickness, is grown by thermal oxidation or chemical vapor deposition
The silicon oxide is patterned by using photoresist as a mask, and the exposed silicon oxide is etched to form a subsequent N-type heavily doped window. Watch with watchAnd performing ion implantation on the surface, implanting phosphorus, removing the photoresist after the ion implantation is finished, and performing annealing after the ion implantation to form a barrier layer 20 serving as subsequent etched porous silicon. In other embodiments, the doping is performed by diffusion, and at this time, after the silicon oxide etching is completed in the above process, the photoresist is removed, and then the phosphorus doping is performed by a diffusion process. If the doping is performed by using a diffusion process, the thickness of the oxide layer can be adjusted according to the doping concentration, so that the non-doped region can be effectively blocked.
Removing the oxide layer on the surface, depositing silicon oxide and silicon nitride in sequence to form a composite layer 21, wherein the composite layer 21 of this embodiment is deposited by a chemical vapor deposition process
Left and right silicon oxides and deposition by plasma enhanced chemical vapor deposition
And silicon nitride on the left and right.
The photoresist is used as a mask, after the photoresist is patterned, the exposed silicon nitride and the silicon oxide below the silicon nitride are etched, a P-type heavily doped window 24 to be performed subsequently is formed, the window 24 defines the subsequent porous silicon region, and a pressure sensing film region of the piezoresistive pressure sensor is manufactured.
And carrying out ion implantation on the surface, implanting boron, removing the photoresist after the ion implantation is finished, and annealing after the ion implantation is carried out. In other embodiments, the doping is performed by diffusion, and at this time, after the etching of the silicon nitride and the silicon oxide is completed in the above process, the photoresist is removed first, and then the boron doping is performed by a diffusion process.
Referring to fig. 5, a porous silicon layer 21a is formed in the doped region defined by the window 24 using an electrochemical etching process using an etching solution of HF and C2H5OH mixed solution, and removing the composite layer 21 after completion, wherein HF and C can be used2H5Removing constituent layers 21 of OH-mixed solution or hot phosphoric acid solutionSilicon oxide and silicon nitride.
Referring to fig. 6, annealing is performed in a hydrogen atmosphere to substantially eliminate open pores on the surface of the porous silicon layer 21 a. Polysilicon is deposited on the surface of the cover substrate 11 by an epitaxial process, and the porous silicon layer 21a is converted into the cavity 21 after the high temperature process of the epitaxial process.
The polycrystalline silicon deposited by epitaxy is thinned to a preset thickness by chemical mechanical polishing to form a polycrystalline epitaxial layer 10, and then a pressure sensing film of the piezoresistive pressure sensor is formed on the polycrystalline epitaxial layer 10.
Referring to fig. 7, silicon oxide is deposited on the polycrystalline epitaxial layer 10, a photoresist is used as a mask, the exposed silicon oxide is etched after the photoresist is patterned, a piezoresistive window of the piezoresistive pressure sensor is formed, ions are implanted into the surface, boron is implanted, P-type doping is performed on the piezoresistive window region, the photoresist is removed after the doping, annealing is performed after the implantation, and thus the piezoresistive region 16, specifically, a wheatstone bridge is formed. Silicon oxide is then deposited to protect the varistor region 16.
After patterning the photoresist using the photoresist as a mask, the exposed silicon oxide on the polycrystalline epitaxial layer 10 is etched away to form a window 27. After removing the photoresist, a poly-etching is performed using the remaining silicon oxide on the poly-epitaxial layer 10 as a mask to form the vent hole 26, the step of etching is set to be isotropic, and ClF is used3Or SF6As a process gas, lateral etching is also formed during the dry etching, thereby etching the vent holes 26 having a size larger than the window 27, the vent holes 26 defining the pressure-sensitive film 10 a. Then, thermal oxidation is performed to form a silicon oxide barrier layer 22 on the sidewall of the cavity 21.
Referring to fig. 8, in view of the size of the window 27 being smaller than the size of the vent hole 26, the window 27 may be sealed by depositing an oxide layer with a certain thickness, so that the cavity 21 becomes a closed cavity, and the sidewall inside the cavity is covered by the silicon oxide barrier layer 22.
The silicon oxide on the polycrystalline epitaxial layer 10 is patterned by a photolithography/etching process to expose the terminals of the varistor regions 16 on the pressure-sensitive film 10 a.
Polysilicon is deposited and doped using a low pressure chemical vapor deposition process, the type of doping being the same as the type of doping in the varistor region 16, in this embodiment boron is used. And patterning the deposited polycrystalline layer by adopting a photoetching/etching process to form a conductive layer 17, wherein the conductive layer 17 is electrically connected with the leading-out terminal of the piezoresistor area 16.
Silicon oxide is deposited by a chemical vapor deposition process and the remaining silicon oxide on the surface is patterned by a photolithography/etching process to form the protective layer 14 of the conductive layer 17.
Referring to fig. 9, polysilicon is epitaxially deposited for the second time and is thinned to a predetermined thickness using chemical mechanical polishing to form an epitaxial layer 9. An oxide layer 23 is deposited, the oxide layer 23 being silicon oxide deposited by chemical vapor deposition. After the photoresist is patterned by using the photoresist as a mask, an etching operation is performed, the etching is stopped at the conductive layer 17 to form a lead hole 18, and then the photoresist is removed.
And sputtering a metal layer, and patterning the metal layer by adopting a photoetching process to form a wiring layer 12, wherein the wiring layer 12 is used as a bonding layer of the device chip and the cover body and is also used as wiring of the piezoresistive pressure sensor and the inertial sensor. The metal of the wiring layer 12 also covers the filled lead holes 18 to form electrical connections with the conductive layer 17, and in this embodiment, the wiring layer 12 is made of Al metal.
And the photoresist is used as a mask, the exposed silicon oxide is etched after the photoresist is patterned, and then the groove 13 and the groove 15 are etched by adopting a deep silicon etching process. The epitaxial layer 9 forms a step on the one hand to reduce the stress of the pressure-sensitive film 10a and on the other hand to form a groove 13 and a groove 15, the groove 13 and the groove 15 being part of a cavity that seals the inertial sensor structure on the device chip, the depth of the groove 13 and the groove 15 being such that they provide space for the movement of the inertial sensor structure in the Z-direction.
Referring to fig. 10, a device wafer prepared with an inertial sensor structure and a lid prepared with a piezoresistive pressure sensor structure are bonded together, specifically, eutectic bonding is performed through bonding metals Ge and Al respectively formed on the two.
And thinning the exposed surface of the cover body to a preset thickness by adopting chemical mechanical polishing.
Referring to fig. 11, after the photoresist is used as a mask and patterned, the silicon and the silicon oxide barrier layer 22 above the cavity 21 are etched away by using a deep silicon etching process to form the air hole 19 communicating the pressure-sensitive film 10a with the external environment, and after the completion, the photoresist is removed, so as to finally form the piezoresistive pressure sensor and inertial sensor integrated device of the present embodiment.
Referring to fig. 12, the present embodiment is different from the previous embodiments in the position of the vent hole 19. In the structure of fig. 11, the vent hole 19 is located at a position facing the pressure-sensitive film 10a, so as to completely expose the pressure-sensitive film 10a, and the vent hole 19 in this embodiment is located at a position shifted to one side of the pressure-sensitive film 10a, so that the pressure-sensitive film 10 can be similarly communicated with the external environment.
The foregoing detailed description of the preferred embodiments of the invention has been presented. It should be understood that numerous modifications and variations could be devised by those skilled in the art in light of the present teachings without departing from the inventive concepts. Therefore, the technical solutions available to those skilled in the art through logic analysis, reasoning and limited experiments based on the prior art according to the concept of the present invention should be within the scope of protection defined by the claims.
Claims (10)
1. The MEMS device is characterized by comprising an inertial device layer and a cover body, wherein the structural layer inertial device layer is provided with an inertial sensor structure; the cover body is connected with the inertial device layer; the cover body is provided with a piezoresistive pressure sensor structure.
2. The MEMS device of claim 1, wherein the cap comprises a first substrate layer, a structural layer, and a connecting layer in a stacked arrangement; the structural layer is provided with a pressure induction film; the connecting layer is connected with the inertial device layer; the first substrate layer is provided with an opening which communicates the pressure sensing film with the outside.
3. The MEMS device of claim 2, wherein the pressure sensitive membrane has a piezoresistive region disposed thereon.
4. The MEMS device of claim 3, wherein the cap further comprises a conductive layer, the conductive layer is connected to the connection layer and the pressure sensitive film, respectively, and the conductive layer is electrically connected to the terminals of the piezoresistive region.
5. The MEMS device of claim 4, wherein a metal wiring layer is provided on the connection layer, the connection layer further being provided with a lead hole communicating to the conductive layer, the metal wiring layer covering the lead hole so as to be electrically connected to the conductive layer.
6. The MEMS device of claim 5, wherein the metal wiring layer further defines a bonding location, the inertial device layer being provided with a bonding metal that mates with the bonding location, the inertial device layer being connected to the cap by eutectic bonding.
7. The MEMS device of claim 2, further comprising a second substrate layer coupled to the inertial device layer, the second substrate layer, the inertial device layer, and the cover being stacked in sequence.
8. The MEMS device of claim 7, wherein the second substrate layer, the pressure sensitive membrane, the conductive layer, and the connecting layer define a cavity in which the inertial sensor structure is located.
9. The MEMS device, as recited in claim 2, wherein the opening is disposed opposite the pressure sensing membrane or is disposed offset from the pressure sensing membrane.
10. A method of fabricating a MEMS device, comprising:
providing a substrate sheet;
forming a porous silicon layer on the substrate sheet;
depositing a structural layer, and enabling the porous silicon layer to form a cavity;
forming a piezoresistor area and a pressure sensing film on the structural layer;
depositing a conductive layer, patterning the conductive layer to form a lead-out layer which is used as a supporting layer and an electrical lead-out structure of the pressure sensing film;
depositing a connecting layer, and forming a lead hole communicated to the lead-out layer on the connecting layer;
depositing metal and patterning to form metal wiring and bonding metal of the device;
etching the connecting layer to expose the pressure sensing film and form a groove;
eutectic bonding is carried out on the device chip with the inertia sensor structure through the bonding metal on the connecting layer, and the groove and the pressure sensing film are used for limiting a cavity where the inertia sensor structure is located;
and etching the substrate sheet to form an opening for communicating the pressure sensing film with the outside.
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2023030100A1 (en) * | 2021-08-31 | 2023-03-09 | 华为技术有限公司 | Inertial sensor and electronic device |
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| WO2023030100A1 (en) * | 2021-08-31 | 2023-03-09 | 华为技术有限公司 | Inertial sensor and electronic device |
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