US20090020434A1 - Substrate processing method and substrate processing apparatus - Google Patents
Substrate processing method and substrate processing apparatus Download PDFInfo
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- US20090020434A1 US20090020434A1 US12/216,224 US21622408A US2009020434A1 US 20090020434 A1 US20090020434 A1 US 20090020434A1 US 21622408 A US21622408 A US 21622408A US 2009020434 A1 US2009020434 A1 US 2009020434A1
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- Prior art keywords
- substrate
- plating solution
- electroplating
- contact
- film
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- 239000000758 substrate Substances 0.000 title claims abstract description 294
- 238000003672 processing method Methods 0.000 title claims abstract description 22
- 238000012545 processing Methods 0.000 title claims description 23
- 238000007747 plating Methods 0.000 claims abstract description 244
- 238000009713 electroplating Methods 0.000 claims abstract description 84
- KJTLSVCANCCWHF-UHFFFAOYSA-N Ruthenium Chemical compound [Ru] KJTLSVCANCCWHF-UHFFFAOYSA-N 0.000 claims abstract description 65
- 229910052707 ruthenium Inorganic materials 0.000 claims abstract description 65
- 239000000654 additive Substances 0.000 claims abstract description 28
- 230000000996 additive effect Effects 0.000 claims abstract description 21
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 103
- 229910052802 copper Inorganic materials 0.000 claims description 102
- 239000010949 copper Substances 0.000 claims description 102
- 238000004140 cleaning Methods 0.000 claims description 7
- 238000001035 drying Methods 0.000 claims description 6
- 229910000881 Cu alloy Inorganic materials 0.000 claims description 5
- 238000005259 measurement Methods 0.000 claims description 5
- 230000003287 optical effect Effects 0.000 claims description 4
- JPVYNHNXODAKFH-UHFFFAOYSA-N Cu2+ Chemical compound [Cu+2] JPVYNHNXODAKFH-UHFFFAOYSA-N 0.000 claims description 3
- QAOWNCQODCNURD-UHFFFAOYSA-L Sulfate Chemical compound [O-]S([O-])(=O)=O QAOWNCQODCNURD-UHFFFAOYSA-L 0.000 claims description 3
- 229910001431 copper ion Inorganic materials 0.000 claims description 3
- 230000004888 barrier function Effects 0.000 abstract description 28
- 239000000463 material Substances 0.000 abstract description 13
- 239000000243 solution Substances 0.000 description 175
- 239000010410 layer Substances 0.000 description 75
- 238000000034 method Methods 0.000 description 37
- 230000015572 biosynthetic process Effects 0.000 description 21
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- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 17
- 230000000977 initiatory effect Effects 0.000 description 15
- 238000012546 transfer Methods 0.000 description 15
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- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 10
- 238000007654 immersion Methods 0.000 description 9
- 239000004065 semiconductor Substances 0.000 description 9
- 238000000151 deposition Methods 0.000 description 8
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- 230000008021 deposition Effects 0.000 description 6
- 229910052681 coesite Inorganic materials 0.000 description 5
- 229910052906 cristobalite Inorganic materials 0.000 description 5
- 238000010586 diagram Methods 0.000 description 5
- 239000000377 silicon dioxide Substances 0.000 description 5
- 229910052682 stishovite Inorganic materials 0.000 description 5
- 238000012360 testing method Methods 0.000 description 5
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- 230000002378 acidificating effect Effects 0.000 description 4
- 229910052782 aluminium Inorganic materials 0.000 description 4
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 4
- 229910052751 metal Inorganic materials 0.000 description 4
- 239000002184 metal Substances 0.000 description 4
- 239000000126 substance Substances 0.000 description 4
- 229910052721 tungsten Inorganic materials 0.000 description 4
- ZAMOUSCENKQFHK-UHFFFAOYSA-N Chlorine atom Chemical compound [Cl] ZAMOUSCENKQFHK-UHFFFAOYSA-N 0.000 description 3
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 3
- NINIDFKCEFEMDL-UHFFFAOYSA-N Sulfur Chemical compound [S] NINIDFKCEFEMDL-UHFFFAOYSA-N 0.000 description 3
- 239000000460 chlorine Substances 0.000 description 3
- 229910052801 chlorine Inorganic materials 0.000 description 3
- 230000007547 defect Effects 0.000 description 3
- 229910052710 silicon Inorganic materials 0.000 description 3
- 239000010703 silicon Substances 0.000 description 3
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- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 2
- 230000008901 benefit Effects 0.000 description 2
- 230000008859 change Effects 0.000 description 2
- 229910000365 copper sulfate Inorganic materials 0.000 description 2
- ARUVKPQLZAKDPS-UHFFFAOYSA-L copper(II) sulfate Chemical compound [Cu+2].[O-][S+2]([O-])([O-])[O-] ARUVKPQLZAKDPS-UHFFFAOYSA-L 0.000 description 2
- 239000013078 crystal Substances 0.000 description 2
- 238000001514 detection method Methods 0.000 description 2
- HTXDPTMKBJXEOW-UHFFFAOYSA-N dioxoiridium Chemical compound O=[Ir]=O HTXDPTMKBJXEOW-UHFFFAOYSA-N 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
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- 229910000457 iridium oxide Inorganic materials 0.000 description 2
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- 238000001459 lithography Methods 0.000 description 2
- 239000011574 phosphorus Substances 0.000 description 2
- 229910052698 phosphorus Inorganic materials 0.000 description 2
- 238000005498 polishing Methods 0.000 description 2
- 229910001362 Ta alloys Inorganic materials 0.000 description 1
- 229910001069 Ti alloy Inorganic materials 0.000 description 1
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 1
- 230000001133 acceleration Effects 0.000 description 1
- 229910045601 alloy Inorganic materials 0.000 description 1
- 239000000956 alloy Substances 0.000 description 1
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- -1 e.g. Substances 0.000 description 1
- 230000005611 electricity Effects 0.000 description 1
- 238000007772 electroless plating Methods 0.000 description 1
- 239000012212 insulator Substances 0.000 description 1
- 150000002500 ions Chemical class 0.000 description 1
- 229910021645 metal ion Inorganic materials 0.000 description 1
- 239000000203 mixture Substances 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 239000003002 pH adjusting agent Substances 0.000 description 1
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- 239000011241 protective layer Substances 0.000 description 1
- 230000000717 retained effect Effects 0.000 description 1
- 229910052709 silver Inorganic materials 0.000 description 1
- 239000004332 silver Substances 0.000 description 1
- 229910052715 tantalum Inorganic materials 0.000 description 1
- GUVRBAGPIYLISA-UHFFFAOYSA-N tantalum atom Chemical compound [Ta] GUVRBAGPIYLISA-UHFFFAOYSA-N 0.000 description 1
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 description 1
- 239000010937 tungsten Substances 0.000 description 1
- 239000011800 void material Substances 0.000 description 1
Images
Classifications
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- C—CHEMISTRY; METALLURGY
- C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
- C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
- C25D3/00—Electroplating: Baths therefor
- C25D3/02—Electroplating: Baths therefor from solutions
- C25D3/38—Electroplating: Baths therefor from solutions of copper
-
- C—CHEMISTRY; METALLURGY
- C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
- C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
- C25D17/00—Constructional parts, or assemblies thereof, of cells for electrolytic coating
- C25D17/001—Apparatus specially adapted for electrolytic coating of wafers, e.g. semiconductors or solar cells
-
- C—CHEMISTRY; METALLURGY
- C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
- C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
- C25D21/00—Processes for servicing or operating cells for electrolytic coating
-
- C—CHEMISTRY; METALLURGY
- C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
- C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
- C25D21/00—Processes for servicing or operating cells for electrolytic coating
- C25D21/12—Process control or regulation
-
- C—CHEMISTRY; METALLURGY
- C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
- C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
- C25D5/00—Electroplating characterised by the process; Pretreatment or after-treatment of workpieces
- C25D5/10—Electroplating with more than one layer of the same or of different metals
-
- C—CHEMISTRY; METALLURGY
- C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
- C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
- C25D5/00—Electroplating characterised by the process; Pretreatment or after-treatment of workpieces
- C25D5/34—Pretreatment of metallic surfaces to be electroplated
-
- C—CHEMISTRY; METALLURGY
- C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
- C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
- C25D5/00—Electroplating characterised by the process; Pretreatment or after-treatment of workpieces
- C25D5/60—Electroplating characterised by the structure or texture of the layers
- C25D5/615—Microstructure of the layers, e.g. mixed structure
- C25D5/617—Crystalline layers
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
- H01L21/288—Deposition of conductive or insulating materials for electrodes conducting electric current from a liquid, e.g. electrolytic deposition
- H01L21/2885—Deposition of conductive or insulating materials for electrodes conducting electric current from a liquid, e.g. electrolytic deposition using an external electrical current, i.e. electro-deposition
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67011—Apparatus for manufacture or treatment
- H01L21/67017—Apparatus for fluid treatment
- H01L21/67028—Apparatus for fluid treatment for cleaning followed by drying, rinsing, stripping, blasting or the like
- H01L21/6704—Apparatus for fluid treatment for cleaning followed by drying, rinsing, stripping, blasting or the like for wet cleaning or washing
- H01L21/67051—Apparatus for fluid treatment for cleaning followed by drying, rinsing, stripping, blasting or the like for wet cleaning or washing using mainly spraying means, e.g. nozzles
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L21/687—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches
- H01L21/68714—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support
- H01L21/68728—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support characterised by a plurality of separate clamping members, e.g. clamping fingers
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76841—Barrier, adhesion or liner layers
- H01L21/76843—Barrier, adhesion or liner layers formed in openings in a dielectric
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76841—Barrier, adhesion or liner layers
- H01L21/76871—Layers specifically deposited to enhance or enable the nucleation of further layers, i.e. seed layers
- H01L21/76873—Layers specifically deposited to enhance or enable the nucleation of further layers, i.e. seed layers for electroplating
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76877—Filling of holes, grooves or trenches, e.g. vias, with conductive material
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67011—Apparatus for manufacture or treatment
- H01L21/6715—Apparatus for applying a liquid, a resin, an ink or the like
Definitions
- the present invention relates to a substrate recessing method and a substrate processing apparatus, and more particularly to a substrate processing method and a substrate processing apparatus which are useful for filling a metal (interconnect material), such as copper or silver, into fine interconnect recesses provided in a surface (surface to be plated) of a substrate, such as a semiconductor wafer, to form interconnects in the substrate.
- a metal interconnect material
- a substrate such as copper or silver
- interconnect patterns in semiconductor devices are becoming finer, and interconnect materials are changing from conventional aluminum or its alloys to copper or copper alloys.
- the electrical resistivity of copper is 1.67 ⁇ cm which is about 37% lower than the electrical resistivity of aluminum (2.65 ⁇ m). Therefore, as compared to aluminum interconnects, copper interconnects can reduce power consumption, or can be made finer with the same interconnect resistance as aluminum interconnects. In addition, the lowering of interconnect resistance by the use of copper interconnects can reduce signal delay.
- a damascene process which comprises filling copper (interconnect material) into interconnect recesses, such as trenches, provided in a surface of a substrate.
- a barrier layer of Ti, TiN, Ta, TaN, or the like formed by PVD, CVD or ALD has heretofore been widely used.
- the filling of interconnect recesses with copper is generally carried out by electroplating which is capable of high-speed film formation.
- FIGS. 1A through 1C illustrate, in a sequence of process steps, an example of forming a substrate having copper interconnects by a conventional process.
- an insulating film (interlevel dielectric film) 2 such as an oxide film of SiO 2 or a film of low-k material, is deposited on a conductive layer lain which semiconductor devices are formed, which is formed on a semiconductor base 1 .
- Via holes 3 and trenches 4 as interconnect recesses are formed in the insulating film 2 by the lithography/etching technique.
- a barrier layer 5 of TaN or the like is formed on the surface, and a seed layer 7 as an electric supply layer for electroplating is formed on the barrier layer 5 .
- the copper electroplating is generally carried out by using an acidic plating solution containing copper sulfate, and supplying electricity to the seed layer 7 of, e.g., copper from the periphery of the substrate to allow the plated copper film 6 to grow on the surface of the seed layer 7 .
- a thickness of the seed layer 7 e.g., formed by PVD, is several tens of nm in the substrate surface, whereas a thickness is not more than several nm in the sidewalls of the trenches 4 . Accordingly, if the substrate is kept in contact with an acidic copper-plating solution for a long time, the seed layer 7 can easily dissolve in the plating solution.
- a method which comprises applying a voltage between the seed layer 7 , which serves as a cathode, and a counter electrode (anode) immediately before bringing the substrate into contact with a plating solution to initiate electroplating simultaneously with contact of the substrate with the plating solution, taking the substrate out of the plating solution after completion of the plating, and cleaning and drying the substrate, as shown in FIG. 2 .
- a thickness of a seed layer in interconnects of a substrate is as small as about 10 to 20% of the thickness of the seed layer in the substrate surface (field area).
- a seed layer becomes thinner in a substrate surface in order to ensure openings in an interconnect area, and the seed layer becomes further thinner in interconnects.
- a plating solution for use in plating and filling of trenches and via holes of a semiconductor device generally contains, in addition to a metal ion component and a pH adjuster component, various additives for improving the trench-filling properties, such as an accelerator, a suppressor and a leveler.
- additives show their effects when they are adsorbed on a surface of a substrate.
- an amount of plating solution per surface area is small as compared to the flat area of the substrate surface. Accordingly, it takes a longer time for a certain amount of additive to be adsorbed on the substrate surface in a trench as compared to the flat area of the substrate surface.
- a suppressor primarily has the effect of suppressing deposition of a plated film in a flat area of a surface of a substrate.
- a substrate is left in contact with a plating solution containing a suppressor, adsorption of the suppressor onto the interior surfaces of trenches also progresses, thereby suppressing deposition of a plated film in the trenches.
- a plated film grows isotropically also in the trenches, which can result in incomplete filling of the trenches with the plated film, with seams or voids being formed in the plated film.
- a Ti alloy or a Ta alloy which is commonly used as a material for a barrier layer, has a high electrical resistivity, for example, 12.45 ⁇ cm in the case of Ta and 42 ⁇ cm in the case of Ti, which are one digit higher than the electrical resistivity of copper (interconnect material). It is therefore necessary to form a seed layer as an electric supply layer on a surface of a barrier layer when filling copper into trenches by electroplating.
- a copper seed layer formed by PVD is generally used as the seed layer.
- Tantalum (Ta) which has been widely used for a barrier layer, generally has poor adhesion to an interconnect material, such as copper, for forming interconnects. This contributes to lowering of the reliability of interconnects when a Ta barrier layer is used.
- Ru ruthenium
- WNC tungsten carbonitride
- the electrical resistivity of Ru is 7.6 ⁇ cm which is considerably lower than the electrical resistivity of Ta, and therefore the possibility of direct electroplating on a surface of a ruthenium film is under consideration. If direct electroplating on a surface of a barrier layer of ruthenium (ruthenium film) becomes possible, a seed layer as an electric supply layer becomes unnecessary.
- the present invention has been made in view of the above situation. It is therefore an object of the present invention to provide a substrate processing method and a substrate processing apparatus which make it possible to fill interconnect recesses, such as trenches, with a defect-free interconnect material by carrying out electroplating directly on a surface of a ruthenium film as a barrier layer.
- the present invention provides a substrate processing method comprising: providing a substrate having interconnect recesses formed in a substrate surface and having a ruthenium film formed in the entire substrate surface including interior surfaces of the interconnect recesses; keeping the substrate surface in contact with a plating solution for a predetermined time to adsorb an additive in the plating solution onto the ruthenium film; and then carrying out electroplating to form a conductive film on a surface of the ruthenium film.
- the present inventors conducted an experiment in which copper electroplating was carried out on a ruthenium (Ru) film as a barrier layer to allow a plated copper film to grow on the ruthenium film, and the process of the growth of the plated copper film was analyzed. As a result, it was found that deposition of particulate copper on the surface of the ruthenium film in the initial stage of plating causes the formation of voids in the plated copper film. It was also found that the deposition of particulate copper depends on the time period from contact of the substrate with the plating solution to the initiation of electroplating.
- the formation of voids in a plated film can be suppressed and trench-filling characteristics comparable to the conventional electroplating method using a seed layer can be ensured by initiating electroplating after bringing a surface of a substrate into contact with a plating solution and leaving the substrate in contact with the plating solution for a certain period of time to adsorb an additive in the plating solution onto a ruthenium film.
- the conductive film is preferably composed of copper or a copper alloy.
- the plating solution contains a copper ion, a sulfate ion and the additive.
- a ruthenium film as a barrier layer will not dissolve in the plating solution even when such an acidic plating solution is used during electroplating.
- the predetermined time for keeping the substrate surface in contact with the plating solution prior to the electroplating is, for example, not less than 0.5 second and not more than 60 seconds.
- the predetermined time for keeping the substrate surface in contact with the plating solution prior to the electroplating is preferably not less than 0.1 second and not more than 20 seconds, more preferably not less than 0.1 second and not more than 5 seconds.
- the present invention provides another substrate processing method comprising: providing a substrate having interconnect recesses formed in a substrate surface and having a ruthenium film formed in the entire substrate surface including interior surfaces of the interconnect recesses; keeping the substrate surface in contact with a plating solution for a predetermined time to adsorb an additive in the plating solution onto the ruthenium film, and then carrying out first electroplating to form an initial conductive film, which covers the entire interior surfaces of the interconnect recesses, on the surface of the ruthenium film; cleaning and drying the substrate surface; and then carrying out second electroplating to allow a conductive film to further grow on a surface of the initial conductive film.
- the second electroplating may be started either after keeping the substrate surface in contact with a plating solution for a short time to adsorb a small amount of an additive in the plating solution onto the initial conductive film, or simultaneously with bringing the substrate surface into contact with the plating solution.
- the first electroplating and the second electroplating are carried out by using the same plating solution.
- the predetermined time for keeping the substrate surface in contact with the plating solution prior to the first electroplating is preferably not less than 5 seconds.
- the present invention also provides a substrate processing apparatus for forming a conductive film on a surface of a substrate by electroplating, the substrate having interconnect recesses formed in the substrate surface and having a ruthenium film formed in the entire substrate surface including interior surfaces of the interconnect recesses, said apparatus comprising a measurement section for measuring time that has elapsed since the substrate surface has been brought into contact with a plating solution.
- the measurement section is comprised of a position detector for detecting the position of the substrate or a substrate holder, or a substrate-solution contact detector for detecting contact of the substrate with the plating solution.
- the substrate-solution contact detector is comprised of, for example, an optical sensor, a pressure sensor, a conductivity sensor, a temperature sensor or an ultrasonic sensor, or a combination thereof.
- an interconnect material e.g., copper
- interconnect recesses such as trenches without forming defects, such as voids, in the embedded interconnect metal.
- FIGS. 1A through 1C are diagrams illustrating, in a sequence of process steps, an example of the formation of copper interconnects by a conventional plating process
- FIG. 2 is a flow chart showing a conventional plating process
- FIG. 3 is an overall plan view of a substrate processing apparatus according to an embodiment of the present invention.
- FIG. 4 is a plan view of an electroplating apparatus shown in FIG. 3 ;
- FIG. 5 is an enlarged sectional view of a substrate holder and a cathode portion of the electroplating apparatus shown in FIG. 3 (a cross-sectional view taken along line A-A of FIG. 4 );
- FIG. 6 is a front view of a plating solution recovering arm of the electroplating apparatus shown in FIG. 3 ;
- FIG. 7 is a plan view of the substrate holder of the electroplating apparatus shown in FIG. 3 ;
- FIG. 8 is a cross-sectional view taken along line B-B of FIG. 7 ;
- FIG. 9 is a cross-sectional view taken along line C-C of FIG. 7 ;
- FIG. 10 is a plan view of the cathode portion of the electroplating apparatus shown in FIG. 3 ;
- FIG. 11 is a cross-sectional view taken along line D-D of FIG. 10 ;
- FIG. 12 is a plan view of an electrode arm portion of the electroplating apparatus shown in FIG. 3 ;
- FIG. 13 is a schematic sectional view illustrating an electrode head and the substrate holder of the electroplating apparatus shown in FIG. 3 when the electroplating apparatus performs a plating process;
- FIG. 14A through 14C are diagrams illustrating, in a sequence of process steps, a process for forming copper interconnects by a substrate processing method (plating method) of the present invention
- FIG. 15 is a flow chart showing the substrate processing method (plating process) of the present invention.
- FIG. 16 is a control flow chart showing control of the substrate processing method (plating process) of the present invention until the initiation of electroplating;
- FIG. 17A through 17D are diagrams illustrating, in a sequence of process steps, a process for forming copper interconnects by another substrate processing method (plating method) of the present invention.
- FIG. 18 is a graph showing the relationship between “bottom up” and “switch on delay time”, as determined in Example 1 with comparison;
- FIG. 19 is a graph showing the relationship between “bottom up” and “switch on delay time”, as determined in Example 2;
- FIGS. 20A through 20C are SEM photographs of plated copper films, deposited on various substrates by plating carried out with a “switch on delay time” of 0 second in Example 2;
- FIGS. 21A through 21C are SEM photographs of plated copper films, deposited on various substrates by plating carried out with a “switch on delay time” of one second in Example 2;
- FIGS. 22A through 22C are SEM photographs of plated copper films, deposited on various substrates by plating carried out with a “switch on delay time” of two seconds in Example 2;
- FIGS. 23A through 23C are SEM photographs of plated copper films, deposited on various substrates by plating carried out with a “switch on delay time” of three seconds in Example 2;
- FIG. 24 is a diagram showing the relationship between “switch on delay time” and the formation of voids in interconnects having an interconnect pattern of an interconnect width of 0.09 ⁇ m, as determined in Example 3;
- FIG. 25 is a diagram showing the relationship between “switch on delay time” and the formation of voids in interconnects having an interconnect pattern of an interconnect width of 0.15 ⁇ m, as determined in Example 3;
- FIG. 26 is a graph showing the relationship between “bottom up” and “switch on delay time”, as determined in Example 4.
- FIG. 3 is an overall plan view showing a substrate processing apparatus according to an embodiment of the present invention.
- this substrate processing apparatus has a rectangular facility which houses therein two loading/unloading stations 10 for housing a plurality of substrates W therein, two electroplating apparatuses 12 for performing electroplating process and processing incidental thereto, a transfer robot 14 for transferring substrates W between the loading/unloading stations 10 and the electroplating apparatuses 12 , and plating solution supply equipment 18 having a plating solution tank 16 .
- the electroplating apparatus 12 is provided with a substrate processing section 20 for performing plating process and processing incidental thereto, and a plating solution tray 22 for storing a plating solution is disposed adjacent to the substrate processing section 20 .
- a plating solution tray 22 for storing a plating solution is disposed adjacent to the substrate processing section 20 .
- an electrode arm portion 30 having an electrode head 28 which is held at the front end of a swing arm 26 swingable about a rotating shaft 24 and which is swung between the substrate processing section 20 and the plating solution tray 22 .
- a plating solution recovering arm 32 , and fixed nozzles 34 for ejecting pure water or a chemical liquid such as ion water, and further a gas or the like toward a substrate are disposed laterally of the substrate processing section 20 .
- three of the fixed nozzles 34 are disposed, and one of them is used for supplying pure water.
- the substrate processing section 20 has a substrate holder 36 for holding a substrate W with its surface (surface to be plated) facing upwardly, and a cathode portion 38 located above the substrate holder 36 so as to surround a peripheral portion of the substrate holder 36 . Further, a substantially cylindrical bottomed splash prevention cup 40 surrounding the periphery of the substrate holder 36 for preventing scatter of various chemical liquids used during processing is provided so as to be vertically movable by an air cylinder (not shown).
- the substrate holder 36 is adapted to be raised and lowered by the air cylinder 44 between a lower substrate transfer position A, an upper plating position B, and a pretreatment/cleaning position C intermediate between these positions.
- the substrate holder 36 is also adapted to rotate at an arbitrary acceleration and an arbitrary velocity integrally with the cathode portion 38 by a rotating motor and a belt (not shown).
- a substrate carry-in and carry-out opening (not shown) is provided in confrontation with the substrate transfer position A in a side panel of the electroplating apparatus 12 facing the transfer robot 14 .
- the splash prevention cup 40 has an upper end located below the substrate carry-in and carry-out opening, and when the splash prevention cup 40 ascends, the upper end of the splash prevention cup 40 reaches a position above the cathode portion 38 closing the substrate carry-in and carry-out opening, as shown by imaginary lines in FIG. 5 .
- the plating solution tray 22 serves to wet a porous structure 110 and an anode 98 (both to be described below) of the electrode arm portion 30 with a plating solution, when plating has not been performed.
- the plating solution tray 22 is set at a size in which the porous structure 110 can be accommodated, and the plating solution tray 22 has a plating solution supply port and a plating solution drainage port (not shown).
- a photo-sensor is attached to the plating solution tray 22 , and can detect brimming with the plating solution in the plating solution tray 22 , i.e., overflow, and drainage.
- the electrode arm portion 30 is vertically movable by a vertical movement motor comprised of a servomotor and a ball screw (not shown), and swingable (pivotable) such that the electrode head 28 moves between the plating solution tray 22 and the substrate processing section 20 by a swing motor.
- the plating solution recovering arm 32 is coupled to an upper end of a vertical support shaft 58 .
- the plating solution recovering arm 32 is swingable (pivotable) by a rotary actuator 60 and is also vertically moveable by an air cylinder (not shown).
- the plating solution recovering arm 32 supports a plating solution recovering nozzle 66 that is connected to a cylinder pump or an aspirator, for example, to draw the plating solution on the substrate from the plating solution recovering nozzle 66 .
- the substrate holder 36 has a disk-shaped substrate stage 68 and six vertical support arms 70 disposed at spaced intervals on the circumferential edge of the substrate stage 68 for holding a substrate W in a horizontal plane on respective upper surfaces of the support arms 70 .
- a positioning plate 72 is mounted on an upper end one of the support arms 70 for positioning the substrate by contacting the end face of the substrate.
- a pressing finger 74 is rotatably mounted on an upper end of the support arm 70 , which is positioned opposite to the support arm 70 having the positioning plate 72 , for abutting against an end face of the substrate W and pressing the substrate W to the positioning plate 72 when rotated.
- Chucking fingers 76 are rotatably mounted on upper ends of the remaining four support arms 70 for pressing the substrate W downwardly and gripping the circumferential edge of the substrate W.
- the pressing finger 74 and the chucking fingers 76 have respective lower ends coupled to upper ends of pressing pins 80 that are normally urged to move downwardly by coil springs 78 .
- the pressing pins 80 are moved downwardly, the pressing finger 74 and the chucking fingers 76 are rotated radially inwardly into a closed position.
- a support plate 82 is disposed below the substrate stage 68 for engaging lower ends of the pressing pins 80 and pushing them upwardly.
- the pressing pins 80 are engaged and pushed upwardly by the support plate 82 , so that the pressing finger 74 and the chucking fingers 76 rotate outwardly and open.
- the pressing pins 80 are lowered under the resiliency of the coil springs 78 , so that the pressing finger 74 and the chucking fingers 76 rotate inwardly and close.
- the cathode portion 38 comprises an annular frame 86 fixed to upper ends of vertical support columns 84 mounted on the peripheral portion of the support plate 82 (see FIG. 9 ), a plurality of, six in this embodiment, cathode contacts 88 attached to a lower surface of the annular frame 86 and projecting inwardly, and an annular sealing member 90 mounted on an upper surface of the annular frame 86 in covering relation to upper surfaces of the cathode contacts 88 .
- the sealing member 90 is adapted to have an inner peripheral portion inclined inwardly downwardly and progressively thin-walled, and to have an inner peripheral end suspending downwardly.
- the cathode contacts 88 are pressed against the peripheral portion of the substrate W held by the substrate holder 36 for thereby allowing electric current to pass through the substrate W.
- an inner peripheral portion of the sealing member 90 is brought into contact with an upper surface of the peripheral portion of the substrate W under pressure to seal its contact portion in a watertight manner.
- the cathode portion 38 is vertically immovable, but rotatable in a body with the substrate holder 36 .
- the cathode portion 38 may be arranged such that it is vertically movable and the sealing member 90 is pressed against the surface to be plated of the substrate W when the cathode portion 38 is lowered.
- the electrode head 28 of the electrode arm portion 30 includes a housing 94 which is coupled via a ball bearing 92 to the free end of the swing arm 26 , and a porous structure 110 which is disposed such that it closes the bottom opening of the housing 94 .
- the housing 94 has a downward-open and cup-like bottomed configuration having at its lower inside surface an recess portion 94 a , while the porous structure 110 has at its top a flange portion 110 a which can engage with the recess portion 94 a .
- the flange portion 11 a is inserted into the recess portion 94 a .
- the porous structure 110 is thus held with the housing 94 , while a hollow plating solution chamber 100 is defined in the housing 94 .
- the porous structure 110 per se is an insulator, but is constructed so as to have a smaller electrical conductivity than the plating solution by causing the plating solution to enter its inner part complicatedly and follow a considerably long path in the thickness direction.
- the housing 94 has a plating solution discharge outlet 103 for discharging by suction a plating solution in the plating solution chamber 100 .
- the plating solution discharge outlet 103 is connected to a plating solution discharge pipe 106 extending from the plating solution supply equipment 18 (see FIG. 3 ).
- a plating solution supply inlet 104 positioned beside the anode 98 and the porous structure 110 and vertically penetrating the peripheral wall of the housing 94 , is provided within the peripheral wall of the housing 94 .
- the plating solution supply inlet 104 comprises a tube having a lower end shaped as a nozzle, and is connected to a plating solution supply pipe 102 extending from the plating solution supply equipment 18 (see FIG. 3 ).
- the electrode head 28 is lowered until a gap between the substrate W held by the substrate holder 36 and the porous structure 110 becomes about 0.5 to 3 mm, for example, and then the plating solution supply inlet 104 pours the plating solution into a region between the substrate W and the porous structure 110 from laterally of the anode 98 and the porous structure 110 .
- the nozzle at the lower end of the plating solution supply inlet 104 is open toward the region between the sealing member 90 and the porous structure 110 .
- a shield ring 112 of rubber is mounted on the outer circumferential surface of the porous structure 110 for electrically shielding the porous structure 110 .
- the plating solution introduced from the plating solution supply inlet 104 flows in one direction along the surface of the substrate W.
- the flow of the plating solution pushes and discharges the air out of the region between the substrate W and the porous structure 110 , filling the region with the fresh plating solution whose composition has been adjusted that is introduced from the plating solution supply inlet 104 .
- the plating solution is now retained in the region defined between the substrate W and the sealing member 90 .
- a substrate-solution contact detector 120 as a measurement section, e.g., comprised of an optical sensor, for detecting contact of the surface of the substrate W with the plating solution when the plating solution is supplied from the plating solution supply inlet 104 to the surface of the substrate W held by the substrate holder 36 .
- the substrate-solution contact detector 120 detects contact of the surface of the substrate W with the plating solution, and inputs the detection signal into, e.g., a control section, thereby measuring time that has elapsed since the surface of the substrate W was brought into contact with the plating solution.
- a position detector for detecting the position of a substrate or a substrate holder and to input a detection signal from the position detector into, e.g., a control section.
- a position detector for detecting the position of a substrate or a substrate holder and to input a detection signal from the position detector into, e.g., a control section.
- an optical sensor it is also possible to use apressure sensor, a conductivity sensor, a temperature sensor or an ultrasonic sensor, or a combination thereof.
- the anode 98 is made of copper (phosphorus-containing copper) containing 0.03 to 0.05% of phosphorus.
- the anode 98 may comprise an insoluble electrode comprising metal on which iridium oxide is coated.
- the anode 98 is electrically connected to an anode of a plating power source 114 , and the cathode contacts 88 are electrically connected to a cathode of the plating power source 114 , respectively.
- the electrode head 28 is lowered until the gap between the substrate W held by the substrate holder 36 and the porous structure 110 becomes about 0.5 to 3 mm, for example. Thereafter, a plating solution is supplied from the plating solution supply inlet 104 into the region between the substrate W and the porous structure 410 , so that the plating solution fills the region and is stored in the region defined by the substrate W and the sealing member 90 for plating.
- a substrate processing method (plating method) according to an embodiment of the present invention, carried out by using the substrate processing apparatus, will now be described with reference to FIGS. 14A through 16 .
- a substrate W as shown in FIG. 14A , is provided which has been prepared by depositing an insulating film (interlevel dielectric film) 2 of SiO 2 or a low-k material on a conductive layer 1 a containing semiconductor devices, formed on a semiconductor base 1 , forming via holes 3 and trenches 4 as interconnect recesses in the insulating film 2 by the lithography/etching technique, and then forming a ruthenium film 5 a as a barrier layer on an entire substrate surface.
- an insulating film (interlevel dielectric film) 2 of SiO 2 or a low-k material on a conductive layer 1 a containing semiconductor devices, formed on a semiconductor base 1 , forming via holes 3 and trenches 4 as interconnect recesses in the insulating film 2 by the lithography/etching technique, and then forming a ruthenium film 5 a as a barrier layer on an entire substrate surface.
- a substrate W to be plated is taken out from one of the loading/unloading stations 10 by the transfer robot 14 , and transferred, with a surface to be plated facing upwardly, into one of the electroplating apparatus 12 through a substrate carry-in and carry-out opening defined in a side panel.
- the substrate holder 36 is in lower substrate transfer position A.
- the transfer robot 14 lowers the hand to place the substrate W on the support arms 70 .
- the hand of the transfer robot 14 is then retracted through the substrate carry-in and carry-out opening.
- the splash prevention cup 40 is elevated. Then, the substrate holder 36 is lifted from lower substrate transfer position A to pretreatment/cleaning position C. As the substrate holder 36 is lifted, the substrate W placed on the support arms 70 is positioned by the positioning plate 72 and the pressing finger 74 , and then reliably gripped by the chucking fingers 76 .
- the electrode head 28 of the electrode arm portion 30 is in a normal position over the plating solution tray 22 now, and the porous structure 110 or the anode 98 is positioned in the plating solution tray 22 .
- the splash prevention cup 40 ascends, the plating solution starts being supplied to the plating solution tray 22 and the electrode head 28 .
- the new plating solution is supplied, and the plating solution discharge pipe 106 is evacuated to replace the plating solution in the porous structure 110 and remove air bubbles from the plating solution in the porous structure 110 .
- the substrate carry-in and carry-out opening in the side panel is closed by the splash prevention cup 40 , thereby isolating the atmosphere in the side panel and the atmosphere outside of the side panel from each other.
- the plating step is initiated. First, the substrate holder 36 is lifted to plating position B while the substrate holder 36 not being rotated, or being rotated at a preset rotational speed for plating. Then, the peripheral portion of the substrate W is brought into contact with the cathode contacts 88 , when it is possible to pass an electric current, and at the same time, the sealing member 90 is pressed against the upper surface of the peripheral portion of the substrate W, thus sealing the peripheral portion of the substrate W in a watertight manner.
- the electrode arm portion 30 is swung in a horizontal direction to displace the electrode head 28 from a position over the plating solution tray 22 to a position over the plating processing position. After the electrode head 28 reaches this position, the electrode head 28 is lowered toward the cathode portion 38 and stopped. At this time, the porous structure 110 does not contact with the surface of the substrate W, but is held closely to the surface of the substrate W at a distance ranging from 0.5 mm to 3 mm. The plating solution is then poured from the plating solution supply inlet 104 into the region between the substrate W and the porous structure 110 , filling the region with the plating solution.
- the substrate-solution contact detector 120 Upon the injection of the plating solution, contact of the surface of the substrate W with the plating solution is detected with the substrate-solution contact detector 120 .
- the surface of the substrate W is kept in contact with the plating solution for a predetermined time to adsorb an additive(s) in the plating solution onto the ruthenium film 5 a .
- the elapsed contact time is measured.
- the predetermined time for the substrate surface to be kept in contact with the plating solution is, for example, not less than 0.5 second and not more than 60 seconds, preferably not less than 0.1 second and not more than 20 seconds, and more preferably not less than 0.1 second and not more than 5 seconds.
- a voltage is applied from the plating power source 114 to between the cathode contacts 88 and the anode 98 , thereby forming a plated copper film 6 on the surface of the ruthenium film (barrier layer) 5 a while filling copper into the via holes 3 and the trenches 4 , as shown in FIG. 14B .
- the plated copper film 6 can be formed on the surface of the ruthenium film 5 a while suppressing the formation of voids in the copper plated film 6 and ensuring trench-filling characteristics comparable to the conventional electroplating method using a seed layer.
- the plated copper film 6 can be securely filled into interconnect recesses, such as trenches, without forming defects, such as voids, in the embedded copper film 6 .
- the present method makes it possible to enhance the reliability of interconnects while enjoying the benefit of elimination of a seed layer formation process.
- the ruthenium film 5 a as a barrier layer will not dissolve even in such an acidic plating solution as containing a copper ion, a sulfate ion and an additive(s) during electroplating.
- the electrode arm portion 30 When the plating process is completed, the electrode arm portion 30 is raised and then swung to return to the position above the plating solution tray 22 and to lower to the ordinary position. Then, the remainder of the plating solution on the substrate W is recovered by a plating solution recovering nozzle 66 . After recovering of the remainder of the plating solution is completed, pure water is supplied from the fixed nozzle 34 for supplying pure water toward the central portion of the substrate W and the substrate holder 36 is rotated at an increased speed to replace the plating solution on the surface of the substrate W with pure water. Rinsing the substrate W in this manner prevents the splashing plating solution from contaminating the cathode contacts 88 of the cathode portion 38 during descent of the substrate holder 36 from plating position B.
- the washing with water step is initiated. That is, the substrate holder 36 is lowered from plating position B to pretreatment/cleaning position C. Then, while pure water is supplied from the fixed nozzle 34 for supplying pure water, the substrate holder 36 and the cathode portion 38 are rotated to perform washing with water. At this time, the sealing member 90 and the cathode contacts 88 can also be cleaned, simultaneously with the substrate W, by pure water directly supplied to the cathode portion 38 , or pure water scattered from the surface of the substrate W.
- the drying step is initiated. That is, supply of pure water from the fixed nozzle 34 is stopped, and the rotational speed of the substrate holder 36 and the cathode portion 38 is further increased to remove pure water on the surface of the substrate W by centrifugal force and to dry the surface of the substrate W.
- the sealing member 90 and the cathode contacts 88 are also dried at the same time.
- the rotation of the substrate holder 36 and the cathode portion 38 is stopped, and the substrate holder 36 is lowered to substrate transfer position A.
- the gripping of the substrate W by the chucking fingers 76 is released, and the substrate W is just placed on the upper surfaces of the support arms 70 .
- the splash prevention cup 40 is also lowered.
- the transfer robot 14 inserts its hand through the substrate carry-in and carry-out opening into the position beneath the substrate W, and raises the hand to receive the plated substrate W from the substrate holder 36 . Then, the transfer robot 14 returns the plated substrate W received from the substrate holder 36 to one of the loading/unloading stations 10 . Thereafter, the plated copper film 6 and the ruthenium film (barrier layer) 5 a on the insulating film 2 are removed by chemical mechanical polishing (CMP) so as to form interconnects composed of the plated copper film 6 in the insulating film 2 , as shown in FIG. 14C .
- CMP chemical mechanical polishing
- a substrate processing method (plating method) according to another embodiment of the present invention, carried out by using the above-described substrate processing apparatus, will now be described with reference to FIGS. 17A through 17D .
- a substrate W as shown in FIG. 17A , which has been prepared by forming trenches 4 a as interconnect recesses in an insulating film (interlevel dielectric film) 2 a of SiO 2 or a low-k material, and forming a ruthenium film 5 b as a barrier layer on a substrate of the insulating film 2 a.
- an insulating film (interlevel dielectric film) 2 a of SiO 2 or a low-k material forming a ruthenium film 5 b as a barrier layer on a substrate of the insulating film 2 a.
- a plating solution is injected from the plating solution supply inlet 104 into the region between the substrate W and the porous structure 110 to fill the region with the plating solution.
- a plating solution is injected from the plating solution supply inlet 104 into the region between the substrate W and the porous structure 110 to fill the region with the plating solution.
- contact of the surface of the substrate W with the plating solution is detected with the substrate-solution contact detector 120 .
- the surface of the substrate W is kept in contact with the plating solution for a predetermined time to adsorb an additive(s) in the plating solution onto the ruthenium film 5 b .
- the predetermined time for keeping the substrate surface in contact with the plating solution is generally not less than 5 seconds, preferably not less than 20 seconds, e.g., 30 seconds.
- a voltage is applied from the plating power source 114 to between the cathode contacts 88 and the anode 98 , thereby conformally forming an initial plated copper film 6 a , which uniformly covers the entire interior surfaces of the trenches 4 a , on the surface of the ruthenium film 5 b , as shown in FIG. 17B .
- the rotational speed of the substrate holder 36 and the cathode portion 38 is increased to spin-dry the substrate W, e.g., at 1500 rpm for 30 seconds, thereby obtaining a dried substrate W, as shown in FIG. 17C , having the initial plated copper film 6 a formed conformally on the ruthenium film 5 b.
- plating is carried out using the initial plated copper film 6 a as a seed layer to allow a plated copper film to grow on a surface of the initial plated copper film 6 a , thereby filling a plated copper film 6 into the trenches 4 a , as shown in FIG. 17D .
- a plating solution is injected from the plating solution supply inlet 104 into the region between the substrate W and the porous structure 110 to fill the region with the plating solution while applying a voltage from the plating power source 114 to between the cathode contacts 88 and the anode 98 , thereby allowing a plated copper film to grow on the surface of the initial plated copper film 6 a.
- a substrate sample was prepared by forming an SiO 2 film over a silicon substrate, forming a groove-shaped interconnect pattern (interconnect width not less than 0.1 ⁇ m) in the SiO 2 film, and then forming a ruthenium film as a barrier layer on the entire substrate surface.
- a copper sulfate plating solution which is commonly used for forming a plated copper film in the process of forming interconnects in a semiconductor device, and contains an accelerator, a suppressor and a leveler as additives in appropriate amounts, was used as a copper-plating solution.
- An insoluble anode coated with iridium oxide was used.
- a series of electroplating tests was carried out on the same substrate samples under the same plating conditions but varying the time period from contact of the substrate with the plating solution to the initiation of electroplating, thereby allowing a plated copper film to grow on a surface of the ruthenium film, including the interior surfaces of trenches.
- a cross section of each sample after plating was observed under a scanning electron microscope to measure a thickness “a”, shown in FIG. 18 , of the plated copper film in trenches and a thickness “b”, shown in FIG. 18 , of the plated copper film in the substrate surface.
- the trench-filling selectivity ratio a/b was calculated from the measured thicknesses “a” and “b” of the plated copper film for all the test samples to determine the relationship of the selectivity ratio with the time period from contact of the substrate with the plating solution to the initiation of electroplating.
- the graph with the mark “A” in FIG. 18 shows the relationship between the time period from contact of the substrate with the plating solution to the initiation of electroplating (switch on delay time) and the trench-filling selectivity ratio [bottom up (a/b)].
- the graph with the mark “O” in FIG. 18 shows the relationship between the time period from contact of the substrate with the plating solution to the initiation of electroplating and this trench-filling selectivity ratio (a/b).
- the copper seed layer was formed on a surface of a silicon substrate having a interconnect pattern of an interconnect width of 0.2 ⁇ m.
- the above-described two substrates differ in the interconnect structure and the aspect ratio. Further, different types of additives are used and thicknesses of plated films differ each other. Accordingly, simple comparison of the values cannot be made.
- the trench-filling selectivity ratio [bottom up (a/b)] generally decreases, i.e., the trench-filling characteristics become worse, with an increase in the “switch on delay time”.
- the trench-filling selectivity ratio [bottom up (a/b)] generally increases, i.e., the trench-filling characteristics become better, with an increase in the “switch on delay time”.
- Substrates each having an interconnect pattern of an interconnect depth of 0.25 ⁇ m and an interconnect width of 0.1 ⁇ m, 0.2 ⁇ m or 0.25 ⁇ m and having a 3 nm-thick surface ruthenium film formed by CVD, were prepared.
- the sheet resistance of the ruthenium film was about 150 ⁇ /sq.
- Copper plating of a surface of each substrate was carried out in an electrolytic amount corresponding to a plating thickness of 55 nm, using a plating solution having a copper concentration of 50 g/l, a sulfuric acid concentration of 80 g/l and a chlorine concentration of 50 ppm, and containing an accelerator, a suppressor and a leveler as additives.
- a series of electroplating tests was carried out on each substrate at a current density of 5 to 40 mA/cm 2 by varying the time period from contact of the substrate with the plating solution to the initiation of electroplating (switch on delay time) as follows: 0 second, 1 second, 2 seconds and 3 seconds.
- the trenches had a curved cross-sectional contour at the openings (see FIGS. 24 and 25 ).
- FIG. 19 shows the relationship between the time period from contact of the substrate with the plating solution to the initiation of electroplating (switch on delay time) and the trench-filling selectivity ratio [bottom up (a/b)] shown in FIG. 18 .
- the selectivity ratio [bottom up (a/b)] generally increases with an increase in an immersion time (switch on delay time), and this is marked in the interconnect pattern of an interconnect width of 0.1 ⁇ m.
- FIGS. 20A through 20C are SEM photographs of plated copper films as deposited on the substrates when the “switch on delay time” was 0 second;
- FIGS. 21A through 21C are SEM photographs of plated copper films as deposited on the substrates when the “switch on delay time” was 1 second;
- FIGS. 22A through 22C are SEM photographs of plated copper films as deposited on the substrates when the “switch on delay time” was 2 seconds;
- FIGS. 23A through 23C are SEM photographs of plated copper films as deposited on the substrates when the “switch on delay time” was 3 seconds.
- Substrates each having an interconnect pattern of an interconnect depth of 0.25 ⁇ m and an interconnect width of 0.09 ⁇ m or 0.15 ⁇ m and having a 3 nm-thick surface ruthenium film formed by CVD, were prepared.
- the sheet resistance of the ruthenium film was about 150 ⁇ /sq.
- Copper plating of a surface of each substrate was carried out in an electrolytic amount corresponding to a plating thickness of 55 nm, using a plating solution having a copper concentration of 50 g/l, a sulfuric acid concentration of 80 g/l and a chlorine concentration of 50 ppm, and containing an accelerator, a suppressor and a leveler as additives.
- a series of electroplating tests was carried out on each substrate at a current density of 5 to 40 mA/cm 2 by varying the time period from contact of the substrate with the plating solution to the initiation of electroplating (switch on delay time) as follows: 0 second, 3 seconds, 5 seconds, 7 seconds and 1 minute.
- FIG. 24 shows the relationship between the time period from contact of the substrate with the plating solution to the initiation of electroplating (switch on delay time) and the formation of voids in the interconnects having the interconnect pattern of an interconnect width of 0.09 ⁇ m; and FIG. 25 shows the relationship between the time period from contact of the substrate with the plating solution to the initiation of electroplating (switch on delay time) and the formation of voids in the interconnects having the interconnect pattern of an interconnect width of 0.15 ⁇ m.
- FIGS. 24 and 25 each illustrate a plated copper film 6 b , which is to become interconnects, embedded in trenches 4 b formed in an insulating film (interlevel dielectric film) 2 b which is covered with a ruthenium film 5 c.
- a substrate having an interconnect pattern of an interconnect width of 0.08 ⁇ m and an interconnect depth of 0.22 ⁇ m and having a 2 nm-thick surface ruthenium film formed by CVD was prepared.
- the sheet resistance of the ruthenium film was about 250 ⁇ /sq.
- Copper plating of a surface of the substrate was carried out in an electrolytic amount corresponding to a plating thickness of 40 nm, using a plating solution having a copper concentration of 50 g/l, a sulfuric acid concentration of 80 g/l and a chlorine concentration of 50 ppm, and containing an accelerator, a suppressor and a leveler as additives.
- a series of electroplating tests was carried out on the substrate at a current density of 5 to 40 mA/cm 2 by varying the time period from contact of the substrate with the plating solution to the initiation of electroplating (switch on delay time) as follows: 0 second, 2 seconds, 5 seconds, 10 seconds and 20 seconds.
- the trenches had a relatively sharp cross-sectional contour at the openings.
- FIG. 26 shows the relationship between the time period from contact of the substrate with the plating solution to the initiation of electroplating (switch on delay time) and the trench-filling selectivity ratio [bottom up (a/b)] shown in FIG. 18 . Since the trench-filling selectivity ratio [bottom up (a/b)] varies depending on the interconnect width, the interconnect depth and the electrolytic amount, proper comparison must be made under the same experimental conditions.
- the trench-filling selectivity ratio [bottom up (a/b)] is large when the “switch on delay time” is 0 to 5 seconds, whereas it is small when the “switch on delay time” is more than 10 seconds and reaches saturation at the “switch on delay time” of about 20 seconds.
- the trench-filling selectivity ratio [bottom up (a/b)] is an index of filling of trenches.
- the immersion time (switch on delay time) is preferably not more than 5 seconds, and more preferably not more than 2 seconds for better filling of trenches.
- the immersion time (switch on delay time) is 2 to 5 seconds
- the trench-filling selectivity ratio [bottom up (a/b)] is large, indicating plating of good trench-filling characteristics.
- the immersion time (switch on delay time) is 20 seconds, on the other hand, conformal plating will be performed in the interconnects due to the large adsorption of the suppressor.
- Example 4 Based on the results of Example 4, an experiment was conducted to determine if void-free plating is possible when conformal plating is carried out in combination with plating of good trench-filling characteristics.
- a substrate having an interconnect pattern of an interconnect width of 0.08 ⁇ m and an interconnect depth of 0.22 ⁇ m and having a 2 nm-thick surface ruthenium film formed by CVD was prepared.
- the sheet resistance of the ruthenium film was about 250 ⁇ /sq.
- electroplating of the substrate surface was carried out in an electrolytic amount corresponding to a plating thickness of 500 nm (at a current density of 5 to 40 mA/cm 2 ), using the same plating solution as used in the first electroplating. On cross-sectional observation of the plated substrate, no void was found in the interconnects.
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Abstract
A substrate processing method makes it possible to fill interconnect recesses, such as trenches, with a defect-free interconnect material by carrying out electroplating directly on a surface of a ruthenium film as a barrier layer. The substrate processing method comprises: providing a substrate having interconnect recesses formed in a substrate surface and having a ruthenium film formed in the entire substrate surface including interior surfaces of the interconnect recesses; keeping the substrate surface in contact with a plating solution for a predetermined time to adsorb an additive in the plating solution onto the ruthenium film, and then carrying out electroplating to form a conductive film on a surface of the ruthenium film.
Description
- 1. Field of the Invention
- The present invention relates to a substrate recessing method and a substrate processing apparatus, and more particularly to a substrate processing method and a substrate processing apparatus which are useful for filling a metal (interconnect material), such as copper or silver, into fine interconnect recesses provided in a surface (surface to be plated) of a substrate, such as a semiconductor wafer, to form interconnects in the substrate.
- 2. Description of the Related Art
- With the progress toward smaller, higher speed and lower power consuming electronic devices, interconnect patterns in semiconductor devices are becoming finer, and interconnect materials are changing from conventional aluminum or its alloys to copper or copper alloys. The electrical resistivity of copper is 1.67 μΩcm which is about 37% lower than the electrical resistivity of aluminum (2.65 μΩm). Therefore, as compared to aluminum interconnects, copper interconnects can reduce power consumption, or can be made finer with the same interconnect resistance as aluminum interconnects. In addition, the lowering of interconnect resistance by the use of copper interconnects can reduce signal delay.
- On the other hand, copper atoms easily move in silicon or in an insulating film, which can impair the characteristics of a semiconductor device. Copper interconnects, therefore, need to be covered with a protective layer called a barrier layer. To produce a structure of copper interconnects covered with a barrier layer, a damascene process is widely used which comprises filling copper (interconnect material) into interconnect recesses, such as trenches, provided in a surface of a substrate. A barrier layer of Ti, TiN, Ta, TaN, or the like formed by PVD, CVD or ALD has heretofore been widely used. The filling of interconnect recesses with copper is generally carried out by electroplating which is capable of high-speed film formation.
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FIGS. 1A through 1C illustrate, in a sequence of process steps, an example of forming a substrate having copper interconnects by a conventional process. First, as shown inFIG. 1A , an insulating film (interlevel dielectric film) 2, such as an oxide film of SiO2 or a film of low-k material, is deposited on a conductive layer lain which semiconductor devices are formed, which is formed on asemiconductor base 1. Viaholes 3 andtrenches 4 as interconnect recesses are formed in theinsulating film 2 by the lithography/etching technique. Thereafter, abarrier layer 5 of TaN or the like is formed on the surface, and aseed layer 7 as an electric supply layer for electroplating is formed on thebarrier layer 5. - Then, as shown in
FIG. 1B , copper plating is performed onto the surface of the substrate W to fill thevia holes 3 and thetrenches 4 with copper and, at the same time, deposit aplated copper film 6 on theinsulating film 2. Thereafter, theplated copper film 6, theseed layer 7 and thebarrier layer 5 on theinsulating film 2 are removed by chemical mechanical polishing (CMP) so as to make the surface of theplated copper film 6 filled in thevia holes 3 and thetrenches 4, and the surface of theinsulating film 2 lie substantially on the same plane. Interconnects composed of theplated copper film 6, as shown inFIG. 1C , are thus formed in theinsulating film 2. - The copper electroplating is generally carried out by using an acidic plating solution containing copper sulfate, and supplying electricity to the
seed layer 7 of, e.g., copper from the periphery of the substrate to allow theplated copper film 6 to grow on the surface of theseed layer 7. A thickness of theseed layer 7, e.g., formed by PVD, is several tens of nm in the substrate surface, whereas a thickness is not more than several nm in the sidewalls of thetrenches 4. Accordingly, if the substrate is kept in contact with an acidic copper-plating solution for a long time, theseed layer 7 can easily dissolve in the plating solution. With the progress toward finer interconnects of not more than 0.2 μm, for example, in practical electroplating, a method is generally used which comprises applying a voltage between theseed layer 7, which serves as a cathode, and a counter electrode (anode) immediately before bringing the substrate into contact with a plating solution to initiate electroplating simultaneously with contact of the substrate with the plating solution, taking the substrate out of the plating solution after completion of the plating, and cleaning and drying the substrate, as shown inFIG. 2 . - As described above, since a seed layer is generally formed by PVD, a thickness of a seed layer in interconnects of a substrate is as small as about 10 to 20% of the thickness of the seed layer in the substrate surface (field area). As interconnects become finer, a seed layer becomes thinner in a substrate surface in order to ensure openings in an interconnect area, and the seed layer becomes further thinner in interconnects. To address the movement toward thinner seed layer, it has been proposed to devise a voltage applied between a seed layer and a counter electrode (anode) (Japanese Patent Laid-Open Publication No. 2003-129297) It has also been proposed to insert a high-resistance member, having a higher resistance than a plating solution, between a seed layer and a counter electrode (anode) (Japanese Patent Laid-Open Publication No. 2001-323398). With further progress toward finer interconnects, a thickness of a seed layer in interconnects will become as small as several nm, and it is considered impossible to form such a thin seed layer in a continuous form.
- It is known that, when a voltage is applied between the
seed layer 7, which serves as a cathode, and a counter electrode (cathode) after bringing the substrate into contact with a plating solution, characteristics in filling of copper into thetrenches 4 change. In particular, if the voltage is applied between theseed layer 7 and the counter electrode (anode) for a long time after the contact of the substrate with the plating solution, preferential growth of a plated copper film in the trenches from their bottoms is suppressed and the plated copper film grows isotropically from the sidewalls and the bottoms of the trenches. In this case, growing portions of the plated copper film collide with each other in the respective trenches, forming voids called “seams” in the plated copper film embedded in the trenches. The seams may cause lowering of the reliability of the copper interconnects. The change in the copper-filling characteristics with the time period from contact of the substrate with the plating solution to the voltage application is considered to be related to time taken for an additive contained in the plating solution to be adsorbed onto the substrate surface. - A plating solution for use in plating and filling of trenches and via holes of a semiconductor device generally contains, in addition to a metal ion component and a pH adjuster component, various additives for improving the trench-filling properties, such as an accelerator, a suppressor and a leveler. Such additives show their effects when they are adsorbed on a surface of a substrate. In a submicron trench, an amount of plating solution per surface area is small as compared to the flat area of the substrate surface. Accordingly, it takes a longer time for a certain amount of additive to be adsorbed on the substrate surface in a trench as compared to the flat area of the substrate surface.
- A suppressor primarily has the effect of suppressing deposition of a plated film in a flat area of a surface of a substrate. When a substrate is left in contact with a plating solution containing a suppressor, adsorption of the suppressor onto the interior surfaces of trenches also progresses, thereby suppressing deposition of a plated film in the trenches. Accordingly, a plated film grows isotropically also in the trenches, which can result in incomplete filling of the trenches with the plated film, with seams or voids being formed in the plated film.
- A Ti alloy or a Ta alloy, which is commonly used as a material for a barrier layer, has a high electrical resistivity, for example, 12.45 μΩcm in the case of Ta and 42 μΩcm in the case of Ti, which are one digit higher than the electrical resistivity of copper (interconnect material). It is therefore necessary to form a seed layer as an electric supply layer on a surface of a barrier layer when filling copper into trenches by electroplating. A copper seed layer formed by PVD is generally used as the seed layer. As interconnects become finer, it is becoming increasingly difficult to form a copper seed layer on surfaces of trenches. With further progress toward finer interconnects in the future, the proportion of a thickness of a seed layer in the width of interconnect becomes larger. It is therefore feared that a plating solution may hardly enter trenches during electroplating, resulting in poor filling of the trenches. Furthermore, the formation of a continuous seed layer will become more and more difficult.
- A method (direct plating) has therefore begun to be studied which involves using a barrier layer having a relatively low electrical resistance and carrying out copper electroplating directlyon a surface of the barrier layer. Tantalum (Ta), which has been widely used for a barrier layer, generally has poor adhesion to an interconnect material, such as copper, for forming interconnects. This contributes to lowering of the reliability of interconnects when a Ta barrier layer is used.
- In order to solve these problems, it has been proposed to use Ru (ruthenium), WNC (tungsten carbonitride) or the like for a barrier layer. The electrical resistivity of Ru is 7.6 μΩcm which is considerably lower than the electrical resistivity of Ta, and therefore the possibility of direct electroplating on a surface of a ruthenium film is under consideration. If direct electroplating on a surface of a barrier layer of ruthenium (ruthenium film) becomes possible, a seed layer as an electric supply layer becomes unnecessary. This can not only eliminate a seed layer formation process but can also avoid poor conduction due to a non-uniform seed layer and can avoid the formation of voids in an interconnect metal embedded in trenches due to insufficient intrusion of an electroplating solution into the trenches.
- In a conventional common electroplating process for filling copper into trenches using a seed layer, from the viewpoint of prevention of dissolution of the seed layer and prevention of defects in copper embedded in the trenches, it is necessary to apply a voltage between the seed layer, which serves as a cathode, and a counter electrode (anode) to initiate electroplating almost simultaneously with bringing the substrate into contact with a plating solution. It has been found by the present inventors, however, that when ruthenium is used for a barrier layer and copper electroplating is carried out in the conventional manner, but directly on a surface of a ruthenium film as a barrier layer, seams or voids will be formed in a plated copper film embedded in trenches.
- The present invention has been made in view of the above situation. It is therefore an object of the present invention to provide a substrate processing method and a substrate processing apparatus which make it possible to fill interconnect recesses, such as trenches, with a defect-free interconnect material by carrying out electroplating directly on a surface of a ruthenium film as a barrier layer.
- In order to achieve the above object, the present invention provides a substrate processing method comprising: providing a substrate having interconnect recesses formed in a substrate surface and having a ruthenium film formed in the entire substrate surface including interior surfaces of the interconnect recesses; keeping the substrate surface in contact with a plating solution for a predetermined time to adsorb an additive in the plating solution onto the ruthenium film; and then carrying out electroplating to form a conductive film on a surface of the ruthenium film.
- The present inventors conducted an experiment in which copper electroplating was carried out on a ruthenium (Ru) film as a barrier layer to allow a plated copper film to grow on the ruthenium film, and the process of the growth of the plated copper film was analyzed. As a result, it was found that deposition of particulate copper on the surface of the ruthenium film in the initial stage of plating causes the formation of voids in the plated copper film. It was also found that the deposition of particulate copper depends on the time period from contact of the substrate with the plating solution to the initiation of electroplating. Thus, unlike the conventional electroplating for filling of trenches using a seed layer, the formation of voids in a plated film can be suppressed and trench-filling characteristics comparable to the conventional electroplating method using a seed layer can be ensured by initiating electroplating after bringing a surface of a substrate into contact with a plating solution and leaving the substrate in contact with the plating solution for a certain period of time to adsorb an additive in the plating solution onto a ruthenium film.
- The conductive film is preferably composed of copper or a copper alloy.
- This can produce interconnects of copper or a copper alloy which has been filled into interconnect recesses by electroplating.
- In a preferred aspect of the present invention, the plating solution contains a copper ion, a sulfate ion and the additive.
- A ruthenium film as a barrier layer will not dissolve in the plating solution even when such an acidic plating solution is used during electroplating.
- The predetermined time for keeping the substrate surface in contact with the plating solution prior to the electroplating is, for example, not less than 0.5 second and not more than 60 seconds.
- The predetermined time for keeping the substrate surface in contact with the plating solution prior to the electroplating is preferably not less than 0.1 second and not more than 20 seconds, more preferably not less than 0.1 second and not more than 5 seconds.
- The present invention provides another substrate processing method comprising: providing a substrate having interconnect recesses formed in a substrate surface and having a ruthenium film formed in the entire substrate surface including interior surfaces of the interconnect recesses; keeping the substrate surface in contact with a plating solution for a predetermined time to adsorb an additive in the plating solution onto the ruthenium film, and then carrying out first electroplating to form an initial conductive film, which covers the entire interior surfaces of the interconnect recesses, on the surface of the ruthenium film; cleaning and drying the substrate surface; and then carrying out second electroplating to allow a conductive film to further grow on a surface of the initial conductive film.
- By thus carrying out the first electroplating to conformally form the initial conductive film, which covers the entire interior surfaces of interconnect recesses, on the surface of the ruthenium film, and then carrying out the second electroless plating using the initial conductive film as a seed layer, it becomes possible to prevent the formation of voids in a plated film and ensure trench-filling characteristics comparable to those obtained by the use of a conventional seed layer. The second electroplating may be started either after keeping the substrate surface in contact with a plating solution for a short time to adsorb a small amount of an additive in the plating solution onto the initial conductive film, or simultaneously with bringing the substrate surface into contact with the plating solution.
- Preferably, the first electroplating and the second electroplating are carried out by using the same plating solution.
- The predetermined time for keeping the substrate surface in contact with the plating solution prior to the first electroplating is preferably not less than 5 seconds.
- The present invention also provides a substrate processing apparatus for forming a conductive film on a surface of a substrate by electroplating, the substrate having interconnect recesses formed in the substrate surface and having a ruthenium film formed in the entire substrate surface including interior surfaces of the interconnect recesses, said apparatus comprising a measurement section for measuring time that has elapsed since the substrate surface has been brought into contact with a plating solution.
- In a preferred aspect of the present invention, the measurement section is comprised of a position detector for detecting the position of the substrate or a substrate holder, or a substrate-solution contact detector for detecting contact of the substrate with the plating solution.
- The substrate-solution contact detector is comprised of, for example, an optical sensor, a pressure sensor, a conductivity sensor, a temperature sensor or an ultrasonic sensor, or a combination thereof.
- By carrying out electroplating directly on a surface of a ruthenium film, having a low electrical resistance, as a barrier layer according to the method of the present invention, an interconnect material, e.g., copper, can be securely filled into interconnect recesses such as trenches without forming defects, such as voids, in the embedded interconnect metal. Thus, the present invention makes it possible to enhance the reliability of interconnects while enjoying the benefit of elimination of a seed layer formation process.
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FIGS. 1A through 1C are diagrams illustrating, in a sequence of process steps, an example of the formation of copper interconnects by a conventional plating process; -
FIG. 2 is a flow chart showing a conventional plating process; -
FIG. 3 is an overall plan view of a substrate processing apparatus according to an embodiment of the present invention; -
FIG. 4 is a plan view of an electroplating apparatus shown inFIG. 3 ; -
FIG. 5 is an enlarged sectional view of a substrate holder and a cathode portion of the electroplating apparatus shown inFIG. 3 (a cross-sectional view taken along line A-A ofFIG. 4 ); -
FIG. 6 is a front view of a plating solution recovering arm of the electroplating apparatus shown inFIG. 3 ; -
FIG. 7 is a plan view of the substrate holder of the electroplating apparatus shown inFIG. 3 ; -
FIG. 8 is a cross-sectional view taken along line B-B ofFIG. 7 ; -
FIG. 9 is a cross-sectional view taken along line C-C ofFIG. 7 ; -
FIG. 10 is a plan view of the cathode portion of the electroplating apparatus shown inFIG. 3 ; -
FIG. 11 is a cross-sectional view taken along line D-D ofFIG. 10 ; -
FIG. 12 is a plan view of an electrode arm portion of the electroplating apparatus shown inFIG. 3 ; -
FIG. 13 is a schematic sectional view illustrating an electrode head and the substrate holder of the electroplating apparatus shown inFIG. 3 when the electroplating apparatus performs a plating process; -
FIG. 14A through 14C are diagrams illustrating, in a sequence of process steps, a process for forming copper interconnects by a substrate processing method (plating method) of the present invention; -
FIG. 15 is a flow chart showing the substrate processing method (plating process) of the present invention; -
FIG. 16 is a control flow chart showing control of the substrate processing method (plating process) of the present invention until the initiation of electroplating; -
FIG. 17A through 17D are diagrams illustrating, in a sequence of process steps, a process for forming copper interconnects by another substrate processing method (plating method) of the present invention; -
FIG. 18 is a graph showing the relationship between “bottom up” and “switch on delay time”, as determined in Example 1 with comparison; -
FIG. 19 is a graph showing the relationship between “bottom up” and “switch on delay time”, as determined in Example 2; -
FIGS. 20A through 20C are SEM photographs of plated copper films, deposited on various substrates by plating carried out with a “switch on delay time” of 0 second in Example 2; -
FIGS. 21A through 21C are SEM photographs of plated copper films, deposited on various substrates by plating carried out with a “switch on delay time” of one second in Example 2; -
FIGS. 22A through 22C are SEM photographs of plated copper films, deposited on various substrates by plating carried out with a “switch on delay time” of two seconds in Example 2; -
FIGS. 23A through 23C are SEM photographs of plated copper films, deposited on various substrates by plating carried out with a “switch on delay time” of three seconds in Example 2; -
FIG. 24 is a diagram showing the relationship between “switch on delay time” and the formation of voids in interconnects having an interconnect pattern of an interconnect width of 0.09 μm, as determined in Example 3; -
FIG. 25 is a diagram showing the relationship between “switch on delay time” and the formation of voids in interconnects having an interconnect pattern of an interconnect width of 0.15 μm, as determined in Example 3; and -
FIG. 26 is a graph showing the relationship between “bottom up” and “switch on delay time”, as determined in Example 4. - Preferred embodiments of the present invention will now be described in detail with reference to the drawings.
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FIG. 3 is an overall plan view showing a substrate processing apparatus according to an embodiment of the present invention. As shown inFIG. 3 , this substrate processing apparatus has a rectangular facility which houses therein two loading/unloadingstations 10 for housing a plurality of substrates W therein, twoelectroplating apparatuses 12 for performing electroplating process and processing incidental thereto, atransfer robot 14 for transferring substrates W between the loading/unloadingstations 10 and theelectroplating apparatuses 12, and platingsolution supply equipment 18 having aplating solution tank 16. - The
electroplating apparatus 12, as shown inFIG. 4 , is provided with asubstrate processing section 20 for performing plating process and processing incidental thereto, and aplating solution tray 22 for storing a plating solution is disposed adjacent to thesubstrate processing section 20. There is also provided with anelectrode arm portion 30 having anelectrode head 28 which is held at the front end of aswing arm 26 swingable about arotating shaft 24 and which is swung between thesubstrate processing section 20 and theplating solution tray 22. Furthermore, a platingsolution recovering arm 32, and fixednozzles 34 for ejecting pure water or a chemical liquid such as ion water, and further a gas or the like toward a substrate are disposed laterally of thesubstrate processing section 20. In this embodiment, three of the fixednozzles 34 are disposed, and one of them is used for supplying pure water. - The
substrate processing section 20, as shown inFIG. 5 , has asubstrate holder 36 for holding a substrate W with its surface (surface to be plated) facing upwardly, and acathode portion 38 located above thesubstrate holder 36 so as to surround a peripheral portion of thesubstrate holder 36. Further, a substantially cylindrical bottomedsplash prevention cup 40 surrounding the periphery of thesubstrate holder 36 for preventing scatter of various chemical liquids used during processing is provided so as to be vertically movable by an air cylinder (not shown). - The
substrate holder 36 is adapted to be raised and lowered by theair cylinder 44 between a lower substrate transfer position A, an upper plating position B, and a pretreatment/cleaning position C intermediate between these positions. Thesubstrate holder 36 is also adapted to rotate at an arbitrary acceleration and an arbitrary velocity integrally with thecathode portion 38 by a rotating motor and a belt (not shown). A substrate carry-in and carry-out opening (not shown) is provided in confrontation with the substrate transfer position A in a side panel of theelectroplating apparatus 12 facing thetransfer robot 14. When thesubstrate holder 36 is raised to the plating position B, a sealingmember 90 and cathode contacts 88 (both to be described below) of thecathode portion 38 are brought into contact with the peripheral portion of the substrate W held by thesubstrate holder 36. Thesplash prevention cup 40 has an upper end located below the substrate carry-in and carry-out opening, and when thesplash prevention cup 40 ascends, the upper end of thesplash prevention cup 40 reaches a position above thecathode portion 38 closing the substrate carry-in and carry-out opening, as shown by imaginary lines inFIG. 5 . - The
plating solution tray 22 serves to wet aporous structure 110 and an anode 98 (both to be described below) of theelectrode arm portion 30 with a plating solution, when plating has not been performed. Theplating solution tray 22 is set at a size in which theporous structure 110 can be accommodated, and theplating solution tray 22 has a plating solution supply port and a plating solution drainage port (not shown). A photo-sensor is attached to theplating solution tray 22, and can detect brimming with the plating solution in theplating solution tray 22, i.e., overflow, and drainage. - The
electrode arm portion 30 is vertically movable by a vertical movement motor comprised of a servomotor and a ball screw (not shown), and swingable (pivotable) such that theelectrode head 28 moves between theplating solution tray 22 and thesubstrate processing section 20 by a swing motor. - As shown in
FIG. 6 , the platingsolution recovering arm 32 is coupled to an upper end of avertical support shaft 58. The platingsolution recovering arm 32 is swingable (pivotable) by arotary actuator 60 and is also vertically moveable by an air cylinder (not shown). The platingsolution recovering arm 32 supports a platingsolution recovering nozzle 66 that is connected to a cylinder pump or an aspirator, for example, to draw the plating solution on the substrate from the platingsolution recovering nozzle 66. - As shown in
FIGS. 7 through 9 , thesubstrate holder 36 has a disk-shapedsubstrate stage 68 and sixvertical support arms 70 disposed at spaced intervals on the circumferential edge of thesubstrate stage 68 for holding a substrate W in a horizontal plane on respective upper surfaces of thesupport arms 70. Apositioning plate 72 is mounted on an upper end one of thesupport arms 70 for positioning the substrate by contacting the end face of the substrate. Apressing finger 74 is rotatably mounted on an upper end of thesupport arm 70, which is positioned opposite to thesupport arm 70 having thepositioning plate 72, for abutting against an end face of the substrate W and pressing the substrate W to thepositioning plate 72 when rotated. Chuckingfingers 76 are rotatably mounted on upper ends of the remaining foursupport arms 70 for pressing the substrate W downwardly and gripping the circumferential edge of the substrate W. - The
pressing finger 74 and the chuckingfingers 76 have respective lower ends coupled to upper ends ofpressing pins 80 that are normally urged to move downwardly by coil springs 78. When thepressing pins 80 are moved downwardly, thepressing finger 74 and the chuckingfingers 76 are rotated radially inwardly into a closed position. Asupport plate 82 is disposed below thesubstrate stage 68 for engaging lower ends of thepressing pins 80 and pushing them upwardly. - When the
substrate holder 36 is located in the substrate transfer position A shown inFIG. 5 , thepressing pins 80 are engaged and pushed upwardly by thesupport plate 82, so that thepressing finger 74 and the chuckingfingers 76 rotate outwardly and open. When thesubstrate stage 68 is elevated, thepressing pins 80 are lowered under the resiliency of the coil springs 78, so that thepressing finger 74 and the chuckingfingers 76 rotate inwardly and close. - As shown in
FIGS. 10 and 11 , thecathode portion 38 comprises anannular frame 86 fixed to upper ends ofvertical support columns 84 mounted on the peripheral portion of the support plate 82 (seeFIG. 9 ), a plurality of, six in this embodiment,cathode contacts 88 attached to a lower surface of theannular frame 86 and projecting inwardly, and anannular sealing member 90 mounted on an upper surface of theannular frame 86 in covering relation to upper surfaces of thecathode contacts 88. The sealingmember 90 is adapted to have an inner peripheral portion inclined inwardly downwardly and progressively thin-walled, and to have an inner peripheral end suspending downwardly. - When the
substrate holder 36 has ascended to the plating position B shown inFIG. 5 , thecathode contacts 88 are pressed against the peripheral portion of the substrate W held by thesubstrate holder 36 for thereby allowing electric current to pass through the substrate W. At the same time, an inner peripheral portion of the sealingmember 90 is brought into contact with an upper surface of the peripheral portion of the substrate W under pressure to seal its contact portion in a watertight manner. As a result, the plating solution supplied onto the upper surface (surface to be plated) of the substrate W is prevented from seeping from the end portion of the substrate W, and the plating solution is prevented from contaminating thecathode contacts 88. - In this embodiment, the
cathode portion 38 is vertically immovable, but rotatable in a body with thesubstrate holder 36. However, thecathode portion 38 may be arranged such that it is vertically movable and the sealingmember 90 is pressed against the surface to be plated of the substrate W when thecathode portion 38 is lowered. - As shown in
FIGS. 12 and 13 , theelectrode head 28 of theelectrode arm portion 30 includes ahousing 94 which is coupled via aball bearing 92 to the free end of theswing arm 26, and aporous structure 110 which is disposed such that it closes the bottom opening of thehousing 94. Thehousing 94 has a downward-open and cup-like bottomed configuration having at its lower inside surface anrecess portion 94 a, while theporous structure 110 has at its top a flange portion 110 a which can engage with therecess portion 94 a. The flange portion 11 a is inserted into therecess portion 94 a. Theporous structure 110 is thus held with thehousing 94, while a hollowplating solution chamber 100 is defined in thehousing 94. - The
porous structure 110 per se is an insulator, but is constructed so as to have a smaller electrical conductivity than the plating solution by causing the plating solution to enter its inner part complicatedly and follow a considerably long path in the thickness direction. - In the
plating solution chamber 100 and located above theporous structure 110 is disposed ananode 98 having a large number of vertically-extending through-holes 98 c therein. Thehousing 94 has a platingsolution discharge outlet 103 for discharging by suction a plating solution in theplating solution chamber 100. The platingsolution discharge outlet 103 is connected to a platingsolution discharge pipe 106 extending from the plating solution supply equipment 18 (seeFIG. 3 ). Further, a platingsolution supply inlet 104, positioned beside theanode 98 and theporous structure 110 and vertically penetrating the peripheral wall of thehousing 94, is provided within the peripheral wall of thehousing 94. In this embodiment, the platingsolution supply inlet 104 comprises a tube having a lower end shaped as a nozzle, and is connected to a platingsolution supply pipe 102 extending from the plating solution supply equipment 18 (seeFIG. 3 ). - When the
substrate holder 36 is in plating position B (seeFIG. 5 ), theelectrode head 28 is lowered until a gap between the substrate W held by thesubstrate holder 36 and theporous structure 110 becomes about 0.5 to 3 mm, for example, and then the platingsolution supply inlet 104 pours the plating solution into a region between the substrate W and theporous structure 110 from laterally of theanode 98 and theporous structure 110. The nozzle at the lower end of the platingsolution supply inlet 104 is open toward the region between the sealingmember 90 and theporous structure 110. Ashield ring 112 of rubber is mounted on the outer circumferential surface of theporous structure 110 for electrically shielding theporous structure 110. - When the plating solution is introduced, the plating solution introduced from the plating
solution supply inlet 104 flows in one direction along the surface of the substrate W. The flow of the plating solution pushes and discharges the air out of the region between the substrate W and theporous structure 110, filling the region with the fresh plating solution whose composition has been adjusted that is introduced from the platingsolution supply inlet 104. The plating solution is now retained in the region defined between the substrate W and the sealingmember 90. - Beside the
housing 94 is disposed a substrate-solution contact detector 120 as a measurement section, e.g., comprised of an optical sensor, for detecting contact of the surface of the substrate W with the plating solution when the plating solution is supplied from the platingsolution supply inlet 104 to the surface of the substrate W held by thesubstrate holder 36. The substrate-solution contact detector 120 detects contact of the surface of the substrate W with the plating solution, and inputs the detection signal into, e.g., a control section, thereby measuring time that has elapsed since the surface of the substrate W was brought into contact with the plating solution. For a dip-type electroplating apparatus, for example, it is possible to use, instead of the substrate-solution contact detector 120, a position detector for detecting the position of a substrate or a substrate holder and to input a detection signal from the position detector into, e.g., a control section. Instead of an optical sensor, it is also possible to use apressure sensor, a conductivity sensor, a temperature sensor or an ultrasonic sensor, or a combination thereof. - In order to suppress slime formation, the
anode 98 is made of copper (phosphorus-containing copper) containing 0.03 to 0.05% of phosphorus. Theanode 98 may comprise an insoluble electrode comprising metal on which iridium oxide is coated. Theanode 98 is electrically connected to an anode of aplating power source 114, and thecathode contacts 88 are electrically connected to a cathode of theplating power source 114, respectively. - When the
substrate holder 36 is in plating position B (seeFIG. 5 ), theelectrode head 28 is lowered until the gap between the substrate W held by thesubstrate holder 36 and theporous structure 110 becomes about 0.5 to 3 mm, for example. Thereafter, a plating solution is supplied from the platingsolution supply inlet 104 into the region between the substrate W and the porous structure 410, so that the plating solution fills the region and is stored in the region defined by the substrate W and the sealingmember 90 for plating. - A substrate processing method (plating method) according to an embodiment of the present invention, carried out by using the substrate processing apparatus, will now be described with reference to
FIGS. 14A through 16 . - First, a substrate W, as shown in
FIG. 14A , is provided which has been prepared by depositing an insulating film (interlevel dielectric film) 2 of SiO2 or a low-k material on aconductive layer 1 a containing semiconductor devices, formed on asemiconductor base 1, forming viaholes 3 andtrenches 4 as interconnect recesses in the insulatingfilm 2 by the lithography/etching technique, and then forming aruthenium film 5 a as a barrier layer on an entire substrate surface. - Then, a substrate W to be plated is taken out from one of the loading/unloading
stations 10 by thetransfer robot 14, and transferred, with a surface to be plated facing upwardly, into one of theelectroplating apparatus 12 through a substrate carry-in and carry-out opening defined in a side panel. At this time, thesubstrate holder 36 is in lower substrate transfer position A. After the hand of thetransfer robot 14 has reached a position directly above thesubstrate stage 68, thetransfer robot 14 lowers the hand to place the substrate W on thesupport arms 70. The hand of thetransfer robot 14 is then retracted through the substrate carry-in and carry-out opening. - After the hand of the
transfer robot 14 is retracted, thesplash prevention cup 40 is elevated. Then, thesubstrate holder 36 is lifted from lower substrate transfer position A to pretreatment/cleaning position C. As thesubstrate holder 36 is lifted, the substrate W placed on thesupport arms 70 is positioned by thepositioning plate 72 and thepressing finger 74, and then reliably gripped by the chuckingfingers 76. - On the other hand, the
electrode head 28 of theelectrode arm portion 30 is in a normal position over theplating solution tray 22 now, and theporous structure 110 or theanode 98 is positioned in theplating solution tray 22. At the same time that thesplash prevention cup 40 ascends, the plating solution starts being supplied to theplating solution tray 22 and theelectrode head 28. Until the step of plating the substrate W is initiated, the new plating solution is supplied, and the platingsolution discharge pipe 106 is evacuated to replace the plating solution in theporous structure 110 and remove air bubbles from the plating solution in theporous structure 110. When the ascending movement of thesplash prevention cup 40 is completed, the substrate carry-in and carry-out opening in the side panel is closed by thesplash prevention cup 40, thereby isolating the atmosphere in the side panel and the atmosphere outside of the side panel from each other. - Next, the plating step is initiated. First, the
substrate holder 36 is lifted to plating position B while thesubstrate holder 36 not being rotated, or being rotated at a preset rotational speed for plating. Then, the peripheral portion of the substrate W is brought into contact with thecathode contacts 88, when it is possible to pass an electric current, and at the same time, the sealingmember 90 is pressed against the upper surface of the peripheral portion of the substrate W, thus sealing the peripheral portion of the substrate W in a watertight manner. - Based on a signal indicating that the substrate W has been loaded, the
electrode arm portion 30 is swung in a horizontal direction to displace theelectrode head 28 from a position over theplating solution tray 22 to a position over the plating processing position. After theelectrode head 28 reaches this position, theelectrode head 28 is lowered toward thecathode portion 38 and stopped. At this time, theporous structure 110 does not contact with the surface of the substrate W, but is held closely to the surface of the substrate W at a distance ranging from 0.5 mm to 3 mm. The plating solution is then poured from the platingsolution supply inlet 104 into the region between the substrate W and theporous structure 110, filling the region with the plating solution. - Upon the injection of the plating solution, contact of the surface of the substrate W with the plating solution is detected with the substrate-
solution contact detector 120. The surface of the substrate W is kept in contact with the plating solution for a predetermined time to adsorb an additive(s) in the plating solution onto theruthenium film 5 a. Thus, as shown inFIG. 16 , after detecting contact of the surface of the substrate W with the plating solution with the substrate-solution contact detector 120, the elapsed contact time is measured. The predetermined time for the substrate surface to be kept in contact with the plating solution is, for example, not less than 0.5 second and not more than 60 seconds, preferably not less than 0.1 second and not more than 20 seconds, and more preferably not less than 0.1 second and not more than 5 seconds. - After an elapse of the predetermined contact time, a voltage is applied from the
plating power source 114 to between thecathode contacts 88 and theanode 98, thereby forming a platedcopper film 6 on the surface of the ruthenium film (barrier layer) 5 a while filling copper into the via holes 3 and thetrenches 4, as shown inFIG. 14B . By thus initiating electroplating after bringing theruthenium film 5 a into contact with the plating solution and leaving theruthenium film 5 a in contact with the plating solution for a certain period of time to adsorb an additive(s) in the plating solution onto theruthenium film 5 a, the platedcopper film 6 can be formed on the surface of theruthenium film 5 a while suppressing the formation of voids in the copper platedfilm 6 and ensuring trench-filling characteristics comparable to the conventional electroplating method using a seed layer. - By carrying out electroplating directly on the surface of the
ruthenium film 5 a, having a low electrical resistance, as a barrier layer according to the above-described method of the present invention, the platedcopper film 6 can be securely filled into interconnect recesses, such as trenches, without forming defects, such as voids, in the embeddedcopper film 6. Thus, the present method makes it possible to enhance the reliability of interconnects while enjoying the benefit of elimination of a seed layer formation process. Theruthenium film 5 a as a barrier layer will not dissolve even in such an acidic plating solution as containing a copper ion, a sulfate ion and an additive(s) during electroplating. - When the plating process is completed, the
electrode arm portion 30 is raised and then swung to return to the position above theplating solution tray 22 and to lower to the ordinary position. Then, the remainder of the plating solution on the substrate W is recovered by a platingsolution recovering nozzle 66. After recovering of the remainder of the plating solution is completed, pure water is supplied from the fixednozzle 34 for supplying pure water toward the central portion of the substrate W and thesubstrate holder 36 is rotated at an increased speed to replace the plating solution on the surface of the substrate W with pure water. Rinsing the substrate W in this manner prevents the splashing plating solution from contaminating thecathode contacts 88 of thecathode portion 38 during descent of thesubstrate holder 36 from plating position B. - After completion of the rinsing, the washing with water step is initiated. That is, the
substrate holder 36 is lowered from plating position B to pretreatment/cleaning position C. Then, while pure water is supplied from the fixednozzle 34 for supplying pure water, thesubstrate holder 36 and thecathode portion 38 are rotated to perform washing with water. At this time, the sealingmember 90 and thecathode contacts 88 can also be cleaned, simultaneously with the substrate W, by pure water directly supplied to thecathode portion 38, or pure water scattered from the surface of the substrate W. - After washing with water is completed, the drying step is initiated. That is, supply of pure water from the fixed
nozzle 34 is stopped, and the rotational speed of thesubstrate holder 36 and thecathode portion 38 is further increased to remove pure water on the surface of the substrate W by centrifugal force and to dry the surface of the substrate W. The sealingmember 90 and thecathode contacts 88 are also dried at the same time. Upon completion of the drying, the rotation of thesubstrate holder 36 and thecathode portion 38 is stopped, and thesubstrate holder 36 is lowered to substrate transfer position A. Thus, the gripping of the substrate W by the chuckingfingers 76 is released, and the substrate W is just placed on the upper surfaces of thesupport arms 70. At the same time, thesplash prevention cup 40 is also lowered. - All the steps including the plating step, the pretreatment step accompanying to the plating step, the cleaning step, and the drying step are now finished. The
transfer robot 14 inserts its hand through the substrate carry-in and carry-out opening into the position beneath the substrate W, and raises the hand to receive the plated substrate W from thesubstrate holder 36. Then, thetransfer robot 14 returns the plated substrate W received from thesubstrate holder 36 to one of the loading/unloadingstations 10. Thereafter, the platedcopper film 6 and the ruthenium film (barrier layer) 5 a on the insulatingfilm 2 are removed by chemical mechanical polishing (CMP) so as to form interconnects composed of the platedcopper film 6 in the insulatingfilm 2, as shown inFIG. 14C . - A substrate processing method (plating method) according to another embodiment of the present invention, carried out by using the above-described substrate processing apparatus, will now be described with reference to
FIGS. 17A through 17D . - First, a substrate W, as shown in
FIG. 17A , is provided which has been prepared by formingtrenches 4 a as interconnect recesses in an insulating film (interlevel dielectric film) 2 a of SiO2 or a low-k material, and forming aruthenium film 5 b as a barrier layer on a substrate of the insulatingfilm 2 a. - As in the above-described embodiment, after bringing the
porous structure 110 to a position as close to the surface of the substrate W as about 0.5 to 3 mm, a plating solution is injected from the platingsolution supply inlet 104 into the region between the substrate W and theporous structure 110 to fill the region with the plating solution. Upon the injection of the plating solution, contact of the surface of the substrate W with the plating solution is detected with the substrate-solution contact detector 120. The surface of the substrate W is kept in contact with the plating solution for a predetermined time to adsorb an additive(s) in the plating solution onto theruthenium film 5 b. The predetermined time for keeping the substrate surface in contact with the plating solution is generally not less than 5 seconds, preferably not less than 20 seconds, e.g., 30 seconds. - After an elapse of the predetermined contact time, a voltage is applied from the
plating power source 114 to between thecathode contacts 88 and theanode 98, thereby conformally forming an initial platedcopper film 6 a, which uniformly covers the entire interior surfaces of thetrenches 4 a, on the surface of theruthenium film 5 b, as shown inFIG. 17B . - Next, as in the above-described embodiment, after rinsing the plated surface of the substrate W with pure water, the rotational speed of the
substrate holder 36 and thecathode portion 38 is increased to spin-dry the substrate W, e.g., at 1500 rpm for 30 seconds, thereby obtaining a dried substrate W, as shown inFIG. 17C , having the initial platedcopper film 6 a formed conformally on theruthenium film 5 b. - Next, plating is carried out using the initial plated
copper film 6 a as a seed layer to allow a plated copper film to grow on a surface of the initial platedcopper film 6 a, thereby filling a platedcopper film 6 into thetrenches 4 a, as shown inFIG. 17D . In particular, after bringing theporous structure 110 to a position as close to the surface of the substrate W as about 0.5 to 3 mm, a plating solution is injected from the platingsolution supply inlet 104 into the region between the substrate W and theporous structure 110 to fill the region with the plating solution while applying a voltage from theplating power source 114 to between thecathode contacts 88 and theanode 98, thereby allowing a plated copper film to grow on the surface of the initial platedcopper film 6 a. - After filling the plating solution into the region between the substrate W and the
porous structure 110 by injecting the plating solution from the platingsolution supply inlet 104, it is also possible to keep the surface of the substrate W in contact with the plating solution for a short time to adsorb a small amount of an additive(s) in the plating solution onto the initial platedcopper film 6 a, and then apply a voltage from theplating power source 114 to between thecathode contacts 88 and theanode 98. - The subsequent procedures are the same as described above, and hence a description thereof is omitted.
- A substrate sample was prepared by forming an SiO2 film over a silicon substrate, forming a groove-shaped interconnect pattern (interconnect width not less than 0.1 μm) in the SiO2 film, and then forming a ruthenium film as a barrier layer on the entire substrate surface. A copper sulfate plating solution, which is commonly used for forming a plated copper film in the process of forming interconnects in a semiconductor device, and contains an accelerator, a suppressor and a leveler as additives in appropriate amounts, was used as a copper-plating solution. An insoluble anode coated with iridium oxide was used. A series of electroplating tests was carried out on the same substrate samples under the same plating conditions but varying the time period from contact of the substrate with the plating solution to the initiation of electroplating, thereby allowing a plated copper film to grow on a surface of the ruthenium film, including the interior surfaces of trenches. A cross section of each sample after plating was observed under a scanning electron microscope to measure a thickness “a”, shown in
FIG. 18 , of the plated copper film in trenches and a thickness “b”, shown inFIG. 18 , of the plated copper film in the substrate surface. The trench-filling selectivity ratio a/b was calculated from the measured thicknesses “a” and “b” of the plated copper film for all the test samples to determine the relationship of the selectivity ratio with the time period from contact of the substrate with the plating solution to the initiation of electroplating. The graph with the mark “A” inFIG. 18 shows the relationship between the time period from contact of the substrate with the plating solution to the initiation of electroplating (switch on delay time) and the trench-filling selectivity ratio [bottom up (a/b)]. - For comparison, after depositing a copper seed layer by PVD, plated copper film was formed on a surface of the copper seed layer, and the trench-filling selectivity ratio a/b was calculated from the measured thicknesses “a” and “b” of the plated copper film. The graph with the mark “O” in
FIG. 18 shows the relationship between the time period from contact of the substrate with the plating solution to the initiation of electroplating and this trench-filling selectivity ratio (a/b). The copper seed layer was formed on a surface of a silicon substrate having a interconnect pattern of an interconnect width of 0.2 μm. - The above-described two substrates differ in the interconnect structure and the aspect ratio. Further, different types of additives are used and thicknesses of plated films differ each other. Accordingly, simple comparison of the values cannot be made.
- As can be seen from
FIG. 18 , when copper plating is carried out on the copper seed layer, the trench-filling selectivity ratio [bottom up (a/b)] generally decreases, i.e., the trench-filling characteristics become worse, with an increase in the “switch on delay time”. In contrast, when copper plating is carried out directly on the ruthenium film, the trench-filling selectivity ratio [bottom up (a/b)] generally increases, i.e., the trench-filling characteristics become better, with an increase in the “switch on delay time”. Further, the cross-sectional observation revealed that as the “switch on delay time” increases, the form of plated film in the initial plating stage changes from a particulate form to a continuous film. These facts indicate that when carrying out copper plating directly on a surface of a ruthenium film, it is advantageous to initiate electroplating after bringing a surface of a substrate into contact with a plating solution and leaving the substrate in contact with the plating solution for a certain period of time in order to suppress the formation of voids or seams in a plated copper film embedded in trenches and thereby ensure the reliability of interconnects. - Substrates, each having an interconnect pattern of an interconnect depth of 0.25 μm and an interconnect width of 0.1 μm, 0.2 μm or 0.25 μm and having a 3 nm-thick surface ruthenium film formed by CVD, were prepared. The sheet resistance of the ruthenium film was about 150 Ω/sq. Copper plating of a surface of each substrate was carried out in an electrolytic amount corresponding to a plating thickness of 55 nm, using a plating solution having a copper concentration of 50 g/l, a sulfuric acid concentration of 80 g/l and a chlorine concentration of 50 ppm, and containing an accelerator, a suppressor and a leveler as additives. A series of electroplating tests was carried out on each substrate at a current density of 5 to 40 mA/cm2 by varying the time period from contact of the substrate with the plating solution to the initiation of electroplating (switch on delay time) as follows: 0 second, 1 second, 2 seconds and 3 seconds. With reference to the interconnect pattern, the trenches had a curved cross-sectional contour at the openings (see
FIGS. 24 and 25 ). -
FIG. 19 shows the relationship between the time period from contact of the substrate with the plating solution to the initiation of electroplating (switch on delay time) and the trench-filling selectivity ratio [bottom up (a/b)] shown inFIG. 18 . As shown inFIG. 19 , the selectivity ratio [bottom up (a/b)] generally increases with an increase in an immersion time (switch on delay time), and this is marked in the interconnect pattern of an interconnect width of 0.1 μm. This is considered to be due to the fact that an increase in the period of time during which the substrate is immersed in the plating solution without application of a voltage, may lead to increased adsorption of the accelerator (containing sulfur), contained as an additive in the plating solution, onto the surface of the ruthenium film in the interconnects. -
FIGS. 20A through 20C are SEM photographs of plated copper films as deposited on the substrates when the “switch on delay time” was 0 second;FIGS. 21A through 21C are SEM photographs of plated copper films as deposited on the substrates when the “switch on delay time” was 1 second;FIGS. 22A through 22C are SEM photographs of plated copper films as deposited on the substrates when the “switch on delay time” was 2 seconds; andFIGS. 23A through 23C are SEM photographs of plated copper films as deposited on the substrates when the “switch on delay time” was 3 seconds. - As can be seen from
FIGS. 20A through 23C , a longer immersion time (switch on delay time) results in a denser crystal deposition. This also is considered to be due to increased adsorption of the accelerator onto the ruthenium film. It is expected that as the crystal deposition becomes denser, the formation of voids in interconnects will be reduced. - Substrates, each having an interconnect pattern of an interconnect depth of 0.25 μm and an interconnect width of 0.09 μm or 0.15 μm and having a 3 nm-thick surface ruthenium film formed by CVD, were prepared. The sheet resistance of the ruthenium film was about 150 Ω/sq. Copper plating of a surface of each substrate was carried out in an electrolytic amount corresponding to a plating thickness of 55 nm, using a plating solution having a copper concentration of 50 g/l, a sulfuric acid concentration of 80 g/l and a chlorine concentration of 50 ppm, and containing an accelerator, a suppressor and a leveler as additives. A series of electroplating tests was carried out on each substrate at a current density of 5 to 40 mA/cm2 by varying the time period from contact of the substrate with the plating solution to the initiation of electroplating (switch on delay time) as follows: 0 second, 3 seconds, 5 seconds, 7 seconds and 1 minute.
-
FIG. 24 shows the relationship between the time period from contact of the substrate with the plating solution to the initiation of electroplating (switch on delay time) and the formation of voids in the interconnects having the interconnect pattern of an interconnect width of 0.09 μm; andFIG. 25 shows the relationship between the time period from contact of the substrate with the plating solution to the initiation of electroplating (switch on delay time) and the formation of voids in the interconnects having the interconnect pattern of an interconnect width of 0.15 μm. -
FIGS. 24 and 25 each illustrate a platedcopper film 6 b, which is to become interconnects, embedded in trenches 4 b formed in an insulating film (interlevel dielectric film) 2 b which is covered with aruthenium film 5 c. - As shown in
FIG. 24 , in the case of the interconnect pattern of an interconnect width of 0.09 μm, the formation of voids V in the interconnects (plated copper film) was observed when an immersion time (switch on delay time) was 0 second or one minute. It is considered in this regard that when the immersion time (switch on delay time) is 0 second, the amount of the accelerator (containing sulfur), contained as an additive in the plating solution, adsorbed onto the surface of the ruthenium film in the interconnects is too small, whereas when the immersion time (switch on delay time) is one minute, the amount of the suppressor, contained as an additive in the plating solution, adsorbed onto the surface of the ruthenium film is so large as to lower the plating rate, resulting in the formation of voids in the interconnects. In the case of the interconnect pattern of an interconnect width of 0.15 μm, on the other hand, no formation of voids in the interconnects was observed for any switch on delay time, as will be appreciated fromFIG. 25 . - A substrate having an interconnect pattern of an interconnect width of 0.08 μm and an interconnect depth of 0.22 μm and having a 2 nm-thick surface ruthenium film formed by CVD was prepared. The sheet resistance of the ruthenium film was about 250 Ω/sq. Copper plating of a surface of the substrate was carried out in an electrolytic amount corresponding to a plating thickness of 40 nm, using a plating solution having a copper concentration of 50 g/l, a sulfuric acid concentration of 80 g/l and a chlorine concentration of 50 ppm, and containing an accelerator, a suppressor and a leveler as additives. A series of electroplating tests was carried out on the substrate at a current density of 5 to 40 mA/cm2 by varying the time period from contact of the substrate with the plating solution to the initiation of electroplating (switch on delay time) as follows: 0 second, 2 seconds, 5 seconds, 10 seconds and 20 seconds. With reference to the interconnect pattern, the trenches had a relatively sharp cross-sectional contour at the openings.
-
FIG. 26 shows the relationship between the time period from contact of the substrate with the plating solution to the initiation of electroplating (switch on delay time) and the trench-filling selectivity ratio [bottom up (a/b)] shown inFIG. 18 . Since the trench-filling selectivity ratio [bottom up (a/b)] varies depending on the interconnect width, the interconnect depth and the electrolytic amount, proper comparison must be made under the same experimental conditions. - As can be seen from
FIG. 26 , the trench-filling selectivity ratio [bottom up (a/b)] is large when the “switch on delay time” is 0 to 5 seconds, whereas it is small when the “switch on delay time” is more than 10 seconds and reaches saturation at the “switch on delay time” of about 20 seconds. The trench-filling selectivity ratio [bottom up (a/b)] is an index of filling of trenches. Thus, in the case of the plating solution used in this Example, the immersion time (switch on delay time) is preferably not more than 5 seconds, and more preferably not more than 2 seconds for better filling of trenches. This is because adsorption of the accelerator (containing sulfur), contained as an additive in the plating solution, onto the ruthenium film reaches saturation in 2 to 5 seconds, while adsorption of the suppressor, contained as an additive in the plating solution, onto the ruthenium film reaches saturation in 20 seconds. - Thus, when the immersion time (switch on delay time) is 2 to 5 seconds, because of the large adsorption of the accelerator, the trench-filling selectivity ratio [bottom up (a/b)] is large, indicating plating of good trench-filling characteristics. When the immersion time (switch on delay time) is 20 seconds, on the other hand, conformal plating will be performed in the interconnects due to the large adsorption of the suppressor.
- Based on the results of Example 4, an experiment was conducted to determine if void-free plating is possible when conformal plating is carried out in combination with plating of good trench-filling characteristics. First, a substrate having an interconnect pattern of an interconnect width of 0.08 μm and an interconnect depth of 0.22 μm and having a 2 nm-thick surface ruthenium film formed by CVD was prepared. The sheet resistance of the ruthenium film was about 250 Ω/sq. After keeping the substrate in contact with the same plating solution as used in Example 4 for 20 seconds (“switch on delay time” of 20 seconds), copper plating of a substrate surface with the plating solution was carried out in an electrolytic amount corresponding to a plating thickness of 25 nm (at a current density of 5 to 40 mA/cm2), thereby conformally forming a plated copper film in the interconnect pattern. Thereafter, the substrate was rinsed with water for 60 seconds and then spin-dried at 1500 rpm for 30 seconds, thereby removing the plating solution from the substrate. Next, with the immersion time (switch on delay time) of 0 second, electroplating of the substrate surface was carried out in an electrolytic amount corresponding to a plating thickness of 500 nm (at a current density of 5 to 40 mA/cm2), using the same plating solution as used in the first electroplating. On cross-sectional observation of the plated substrate, no void was found in the interconnects.
- While the present invention has been described with reference to the embodiments thereof, it will be understood by those skilled in the art that the present invention is not limited to the particular embodiments described above, but it is intended to cover modifications within the inventive concept. For example, though the use of copper as an interconnect material has been described, it is also possible to use a copper alloy instead of copper.
Claims (12)
1. A substrate processing method comprising:
providing a substrate having interconnect recesses formed in a substrate surface and having a ruthenium film formed in the entire substrate surface including interior surfaces of the interconnect recesses;
keeping the substrate surface in contact with a plating solution for a predetermined time to adsorb an additive in the plating solution onto the ruthenium film; and then carrying out electroplating to form a conductive film on a surface of the ruthenium film.
2. The substrate processing method according to claim 1 , wherein the conductive film is composed of copper or a copper alloy.
3. The substrate processing method according to claim 2 , wherein the plating solution contains a copper ion, a sulfate ion and the additive.
4. The substrate processing method according to claim 1 , wherein the predetermined time for keeping the substrate surface in contact with the plating solution prior to the electroplating is not less than 0.5 second and not more than 60 seconds.
5. The substrate processing method according to claim 1 , wherein the predetermined time for keeping the substrate surface in contact with the plating solution prior to the electroplating is not less than 0.1 second and not more than 20 seconds.
6. The substrate processing method according to claim 1 , wherein the predetermined time for keeping the substrate surface in contact with the plating solution prior to the electroplating is not less than 0.1 second and not more than 5 seconds.
7. A substrate processing method comprising:
providing a substrate having interconnect recesses formed in a substrate surface and having a ruthenium film formed in the entire substrate surface including interior surfaces of the interconnect recesses;
keeping the substrate surface in contact with a plating solution for a predetermined time to adsorb an additive in the plating solution onto the ruthenium film, and then carrying out first electroplating to form an initial conductive film, which covers the entire interior surfaces of the interconnect recesses, on the surface of the ruthenium film;
cleaning and drying the substrate surface; and then
carrying out second electroplating to allow a conductive film to further grow on a surface of the initial conductive film.
8. The substrate processing method according to claim 7 , wherein the first electroplating and the second electroplating are carried out by using the same plating solution.
9. The substrate processing method according to claim 7 , wherein the predetermined time for keeping the substrate surface in contact with the plating solution prior to the first electroplating is not less than 5 seconds.
10. A substrate processing apparatus for forming a conductive film on a surface of a substrate by electroplating, the substrate having interconnect recesses formed in the substrate surface and having a ruthenium film formed in the entire substrate surface including interior surfaces of the interconnect recesses, said apparatus comprising:
a measurement section for measuring time that has elapsed since the substrate surface has been brought into contact with a plating solution.
11. The substrate processing apparatus according to claim 10 , wherein the measurement section is comprised of a position detector for detecting the position of the substrate or a substrate holder, or a substrate-solution contact detector for detecting contact of the substrate with the plating solution.
12. The substrate processing apparatus according to claim 11 , wherein the substrate-solution contact detector is comprised of an optical sensor, a pressure sensor, a conductivity sensor, a temperature sensor or an ultrasonic sensor, or a combination thereof.
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JP2008170222A JP2009030167A (en) | 2007-07-02 | 2008-06-30 | Method and apparatus for treating substrate |
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