US20080254719A1 - Substrate processing method - Google Patents

Substrate processing method Download PDF

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Publication number
US20080254719A1
US20080254719A1 US12/100,450 US10045008A US2008254719A1 US 20080254719 A1 US20080254719 A1 US 20080254719A1 US 10045008 A US10045008 A US 10045008A US 2008254719 A1 US2008254719 A1 US 2008254719A1
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Prior art keywords
polishing
substrate
periphery
abrasive grains
film
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US12/100,450
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English (en)
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Atsushi Shigeta
Dai Fukushima
Hiroyuki Yano
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Toshiba Corp
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Individual
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Assigned to KABUSHIKI KAISHA TOSHIBA reassignment KABUSHIKI KAISHA TOSHIBA ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: FUKUSHIMA, DAI, YANO, HIROYUKI, SHIGETA, ATSUSHI
Publication of US20080254719A1 publication Critical patent/US20080254719A1/en
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    • BPERFORMING OPERATIONS; TRANSPORTING
    • B24GRINDING; POLISHING
    • B24BMACHINES, DEVICES, OR PROCESSES FOR GRINDING OR POLISHING; DRESSING OR CONDITIONING OF ABRADING SURFACES; FEEDING OF GRINDING, POLISHING, OR LAPPING AGENTS
    • B24B9/00Machines or devices designed for grinding edges or bevels on work or for removing burrs; Accessories therefor
    • B24B9/02Machines or devices designed for grinding edges or bevels on work or for removing burrs; Accessories therefor characterised by a special design with respect to properties of materials specific to articles to be ground
    • B24B9/06Machines or devices designed for grinding edges or bevels on work or for removing burrs; Accessories therefor characterised by a special design with respect to properties of materials specific to articles to be ground of non-metallic inorganic material, e.g. stone, ceramics, porcelain
    • B24B9/065Machines or devices designed for grinding edges or bevels on work or for removing burrs; Accessories therefor characterised by a special design with respect to properties of materials specific to articles to be ground of non-metallic inorganic material, e.g. stone, ceramics, porcelain of thin, brittle parts, e.g. semiconductors, wafers
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B24GRINDING; POLISHING
    • B24BMACHINES, DEVICES, OR PROCESSES FOR GRINDING OR POLISHING; DRESSING OR CONDITIONING OF ABRADING SURFACES; FEEDING OF GRINDING, POLISHING, OR LAPPING AGENTS
    • B24B21/00Machines or devices using grinding or polishing belts; Accessories therefor
    • B24B21/002Machines or devices using grinding or polishing belts; Accessories therefor for grinding edges or bevels

Definitions

  • This invention relates to a substrate processing method of polishing the periphery of a semiconductor substrate, and more particularly to a substrate processing method of removing unnecessary films and uneven surfaces formed at the periphery of the substrate.
  • insulating films such as SiO 2 films or SiN films
  • conducting films such as polysilicon films, W films, or Cu films
  • a film forming process an exposure process, and an etching process
  • insulating films and conducting films are repeatedly subjected to a film forming process, an exposure process, and an etching process, thereby forming microscopic interconnection lines.
  • unnecessary films, including insulating films and conducting films, and uneven surfaces are formed at the periphery of the substrate. The unnecessary films and uneven surfaces become the sources of particles in the manufacturing processes and are coming up to the surface as the factor that decreases the yield as a result of miniaturization of interconnection lines.
  • a resist pattern is formed on a stacked insulating film obtained by forming an SiN film and an SiO 2 film sequentially by CVD techniques. Then, with the resist pattern as a mask, the SiO 2 film, SiN film, and silicon substrate are etched sequentially by RIE (Reactive Ion Etching) techniques, thereby making a trench.
  • RIE Reactive Ion Etching
  • the generation of plasma and the supply of etching gas become unstable at the periphery of the substrate, with the result that needle-like projections might be formed.
  • the needle-like projections are damaged during the transportation of the substrate or in the course of processing and contribute to the generation of particles. Since such particles lead to a decrease in the yield of manufactured semiconductor devices, it is necessary to remove the needle-like projections formed at the periphery of the substrate.
  • One method of processing the periphery of the substrate is the technique for sliding a substrate with a surface to be polished and a polishing surface, while pressing the substrate against the polishing surface, thereby polishing and removing the polished film on the substrate.
  • the polishing techniques include the free abrasive grain method and the fixed abrasive grain method.
  • the free abrasive grain method the surface to be polished is polished, while an abrading agent including abrasive particles is being supplied to the contact surface between the polishing surface made of nonwoven cloth and the surface to be polished.
  • the surface to be polished is polished, while purified water is being supplied to the contact surface between the polishing surface to which abrasive grains are fixed and the surface to be polished.
  • the plane roughness of the surface to be polished has to be improved to suppress the occurrence of defects in subsequent processes.
  • the decrease of the size of abrasive grains is effective in improving the plane roughness of the surface to be polished.
  • a high hardness film such as an SiN film or an SiO 2 film
  • a decrease in the abrasive grain size causes the polishing speed to reduce significantly, which produces a side-effect that the productivity might deteriorate.
  • a substrate processing method of polishing a periphery of a substrate comprising: in a state where a first polishing surface to which abrasive grains that include particles having a chemical effect on an oxide-silicon-series or nitride-silicon-series film as a main component have been fixed is brought into contact with the periphery of a semiconductor substrate, polishing the periphery of the substrate by sliding the substrate and the first polishing surface; and in a state where a second polishing surface to which abrasive grains mainly having a mechanical effect have been fixed is brought into contact with the periphery of the substrate, polishing the periphery of the substrate by sliding the substrate and the second polishing surface.
  • a substrate processing method of polishing the periphery of a substrate comprising: polishing the periphery of a semiconductor substrate using a first polishing liquid that includes abrasive grains having a chemical effect on an oxide-silicon-series or nitride-silicon-series film as a main component; and polishing the periphery of the semiconductor substrate using a second polishing liquid that includes abrasive grains mainly having a mechanical effect.
  • a substrate processing method of polishing a periphery of a substrate comprising: polishing the periphery of a semiconductor substrate using fixed or free abrasive grains that include particles having a chemical effect on an oxide-silicon-series or nitride-silicon-series film as a main component; and polishing the periphery of the semiconductor substrate using fixed or free abrasive grains mainly having a mechanical effect.
  • FIGS. 1A and 1B are sectional views to help explain substrate processing steps according to a first embodiment of the invention
  • FIG. 2 is a diagram schematically showing the configuration of a fixed-abrasive-grain-type polishing apparatus applied to the first embodiment
  • FIGS. 3A and 3B are sectional views to help explain examples of polishing tape used in the polishing apparatus of FIG. 2 ;
  • FIG. 4 is a diagram schematically showing the configuration of another fixed-abrasive-grain-type polishing apparatus applied to the first embodiment
  • FIGS. 5A to 5C are sectional views to help explain substrate processing steps according to a second embodiment of the invention.
  • FIGS. 6A to 6D are sectional views to help explain substrate processing steps according to a third embodiment of the invention.
  • FIG. 7 is a diagram schematically showing the configuration of a free-abrasive-grain-type polishing apparatus according to a modification of the embodiments.
  • FIGS. 1A and 1B are sectional views to help explain substrate processing steps according to a first embodiment of the invention.
  • FIG. 1A shows the state of a substrate to be processed before polishing.
  • FIG. 1B shows the state of the substrate after polishing.
  • numeral 10 indicates a silicon substrate, 11 an SiO 2 film, and 12 an SiN film.
  • a first polishing surface to which abrasive grains that include ceria (cerium oxide) having a chemical effect on SiO 2 and SiN as a main component have been fixed is brought into contact with the periphery of the silicon substrate 10 .
  • the substrate 10 is rotated, thereby polishing the substrate periphery.
  • a second polishing surface to which diamond abrasive grains that have mainly a mechanical effect have been fixed is brought into contact with the periphery of the silicon substrate 10 .
  • the substrate 10 is rotated, thereby polishing the substrate periphery.
  • FIG. 2 is a diagram schematically showing the configuration of a fixed-abrasive-grain-type polishing apparatus applied to the first embodiment.
  • a stage 21 on which a substrate to be processed 20 is placed can be rotated by a motor 22 .
  • the substrate 20 is absorbed and fixed to the stage 21 in such a manner that its center is aligned with the center of the stage 21 , with the result that a part of the periphery of the substrate 20 makes contact with a polishing tape 23 .
  • a part of or all of the unnecessary film formed at the periphery of the substrate 20 is polished and removed until the surface of the substrate 10 has been exposed.
  • purified water is supplied from a nozzle 25 near the center of the substrate to the substrate surface in such a manner that the water is supplied to the polishing area of the substrate periphery.
  • FIGS. 3A and 3B Two types of polishing tape 23 are used as shown in FIGS. 3A and 3B : one is a first polishing tape 23 a to which abrasive grains that include grains having a chemical effect as a main component have been fixed and the other is a second polishing tape 23 b to which abrasive grains that mainly have a mechanical effect have been fixed.
  • the first polishing tape 23 a is such that ceria abrasive grains 33 (#10000: a grain diameter of about 0.5 ⁇ m) are fixed to a PET (polyethylene terephthalate) film 31 with binder 32 .
  • the polishing tape 23 a is 80 mm in width and 50 ⁇ m in thickness. As shown in FIG.
  • the second polishing tape 23 b is such that diamond abrasive grains 34 (#10000: a grain diameter of about 0.5 ⁇ m) are fixed to a PET film 31 with the binder 32 .
  • the width and thickness of the polishing tape 23 b are the same as those of the polishing tape 23 a .
  • These two types of polishing tape 23 can be replaced with each other as needed.
  • these polishing tapes 23 are so designed that the part deteriorated as a result of polishing can be replaced with a new polishing surface by rolling up the tape gradually during polishing.
  • a 100-nm-thick SiO 2 film 11 and a 100-nm-thick SiN film 12 were formed sequentially by CVD techniques.
  • the result of applying a polishing method of the first embodiment to the removal of the stacked insulating film formed at the periphery of the substrate 10 will be explained below.
  • the first polishing tape 23 a to which ceria abrasive grains have been fixed shown in FIG. 3A is set as the polishing tape 23 .
  • the substrate to be processed 20 is absorbed and fixed to the stage 21 , which is then rotated at a predetermined speed.
  • the polishing tape 23 is pressed against the substrate periphery, while the polishing tape 23 is being transported at a predetermined speed, thereby polishing the substrate periphery.
  • polishing time was twice as long as that of the conventional combination of diamond abrasive grains #4000 and diamond abrasive grains #10000, the surface roughness after polishing was 1 ⁇ 5 of that of the combination. Moreover, the polishing time was 1/10 of that of the polishing removal using only the same grain-diameter diamond abrasive grains #10000 and the surface roughness after polishing was about 1 ⁇ 2 of that of the polishing removal.
  • the polishing capability for the silicon substrate 10 is compared in terms of a change in the substrate weight before and after polishing, it is as low as 1/150 of that of diamond abrasive grains #4000 and also as low as 1 ⁇ 5 of that of diamond abrasive grains #10000.
  • Ceria grains have the advantage of having a high polishing capability for SiO 2 and SiN and a low polishing capability for Si. In the excessive polishing, this advantage works effectively. That is, ceria abrasive grains are very effective in polishing and removing the unnecessary film (SiO 2 film, SiN film) deposited on the periphery of the silicon substrate 10 .
  • the polishing tape 23 a to which ceria abrasive grains have been fixed sufficiently reduces the surface roughness after polishing as compared with use of the conventional combination of diamond abrasive grains #4000 and diamond abrasive grains #10000, the polishing time gets longer than that of the combination.
  • the polishing tape 23 a to which ceria abrasive grains (#10000) have been fixed and the polishing tape 23 b to which diamond abrasive grains (#10000) have been fixed are combined in the first embodiment to shorten the polishing time, which will be explained below.
  • the polishing removal of the stacked insulating film was started with the polishing tape 23 a to which ceria abrasive grains had been fixed and continued until a part of the underlying Si had been exposed. Then, polishing was performed with the polishing tape 23 b to which diamond abrasive grains whose polishing capability for the silicon substrate is higher than that of ceria abrasive grains had been fixed. As a result, the total polishing time was reduced to about 1 ⁇ 2 of that when only ceria abrasive grains were used. That is, the polishing time became the same as that of the conventional combination of diamond abrasive grains #4000 and diamond abrasive grains #10000. At this time, the surface roughness after polishing was reduced to about 1 ⁇ 3 of that of the conventional combination of diamond abrasive grains #4000 and diamond abrasive grains #10000.
  • the polishing step with the ceria abrasive grain polishing tape 23 a is switched to the polishing step with the diamond abrasive grain polishing tape 23 b or vice versa, the switching between the polishing steps is performed efficiently by using a change in the rotational load of the motor that holds and rotates the substrate to be polished.
  • polishing with the polishing tape 23 b instead of polishing with the polishing tape 23 b after the completion of polishing with the polishing tape 23 a , polishing with the polishing tape 23 a was alternated with polishing with the polishing tape 23 b , which produced almost the same effect as described above.
  • the polishing tape 23 a to which ceria abrasive grains had been fixed and the polishing tape 23 b to which diamond abrasive grains had been fixed were brought into contact with different places of the periphery of the substrate 20 at the same time, thereby performing polishing with ceria abrasive grains in parallel with polishing with diamond abrasive grains.
  • the polishing time was reduced to about 1 ⁇ 3 of that when only ceria abrasive grains were used. That is, the polishing time was reduced to 2 ⁇ 3 of that of the conventional combination of diamond abrasive grains #4000 and diamond abrasive grains #10000.
  • the surface roughness after polishing was reduced to about 1 ⁇ 3 of the conventional combination.
  • the silicon substrate 10 on whose surface the unnecessary film including a high hardness film, including the SiO 2 film 11 and SiN film 12 , has been formed is polished using the polishing tape 23 a to which ceria abrasive grains have been fixed and the polishing tape 23 b to which diamond abrasive grains have been fixed.
  • a combination of polishing with abrasive grains having a chemical effect and polishing with abrasive grains having a mechanical effect makes it possible not only to remove the unnecessary films, including oxide-silicon-series or nitride-silicon-series high-hardness films, and uneven surfaces at a high efficiency but also to increase the polished surface accuracy.
  • a 200-nm-thick SiO 2 film was formed on the silicon substrate 10 by CVD techniques.
  • the first embodiment was applied using the polishing apparatus of FIG. 4 .
  • a combination of ceria abrasive grains #10000 and diamond abrasive grains #10000 reduced the polishing time to about 1 ⁇ 2 of that of the conventional combination of diamond abrasive grains #4000 and diamond abrasive grains #10000 and further reduced the surface roughness to 1 ⁇ 3 of that of the conventional combination.
  • a 200-nm-thick SiN film was formed on the silicon substrate 10 by CVD techniques.
  • the first embodiment was applied using the polishing apparatus of FIG. 4 .
  • a combination of ceria abrasive grains #10000 and diamond abrasive grains #10000 reduced the polishing time to about 3 ⁇ 4 of that of the conventional combination of diamond abrasive grains #4000 and diamond abrasive grains #10000 and further reduced the surface roughness to 1 ⁇ 3 of that of the conventional combination.
  • FIGS. 5A to 5C are sectional views to help explain substrate processing steps according to a second embodiment of the invention.
  • FIG. 5A shows a state where trenches are made.
  • FIG. 5B shows a state of a substrate to be processed before polishing.
  • FIG. 5C shows a state of the substrate after polishing.
  • numeral 10 indicates a silicon substrate, 11 an SiO 2 film, 12 an SiN film, and 13 needle-like silicon projections.
  • an SiN film 12 and an SiO 2 film 11 are deposited sequentially by LP-CVD techniques. These films are patterned, thereby forming a hard mask composed of a stacked film of the SiN film 12 and SiO 2 film 11 . Then, using the hard mask, the silicon substrate 10 is etched by RIE techniques, thereby making trenches. At this time, etching is disordered at the substrate periphery, with the result that mask remains and needle-like Si projections 13 are formed. Thereafter, the SiO 2 film 11 is peeled by wet etching.
  • FIG. 5B shows a state where the SiO 2 film 11 has been removed. At the periphery of the silicon substrate 10 , an SiN film 12 and needle-like silicon projections 13 have been formed. A polishing method of the second embodiment is applied to the removal of the needle-like silicon projections 13 including the SiN film formed during the formation of trenches and to the planarization of the substrate.
  • a polishing method using a combination of the polishing tape 23 a to which ceria abrasive grains #10000 had been fixed and the polishing tape 23 b to which diamond abrasive grains #10000 had been fixed was applied.
  • polishing was performed under predetermined polishing conditions, thereby completing the process as shown in a sectional view of the substrate in FIG. 5C .
  • a substrate to be processed where an SiN film 12 and needle-like silicon projections 13 have been formed at the surface of the silicon substrate 10 is polished using the polishing tape 23 a to which ceria abrasive grains have been fixed and the polishing tape 23 b to which diamond abrasive grains have been fixed, which makes it possible to remove the unnecessary film and needle-like projections 13 at the substrate periphery at a high efficiency and further increase the polished surface accuracy. Accordingly, the same effect as that of the first embodiment is obtained.
  • FIGS. 6A to 6D are sectional views to help explain substrate processing steps according to a third embodiment of the invention.
  • the invention is applied to the removal of metallic contaminants at the substrate periphery caused in forming silicide for a metal film (e.g., Ni or Co).
  • a metal film e.g., Ni or Co
  • a resist film (not shown) was applied to the SiN film 12 . Thereafter, with the resist film as a mask, openings were made to the silicon substrate 10 by photolithography and etching techniques for the SiN film 12 .
  • metal (Co) was deposited by, for example, sputtering techniques, thereby forming a metal film (Co film) 61 on the substrate 10 in the exposed parts from the SiN film 12 . Thereafter, the metal film was heat-treated, thereby causing only the surface of the substrate Si exposed in the opening to react with the metal to form a silicide film (CoSi film) 62 . The unreacted metal film 61 was removed by etching or the like. At this time, if a resist film were not applied sufficiently to the periphery of the silicon substrate 10 , the substrate Si might be exposed at the periphery when openings are made to the silicon substrate 10 .
  • a metal film is deposited on the Si substrate exposed at the periphery and then is heat-treated, Si exposed at the periphery reacts with the metal, producing a reactant of the metal film and Si, such as a silicide film, which causes a problem: metallic contaminants are emitted from the periphery of the silicon substrate 10 .
  • the metal silicide film 62 and SiN film 12 at the periphery are to be removed after a reactant, such as a silicide film, is formed.
  • a reactant such as a silicide film
  • the reason why the SiN film 12 at the substrate periphery is removed is that the surrounding SiN film 12 is obstructive to the polishing of the metal silicide film 62 at the substrate periphery. That is, if the SiN film 12 remains around the metal silicide film 62 , the metal silicide film 62 cannot be polished efficiently making use of the mechanical effect.
  • a substrate to be processed is absorbed and fixed to the stage 21 , which is rotated at a predetermined speed.
  • the polishing tapes 23 ( 23 a , 23 b ) are pressed against the substrate periphery at a predetermined pressure and polish the periphery, while the polishing tapes 23 are being transported at a predetermined speed, thereby bringing the substrate to completion as shown in a sectional view of the substrate in FIG. 6D .
  • polishing with the polishing tape 23 a having a chemical effect is performed in parallel with polishing with the polishing tape 23 b having a mechanical effect. Accordingly, the SiN film around the metal silicide film to be removed can be polished efficiently, which enables the metal silicide film to be polished and removed reliably.
  • polishing time was reduced to 2 ⁇ 3 of that of the conventional combination of diamond rough abrasive grains (#4000) and finishing abrasive grains (#10000).
  • flaws caused by rough diamond abrasive grains observed in the conventional art were eliminated, and the surface roughness was decreased to 1 ⁇ 3 of that of the conventional combination.
  • the reason why the surface roughness was improved is that only finishing diamond abrasive grains were used and rough diamond abrasive grains were not used.
  • polishing time was reduced regardless of using no diamond abrasive grain is that use of the polishing tape 23 a to which ceria abrasive grains had been fixed enabled the SiN film around the metal silicide film at the substrate periphery to be removed efficiently by the chemical effect.
  • a nitride film (Si nitride film) has been used as a mask material in the third embodiment
  • an oxide film (Si oxide film) may be used. Even when applied to a case where an oxide film or a nitride film is formed after the formation of silicide to temporarily suppress the metallic contamination of other processes and then not only the silicide film but also the oxide film and nitride film are removed, this produces the effects of reducing the polishing time and improving the surface roughness.
  • the invention is not limited to the above embodiments. While in the embodiments, SiO 2 and SiN have been used as the unnecessary films at the substrate periphery, the invention is not necessarily restricted to these and may be applied to, for example, SiOC and SiCN. That is, the invention may be applied to oxide-silicon-series and nitride-silicon-series unnecessary films.
  • a ceria abrasive grain tape such as a single-crystal silicon film, an amorphous silicon film, a polysilicon film, or an another silicon series film obtained by introducing impurities into those films, a carbon film, or a metal film (tungsten, copper, aluminum, ruthenium, titanium, tantalum, hafnium, and a compound including those materials) are polished and removed, a combination of the ceria abrasive grains with abrasive grains having a mechanically polishing and removing capability, such as diamond abrasive grains, is effective.
  • a ceria abrasive grain tape such as a single-crystal silicon film, an amorphous silicon film, a polysilicon film, or an another silicon series film obtained by introducing impurities into those films, a carbon film, or a metal film (tungsten, copper, aluminum, ruthenium, titanium, tantalum, hafnium, and a compound including those materials) are polished and removed,
  • ceria particles have been used for an oxide-silicon-series film or a nitride-silicon-series film as abrasive grains having a chemical effect
  • silica particles may be used instead of ceria particles.
  • SiC particles may be used in place of diamond particles.
  • the fixed-abrasive-grain method using polishing tapes has been used in polishing with abrasive grains that include particles having a chemical effect as a main component
  • a free-abrasive-grain method which performs polishing, while supplying an abrading agent including abrasive particles to the contact surface between the polishing surface and the polished surface may be used instead.
  • polishing by the mechanical effect using diamond abrasive grains not only the fixed-abrasive-grain method but also free-abrasive-grain method may be used.
  • a nonwoven cloth 72 fixed to a polishing head 72 may be brought into contact with the periphery of a substrate to be processed 20 absorbed and fixed to the stage 21 and, at same time, a polishing liquid that includes abrasive grains including ceria grains or the like as a main component may be supplied from a nozzle 73 to the vicinity of the periphery of the substrate 20 , thereby causing the substrate periphery to be polished at the part in contact with the nonwoven cloth 72 .
  • a combination of polishing with ceria abrasive grains and polishing with diamond abrasive grains produces the same effects as the above embodiments.
  • the bevel part a part where the cross section has a curvature at the end of the semiconductor substrate
  • the invention may be applied to the polishing of a notch part provided at a part of the periphery of the substrate as an alignment mark or for recognizing the crystal orientation on the wafer main surface.
  • the semiconductor substrate is not necessarily limited to an Si substrate. Another semiconductor material may be used instead.

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  • Engineering & Computer Science (AREA)
  • Mechanical Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Ceramic Engineering (AREA)
  • Inorganic Chemistry (AREA)
  • Mechanical Treatment Of Semiconductor (AREA)
  • Cleaning Or Drying Semiconductors (AREA)
  • Finish Polishing, Edge Sharpening, And Grinding By Specific Grinding Devices (AREA)
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Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20100178851A1 (en) * 2009-01-13 2010-07-15 Masayuki Nakanishi Polishing apparatus and polishing method
US20110003537A1 (en) * 2007-07-11 2011-01-06 Dai Fukushima Polishing apparatus and polishing method
US20110217906A1 (en) * 2010-03-02 2011-09-08 Masayuki Nakanishi Polishing apparatus and polishing method
DE102010042040A1 (de) 2010-10-06 2012-04-12 Siltronic Ag Verfahren zum Schleifen einer Halbleiterscheibe
US8445360B2 (en) 2010-02-22 2013-05-21 Ebara Corporation Method for manufacturing semiconductor device

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP6244962B2 (ja) * 2014-02-17 2017-12-13 株式会社Sumco 半導体ウェーハの製造方法

Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5534106A (en) * 1994-07-26 1996-07-09 Kabushiki Kaisha Toshiba Apparatus for processing semiconductor wafers
US6205658B1 (en) * 1998-11-26 2001-03-27 Nec Corporation Method for formation of metal wiring
US6267649B1 (en) * 1999-08-23 2001-07-31 Industrial Technology Research Institute Edge and bevel CMP of copper wafer
US20010027798A1 (en) * 1998-09-17 2001-10-11 Rainer Flierl Polishing liquid for components, preferably wafers, process for producing polishing liquid and process for chemical mechanical polishing of components
US6312487B1 (en) * 1998-05-07 2001-11-06 Speedfam Co Ltd Polishing compound and an edge polishing method thereby
US20040106363A1 (en) * 2002-02-12 2004-06-03 You Ishii Substrate processing apparatus
US20050081998A1 (en) * 1997-02-24 2005-04-21 Hampden-Smith Mark J. Chemical-mechanical planarization slurries and powders and methods for using same
US20070000873A1 (en) * 2005-06-30 2007-01-04 Takeo Kubota Substrate processing method and semiconductor device manufacturing method

Patent Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5534106A (en) * 1994-07-26 1996-07-09 Kabushiki Kaisha Toshiba Apparatus for processing semiconductor wafers
US20050081998A1 (en) * 1997-02-24 2005-04-21 Hampden-Smith Mark J. Chemical-mechanical planarization slurries and powders and methods for using same
US6312487B1 (en) * 1998-05-07 2001-11-06 Speedfam Co Ltd Polishing compound and an edge polishing method thereby
US20010027798A1 (en) * 1998-09-17 2001-10-11 Rainer Flierl Polishing liquid for components, preferably wafers, process for producing polishing liquid and process for chemical mechanical polishing of components
US6205658B1 (en) * 1998-11-26 2001-03-27 Nec Corporation Method for formation of metal wiring
US6267649B1 (en) * 1999-08-23 2001-07-31 Industrial Technology Research Institute Edge and bevel CMP of copper wafer
US20040106363A1 (en) * 2002-02-12 2004-06-03 You Ishii Substrate processing apparatus
US20070000873A1 (en) * 2005-06-30 2007-01-04 Takeo Kubota Substrate processing method and semiconductor device manufacturing method

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
Tetsuya Hoshino, Yasushai Kurata, Yuuki Terasaki, and Kenzo Susa, "Mechanism of Polishing of SiO2 Films by CeO2 Particles", Journal of Non-Crystalline Solids, Elsevier, volume 283, pages 129-136 (2001). *

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20110003537A1 (en) * 2007-07-11 2011-01-06 Dai Fukushima Polishing apparatus and polishing method
US8506362B2 (en) * 2007-07-11 2013-08-13 Kabushiki Kaisha Toshiba Polishing apparatus and polishing method
US20100178851A1 (en) * 2009-01-13 2010-07-15 Masayuki Nakanishi Polishing apparatus and polishing method
US8445360B2 (en) 2010-02-22 2013-05-21 Ebara Corporation Method for manufacturing semiconductor device
US8748289B2 (en) 2010-02-22 2014-06-10 Ebara Corporation Method for manufacturing semiconductor device
US20110217906A1 (en) * 2010-03-02 2011-09-08 Masayuki Nakanishi Polishing apparatus and polishing method
US8641480B2 (en) 2010-03-02 2014-02-04 Ebara Corporation Polishing apparatus and polishing method
DE102010042040A1 (de) 2010-10-06 2012-04-12 Siltronic Ag Verfahren zum Schleifen einer Halbleiterscheibe

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JP4374038B2 (ja) 2009-12-02
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JP2008263027A (ja) 2008-10-30

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