US20060278339A1 - Etch rate uniformity using the independent movement of electrode pieces - Google Patents

Etch rate uniformity using the independent movement of electrode pieces Download PDF

Info

Publication number
US20060278339A1
US20060278339A1 US11/152,016 US15201605A US2006278339A1 US 20060278339 A1 US20060278339 A1 US 20060278339A1 US 15201605 A US15201605 A US 15201605A US 2006278339 A1 US2006278339 A1 US 2006278339A1
Authority
US
United States
Prior art keywords
electrode
bottom electrode
grounded
plasma
extension
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
US11/152,016
Other languages
English (en)
Inventor
Jisoo Kim
Dae-Han Choi
S.M. Sadjadi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Lam Research Corp
Original Assignee
Lam Research Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Lam Research Corp filed Critical Lam Research Corp
Priority to US11/152,016 priority Critical patent/US20060278339A1/en
Assigned to LAM RESEARCH CORPORATION reassignment LAM RESEARCH CORPORATION ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: CHOI, DAE-HAN, KIM, JISOO, SADJADI, S.M. REZA
Priority to KR1020137002561A priority patent/KR20130023390A/ko
Priority to CN2006800208380A priority patent/CN101194340B/zh
Priority to JP2008516039A priority patent/JP4970434B2/ja
Priority to SG201004056-6A priority patent/SG162771A1/en
Priority to KR1020077029150A priority patent/KR101283830B1/ko
Priority to PCT/US2006/023114 priority patent/WO2006135924A1/en
Priority to TW095121069A priority patent/TWI397100B/zh
Publication of US20060278339A1 publication Critical patent/US20060278339A1/en
Abandoned legal-status Critical Current

Links

Images

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/32—Gas-filled discharge tubes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/32—Gas-filled discharge tubes
    • H01J37/32009—Arrangements for generation of plasma specially adapted for examination or treatment of objects, e.g. plasma sources
    • H01J37/32082—Radio frequency generated discharge
    • H01J37/32091—Radio frequency generated discharge the radio frequency energy being capacitively coupled to the plasma
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/32—Gas-filled discharge tubes
    • H01J37/32009—Arrangements for generation of plasma specially adapted for examination or treatment of objects, e.g. plasma sources
    • H01J37/32082—Radio frequency generated discharge
    • H01J37/32137—Radio frequency generated discharge controlling of the discharge by modulation of energy
    • H01J37/32155—Frequency modulation
    • H01J37/32165—Plural frequencies
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/32—Gas-filled discharge tubes
    • H01J37/32431—Constructional details of the reactor
    • H01J37/32532—Electrodes
    • H01J37/32568—Relative arrangement or disposition of electrodes; moving means
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/32—Gas-filled discharge tubes
    • H01J37/32431—Constructional details of the reactor
    • H01J37/32623—Mechanical discharge control means

Definitions

  • the present invention relates to semiconductor fabrication. More particularly, the present invention relates to a plasma etching apparatus.
  • a typical plasma etching apparatus comprises a reactor in which there is a chamber through which reactive gas or gases flow. Within the chamber, the gases are ionized into a plasma, typically by radio frequency energy. The highly reactive ions of the plasma are able to react with material, such as the dielectric between interconnects or a polymer mask on a surface of a semiconductor wafer during it being processed into Integrated Circuits (IC's). Prior to etching, the wafer is placed in the chamber and held in proper position by a chuck or holder which exposes a top surface of the wafer to the plasma.
  • IC's Integrated Circuits
  • the etch or deposition rate uniformity across the wafer during each process directly affects the device yield. This has become one of the main qualifying requirements for a process reactor and hence is considered a very important parameter during its design and development.
  • the problem of ensuring uniformity of each batch of integrated circuits becomes more difficult. For instance, with the increase from 200 mm to 300 mm in wafer size and smaller circuit size per wafer, the edge exclusion shrinks to, for example, 2 mm.
  • maintaining a uniform etch rate, profile, and critical dimensions all the way out to 2 mm from the edge of the wafer has become very important.
  • etch parameters' etch rate, profile, CD, etc.
  • Maintaining uniform plasma discharge and hence plasma chemistry above the wafer has become very critical to improve the uniformity.
  • Many attempts have been-conceived to improve the uniformity of the wafer by manipulating the gas flow injection through a showerhead, modifying the design of the showerhead, and placing edge rings around the wafer.
  • FIG. 1 illustrates a conventional capacitively-coupled plasma processing chamber 100 , representing an exemplary plasma processing chamber of the types typically employed to etch a substrate.
  • the plasma reactor 100 comprises a chamber 102 , a bottom electrode 104 , a top electrode 106 .
  • the bottom electrode 104 includes a center bottom electrode 108 and an edge bottom electrode 110 .
  • Top electrode 106 includes a center top electrode 112 and an edge top electrode 114 .
  • Edge top electrode 114 and edge bottom electrode 110 are in the shape of a ring respectively encircling center top electrode 112 and center bottom electrode 108 to form a single plane.
  • Center bottom electrode 108 is connected to RF power supply 118 while top electrode 106 and edge bottom electrode 110 are grounded for draining charge from plasma 116 produced between top electrode 106 and bottom electrode 104 .
  • the shape of the glow discharge region (plasma 116 ) is distorted near the edge of center bottom electrode 108 because of grounded edge bottom electrode 110 . That distortion causes non-uniform etch rate on a substrate (not shown) placed on center bottom electrode 108 .
  • the positive ions accelerate across the equipotential field lines to impinge on the surface of the substrate, thereby providing the desired etch effect, such as improving etch directionality.
  • the field lines may not be uniform across the wafer surface and may vary significantly at the edge of the wafer 104 . Accordingly, grounded ring 110 is typically provided to improve process uniformity across the entire wafer surface.
  • the etch rate cannot be separately controlled at the center and at the edge of the wafer.
  • the non-uniformity during the etching process can lead to different dimensions between the center and the edge lowering the yield of reliable devices per wafer.
  • a primary purpose of the present invention is to solve these needs and provide further, related advantages.
  • a plasma reactor comprises a chamber, a bottom electrode, a top electrode, a bottom grounded extension adjacent to and substantially encircling the bottom electrode.
  • the top grounded extension adjacent to and substantially parallel to the top electrode.
  • the top electrode is also grounded.
  • the top grounded extension is capable of being independently raised or lowered to extend into a region above the bottom grounded extension.
  • FIG. 1 is a diagram schematically illustrating a plasma reactor in accordance with a prior art
  • FIG. 2 is a diagram schematically illustrating a plasma reactor in accordance with one embodiment.
  • FIG. 3 is a flow diagram schematically illustrating a method for operating the plasma reactor illustrated in FIG. 2 .
  • FIG. 2 illustrates one embodiment of a plasma reactor 200 comprising a chamber 202 , a bottom electrode 208 , a bottom electrode extension 210 , a top electrode 212 , and a top electrode extension 214 .
  • bottom electrode extension 210 includes a grounded ring 210 parallel and adjacent to the bottom electrode 208 and encircling the bottom electrode 208 .
  • the top electrode extension 214 includes a adjustable grounded ring 214 parallel and adjacent to the top electrode 212 and encircling top electrode 212 .
  • Bottom electrode 208 is connected to RF power supply 218 while top electrode 212 , top electrode extension 214 , and bottom electrode extension 210 are grounded for draining charge from plasma 216 produced between top electrode 212 and bottom electrode 208 .
  • bottom electrode extension 210 and top electrode extension 212 may be made of a conductive material such as aluminum.
  • plasma 216 includes two regions 220 and 222 having different plasma densities based on the position (height) of top electrode extension 214 .
  • Bottom electrode 208 is configured to receive a workpiece and includes an associated bottom electrode area that is adapted to receive the workpiece. Bottom electrode 208 is coupled to at least one power supply 218 . Power supply 218 is configured to generate RF power that is communicated to bottom electrode 208 .
  • Power supply 218 is configured to generate RF power that is communicated to bottom electrode 208 .
  • a dual frequency power supply 218 may be used to generate the high electric potential that is applied to a gas to produce plasma 216 . More particularly, the illustrated power supply 218 is a dual power frequency power supply operating at 2 MHz and 27 MHz that is included in etching systems manufactured by Lam Research. It shall be appreciated by those skilled in the art that other power supplies capable of generating plasma in the processing chamber 202 may also be employed.
  • the invention is not limited to RF frequencies of 2 MHz and 27 MHz but may be applicable to a wide range of frequencies.
  • the invention is also not limited to dual frequency power supplies but is also applicable to systems that have three or more RF power sources with a wide variety of frequencies.
  • Top electrode 212 is disposed at a predetermined distance above from bottom electrode 208 .
  • Top electrode 212 , top electrode extension 214 , together with ground extension 210 are configured to provide a complete electrical circuit for RF power communicated from bottom electrode 208 .
  • Top electrode extension 214 can move up or down independently from top electrode 212 to manipulate plasma density at the edge of bottom electrode 208 —plasma region 222 . With the plasma density varied at the edge of bottom electrode 208 , the etch rate at that region can be independently controlled (either faster rate or slower rate) from the etch rate in the plasma region 220 .
  • a mechanical or motorized knob may be used to raise or lower top electrode extension 214 without having to open and access the interior of chamber 202 .
  • top and bottom electrodes extensions 214 and 210 are provided to improve process uniformity across the entire wafer surface.
  • Plasma reactor 200 is configured to receive a gas (not shown) that is converted into plasma 216 by plasma reactor 200 .
  • the relatively high gas flow rate that is pumped into chamber is 1500 sccm. Gas flow rates less than 1500 sccm as well as more than 1500 sccm may also be applied.
  • RF power levels of 2 W per cm 3 of plasma volume may be applied.
  • RF power levels of less than 2 W per cm 3 of plasma volume may also be applied.
  • plasma reactor 200 described in FIG. 2 employs capacitive coupling to generate plasma 216 in processing chamber 202 . It shall be appreciated by those skilled in the art, that the present apparatus and method may be adapted to be used with inductively coupled plasma.
  • two or more adjacent top electrode extension 214 may be positioned to further control the etch rate at the edge of bottom electrode 208 .
  • FIG. 3 illustrates a method for using the plasma reactor illustrated in FIG. 2 .
  • the position (raised or lowered) of top electrode extension 214 is selected. Top electrode extension 214 is capable of being raised and lowered to extend into a region above the bottom electrode extension.
  • plasma reactor 200 processes a wafer supported by bottom electrode 208 .
  • the wafer is examined to determine the etch uniformity throughout the surface of the wafer.
  • the position of top electrode extension 214 is adjusted based on the analysis at 306 to further improve the etch rate uniformity throughout the surface of the wafer.

Landscapes

  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Plasma & Fusion (AREA)
  • Chemical & Material Sciences (AREA)
  • Analytical Chemistry (AREA)
  • Drying Of Semiconductors (AREA)
  • Plasma Technology (AREA)
US11/152,016 2005-06-13 2005-06-13 Etch rate uniformity using the independent movement of electrode pieces Abandoned US20060278339A1 (en)

Priority Applications (8)

Application Number Priority Date Filing Date Title
US11/152,016 US20060278339A1 (en) 2005-06-13 2005-06-13 Etch rate uniformity using the independent movement of electrode pieces
KR1020137002561A KR20130023390A (ko) 2005-06-13 2006-06-12 전극 피스의 독립적 움직임을 이용한 에칭 레이트 균일성 개선
CN2006800208380A CN101194340B (zh) 2005-06-13 2006-06-12 使用电极片独立运动的蚀刻率均一性的改进
JP2008516039A JP4970434B2 (ja) 2005-06-13 2006-06-12 プラズマリアクタ及びプラズマリアクタの使用方法
SG201004056-6A SG162771A1 (en) 2005-06-13 2006-06-12 Improvement of etch rate uniformity using the independent movement of electrode pieces
KR1020077029150A KR101283830B1 (ko) 2005-06-13 2006-06-12 전극 피스의 독립적 움직임을 이용한 에칭 레이트 균일성개선
PCT/US2006/023114 WO2006135924A1 (en) 2005-06-13 2006-06-12 Improvement of etch rate uniformity using the independent movement of electrode pieces
TW095121069A TWI397100B (zh) 2005-06-13 2006-06-13 電漿反應器及其使用方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US11/152,016 US20060278339A1 (en) 2005-06-13 2005-06-13 Etch rate uniformity using the independent movement of electrode pieces

Publications (1)

Publication Number Publication Date
US20060278339A1 true US20060278339A1 (en) 2006-12-14

Family

ID=37067470

Family Applications (1)

Application Number Title Priority Date Filing Date
US11/152,016 Abandoned US20060278339A1 (en) 2005-06-13 2005-06-13 Etch rate uniformity using the independent movement of electrode pieces

Country Status (7)

Country Link
US (1) US20060278339A1 (ja)
JP (1) JP4970434B2 (ja)
KR (2) KR20130023390A (ja)
CN (1) CN101194340B (ja)
SG (1) SG162771A1 (ja)
TW (1) TWI397100B (ja)
WO (1) WO2006135924A1 (ja)

Cited By (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20070221332A1 (en) * 2006-03-22 2007-09-27 Tokyo Electron Limited Plasma processing apparatus
US20080135177A1 (en) * 2006-12-08 2008-06-12 Tes Co., Ltd. Plasma processing apparatus
US20080156772A1 (en) * 2006-12-29 2008-07-03 Yunsang Kim Method and apparatus for wafer edge processing
US20080277064A1 (en) * 2006-12-08 2008-11-13 Tes Co., Ltd. Plasma processing apparatus
US20090250443A1 (en) * 2008-04-03 2009-10-08 Tes Co., Ltd. Plasma processing apparatus
US20100068887A1 (en) * 2008-09-15 2010-03-18 Micron Technology, Inc. Plasma reactor with adjustable plasma electrodes and associated methods
US20100252199A1 (en) * 2007-03-30 2010-10-07 Alexei Marakhtanov Multifrequency capacitively coupled plasma etch chamber
US20130098390A1 (en) * 2011-10-25 2013-04-25 Infineon Technologies Ag Device for processing a carrier and a method for processing a carrier
CN103985623A (zh) * 2012-08-31 2014-08-13 朗姆研究公司 等离子体处理系统中的射频（rf）接地返回及其方法
US20170047203A1 (en) * 2014-05-09 2017-02-16 Ev Group E. Thallner Gmbh Method and device for plasma treatment of substrates
TWI578369B (zh) * 2014-12-24 2017-04-11 Advanced Micro-Fabrication Equipment Inc Plasma processing device and regulating method of plasma distribution

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8012306B2 (en) 2006-02-15 2011-09-06 Lam Research Corporation Plasma processing reactor with multiple capacitive and inductive power sources
US20090236214A1 (en) * 2008-03-20 2009-09-24 Karthik Janakiraman Tunable ground planes in plasma chambers
CN110249416B (zh) 2017-04-07 2023-09-12 应用材料公司 在基板边缘上的等离子体密度控制

Citations (25)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5508881A (en) * 1994-02-01 1996-04-16 Quality Microcircuits Corporation Capacitors and interconnect lines for use with integrated circuits
US5567640A (en) * 1996-01-11 1996-10-22 Vanguard International Semiconductor Corporation Method for fabricating T-shaped capacitors in DRAM cells
US5585012A (en) * 1994-12-15 1996-12-17 Applied Materials Inc. Self-cleaning polymer-free top electrode for parallel electrode etch operation
US5652171A (en) * 1995-02-03 1997-07-29 Matsushita Electronics Corporation Method of manufacturing semiconductor device having capacitor
US5705438A (en) * 1996-10-18 1998-01-06 Vanguard International Semiconductor Corporation Method for manufacturing stacked dynamic random access memories using reduced photoresist masking steps
US5731130A (en) * 1996-11-12 1998-03-24 Vanguard International Semiconductor Corporation Method for fabricating stacked capacitors on dynamic random access memory cells
US5780338A (en) * 1997-04-11 1998-07-14 Vanguard International Semiconductor Corporation Method for manufacturing crown-shaped capacitors for dynamic random access memory integrated circuits
US5792693A (en) * 1997-03-07 1998-08-11 Vanguard International Semiconductor Corporation Method for producing capacitors having increased surface area for dynamic random access memory
US5895250A (en) * 1998-06-11 1999-04-20 Vanguard International Semiconductor Corporation Method of forming semicrown-shaped stacked capacitors for dynamic random access memory
US6017825A (en) * 1996-03-29 2000-01-25 Lam Research Corporation Etch rate loading improvement
US6074518A (en) * 1994-04-20 2000-06-13 Tokyo Electron Limited Plasma processing apparatus
US6165276A (en) * 1999-09-17 2000-12-26 United Microelectronics Corp. Apparatus for preventing plasma etching of a wafer clamp in semiconductor fabrication processes
US6319767B1 (en) * 2001-03-05 2001-11-20 Chartered Semiconductor Manufacturing Ltd. Method to eliminate top metal corner shaping during bottom metal patterning for MIM capacitors via plasma ashing and hard masking technique
US6432833B1 (en) * 1999-12-20 2002-08-13 Micron Technology, Inc. Method of forming a self aligned contact opening
US6458604B1 (en) * 2000-12-30 2002-10-01 Hynix Semiconductor Inc. Method for fabricating capacitor
US6458685B2 (en) * 2000-01-03 2002-10-01 Micron Technology, Inc. Method of forming a self-aligned contact opening
US20020170676A1 (en) * 2000-01-10 2002-11-21 Mitrovic Andrej S. Segmented electrode apparatus and method for plasma processing
US6485988B2 (en) * 1999-12-22 2002-11-26 Texas Instruments Incorporated Hydrogen-free contact etch for ferroelectric capacitor formation
US20030029567A1 (en) * 2001-08-08 2003-02-13 Rajinder Dhindsa Dual frequency plasma processor
US6527911B1 (en) * 2001-06-29 2003-03-04 Lam Research Corporation Configurable plasma volume etch chamber
US6531324B2 (en) * 2001-03-28 2003-03-11 Sharp Laboratories Of America, Inc. MFOS memory transistor & method of fabricating same
US6717193B2 (en) * 2001-10-09 2004-04-06 Koninklijke Philips Electronics N.V. Metal-insulator-metal (MIM) capacitor structure and methods of fabricating same
US6741446B2 (en) * 2001-03-30 2004-05-25 Lam Research Corporation Vacuum plasma processor and method of operating same
US6770166B1 (en) * 2001-06-29 2004-08-03 Lam Research Corp. Apparatus and method for radio frequency de-coupling and bias voltage control in a plasma reactor
US20050039682A1 (en) * 2003-08-22 2005-02-24 Raj Dhindsa Multiple frequency plasma etch reactor

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5723227A (en) * 1980-07-17 1982-02-06 Nippon Telegr & Teleph Corp <Ntt> Plasma etching device
JPS61164271U (ja) * 1985-04-01 1986-10-11
JPH03138382A (ja) * 1989-10-20 1991-06-12 Nissin Electric Co Ltd 反応性イオンエッチング装置
JPH08321488A (ja) * 1995-05-26 1996-12-03 Sony Corp ドライエッチング方法及びマグネトロンｒｉｅ装置
JPH10289881A (ja) * 1997-04-15 1998-10-27 Kokusai Electric Co Ltd プラズマｃｖｄ装置
US6872281B1 (en) * 2000-09-28 2005-03-29 Lam Research Corporation Chamber configuration for confining a plasma
US6492774B1 (en) * 2000-10-04 2002-12-10 Lam Research Corporation Wafer area pressure control for plasma confinement
US6974523B2 (en) * 2001-05-16 2005-12-13 Lam Research Corporation Hollow anode plasma reactor and method
JP2002359232A (ja) * 2001-05-31 2002-12-13 Tokyo Electron Ltd プラズマ処理装置
US6841943B2 (en) * 2002-06-27 2005-01-11 Lam Research Corp. Plasma processor with electrode simultaneously responsive to plural frequencies

Patent Citations (25)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5508881A (en) * 1994-02-01 1996-04-16 Quality Microcircuits Corporation Capacitors and interconnect lines for use with integrated circuits
US6074518A (en) * 1994-04-20 2000-06-13 Tokyo Electron Limited Plasma processing apparatus
US5585012A (en) * 1994-12-15 1996-12-17 Applied Materials Inc. Self-cleaning polymer-free top electrode for parallel electrode etch operation
US5652171A (en) * 1995-02-03 1997-07-29 Matsushita Electronics Corporation Method of manufacturing semiconductor device having capacitor
US5567640A (en) * 1996-01-11 1996-10-22 Vanguard International Semiconductor Corporation Method for fabricating T-shaped capacitors in DRAM cells
US6017825A (en) * 1996-03-29 2000-01-25 Lam Research Corporation Etch rate loading improvement
US5705438A (en) * 1996-10-18 1998-01-06 Vanguard International Semiconductor Corporation Method for manufacturing stacked dynamic random access memories using reduced photoresist masking steps
US5731130A (en) * 1996-11-12 1998-03-24 Vanguard International Semiconductor Corporation Method for fabricating stacked capacitors on dynamic random access memory cells
US5792693A (en) * 1997-03-07 1998-08-11 Vanguard International Semiconductor Corporation Method for producing capacitors having increased surface area for dynamic random access memory
US5780338A (en) * 1997-04-11 1998-07-14 Vanguard International Semiconductor Corporation Method for manufacturing crown-shaped capacitors for dynamic random access memory integrated circuits
US5895250A (en) * 1998-06-11 1999-04-20 Vanguard International Semiconductor Corporation Method of forming semicrown-shaped stacked capacitors for dynamic random access memory
US6165276A (en) * 1999-09-17 2000-12-26 United Microelectronics Corp. Apparatus for preventing plasma etching of a wafer clamp in semiconductor fabrication processes
US6432833B1 (en) * 1999-12-20 2002-08-13 Micron Technology, Inc. Method of forming a self aligned contact opening
US6485988B2 (en) * 1999-12-22 2002-11-26 Texas Instruments Incorporated Hydrogen-free contact etch for ferroelectric capacitor formation
US6458685B2 (en) * 2000-01-03 2002-10-01 Micron Technology, Inc. Method of forming a self-aligned contact opening
US20020170676A1 (en) * 2000-01-10 2002-11-21 Mitrovic Andrej S. Segmented electrode apparatus and method for plasma processing
US6458604B1 (en) * 2000-12-30 2002-10-01 Hynix Semiconductor Inc. Method for fabricating capacitor
US6319767B1 (en) * 2001-03-05 2001-11-20 Chartered Semiconductor Manufacturing Ltd. Method to eliminate top metal corner shaping during bottom metal patterning for MIM capacitors via plasma ashing and hard masking technique
US6531324B2 (en) * 2001-03-28 2003-03-11 Sharp Laboratories Of America, Inc. MFOS memory transistor & method of fabricating same
US6741446B2 (en) * 2001-03-30 2004-05-25 Lam Research Corporation Vacuum plasma processor and method of operating same
US6527911B1 (en) * 2001-06-29 2003-03-04 Lam Research Corporation Configurable plasma volume etch chamber
US6770166B1 (en) * 2001-06-29 2004-08-03 Lam Research Corp. Apparatus and method for radio frequency de-coupling and bias voltage control in a plasma reactor
US20030029567A1 (en) * 2001-08-08 2003-02-13 Rajinder Dhindsa Dual frequency plasma processor
US6717193B2 (en) * 2001-10-09 2004-04-06 Koninklijke Philips Electronics N.V. Metal-insulator-metal (MIM) capacitor structure and methods of fabricating same
US20050039682A1 (en) * 2003-08-22 2005-02-24 Raj Dhindsa Multiple frequency plasma etch reactor

Cited By (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20070221332A1 (en) * 2006-03-22 2007-09-27 Tokyo Electron Limited Plasma processing apparatus
US20080135177A1 (en) * 2006-12-08 2008-06-12 Tes Co., Ltd. Plasma processing apparatus
US20080277064A1 (en) * 2006-12-08 2008-11-13 Tes Co., Ltd. Plasma processing apparatus
US20080156772A1 (en) * 2006-12-29 2008-07-03 Yunsang Kim Method and apparatus for wafer edge processing
US20100252199A1 (en) * 2007-03-30 2010-10-07 Alexei Marakhtanov Multifrequency capacitively coupled plasma etch chamber
US8138444B2 (en) 2008-04-03 2012-03-20 Tes Co., Ltd. Plasma processing apparatus
US20090250443A1 (en) * 2008-04-03 2009-10-08 Tes Co., Ltd. Plasma processing apparatus
US8382941B2 (en) * 2008-09-15 2013-02-26 Micron Technology, Inc. Plasma reactor with adjustable plasma electrodes and associated methods
US20100068887A1 (en) * 2008-09-15 2010-03-18 Micron Technology, Inc. Plasma reactor with adjustable plasma electrodes and associated methods
US8715519B2 (en) 2008-09-15 2014-05-06 Micron Technology, Inc. Plasma reactor with adjustable plasma electrodes and associated methods
US20130098390A1 (en) * 2011-10-25 2013-04-25 Infineon Technologies Ag Device for processing a carrier and a method for processing a carrier
DE102012110205B4 (de) * 2011-10-25 2020-12-10 Infineon Technologies Ag Vorrichtung zum Bearbeiten eines Trägers und Verfahren zum Bearbeiten eines Trägers
CN103985623A (zh) * 2012-08-31 2014-08-13 朗姆研究公司 等离子体处理系统中的射频（rf）接地返回及其方法
US20170047203A1 (en) * 2014-05-09 2017-02-16 Ev Group E. Thallner Gmbh Method and device for plasma treatment of substrates
US10707059B2 (en) * 2014-05-09 2020-07-07 Ev Group E. Thallner Gmbh Method and device for plasma treatment of substrates
TWI578369B (zh) * 2014-12-24 2017-04-11 Advanced Micro-Fabrication Equipment Inc Plasma processing device and regulating method of plasma distribution

Also Published As

Publication number Publication date
TW200713389A (en) 2007-04-01
CN101194340B (zh) 2011-12-28
CN101194340A (zh) 2008-06-04
TWI397100B (zh) 2013-05-21
KR20080019225A (ko) 2008-03-03
KR20130023390A (ko) 2013-03-07
SG162771A1 (en) 2010-07-29
JP4970434B2 (ja) 2012-07-04
WO2006135924A1 (en) 2006-12-21
WO2006135924A9 (en) 2007-02-22
KR101283830B1 (ko) 2013-07-08
JP2008544500A (ja) 2008-12-04

Similar Documents

Publication Publication Date Title
US20060278339A1 (en) Etch rate uniformity using the independent movement of electrode pieces
US7837825B2 (en) Confined plasma with adjustable electrode area ratio
US6887340B2 (en) Etch rate uniformity
KR20060087474A (ko) 플라즈마 공정 챔버에서 이용하기 위한 프로세스 키트
US20170084430A1 (en) Plasma etching method
KR100391063B1 (ko) 유도결합으로 보강된 축전결합형 플라즈마 발생장치 및플라즈마 발생방법
KR102358480B1 (ko) 대면적 건식 식각처리 장치
CN113496862B (zh) 等离子体反应器及其射频功率分布调节方法
KR101139829B1 (ko) 다중 가스공급장치 및 이를 구비한 플라즈마 처리장치
KR100716690B1 (ko) 반도체 시료의 처리 장치 및 처리 방법
KR20040021809A (ko) 부위별로 단면적이 다른 안테나를 구비한 유도결합플라즈마 발생장치
KR20110096463A (ko) 다중 유도결합 플라즈마 처리장치 및 방법
KR100628557B1 (ko) 플라즈마 발생장치
KR101286710B1 (ko) 유도결합 플라즈마 기판 처리 장치 및 방법
KR200426498Y1 (ko) 플라즈마 공정 챔버에서 이용하기 위한 프로세스 키트
JP2004356459A (ja) プラズマ処理装置

Legal Events

Date Code Title Description
AS Assignment

Owner name: LAM RESEARCH CORPORATION, CALIFORNIA

Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNORS:KIM, JISOO;CHOI, DAE-HAN;SADJADI, S.M. REZA;REEL/FRAME:016807/0562

Effective date: 20050912

STCB Information on status: application discontinuation

Free format text: ABANDONED -- AFTER EXAMINER'S ANSWER OR BOARD OF APPEALS DECISION