US20060118457A1 - Film carrier tape for mounting electronic component - Google Patents

Film carrier tape for mounting electronic component Download PDF

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Publication number
US20060118457A1
US20060118457A1 US10/534,190 US53419005A US2006118457A1 US 20060118457 A1 US20060118457 A1 US 20060118457A1 US 53419005 A US53419005 A US 53419005A US 2006118457 A1 US2006118457 A1 US 2006118457A1
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United States
Prior art keywords
film carrier
solder resist
electronic part
resist layer
carrier tape
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Abandoned
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US10/534,190
Inventor
Shuichi Kawasaki
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Mitsui Mining and Smelting Co Ltd
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Individual
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Assigned to MITSUI MINING & SMELTING CO., LTD. reassignment MITSUI MINING & SMELTING CO., LTD. ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: KAWASAKI, SHUICHI
Publication of US20060118457A1 publication Critical patent/US20060118457A1/en
Abandoned legal-status Critical Current

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H01L23/49572—Lead-frames or other flat leads consisting of thin flexible metallic tape with or without a film carrier
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49811—Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads
    • H01L23/49816—Spherical bumps on the substrate for external connection, e.g. ball grid arrays [BGA]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/4985—Flexible insulating substrates
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/0097—Processing two or more printed circuits simultaneously, e.g. made from a common substrate, or temporarily stacked circuit boards
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/03—Use of materials for the substrate
    • H05K1/0393—Flexible materials
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/03—Conductive materials
    • H05K2201/0332—Structure of the conductor
    • H05K2201/0388—Other aspects of conductors
    • H05K2201/0394—Conductor crossing over a hole in the substrate or a gap between two separate substrate parts
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09818—Shape or layout details not covered by a single group of H05K2201/09009 - H05K2201/09809
    • H05K2201/0989—Coating free areas, e.g. areas other than pads or lands free of solder resist
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09818—Shape or layout details not covered by a single group of H05K2201/09009 - H05K2201/09809
    • H05K2201/09909—Special local insulating pattern, e.g. as dam around component
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/15—Position of the PCB during processing
    • H05K2203/1545—Continuous processing, i.e. involving rolls moving a band-like or solid carrier along a continuous production path
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/3452—Solder masks

Definitions

  • the present invention relates to film carrier tapes for mounting electronic parts which are reduced in warpage distortion. More particularly, the present invention relates to film carrier tapes for mounting electronic parts, which have film carriers each having substantially the same size as that of an electronic part to be mounted, such as COF (chip on film), CSP (chip size package) and BGA (ball grid array), in which two or more film carriers are arranged on a tape of a long insulating film side by side in the width direction of the tape, and which are remarkably reduced in warpage distortion.
  • COF chip on film
  • CSP chip size package
  • BGA ball grid array
  • film carrier tapes for mounting electronic part are employed.
  • the film carrier tapes for mounting electronic part are produced by forming a wiring pattern made of a conductive metal on a surface of a long insulating film, and most of the film carrier tapes are produced by further forming a solder resist layer on a surface of the wiring pattern except a terminal portion.
  • thermosetting resins such as epoxy resins are employed for forming the solder resist layer.
  • thermosetting resins for forming the solder resist layer have properties that they slightly suffer cure shrinkage when they are cured by heating, and in the film carrier tapes for mounting electronic part having such a solder resist layer, warpage distortion in the width direction or the lengthwise direction is brought about by the cure shrinkage of the thermosetting resin for forming the solder resist layer.
  • the warpage distortion in the width direction or the lengthwise direction of the long film carrier tape can be corrected by, for example, passing the film carrier tape through a large number of rolls under heating or heating the film carrier tape with bending the tape in the opposite direction to the direction of the warpage distortion (i.e., with giving reverse warpage).
  • Such a warpage-removal method is particularly effective for removing warpage of a film carrier tape in which one wiring pattern is formed in the width direction of a tape made of an insulating film.
  • film carriers each having an area substantially the same as that of an electronic part to be mounted, such as COF (chip on film), CSP (chip size package) and BGA (ball grid array), came to be used more frequently. Because such a film carrier occupies a small area, plural film carriers (e.g., 2 or 4 film carriers) can be arranged side by side in the width direction of a tape made of an insulating film in the production of a film carrier tape.
  • COF chip on film
  • CSP chip size package
  • BGA ball grid array
  • Patent document 1 Japanese Patent Application No. 249499/2001
  • the film carrier tape for mounting electronic part of the present invention is a film carrier tape comprising a long insulating film and a large number of wiring patterns formed on a surface of the insulating film, said wiring patterns being made of a conductive metal, wherein:
  • the wiring patterns are each independently covered with a solder resist layer except a connecting terminal portion, and the solder resist layer formed on each surface of the wiring patterns is split and/or divided into plural sections.
  • the film carrier tape for mounting electronic part of the present invention is also a film carrier tape comprising a long insulating film and a large number of wiring patterns formed on a surface of the insulating film, said wiring patterns being made of a conductive metal and at least two of said wiring patterns being arranged side by side in the width direction of the long insulating film, wherein:
  • the wiring patterns are each independently covered with a solder resist layer except a connecting terminal portion, and the solder resist layer formed on each surface of the wiring patterns is split and/or divided into plural sections.
  • the solder resist layer is formed by dividing and applying a solder resist, and in each of the divided sections of the solder resist layer, the stress attributable to cure shrinkage is small. Therefore, distortion of the film carrier can be reduced.
  • FIG. 1 is a plan view showing an example of a film carrier tape for mounting electronic part of the present invention.
  • FIG. 2 is a cross sectional view taken on line A-A′ of FIG. 1 .
  • FIG. 4 is a group of views showing a method of measuring warpage distortion of a film carrier in the present invention.
  • FIG. 5 is a group of views each showing an example of a film carrier tape for mounting electronic part of the present invention wherein a solder resist layer is formed in a region of not less than 20% of the wiring patterns except terminal portions.
  • FIG. 6 is a group of cross sectional views showing examples of divided sections of a solder resist layer.
  • FIG. 1 is a plan view showing an example of the film carrier tape for mounting electronic part of the present invention
  • FIG. 2 is a cross sectional view taken on line A-A′ of FIG. 1 .
  • the film carrier tape 10 for mounting electronic part of the present invention comprises a long insulating film 11 and a large number of film carriers 12 formed on a surface of the insulating film.
  • polyimide resins examples include aromatic polyimides synthesized from pyromellitic dianhydride and aromatic diamines and aromatic polyimides having biphenyl skeleton synthesized from biphenyltetracarboxylic dianhydride and aromatic diamines. Particularly in the present invention, it is preferable to use aromatic polyimides having biphenyl skeleton (e.g., Upilex S, trade name, available from Ube industries, Ltd.). The aromatic polyimides having biphenyl skeleton have lower water absorption than other aromatic polyimides.
  • the thickness of the insulating film employable in the present invention is not specifically restricted.
  • An insulating film having a thickness of not more than 75 ⁇ m tends to be lowered in the retention of shape and is liable to be distorted, so that the present invention is very useful for producing a thin film carrier using an insulating film having a thickness (average thickness) of not more 75 ⁇ m, preferably 50 to 12.5 ⁇ m.
  • a large number of sprocket holes 14 are formed in order to carry the insulating film 11 or to make positioning.
  • positioning holes, device holes, solder ball holes for arranging solder balls used as outer terminals, and slits for ensuring connection to electronic parts may be further formed. These can be formed in a punching step or a perforation step using laser beam.
  • the copper foil employable herein is an electrodeposited copper foil or a rolled copper foil. Taking etchability and operability into account, it is preferable to use an electrodeposited copper foil.
  • plural film carriers 12 are arranged independently from one another in the width direction of the tape.
  • the insulating film 11 having an effective width of 35 mm two film carriers each having a side length of 14 mm can be arranged side by side in the width direction, and on the insulating film 11 having an effective width of 70 mm, four film carriers each having a side length of 14 mm can be arranged side by side in the width direction.
  • the surface of the wiring pattern 15 formed on the insulating film 11 is applied with a solder resist ink except a terminal portion 16 that ensures connection to an electronic part, whereby a solder resist layer 20 is formed.
  • the resin applied to form the solder resist layer 20 is usually a coating liquid (solder resist ink) in which a thermosetting resin is dissolved or dispersed in an organic solvent. By applying such a solder resist ink and then heating it, the solder resist layer 20 is formed.
  • the resin of the solder resist layer 20 slightly suffers cure shrinkage, and as a result, warpage distortion in a state such that the solder resist layer 20 being inner side takes place in a region where the solder resist ink is applied.
  • Some film carrier tapes for mounting electronic part do not need formation of a solder resist layer.
  • the solder resist layer 20 which has been formed in one united body by coating the whole surface in the conventional technique, is formed by splitting or dividing the region to be coated into several sections and then coating them, and the stress in each of the split or divided sections is made as small as possible.
  • the stress is suppressed to such a level as comparable to a strength of shape retention of the insulating film 11 present under the thus divided solder resist layer 20 to thereby hold down the warpage distortion of the divided solder resist layer 20 formed area to the minimum.
  • the resin for forming the solder resist layer 20 is a curing resin
  • the curing resins preferably used include thermosetting resins, such as epoxy resins, urethane modified epoxy resins, phenolic resins and polyimide resin precursors.
  • thermosetting resins such as epoxy resins, urethane modified epoxy resins, phenolic resins and polyimide resin precursors.
  • Such a thermosetting resin is dissolved or dispersed in a solvent, and the solution or the dispersion is adjusted to have a viscosity of usually 10 to 40 Pa ⁇ s, preferably 20 to 30 Pa ⁇ s, so as to enable squeegee coating using a screen mask.
  • the region to be coated with a solder resist is divided into plural sections, and these sections are applied with the solder resist. That is to say, the region to be coated with the solder resist is a joined area of the A section 20 a , the B section 20 b , the C section 20 c and the D section 20 d in FIGS. 1 and 3 , however in the embodiment shown in FIGS. 1 and 3 , this region is divided into 4 sections, then these sections are each applied with the solder resist independently from the adjacent sections, and the solder resist is cured to form a solder resist layer 20 having been divided into 4 sections.
  • the solder resist layer 20 is preferably divided into 2 to 16 sections, particularly preferably 2 to 8 sections, though it depends upon the size of the film carrier and the properties of the insulating film, the solder resist and other materials.
  • shrinkage stress attributable to curing of the solder resist in each section is reduced, and the distortion of the whole film carrier is also reduced.
  • the size of the solder resist after dividing the length of one side does not necessarily have to be less than 5 mm because the properties of the insulating film, the solder resist and the like are entangled.
  • the shape and the relative size of each of the split and/or divided sections of the solder resist layer 20 are not specifically restricted, however it is preferable to divide the region to be covered with the solder resist as equally as possible. By uniformalizing the stress produced in each section, the distortion of the whole film carrier can be further reduced. That is to say, it is preferable that the areas of the sections are equalized to one another and the shapes of the sections are made substantially the same as one another.
  • the length of one side of each section of the divided solder resist is desired to be in the range of about 2 to 10 mm, preferably about 2.5 to 7.5 mm.
  • the film carrier formed by splitting and/or dividing the solder resist layer is not limited to the aforesaid CSP or BGA, and the film carrier can be applied to general TAB tapes.
  • the film carrier can be applied to a film carrier tape for mounting electronic part wherein a solder resist layer is formed in a region of not less than 30% of the wiring patterns (except terminal portions).
  • FIG. 5 ( a ) an example wherein a solder resist layer having been divided into 12 sections is formed on wiring patterns 15 formed on a surface of an insulating film 11 having a device hole is shown.
  • a distance (W) between the divided sections can be properly determined so as not to transmit the stress produced in one section to its adjacent section, and the distance is in the range of usually 20 ⁇ m to 50 mm, preferably 20 ⁇ m to 3 mm.
  • the distance between the sections is determined in the above range, the internal stress produced in one section is not transmitted to the adjacent section, and besides there is no problem in the protection of a wiring pattern in each section. It is desirable that the shapes of the sections closely resemble one another. When the shapes of the sections closely resemble one another, the internal stress produced in each section is uniformalized, and hence, the distortion of the whole film carrier is reduced.
  • the thickness (h 0 ) of the solder resist layer split or divided as above is the same as that of a conventional solder resist layer, and the solder resist layer on the upper surface of the wiring pattern has an average thickness of usually 3 to 50 ⁇ m, preferably 5 to 40 ⁇ m, after curing.
  • the solder resist layer 20 is split or divided as shown in FIG. 6 ( a ), and between the adjacent sections, there is an area where no solder resist layer is formed as above.
  • the internal stress produced in one section has only to be not transmitted to the adjacent section, so that the section of the solder resist layer 20 may be connected to its adjacent section at least in part, as shown in 6 ( b ).
  • the thickness (h 1 ) of the solder resist layer between these sections is not more than 1 ⁇ 2 of the usual thickness (h 0 ) of the solder resist layer, and h 1 may be 0.
  • the divided solder resist layer 20 In order to form the divided solder resist layer 20 , masking is made on a conventional screen correspondingly to the sections, and the resin has only to be applied. In case of a solder resist of adhesion type which has begun to be adopted recently, a gap is formed, and then the solder resist has only to be allowed to adhere. In case of a solder resist using a photosensitive resin, the resin is applied, and then the resin has only to be exposed and developed so as to split and/or divide the solder resist layer.
  • the solder resist layer whose divided sections are connected to one another at least in part can be formed by controlling a line width of a screen mask that is used when a solder resist coating liquid is applied.
  • a surface of a terminal portion 16 (e.g., lead, bonding pad) exposed from the solder resist layer 20 is subjected to plating treatment.
  • plating treatments include tin plating, nickel plating, nickel-gold multilayer plating, nickel-palladium-gold multilayer plating, solder plating and tin-bismuth plating.
  • the above-mentioned plated layer is formed on the surface of the wiring pattern present between the divided sections of the solder resist layer.
  • the plating treatment may be carried out prior to the formation of the solder resist layer.
  • the film carrier tape for mounting electronic part of the present invention produced as above can be used in a usual manner.
  • an electronic part (not shown in the figures) is arranged by the use of an adhesive or the like, and electrical connection is made between the connecting terminal 16 and a bump electrode provided on the electronic part, whereby mounting of the electronic part can be achieved.
  • a conductive metal wire such as a gold wire can be employed.
  • the film carrier has an area substantially the same as an area of the electronic part to be mounted, but the present invention is not limited to such a film carrier tape.
  • the connecting terminal 16 of the film carrier tape for mounting electronic part of the present invention is connected to a solder ball through the wiring pattern 15 .
  • the solder resist layer is split or divided as described above, and therefore, warpage distortion of a film carrier attributable to the cure shrinkage of the solder resist occurring in the curing can be reduced.
  • Distortion of the film carrier in the film carrier tape for mounting electronic part of the present invention is measured in the following manner. As shown in FIG. 4 ( a ), a point of the film carrier tape, at which a sprocket hole to carry the film carrier tape is formed, is taken as a standard point. Then, with regard to one film carrier of the film carrier tape produced, heights of measuring points ⁇ circle around (1) ⁇ to ⁇ circle around (5) ⁇ based on the standard point are measured.
  • warpage distortion of a film carrier is reduced to not more than 50% of warpage distortion of a film carrier having no split or divided solder resist layer.
  • the solder resist layer is formed in such a manner that the layer is split or divided, whereby warpage distortion of a film carrier is reduced, and the film carrier tape for mounting electronic part exhibits high reliability.
  • the film carrier tape for mounting electronic part of the present invention is further described with reference to the following example by comparing it with a film carrier tape which has a solder resist layer formed on the whole surface of a wiring pattern except a connecting terminal and which is liable to suffer warpage.
  • the present invention is in no way limited to the example.
  • a polyimide film (trade name: Upilex S, available from Ube industries, Ltd.) having an average thickness of 50 ⁇ m and a width of 48 mm was punched to form sprocket holes and solder ball holes for arranging solder balls. As shown in FIG. 1 , the solder ball holes were formed so that film carriers each having a side length of 17 mm could be arranged in two rows.
  • an electrodeposited copper foil having an average thickness of 25 ⁇ m was applied onto the polyimide film, then the electrodeposited copper foil was applied with a photosensitive resin, and the photosensitive resin was exposed and developed. Using a pattern made of the thus developed photosensitive resin as a masking material, the electrodeposited copper foil was selectively etched to form a wiring pattern made of copper.
  • solder resist ink Onto a surface of the wiring pattern thus formed, a solder resist ink was applied, and the solder resist ink was cured by heating to form a solder resist layer (average thickness after curing: 10 ⁇ m).
  • the solder resist layer formed herein was a layer having been divided into 4 sections by providing a mask on a screen and having between the adjacent sections an area coated with no solder resist in a width of 200 ⁇ m (non-solder resist area), as shown in FIG. 1 .
  • solder resist layer consisting of divided 4 sections
  • a connecting terminal coated with no solder resist layer and the non-solder resist area were subjected to nickel plating and then gold plating. Thereafter, the whole film carrier tape was subjected to removal of warpage in a conventional manner.
  • a film carrier tape for mounting electronic part was produced in the same manner as in Example 1, except that the solder resist layer was not divided.
  • the solder resist layer is split or divided into plural sections, so that a stress that is brought with shrinkage occurring in the curing of the solder resist ink is scattered.
  • warpage distortion of a film carrier attributable to the cure shrinkage of the solder resist layer is remarkably reduced, and precision in the mounting of electronic part is surely enhanced.
  • the film carrier tape for mounting electronic part of the present invention is particularly useful as CSP, COF, BGA or the like.

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Wire Bonding (AREA)

Abstract

A film carrier tape for mounting an electronic part includes a film carrier tape comprising an enlongated insulating film having a plurality of wiring patterns formed on a surface of the insulating film, the wiring patterns being made of a conductive metal, wherein the wiring patterns are each independently covered with a solder resist layer except a connecting terminal portion, and the solder resist layer formed on each surface of the wiring patterns is divided into plural sections. Warpage distortion that heretofore occurs on each of a plural film carriers arranged, such as CSP, COF and BGA, provided in a film carrier tape for mounting an electronic part in the width direction of the tape can be reduced.

Description

    FIELD OF THE INVENTION
  • The present invention relates to film carrier tapes for mounting electronic parts which are reduced in warpage distortion. More particularly, the present invention relates to film carrier tapes for mounting electronic parts, which have film carriers each having substantially the same size as that of an electronic part to be mounted, such as COF (chip on film), CSP (chip size package) and BGA (ball grid array), in which two or more film carriers are arranged on a tape of a long insulating film side by side in the width direction of the tape, and which are remarkably reduced in warpage distortion.
    • BACKGROUND OF THE INVENTION
  • In order to mount electronic parts such as integrated circuits on electronic equipment, film carrier tapes for mounting electronic part are employed. The film carrier tapes for mounting electronic part are produced by forming a wiring pattern made of a conductive metal on a surface of a long insulating film, and most of the film carrier tapes are produced by further forming a solder resist layer on a surface of the wiring pattern except a terminal portion. In such film carrier tapes for mounting electronic part, thermosetting resins such as epoxy resins are employed for forming the solder resist layer.
  • In the film carrier tapes for mounting electronic part having no solder resist layer, there is not observed large warpage distortion. The thermosetting resins for forming the solder resist layer, however, have properties that they slightly suffer cure shrinkage when they are cured by heating, and in the film carrier tapes for mounting electronic part having such a solder resist layer, warpage distortion in the width direction or the lengthwise direction is brought about by the cure shrinkage of the thermosetting resin for forming the solder resist layer.
  • The warpage distortion in the width direction or the lengthwise direction of the long film carrier tape can be corrected by, for example, passing the film carrier tape through a large number of rolls under heating or heating the film carrier tape with bending the tape in the opposite direction to the direction of the warpage distortion (i.e., with giving reverse warpage). Such a warpage-removal method is particularly effective for removing warpage of a film carrier tape in which one wiring pattern is formed in the width direction of a tape made of an insulating film.
  • In the recent technique for mounting electronic parts, film carriers each having an area substantially the same as that of an electronic part to be mounted, such as COF (chip on film), CSP (chip size package) and BGA (ball grid array), came to be used more frequently. Because such a film carrier occupies a small area, plural film carriers (e.g., 2 or 4 film carriers) can be arranged side by side in the width direction of a tape made of an insulating film in the production of a film carrier tape. In CSP, COF, BGA or the like, a solder resist layer is formed in each of the film carriers, so that each film carrier having a solder resist layer suffers warpage, and even if reverse warpage is applied to the tape having plural film carriers formed side by side in the width direction, the tape is bent at the boundary between the film carriers adjacent to each other in the width direction. Therefore, effective reverse warpage cannot be given to each of the curved (warped) film carriers. Under the existing circumstances, accordingly, there is no effective warpage-removal method to correct warpage distortion of each film carrier in a film carrier tape for mounting electronic part wherein plural film carriers are formed in the width direction of the tape such as CSP and BGA.
  • Patent document 1: Japanese Patent Application No. 249499/2001
    • DISCLOSURE OF THE INVENTION
  • It is an object of the present invention to provide a film carrier tape for mounting electronic part in which plural film carriers are formed in the width direction of the tape and warpage distortion of each film carrier is reduced.
  • The film carrier tape for mounting electronic part of the present invention is a film carrier tape comprising a long insulating film and a large number of wiring patterns formed on a surface of the insulating film, said wiring patterns being made of a conductive metal, wherein:
  • the wiring patterns are each independently covered with a solder resist layer except a connecting terminal portion, and the solder resist layer formed on each surface of the wiring patterns is split and/or divided into plural sections.
  • The film carrier tape for mounting electronic part of the present invention is also a film carrier tape comprising a long insulating film and a large number of wiring patterns formed on a surface of the insulating film, said wiring patterns being made of a conductive metal and at least two of said wiring patterns being arranged side by side in the width direction of the long insulating film, wherein:
  • the wiring patterns are each independently covered with a solder resist layer except a connecting terminal portion, and the solder resist layer formed on each surface of the wiring patterns is split and/or divided into plural sections.
  • In the film carrier tape for mounting electronic part of the present invention, the solder resist layer is formed by dividing and applying a solder resist, and in each of the divided sections of the solder resist layer, the stress attributable to cure shrinkage is small. Therefore, distortion of the film carrier can be reduced.
    • BRIEF DESCRIPTION OF THE DRAWINGS
  • FIG. 1 is a plan view showing an example of a film carrier tape for mounting electronic part of the present invention.
  • FIG. 2 is a cross sectional view taken on line A-A′ of FIG. 1.
  • FIG. 3 is a view to explain a film carrier for constituting a film carrier tape for mounting electronic part of the present invention by taking out one film carrier.
  • FIG. 4 is a group of views showing a method of measuring warpage distortion of a film carrier in the present invention.
  • FIG. 5 is a group of views each showing an example of a film carrier tape for mounting electronic part of the present invention wherein a solder resist layer is formed in a region of not less than 20% of the wiring patterns except terminal portions.
  • FIG. 6 is a group of cross sectional views showing examples of divided sections of a solder resist layer.
    • PREFERRED EMBODIMENTS OF THE INVENTION
  • The film carrier tape for mounting electronic part of the present invention is described in detail hereinafter referring to the attached drawings.
  • FIG. 1 is a plan view showing an example of the film carrier tape for mounting electronic part of the present invention, and FIG. 2 is a cross sectional view taken on line A-A′ of FIG. 1.
  • As shown in FIG. 1 and FIG. 2, the film carrier tape 10 for mounting electronic part of the present invention comprises a long insulating film 11 and a large number of film carriers 12 formed on a surface of the insulating film.
  • The long insulating film 11 is brought into contact with an acid or the like when etching is performed, so that this film has chemical resistance so as not to be damaged by chemicals and has heat resistance so as not to be changed in properties by heat when bonding is performed. Examples of materials for forming the insulating film 11 include polyesters, polyamides and polyimides. Particularly in the present invention, it is preferable to use a polyimide film. The polyimides are more excellent not only in heat resistance but also in chemical resistance as compared with other resins.
  • Examples of the polyimide resins include aromatic polyimides synthesized from pyromellitic dianhydride and aromatic diamines and aromatic polyimides having biphenyl skeleton synthesized from biphenyltetracarboxylic dianhydride and aromatic diamines. Particularly in the present invention, it is preferable to use aromatic polyimides having biphenyl skeleton (e.g., Upilex S, trade name, available from Ube industries, Ltd.). The aromatic polyimides having biphenyl skeleton have lower water absorption than other aromatic polyimides. The thickness of the insulating film employable in the present invention is not specifically restricted. An insulating film having a thickness of not more than 75 μm tends to be lowered in the retention of shape and is liable to be distorted, so that the present invention is very useful for producing a thin film carrier using an insulating film having a thickness (average thickness) of not more 75 μm, preferably 50 to 12.5 μm.
  • At the edge of the width direction of the long insulating film 11, a large number of sprocket holes 14 are formed in order to carry the insulating film 11 or to make positioning. In the insulating film 11, for example, positioning holes, device holes, solder ball holes for arranging solder balls used as outer terminals, and slits for ensuring connection to electronic parts may be further formed. These can be formed in a punching step or a perforation step using laser beam.
  • On the insulating film perforated with necessary holes as above, a wiring pattern 15 is formed. The wiring pattern 15 can be formed by, for example, disposing a conductive metal foil on a surface of the insulating film 11, applying a surface of the conductive metal foil with a photosensitive resin, exposing the photosensitive resin layer by the use of a desired photomask pattern and developing to form a pattern composed of the photosensitive resin, and then selectively etching the conductive metal foil using the pattern as a masking material. Examples of the conductive metals employable herein include aluminum foil and copper foil. As the conductive metal foil, a metal foil having a thickness of usually 3 to 35 μm, preferably 9 to 25 μm, can be employed. It is also possible to provide a seed for a conductive metal on a surface of the insulating film and to deposit a conductive metal on the seed.
  • In the present invention, it is preferable to use a copper foil as the conductive metal foil, and the copper foil employable herein is an electrodeposited copper foil or a rolled copper foil. Taking etchability and operability into account, it is preferable to use an electrodeposited copper foil.
  • In the film carrier tape for mounting electronic part of the present invention, plural film carriers 12 each of which is constituted of the wiring pattern made of the conductive metal are arranged in the width direction of the tape. In FIG. 1, an embodiment wherein two film carriers 12 are arranged side by side in the width direction of the tape is shown.
  • In the film carrier tape for mounting electronic part of the present invention, plural film carriers 12 are arranged independently from one another in the width direction of the tape. For example, on the insulating film 11 having an effective width of 35 mm, two film carriers each having a side length of 14 mm can be arranged side by side in the width direction, and on the insulating film 11 having an effective width of 70 mm, four film carriers each having a side length of 14 mm can be arranged side by side in the width direction.
  • In the case where the film carrier formed in the film carrier tape 10 for mounting electronic part is CSP or BGA, the surface of the wiring pattern 15 formed on the insulating film 11 is applied with a solder resist ink except a terminal portion 16 that ensures connection to an electronic part, whereby a solder resist layer 20 is formed. The resin applied to form the solder resist layer 20 is usually a coating liquid (solder resist ink) in which a thermosetting resin is dissolved or dispersed in an organic solvent. By applying such a solder resist ink and then heating it, the solder resist layer 20 is formed. When the solder resist ink is cured to form the solder resist layer 20, the resin of the solder resist layer 20 slightly suffers cure shrinkage, and as a result, warpage distortion in a state such that the solder resist layer 20 being inner side takes place in a region where the solder resist ink is applied.
  • Some film carrier tapes for mounting electronic part do not need formation of a solder resist layer.
  • In the case where plural film carriers 12 are arranged side by side in the width direction of the tape as described above, even if reverse warpage is applied to the tape, the tape is only bent between the film carriers, and no effective reverse warpage is given to the film carriers 12 suffering warpage distortion. Consequently, warpage distortion of each film carrier 12 is hardly corrected.
  • In the case where plural film carriers 12 are arranged side by side in the direction of the tape as above, accordingly, it is effective to inhibit occurrence of warpage distortion of each film carrier 12 itself.
  • The cause of occurrence of warpage distortion is, for example, a difference of expansion coefficient between materials such as an insulating film and a conductive metal or the aforesaid cure shrinkage of the solder resist, and when the internal stress caused by the cure shrinkage is constantly higher than the shape retention strength of the insulating film or the like, the stress present inside of the solder resist layer appears as warpage distortion of the film carrier. If an area of the solder resist layer 20 becomes large, the internal stress of the solder resist layer having a large area tends to be great collectively. However, even in the solder resist layer 20 having such a great internal stress, the internal stress is not so great when partially observed.
  • In the present invention, then, the solder resist layer 20, which has been formed in one united body by coating the whole surface in the conventional technique, is formed by splitting or dividing the region to be coated into several sections and then coating them, and the stress in each of the split or divided sections is made as small as possible. By virtue of this, the stress is suppressed to such a level as comparable to a strength of shape retention of the insulating film 11 present under the thus divided solder resist layer 20 to thereby hold down the warpage distortion of the divided solder resist layer 20 formed area to the minimum.
  • That is to say, in the film carrier tape 10 for mounting electronic part of the present invention, the solder resist layer 20 is formed by dividing the region to be coated into plural sections, i.e., A section 20 a, B section 20 b, C section 20 c and D section 20 d, and applying them with a solder resist ink, as shown in FIGS. 1 to 3.
  • In the present invention, the resin for forming the solder resist layer 20 is a curing resin, and examples of the curing resins preferably used include thermosetting resins, such as epoxy resins, urethane modified epoxy resins, phenolic resins and polyimide resin precursors. Such a thermosetting resin is dissolved or dispersed in a solvent, and the solution or the dispersion is adjusted to have a viscosity of usually 10 to 40 Pa·s, preferably 20 to 30 Pa·s, so as to enable squeegee coating using a screen mask.
  • In FIGS. 1 to 3, the region where the solder resist layer 20 is formed is a joined area of the A section 20 a, the B section 20 b, the C section 20 c and the D section 20 d. In the conventional technique, the solder resist is applied to these sections in one united body. However, if the solder resist is applied to such a wide region and cured, the resin suffers cure shrinkage, and as a result, warpage distortion in such a state that the solder resist layer 20 being the inner side as shown in FIG. 4 occurs on each film carrier 12.
  • In the film carrier tape for mounting electronic part of the present invention, the region to be coated with a solder resist is divided into plural sections, and these sections are applied with the solder resist. That is to say, the region to be coated with the solder resist is a joined area of the A section 20 a, the B section 20 b, the C section 20 c and the D section 20 d in FIGS. 1 and 3, however in the embodiment shown in FIGS. 1 and 3, this region is divided into 4 sections, then these sections are each applied with the solder resist independently from the adjacent sections, and the solder resist is cured to form a solder resist layer 20 having been divided into 4 sections. In case of a film carrier having a longitudinal length of less than 5 mm and a crosswise length of less than 5 mm, such warpage distortion that becomes a problem rarely occurs. In the present invention, therefore, it is preferable to divide the solder resist layer in case of a film carrier having a longitudinal length of not less than 5 mm and a crosswise length of not less than 5 mm.
  • By dividing the solder resist layer as above, a stress attributable to cure shrinkage of the solder resist is produced in each section, but this stress is small, and by allowing this stress to compete with a stress present inside the insulating film and the wiring pattern formed thereon, distortion of the film carrier can be held down to the minimum.
  • Such an effect is exerted also in the case where one film carrier 12 is formed in the width direction.
  • The solder resist layer 20 is preferably divided into 2 to 16 sections, particularly preferably 2 to 8 sections, though it depends upon the size of the film carrier and the properties of the insulating film, the solder resist and other materials. By dividing the solder resist layer 20 as above, shrinkage stress attributable to curing of the solder resist in each section is reduced, and the distortion of the whole film carrier is also reduced. As for the size of the solder resist after dividing, the length of one side does not necessarily have to be less than 5 mm because the properties of the insulating film, the solder resist and the like are entangled.
  • In the film carrier tape 10 for mounting electronic part of the present invention, the shape and the relative size of each of the split and/or divided sections of the solder resist layer 20 are not specifically restricted, however it is preferable to divide the region to be covered with the solder resist as equally as possible. By uniformalizing the stress produced in each section, the distortion of the whole film carrier can be further reduced. That is to say, it is preferable that the areas of the sections are equalized to one another and the shapes of the sections are made substantially the same as one another. In the film carrier tape for mounting electronic part of the present invention, the length of one side of each section of the divided solder resist is desired to be in the range of about 2 to 10 mm, preferably about 2.5 to 7.5 mm.
  • In the film carrier tape for mounting electronic part of the present invention, the film carrier formed by splitting and/or dividing the solder resist layer is not limited to the aforesaid CSP or BGA, and the film carrier can be applied to general TAB tapes. For example, as shown in FIGS. 5(a) and 5(b), the film carrier can be applied to a film carrier tape for mounting electronic part wherein a solder resist layer is formed in a region of not less than 30% of the wiring patterns (except terminal portions). In FIG. 5(a), an example wherein a solder resist layer having been divided into 12 sections is formed on wiring patterns 15 formed on a surface of an insulating film 11 having a device hole is shown. The wiring patterns shown in FIG. 5(a) are only examples and do not restrict those employable in the present invention. In FIG. 5(b), an example wherein the solder resist layer 20 is divided into 2 sections is shown, but in this figure, wiring patterns formed on a surface of the insulating film 11 are not shown. Dividing of the solder resist layer is useful for a film carrier tape for mounting electronic part wherein a solder resist layer is formed in a region of not less than 30% of wiring patterns except terminal portions, as shown in FIGS. 5(a) and 5(b).
  • As shown in FIGS. 6(a) and 6(b), a distance (W) between the divided sections can be properly determined so as not to transmit the stress produced in one section to its adjacent section, and the distance is in the range of usually 20 μm to 50 mm, preferably 20 μm to 3 mm. When the distance between the sections is determined in the above range, the internal stress produced in one section is not transmitted to the adjacent section, and besides there is no problem in the protection of a wiring pattern in each section. It is desirable that the shapes of the sections closely resemble one another. When the shapes of the sections closely resemble one another, the internal stress produced in each section is uniformalized, and hence, the distortion of the whole film carrier is reduced.
  • The thickness (h0) of the solder resist layer split or divided as above is the same as that of a conventional solder resist layer, and the solder resist layer on the upper surface of the wiring pattern has an average thickness of usually 3 to 50 μm, preferably 5 to 40 μm, after curing. In the film carrier tape for mounting electronic part of the present invention, the solder resist layer 20 is split or divided as shown in FIG. 6(a), and between the adjacent sections, there is an area where no solder resist layer is formed as above. However, the internal stress produced in one section has only to be not transmitted to the adjacent section, so that the section of the solder resist layer 20 may be connected to its adjacent section at least in part, as shown in 6(b). In this case, the thickness (h1) of the solder resist layer between these sections is not more than ½ of the usual thickness (h0) of the solder resist layer, and h1 may be 0.
  • In order to form the divided solder resist layer 20, masking is made on a conventional screen correspondingly to the sections, and the resin has only to be applied. In case of a solder resist of adhesion type which has begun to be adopted recently, a gap is formed, and then the solder resist has only to be allowed to adhere. In case of a solder resist using a photosensitive resin, the resin is applied, and then the resin has only to be exposed and developed so as to split and/or divide the solder resist layer. The solder resist layer whose divided sections are connected to one another at least in part can be formed by controlling a line width of a screen mask that is used when a solder resist coating liquid is applied.
  • After the solder resist layer is formed as above, a surface of a terminal portion 16 (e.g., lead, bonding pad) exposed from the solder resist layer 20 is subjected to plating treatment. Examples of the plating treatments include tin plating, nickel plating, nickel-gold multilayer plating, nickel-palladium-gold multilayer plating, solder plating and tin-bismuth plating. On the surface of the wiring pattern present between the divided sections of the solder resist layer, the above-mentioned plated layer is formed.
  • The plating treatment may be carried out prior to the formation of the solder resist layer.
  • The film carrier tape for mounting electronic part of the present invention produced as above can be used in a usual manner. For example, on the divided solder resist layer formed as above, an electronic part (not shown in the figures) is arranged by the use of an adhesive or the like, and electrical connection is made between the connecting terminal 16 and a bump electrode provided on the electronic part, whereby mounting of the electronic part can be achieved. For making electrical connection, a conductive metal wire such as a gold wire can be employed. In the film carrier tape for mounting electronic part of the present invention, the film carrier has an area substantially the same as an area of the electronic part to be mounted, but the present invention is not limited to such a film carrier tape.
  • The connecting terminal 16 of the film carrier tape for mounting electronic part of the present invention is connected to a solder ball through the wiring pattern 15.
  • In the film carrier tape for mounting electronic part of the present invention, the solder resist layer is split or divided as described above, and therefore, warpage distortion of a film carrier attributable to the cure shrinkage of the solder resist occurring in the curing can be reduced.
  • Distortion of the film carrier in the film carrier tape for mounting electronic part of the present invention is measured in the following manner. As shown in FIG. 4(a), a point of the film carrier tape, at which a sprocket hole to carry the film carrier tape is formed, is taken as a standard point. Then, with regard to one film carrier of the film carrier tape produced, heights of measuring points {circle around (1)} to {circle around (5)} based on the standard point are measured. Using the values obtained, values of {circle around (1)}′ ({circle around (5)}′) and {circle around (2)}′ ({circle around (4)}′) of the film carrier (unit) are calculated from the formula {circle around (1)}′={circle around (5)}′=({circle around (1)}+{circle around (5)})/2 and the formula {circle around (2)}′={circle around (4)}′=({circle around (2)}+{circle around (4)})/2, respectively, taking into consideration that the film carrier tape is distorted as shown in FIG. 4.
  • Of the unit warpage values of {circle around (1)}′-{circle around (3)} and {circle around (2)}′-{circle around (3)}, the largest value is taken as the warpage distortion in the present invention.
  • By splitting or dividing the solder resist layer as above, warpage distortion of a film carrier is reduced to not more than 50% of warpage distortion of a film carrier having no split or divided solder resist layer.
  • In the film carrier tape for mounting electronic part of the present invention, the solder resist layer is formed in such a manner that the layer is split or divided, whereby warpage distortion of a film carrier is reduced, and the film carrier tape for mounting electronic part exhibits high reliability.
    • EXAMPLES
  • The film carrier tape for mounting electronic part of the present invention is further described with reference to the following example by comparing it with a film carrier tape which has a solder resist layer formed on the whole surface of a wiring pattern except a connecting terminal and which is liable to suffer warpage. However, it should be construed that the present invention is in no way limited to the example.
    • Example 1
  • A polyimide film (trade name: Upilex S, available from Ube industries, Ltd.) having an average thickness of 50 μm and a width of 48 mm was punched to form sprocket holes and solder ball holes for arranging solder balls. As shown in FIG. 1, the solder ball holes were formed so that film carriers each having a side length of 17 mm could be arranged in two rows.
  • Subsequently, onto the polyimide film was bonded an electrodeposited copper foil having an average thickness of 25 μm, then the electrodeposited copper foil was applied with a photosensitive resin, and the photosensitive resin was exposed and developed. Using a pattern made of the thus developed photosensitive resin as a masking material, the electrodeposited copper foil was selectively etched to form a wiring pattern made of copper.
  • Onto a surface of the wiring pattern thus formed, a solder resist ink was applied, and the solder resist ink was cured by heating to form a solder resist layer (average thickness after curing: 10 μm). The solder resist layer formed herein was a layer having been divided into 4 sections by providing a mask on a screen and having between the adjacent sections an area coated with no solder resist in a width of 200 μm (non-solder resist area), as shown in FIG. 1.
  • After formation of the solder resist layer consisting of divided 4 sections, a connecting terminal coated with no solder resist layer and the non-solder resist area were subjected to nickel plating and then gold plating. Thereafter, the whole film carrier tape was subjected to removal of warpage in a conventional manner.
  • From the film carriers formed near the lengthwise center of the resulting film carrier tape for mounting electronic part, 12 film carriers in continuous six rows were arbitrarily selected, and warpage distortion of these film carriers were measured.
  • The results are set forth in Table 1. In Table 1, the terms “upper column” and “lower column” are described in order to distinguish between a film carrier on the upper side and a film carrier on the lower side in such a state that the film carrier tape is arranged as shown in FIG. 1, so that these terms have no relation to the direction of the tape in the production process of the film carrier tape for mounting electronic part of the present invention.
    TABLE 1
    First Second Third Fourth Fifth Sixth Average
    piece piece piece piece piece piece value
    Upper 0.035 mm −0.005 mm  0.015 mm  0.023 mm 0.150 mm 0.071 mm 0.035 mm
    column
    Lower 0.012 mm  0.051 mm −0.019 mm −0.016 mm 0.017 mm 0.180 mm
    column
    • Comparative Example 1
  • A film carrier tape for mounting electronic part was produced in the same manner as in Example 1, except that the solder resist layer was not divided.
  • From the film carriers of the resulting film carrier tape for mounting electronic part, 12 film carriers in continuous six rows were arbitrarily selected in the same manner as in Example 1, and warpage distortion of these film carriers were measured.
  • The results are set forth in Table 2.
    TABLE 2
    First Second Third Fourth Fifth Sixth Average
    piece piece piece piece piece piece value
    Upper 0.112 mm 0.050 mm 0.074 mm 0.078 mm 0.084 mm 0.061 mm 0.085 mm
    column
    Lower 0.098 mm 0.074 mm 0.093 mm 0.092 mm 0.072 mm 0.089 mm
    column
  • As is apparent from the comparison between Table 1 and Table 2, by dividing the solder resist layer into 4 sections, warpage distortion of the film carriers could be reduced to half or less in terms of an average value.
    • INDUSTRIAL APPLICABILITY
  • In the film carrier tape for mounting electronic part of the present invention, the solder resist layer is split or divided into plural sections, so that a stress that is brought with shrinkage occurring in the curing of the solder resist ink is scattered. In the film carrier tape for mounting electronic part of the present invention, therefore, warpage distortion of a film carrier attributable to the cure shrinkage of the solder resist layer is remarkably reduced, and precision in the mounting of electronic part is surely enhanced.
  • The film carrier tape for mounting electronic part of the present invention is particularly useful as CSP, COF, BGA or the like.

Claims (16)

1. A film carrier tape for mounting an electronic part, comprising an elongated insulating film having a plurality of wiring patterns formed on a surface of the insulating film, said wiring patterns being made of a conductive metal, wherein:
the wiring patterns are each independently covered with a solder resist layer except a connecting terminal portion, and the solder resist layer formed on each surface of the wiring patterns is divided into plural sections.
2. A film carrier tape for mounting an electronic part, comprising an elongated insulating film having a plurality of wiring patterns formed on a surface of the insulating film, said wiring patterns being made of a conductive metal and at least two of said wiring patterns being arranged side by side in the width direction of the elongated insulating film, wherein:
the wiring patterns are each independently covered with a solder resist layer except a connecting terminal portion, and the solder resist layer formed on each surface of the wiring patterns is divided into plural sections.
3. The film carrier tape for mounting an electronic part as claimed in claim 1, wherein the solder resist layer is formed on each surface of the wiring patterns in such a manner that the solder resist layer is divided into 2 to 16 sections.
4. The film carrier tape for mounting an electronic part as claimed in claim 1, wherein in each film carrier, a distance between one section and its adjacent section of the divided solder resist layer is in the range of 20 μm to 50 mm.
5. The film carrier tape for mounting an electronic part as claimed in claim 1, wherein the elongated insulating film has a thickness of not more than 75 μm.
6. The film carrier tape for mounting an electronic part as claimed in claim 1, wherein an area occupied by one film carrier is substantially the same as an area of an electronic part to be mounted on the film carrier tape.
7. The film carrier tape for mounting an electronic part as claimed in claim 1, wherein an opposite surface to the surface of the insulating film where the wiring pattern of the film carrier for mounting an electronic part is formed is designed so that metal balls to be electrically connected outside the film carrier can be arranged.
8. The film carrier tape for mounting an electronic part as claimed in claim 1, wherein the solder resist layer formed on the surface of the wiring pattern has an average thickness, except non-solder resist area, of 3 to 50 μm after curing.
9. The film carrier tape for mounting an electronic part as claimed in claim 1, wherein the solder resist layer is formed in a region of not less than 20% of the wiring patterns except the connecting terminal portions.
10. The film carrier tape for mounting an electronic part as claimed in claim 2, wherein the solder resist layer is formed on each surface of the wiring patterns in such a manner that the solder resist layer is divided into 2 to 16 sections.
11. The film carrier tape for mounting an electronic part as claimed in claim 2, wherein in each film carrier, a distance between one section and its adjacent section of the divided solder resist layer is in the range of 20 μm to 50 mm.
12. The film carrier tape for mounting an electronic part as claimed in claim 2, wherein the elongated insulating film has a thickness of not more than 75 μm.
13. The film carrier tape for mounting an electronic part as claimed in claim 2, wherein an area occupied by one film carrier is substantially the same as an area of an electronic part to be mounted on the film carrier tape.
14. The film carrier tape for mounting an electronic part as claimed in claim 2, wherein an opposite surface to the surface of the insulating film where the wiring pattern of the film carrier for mounting an electronic part is formed is designed so that metal balls to be electrically connected outside the film carrier can be arranged.
15. The film carrier tape for mounting an electronic part as claimed in claim 2, wherein the solder resist layer formed on the surface of the wiring pattern has an average thickness, except non-solder resist area, of 3 to 50 μm after curing.
16. The film carrier tape for mounting an electronic part as claimed in claim 2, wherein the solder resist layer is formed in a region of not less than 20% of the wiring patterns except the connecting terminal portions.
US10/534,190 2002-11-07 2003-10-09 Film carrier tape for mounting electronic component Abandoned US20060118457A1 (en)

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JP2004158725A (en) 2004-06-03
KR100713509B1 (en) 2007-04-30
KR20050053790A (en) 2005-06-08
CN1708841A (en) 2005-12-14
CN100377325C (en) 2008-03-26

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