CN105552048A - Heat-conducting bonding pad and package structure of QFP chip with heat-conducting bonding pad - Google Patents
Heat-conducting bonding pad and package structure of QFP chip with heat-conducting bonding pad Download PDFInfo
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- CN105552048A CN105552048A CN201610061078.3A CN201610061078A CN105552048A CN 105552048 A CN105552048 A CN 105552048A CN 201610061078 A CN201610061078 A CN 201610061078A CN 105552048 A CN105552048 A CN 105552048A
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- thermal land
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
- H01L23/367—Cooling facilitated by shape of device
- H01L23/3677—Wire-like or pin-like cooling fins or heat sinks
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/46—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements involving the transfer of heat by flowing fluids
- H01L23/467—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements involving the transfer of heat by flowing fluids by flowing gases, e.g. air
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
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- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Materials Engineering (AREA)
- Electric Connection Of Electric Components To Printed Circuits (AREA)
Abstract
The invention provides a heat-conducting bonding pad and a package structure of a QFP chip with the heat-conducting bonding pad. The heat-conducting bonding pad comprises a bonding pad region and a peripheral region, wherein the bonding pad region is provided with a plurality of bonding pad parts which are arranged in an array; and gaps are formed among the bonding pad parts. The bonding pad parts of the heat-conducting bonding pad are arranged in the array and are isolated from one another, and the area of the bonding pad parts is greatly reduced, so that, on one hand, the escape path of a gas generated by soldering flux pyrolysis in a solder paste in a high-temperature welding process is shortened; and on the other hand, the gaps between the adjacent bonding pad parts provide channels for escape of the gas; the gas can timely escape; the area and the quantity of bubbles are effectively reduced; the condition that the chip has enough heat radiating area is ensured; and the heat radiating effect is improved. Meanwhile, the effective area of a conductor formed by the bonding pad is increased, so that the grounding impedance of the chip is reduced; and the reliability of the chip is improved. The welding effect of the heat-conducting bonding pad is improved; and excessive floating of the chip is avoided, so that the welding reliability of peripheral pins is improved.
Description
Technical field
The present invention relates to chip package field, in particular to a kind of thermal land and the encapsulating structure of QFP chip with it.
Background technology
Hyundai electronics packaging forward high density, high integrated and miniaturization development, and QFP encapsulation (QuadFlatPackage, flat-four-side encapsulates) accounts for dominant position in chip encapsulation technology.The at present QFP packaged chip of some high integration, the TMS320F28377 that such as TI company produces, in order to have good heat radiating and earthing effect, has one for dispelling the heat and the pad of ground connection in the bottom of chip.The effect of pad realizes electrical connection between chip and external circuit, between components and parts and mechanical connection, so its reliability is particularly important.The circulate thermal stress that causes and alternative cycle of chip power will cause the thermal fatigue of pad, thus make the performance degradation of solder joint, and reliability reduces, and even causes chip failure.
Therefore, select the high-density printed circuit board of QFP packaged chip, the heat dissipation characteristics of chip affects the reliability of product long-time running; The impedance ground of chip then affects the performance of product, when the impedance ground of chip is excessive, will there will be the phenomenons such as power-up initializing is made mistakes, program fleet.
The chip producer of the present market mainstream, as TI company, altera corp etc. are all proposed the chip of band thermal land, the QFP packaged chip of band thermal land can promote impedance ground characteristic, the heat dispersion of chip, thus enhances product performance and reliability.The structural representation of the thermal land of the dsp chip of a band thermal land of Tu1Shi TI company, the welding disking area 1 ' entirety of its thermal land is welding disk 12 '.
QFP packaged chip attachment process flow process as shown in Figure 2.When the chip production of QFP encapsulation mounts, need first to coat tin cream, and containing fluxing agent in tin cream.In pyroprocess; organic cracking in scaling powder produces gas; so when pcb board crosses Reflow Soldering; the pad that area is larger often there will be bubble; the existence of bubble can make chip cooling area inadequate; increase chip earth impedance, this will have influence on the reliability of welding and the performance of product.
Summary of the invention
Main purpose of the present invention is the encapsulating structure of the QFP chip providing a kind of thermal land and have it, to solve the problem of the heat-conducting effect difference of thermal land in prior art.
To achieve these goals, according to an aspect of the present invention, provide a kind of thermal land, this thermal land comprises welding disking area and outer peripheral areas, and welding disking area is provided with the multiple welding disks in arranged in arrays, has gap between welding disk.
Further, the pad cell that the above-mentioned multiple welding disks be arranged in order along first direction are formed, and each pad cell is arranged in order along second direction, first direction is vertical with second direction.
Further, above-mentioned each welding disk is quadrangle welding disk, is preferably rhombus welding disk or square welding disk.
Further, in above-mentioned pad cell the limit along first direction of each welding disk on same straight line.
Further, in above-mentioned pad cell the corresponding diagonal of each welding disk on same straight line.
Further, above-mentioned thermal land also comprises multiple air-vent, and multiple air-vent is arranged in outer peripheral areas around welding disking area.
Further, the gap of the corresponding welding disk be adjacent of above-mentioned each air-vent is arranged.
Further, the length of side of above-mentioned each welding disk is 40 ~ 60mils.
Further, the spacing between above-mentioned adjacent pad portion is 15 ~ 25mils.
Further, the welding disk near above-mentioned welding disking area contacts with outer peripheral areas, and the beeline of air-vent and welding disking area is 15 ~ 25mils.
Further, above-mentioned air-vent is circular air-vent, and the diameter of air-vent is 20 ~ 40mils.
According to a further aspect in the invention, provide a kind of encapsulating structure of QFP chip, have thermal land and conductive welding disk, this thermal land is above-mentioned thermal land.
Apply technical scheme of the present invention, the welding disking area of thermal land is changed into mutually isolated multiple welding disks in arranged in arrays by original overall pad, the area of each welding disk reduces greatly relative to the area that original welding disking area entirety is welding disk, the path of the gas effusion on the one hand the scaling powder cracking in high-temperature soldering process in tin cream being produced is shortened, between welding disk adjacent on the other hand, there is gap, this gap is that gas effusion provides passage, and then this gas is overflowed in time, thus effectively reduce area and the quantity of bubble, ensure that chip has enough area of dissipations, improve its radiating effect.Simultaneously, according to the conductor material law of resistance, formula is R=ρ L/S, wherein ρ: the resistivity of conductor material, L: conductor length, S: conductor cross-sectional area, owing to decreasing the area of bubble, the effective area making pad form conductor increases, and therefore utilizes this thermal land to reduce the impedance ground of chip, and then improves the reliability of chip.Further, through detecting, the structure of the welding effect of the thermal land of the application also more original overall welding disk makes moderate progress, this is because the bubble of welding disk reduces, each welding disk compactness is improved, and then ensure that the actual welding effect of each pad, compensate for the defect that welding effect that the reduction due to welding disking area area causes reduces, avoid the excessive floating of chip, thus improve its surrounding pin soldering reliability.
Accompanying drawing explanation
The Figure of description forming a application's part is used to provide a further understanding of the present invention, and schematic description and description of the present invention, for explaining the present invention, does not form inappropriate limitation of the present invention.In the accompanying drawings:
Fig. 1 shows the structural representation of a kind of thermal land provided according to prior art;
Fig. 2 shows QFP packaged chip attachment process schematic flow sheet in prior art;
Fig. 3 shows the structural representation of the thermal land provided according to a kind of preferred embodiment of the application, illustrated therein is the structure of conductive welding disk;
Fig. 4 shows the structural representation of the thermal land provided according to the another kind of preferred embodiment of the application, illustrated therein is the structure of conductive welding disk;
Fig. 5 shows the structural representation of the encapsulating structure of the QFP chip provided according to another preferred embodiment of the application;
Fig. 6 shows the radioscopy figure of the part thermal land of the embodiment of the present application 1; And
Fig. 7 shows the radioscopy figure of the part thermal land of the application's comparative example 1.
Wherein, above-mentioned accompanying drawing comprises the following drawings mark:
1 ', welding disking area; 12 ', welding disk; 1, welding disking area; 11, welding disk; 2, outer peripheral areas; 21, air-vent; 100, thermal land; 200, conductive welding disk.
Embodiment
It should be noted that, when not conflicting, the embodiment in the application and the feature in embodiment can combine mutually.Below with reference to the accompanying drawings and describe the present invention in detail in conjunction with the embodiments.
Described by background technology, thermal land of the prior art, owing to there is bubble, causes the area of dissipation of chip inadequate, and have impact on the reliability of chip, in order to solve this problem, this application provides a kind of thermal land and there is its encapsulating structure of QFP chip.
In a kind of typical execution mode of the application, provide a kind of thermal land, as shown in Figure 3, this thermal land comprises welding disking area 1 and outer peripheral areas 2, and welding disking area 1 has the multiple welding disks 11 in arranged in arrays, has gap between each welding disk 11.
The welding disking area 1 of thermal land is changed into mutually isolated multiple welding disks in arranged in arrays by original overall pad, the area of each welding disk 11 reduces greatly relative to the area that original welding disking area 1 entirety is welding disk 11, the path of the gas effusion on the one hand the scaling powder cracking in high-temperature soldering process in tin cream being produced is shortened, between welding disk 11 adjacent on the other hand, there is gap, this gap is that gas effusion provides passage, and then this gas is overflowed in time, thus effectively reduce area and the quantity of bubble, ensure that chip has enough area of dissipations, improve its radiating effect.Simultaneously, according to the conductor material law of resistance, formula is R=ρ L/S, wherein ρ: the resistivity of conductor material, L: conductor length, S: conductor cross-sectional area, owing to decreasing the area of bubble, the effective area making pad form conductor increases, and therefore utilizes this thermal land to reduce the impedance ground of chip, and then improves the reliability of chip.Further, through detecting, the structure of the welding effect of the thermal land of the application also more original overall welding disk 11 makes moderate progress, this is because the bubble of welding disk 11 reduces, each welding disk 11 compactness is improved, and then ensure that the actual welding effect of each pad, compensate for the defect that welding effect that the reduction due to welding disking area 1 area causes reduces, avoid the excessive floating of chip, thus improve its surrounding pin soldering reliability.
When making the welding disking area 1 of above-mentioned thermal land, can carry out according to the flow process shown in Fig. 2, at QFP chip before attachment, pcb board will apply tin cream, and tin cream is only coated in the region of the welding disk 11 for forming thermal land, in attachment after QFP chip, between chip and pcb board, do not having the region of tin cream just to have gap, having the region of tin cream just to form welding disk 11.
The arrangement mode of the welding disk 11 of the application can have multiple, in order to the heat radiation and welding effect that make welding disking area 1 are even, preferably as shown in Figure 3, along the pad cell of multiple welding disks 11 formation that first direction is arranged in order, and each pad cell is arranged in order along second direction, first direction is vertical with second direction.Welding disk 11 is arranged to the mode of above-mentioned array, makes the distribution of welding disk 11 in welding disking area 1 relatively uniform, so make the heat radiation of each welding disking area 1 and welding effect comparatively even.
Be easy to make each welding disk 11 make, preferred above-mentioned each welding disk 11 is quadrangle welding disk, and this quadrangle can be rectangle, square, rhombus, parallelogram etc., more preferably rectangle or square.The shape of certain the application's welding disk 11 also can be other polygons such as circle, ellipse, triangle.
When adopting the distribution of above-mentioned array, the distribution of its welding disk 11 preferably adopts following two kinds of modes, and as shown in Figure 3, in above-mentioned pad cell, the limit along first direction of each welding disk 11 is on same straight line.Or as shown in Figure 4, in pad cell the corresponding diagonal of each welding disk 11 on same straight line.
In order to promote that gas is discharged further, preferably as shown in Figures 3 and 4, be provided with multiple air-vent 21 in above-mentioned outer peripheral areas 2, the plurality of air-vent 21 is arranged around welding disking area 1.Air-vent 21 the discharge obviously can accelerating gas is set.When PCB making sheet, note making the position of air-vent and can not sink copper and can not by plugging green oil.
As shown in Figures 3 and 4, the gap of welding disk 11 that further preferred each air-vent 21 correspondence is adjacent is arranged.Arrange by air-vent 21 corresponding hollow out welding resistance portion 11, shorten the distance of gas by hollow out welding resistance portion 11 to air-vent 21, and then accelerate the discharge of gas further.
Making on the basis of above-mentioned design to the structure of thermal land, the application has made research to the welding disk 11 in thermal land and its spacing equidimension further, and the length of side of preferred each welding disk 11 is 40 ~ 60mils.Select the welding disk 11 of above-mentioned side size range, enough weld strengths can be ensured and the effusion effect of the bubble that each welding disk 11 center produces can be ensured.
Spacing further preferably between adjacent pad portion 11 is 15 ~ 25mils.This spacing makes the bubble in adjacent pad portion 11 all can overflow in time.
The size in ventilative aperture is mainly from the viewpoint of three: PCB manufacturer's processing technology, and now general producer's process equipment can only bore the hole of more than 8mil; Air permeable effect, aperture is too little, affects air permeable effect; The space taken, aperture is too large, can have influence on the wiring of PCB.Therefore the application is in order to make air-vent 21 play enough air permeable effects and ensure that PCB original function is unaffected, and the welding disk 11 preferably near welding disking area 1 contacts with outer peripheral areas 2, and air-vent 21 is 15 ~ 25mils with the beeline of welding disking area 1.Further preferred above-mentioned air-vent 21 is circular air-vent, and the diameter of air-vent 21 is 20 ~ 40mils.Certainly, above-mentioned size just with the design size of thermal land conventional at present for according to and design, those skilled in the art can adjust according to actual needs.
In the another kind of typical execution mode of the application, provide a kind of encapsulating structure of QFP chip, as shown in Figure 5, this encapsulating structure has thermal land 100 and conductive welding disk 200, and this thermal land 100 is above-mentioned thermal land.Welding disk 11 bubble due to the thermal land of the application is less and area is less, and its heat-conducting effect is effectively optimized, and impedance ground is effectively reduced, and welding effect is guaranteed, and therefore makes the functional reliability with its encapsulating structure be guaranteed.
The beneficial effect of the application is further illustrated below with reference to embodiment and comparative example.
Embodiment 1
The thermal land with structure shown in Fig. 3 is utilized to carry out the encapsulation of QFP chip as the thermal land of encapsulating structure, wherein, welding disk is square, the length of side is 50mils, spacing between adjacent pad portion is 20mils, the beeline of air-vent and welding disking area is 20mils, and the diameter of air-vent is 30mils.
Embodiment 2
The thermal land with structure shown in Fig. 3 is utilized to carry out the encapsulation of QFP chip as the thermal land of encapsulating structure, wherein, welding disk is square, the length of side is 40mils, spacing between adjacent pad portion is 25mils, the beeline of air-vent and welding disking area is 15mils, and the diameter of air-vent is 20mils.
Embodiment 3
The thermal land with structure shown in Fig. 3 is utilized to carry out the encapsulation of QFP chip as the thermal land of encapsulating structure, wherein, welding disk is square, the length of side is 60mils, spacing between adjacent pad portion is 15mils, the beeline of air-vent and welding disking area is 25mils, and the diameter of air-vent is 40mils.
Embodiment 4
The thermal land with structure shown in Fig. 3 is utilized to carry out the encapsulation of QFP chip as the thermal land of encapsulating structure, wherein, welding disk is square, the length of side is 35mils, spacing between adjacent pad portion is 15mils, the beeline of air-vent and welding disking area is 20mils, and the diameter of air-vent is 30mils.
Embodiment 5
The thermal land with structure shown in Fig. 4 is utilized to carry out the encapsulation of QFP chip as the thermal land of encapsulating structure, wherein, welding disk is rhombus, the length of side is 50mils, spacing between adjacent pad portion is 20mils, the beeline of air-vent and welding disking area is 20mils, and the diameter of air-vent is 30mils.
Embodiment 6
Utilize the thermal land with structure shown in Fig. 3 to carry out the encapsulation of QFP chip as the thermal land of encapsulating structure, wherein, do not arrange air-vent, welding disk be square, and the length of side is 50mils, and the spacing between adjacent pad portion is 20mils.
Embodiment 7
Utilize the thermal land with structure shown in Fig. 4 to carry out the encapsulation of QFP chip as the thermal land of encapsulating structure, wherein, do not arrange air-vent, welding disk is rhombus, and the length of side is 50mils, and the spacing between adjacent pad portion is 20mils.
Comparative example 1
The thermal land with structure shown in Fig. 1 is utilized to carry out the encapsulation of QFP chip as the thermal land of encapsulating structure, wherein, the area equation of the welding disking area in the area of the welding disking area of this thermal land and Fig. 3 and Fig. 4.
Utilize x-ray imaging instrument to detect the bubble in the thermal land of embodiment 1 to 7 and comparative example 1, the testing result of embodiment 1 and comparative example 1 is shown in Fig. 6 and Fig. 7, and wherein, the testing result of embodiment 2 to 7 is similar to the testing result of embodiment 1.Can obviously be found out by the contrast of Fig. 6 and Fig. 7, in the welding disk of embodiment 1, bubble obviously reduces compared with the bubble in the welding disk of comparative example 1, and its area obviously reduces.
As can be seen from the above description, the above embodiments of the present invention achieve following technique effect:
The welding disking area of thermal land is changed into mutually isolated multiple welding disks in arranged in arrays by original overall pad, the area of each welding disk reduces greatly relative to the area that original welding disking area entirety is welding disk, the path of the gas effusion on the one hand the scaling powder cracking in high-temperature soldering process in tin cream being produced is shortened, between welding disk adjacent on the other hand, there is gap, this gap is that gas effusion provides passage, and then this gas is overflowed in time, thus effectively reduce area and the quantity of bubble, ensure that chip has enough area of dissipations, improve its radiating effect.
Simultaneously, according to the conductor material law of resistance, formula is R=ρ L/S, wherein ρ: the resistivity of conductor material, L: conductor length, S: conductor cross-sectional area, owing to decreasing the area of bubble, the effective area making pad form conductor increases, and therefore utilizes this thermal land to reduce the impedance ground of chip, and then improves the reliability of chip.
Further, through detecting, the structure of the welding effect of the thermal land of the application also more original overall welding disk makes moderate progress, this is because the bubble of welding disk reduces, each welding disk compactness is improved, and then ensure that the actual welding effect of each pad, compensate for the defect that welding effect that the reduction due to welding disking area area causes reduces, avoid the excessive floating of chip, thus improve its surrounding pin soldering reliability.
The foregoing is only the preferred embodiments of the present invention, be not limited to the present invention, for a person skilled in the art, the present invention can have various modifications and variations.Within the spirit and principles in the present invention all, any amendment done, equivalent replacement, improvement etc., all should be included within protection scope of the present invention.
Claims (12)
1. a thermal land, it is characterized in that, described thermal land comprises welding disking area (1) and outer peripheral areas (2), described welding disking area (1) is provided with the multiple welding disks (11) in arranged in arrays, and described welding disk has gap between (11).
2. thermal land according to claim 1, it is characterized in that, the pad cell that the multiple welding disks (11) be arranged in order along first direction are formed, and each described pad cell is arranged in order along second direction, described first direction is vertical with described second direction.
3. thermal land according to claim 2, is characterized in that, each described welding disk (11) is quadrangle welding disk, is preferably rhombus welding disk or square welding disk.
4. thermal land according to claim 3, is characterized in that, in described pad cell, the limit along first direction of each welding disk (11) is on same straight line.
5. thermal land according to claim 3, is characterized in that, in described pad cell, the corresponding diagonal of each welding disk (11) is on same straight line.
6. thermal land according to any one of claim 1 to 5, it is characterized in that, be provided with multiple air-vent (21) in described outer peripheral areas (2), described multiple air-vent (21) is arranged around described welding disking area (1).
7. thermal land according to claim 6, is characterized in that, the described gap of the described welding disk (11) that each described air-vent (21) correspondence is adjacent is arranged.
8. thermal land according to claim 1, is characterized in that, the length of side of each described welding disk (11) is 40 ~ 60mils.
9. thermal land according to claim 8, is characterized in that, the spacing between adjacent described welding disk (11) is 15 ~ 25mils.
10. thermal land according to claim 7, it is characterized in that, described welding disk (11) near described welding disking area (1) contacts with described outer peripheral areas (2), and described air-vent (21) is 15 ~ 25mils with the beeline of described welding disking area (1).
11. thermal lands according to claim 7, is characterized in that, described air-vent (21) is circular air-vent, and the diameter of described air-vent (21) is 20 ~ 40mils.
The encapsulating structure of 12. 1 kinds of QFP chips, has thermal land (100) and conductive welding disk (200), it is characterized in that, described thermal land (100) thermal land according to any one of claim 1 to 11.
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201610061078.3A CN105552048A (en) | 2016-01-28 | 2016-01-28 | Heat-conducting bonding pad and package structure of QFP chip with heat-conducting bonding pad |
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| CN201610061078.3A CN105552048A (en) | 2016-01-28 | 2016-01-28 | Heat-conducting bonding pad and package structure of QFP chip with heat-conducting bonding pad |
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Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106817855A (en) * | 2017-03-02 | 2017-06-09 | 郑州云海信息技术有限公司 | A kind of GND pads of QFN encapsulation reduce the method for designing of welding bubble |
| CN106910728A (en) * | 2017-02-28 | 2017-06-30 | 郑州云海信息技术有限公司 | A kind of improvement QFN encapsulates the method for designing of chip welding quality |
| CN108637517A (en) * | 2018-05-18 | 2018-10-12 | 上海为彪汽配制造有限公司 | A kind of method and its steel net structure reducing QFN chips welding bubble rate |
| WO2019007034A1 (en) * | 2017-07-03 | 2019-01-10 | 京东方科技集团股份有限公司 | Circuit board, electrical element and display device |
| CN110571202A (en) * | 2019-08-09 | 2019-12-13 | 深圳市华星光电技术有限公司 | Time sequence control panel |
| CN113410141A (en) * | 2021-06-03 | 2021-09-17 | 上海丸旭电子科技有限公司 | Method for reducing coating bubble rate of three-proofing paint of QFP (quad Flat Package) packaged integrated circuit chip |
Citations (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2001196490A (en) * | 1999-11-04 | 2001-07-19 | Fujitsu Ltd | Semiconductor device |
| JP2003273479A (en) * | 2002-03-18 | 2003-09-26 | Alps Electric Co Ltd | Heat radiating structure of heat generating electronic component |
| US20060118457A1 (en) * | 2002-11-07 | 2006-06-08 | Shuichi Kawasaki | Film carrier tape for mounting electronic component |
| US20060186538A1 (en) * | 2003-11-19 | 2006-08-24 | Sanyo Electric Co., Ltd. | Land grid array package |
| US20080142993A1 (en) * | 2006-12-19 | 2008-06-19 | Shinko Electric Industries Co., Ltd. | Flip-chip mounting substrate |
| CN201490179U (en) * | 2009-07-13 | 2010-05-26 | 英业达股份有限公司 | Circuit board structure |
| CN102543765A (en) * | 2012-01-13 | 2012-07-04 | 迈普通信技术股份有限公司 | Method for designing bonding pad of surface mounted component, bonding pad structure and printing circuit board |
| US20130107483A1 (en) * | 2011-10-31 | 2013-05-02 | Mediatek Singapore Pte. Ltd. | Printed circuit board and electronic apparatus thereof |
| CN104701291A (en) * | 2013-12-05 | 2015-06-10 | 深圳市共进电子股份有限公司 | PCB (printed circuit board) heat-radiation soldering pad used for QFN (quad flat no-lead package) chip, and QFN chip and PCB soldering method |
| CN205621718U (en) * | 2016-01-28 | 2016-10-05 | 珠海格力节能环保制冷技术研究中心有限公司 | Lead packaging structure that hot welding coiled and had its QFP chip |
-
2016
- 2016-01-28 CN CN201610061078.3A patent/CN105552048A/en active Pending
Patent Citations (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2001196490A (en) * | 1999-11-04 | 2001-07-19 | Fujitsu Ltd | Semiconductor device |
| JP2003273479A (en) * | 2002-03-18 | 2003-09-26 | Alps Electric Co Ltd | Heat radiating structure of heat generating electronic component |
| US20060118457A1 (en) * | 2002-11-07 | 2006-06-08 | Shuichi Kawasaki | Film carrier tape for mounting electronic component |
| US20060186538A1 (en) * | 2003-11-19 | 2006-08-24 | Sanyo Electric Co., Ltd. | Land grid array package |
| US20080142993A1 (en) * | 2006-12-19 | 2008-06-19 | Shinko Electric Industries Co., Ltd. | Flip-chip mounting substrate |
| CN201490179U (en) * | 2009-07-13 | 2010-05-26 | 英业达股份有限公司 | Circuit board structure |
| US20130107483A1 (en) * | 2011-10-31 | 2013-05-02 | Mediatek Singapore Pte. Ltd. | Printed circuit board and electronic apparatus thereof |
| CN102543765A (en) * | 2012-01-13 | 2012-07-04 | 迈普通信技术股份有限公司 | Method for designing bonding pad of surface mounted component, bonding pad structure and printing circuit board |
| CN104701291A (en) * | 2013-12-05 | 2015-06-10 | 深圳市共进电子股份有限公司 | PCB (printed circuit board) heat-radiation soldering pad used for QFN (quad flat no-lead package) chip, and QFN chip and PCB soldering method |
| CN205621718U (en) * | 2016-01-28 | 2016-10-05 | 珠海格力节能环保制冷技术研究中心有限公司 | Lead packaging structure that hot welding coiled and had its QFP chip |
Cited By (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106910728A (en) * | 2017-02-28 | 2017-06-30 | 郑州云海信息技术有限公司 | A kind of improvement QFN encapsulates the method for designing of chip welding quality |
| CN106817855A (en) * | 2017-03-02 | 2017-06-09 | 郑州云海信息技术有限公司 | A kind of GND pads of QFN encapsulation reduce the method for designing of welding bubble |
| CN106817855B (en) * | 2017-03-02 | 2019-03-12 | 郑州云海信息技术有限公司 | A kind of GND pad of QFN encapsulation reduces the design method of welding bubble |
| WO2019007034A1 (en) * | 2017-07-03 | 2019-01-10 | 京东方科技集团股份有限公司 | Circuit board, electrical element and display device |
| US10779410B2 (en) | 2017-07-03 | 2020-09-15 | Beijing Boe Optoelectronics Technology Co., Ltd. | Circuit board, electronic component and display apparatus |
| CN108637517A (en) * | 2018-05-18 | 2018-10-12 | 上海为彪汽配制造有限公司 | A kind of method and its steel net structure reducing QFN chips welding bubble rate |
| CN110571202A (en) * | 2019-08-09 | 2019-12-13 | 深圳市华星光电技术有限公司 | Time sequence control panel |
| WO2021027147A1 (en) * | 2019-08-09 | 2021-02-18 | Tcl华星光电技术有限公司 | Timing control board and display device |
| CN113410141A (en) * | 2021-06-03 | 2021-09-17 | 上海丸旭电子科技有限公司 | Method for reducing coating bubble rate of three-proofing paint of QFP (quad Flat Package) packaged integrated circuit chip |
| CN113410141B (en) * | 2021-06-03 | 2022-03-22 | 上海丸旭电子科技有限公司 | Method for reducing coating bubble rate of three-proofing paint of QFP (quad Flat Package) packaged integrated circuit chip |
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Application publication date: 20160504 |