US20050000654A1 - Apparatus and method for plasma processing - Google Patents

Apparatus and method for plasma processing Download PDF

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Publication number
US20050000654A1
US20050000654A1 US10/796,116 US79611604A US2005000654A1 US 20050000654 A1 US20050000654 A1 US 20050000654A1 US 79611604 A US79611604 A US 79611604A US 2005000654 A1 US2005000654 A1 US 2005000654A1
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Prior art keywords
plasma processing
frequency power
plasma
lower electrode
electrode
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US10/796,116
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English (en)
Inventor
Tamotsu Morimoto
Takahiro Murakami
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Tokyo Electron Ltd
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Tokyo Electron Ltd
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Assigned to TOKYO ELECTRON LIMITED reassignment TOKYO ELECTRON LIMITED ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: MURAKAMI, TAKAHIRO, MORIMOTO, TAMOTSU
Publication of US20050000654A1 publication Critical patent/US20050000654A1/en
Priority to US12/536,137 priority Critical patent/US8574446B2/en
Abandoned legal-status Critical Current

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/32—Gas-filled discharge tubes
    • H01J37/32431—Constructional details of the reactor
    • H01J37/32532—Electrodes
    • H01J37/32568—Relative arrangement or disposition of electrodes; moving means
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/32—Gas-filled discharge tubes
    • H01J37/32009—Arrangements for generation of plasma specially adapted for examination or treatment of objects, e.g. plasma sources
    • H01J37/32082—Radio frequency generated discharge

Definitions

  • the present invention relates to an apparatus and a method for plasma processing and more particularly to an apparatus and a method for plasma processing which can reduce charging damage to objects to be processed being plasma processed using the plasma processing apparatus such as a parallel plate plasma processing apparatus.
  • the reference 1 suggests an apparatus and a method for generating plasma.
  • This apparatus includes a voltage application electrode for being applied high-frequency power, a ground electrode, and a distance adjusting mechanism for variably adjusting the distance between these electrodes.
  • a voltage is applied to the voltage application electrode, the distance between the voltage application electrode and the ground electrode is reduced to such an extent as to readily provide an igniting in accordance with the Paschen's law.
  • the distance between these electrodes is then increased, thereby ensuring a high etching capability and low damage to the processed body at the same time.
  • the reference 2 suggests a plasma processing apparatus that requires no distance control mechanism.
  • This plasma processing apparatus has two electrodes, which are isolated from each other and each connected with an individual high-frequency power supply, and the distances between these electrodes and a ground electrode disposed to face these electrodes are different. With this apparatus, the high-frequency power applied to an electrode spaced apart farther from the ground electrode is stopped immediately after a discharge is initiated, thereby allowing for readily initiating a discharge at a low voltage even for high-rate etching. In other words, different electrodes are used for plasma igniting and plasma processing.
  • the reference 3 suggests a plasma processing apparatus with a two-frequency application scheme to apply respective high-frequency powers to the upper and lower electrodes.
  • the ON or OFF timing of the high-frequency powers applied to both the upper and lower electrodes is controlled to alleviate charging damage.
  • the distance between the upper and lower electrodes was optimized each at the time of plasma igniting and during plasma processing to alleviate charging damage and optimize the plasma processing at the same time.
  • significant progress was made since then toward finer-line and thinner-film processes for semiconductor devices followed by significant improvements in plasma processing apparatuses. This resulted in only the distance between the electrodes being optimized each at the time of plasma igniting and during plasma processing, yet causing a limitation to the prevention of charging damage.
  • the present invention was developed to solve the aforementioned problem. It is therefore an object of the invention to provide an apparatus and a method for plasma processing which can prevent charging damage to objects to be processed even when progress will be made toward finer-line and thinner-film processes for semiconductor devices.
  • a plasma processing method is characterized in that when plasma processing an object to be processed using a plasma processing apparatus for allowing plasma generating means to cause plasma igniting, an amount of charges deposited on the object to be processed at least at the time of plasma extinction is reduced.
  • a plasma processing method employs a plasma processing apparatus which has an upper electrode and a lower electrode, a spacing therebetween being adjustable, and which causes plasma igniting by applying high-frequency power to at least one of the upper and lower electrodes.
  • the method is characterized in that when plasma processing an object to be processed placed on the lower electrode using the plasma processing apparatus, the spacing is made larger at least at the time of plasma extinction than during plasma processing.
  • the plasma processing method according to a third aspect of the present invention is characterized in that first high-frequency power is applied to the upper electrode, while second high-frequency power having a lower frequency than the first high-frequency power is applied to the lower electrode.
  • the plasma processing method according to a fourth aspect of the present invention is characterized in that to increase the spacing, the lower electrode is moved away from the upper electrode.
  • the plasma processing method according to a fifth aspect of the present invention is characterized in that the first high-frequency power is turned off after the second high-frequency power is turned off.
  • the plasma processing method according to a sixth aspect of the present invention is characterized by performing etching as the plasma processing.
  • a plasma processing apparatus includes a lower electrode for placing an object to be processed thereon, an upper electrode disposed above the lower electrode so as to oppose it, an adjusting mechanism for adjusting a spacing between the upper and lower electrodes by raising or lowering the lower electrode, and a high-frequency power supply for applying high-frequency power to at least one of the upper and lower electrodes, in which the high-frequency power is applied to either one of the electrodes to cause plasma igniting.
  • the plasma processing apparatus is characterized in that the adjusting mechanism has a drive mechanism for making the spacing larger at least at the time of plasma extinction than during plasma processing of an object to be processed placed on the lower electrode.
  • the plasma processing apparatus based on the seventh aspect of the invention, is characterized by including a first high-frequency power supply for applying first high-frequency power to the upper electrode, and a second high-frequency power supply for applying second high-frequency power having a lower frequency than the first high-frequency power to the lower electrode.
  • the plasma processing apparatus according to a ninth aspect of the present invention, based on the seventh or eighth aspect of the invention, is characterized in that the adjusting mechanism has a drive mechanism for moving the lower electrode away from the upper electrode.
  • the plasma processing apparatus according to a tenth aspect of the present invention, based on the eighth or ninth aspect of the invention, is characterized in that the first high-frequency power is turned off after the second high-frequency power is turned off.
  • the plasma processing apparatus according to an eleventh aspect of the present invention, based on any one of the seventh to tenth aspects of the invention, is characterized by performing etching as the plasma processing.
  • FIG. 1 is a sectional view illustrating the structure of a plasma processing apparatus according to an embodiment, which is employed for a plasma processing method of the present invention
  • FIGS. 2A to 2 C are explanatory views illustrating how the lower electrode works during a step of plasma processing in the plasma processing apparatus shown in FIG. 1 ,
  • FIG. 2A being a sectional view illustrating the upper and lower electrodes being spaced apart farther at the time of plasma igniting than the optimum spacing provided during plasma processing
  • FIG. 2B being a sectional view illustrating the upper and lower electrodes being set to the optimal spacing provided during plasma processing
  • FIG. 2C being a sectional view illustrating the upper and lower electrodes being spaced apart farther at the time of plasma extinction than the optimum spacing provided during plasma processing;
  • FIG. 3 is an explanatory view illustrating the timing of application and disconnection of first and second high-frequency powers
  • FIG. 4 is an explanatory view illustrating the timing of application and disconnection of the first and second high-frequency powers
  • FIG. 5 is a schematic plan view illustrating a defective wafer that has been processed by a conventional plasma processing method in which the upper and lower electrodes are set at an optimum spacing;
  • FIGS. 6A and 6B are schematic sectional views illustrating the CHARM®-2 wafer sensor, FIG. 6A showing a potential sensor, FIG. 6B showing a current sensor; and
  • FIG. 7 is a graph showing the relation between the wafer process time and the amount of charges supplied onto each device of a wafer.
  • a parallel plate plasma processing apparatus with the two-frequency application scheme was used for applying high-frequency powers to the upper and lower electrodes at different frequencies, respectively.
  • the distance between the upper and lower electrodes was optimized.
  • plasma igniting, plasma processing (etching), and plasma extinction are performed on a wafer to determine the distribution of breakdown voltages of an antenna MOS (with an antenna ratio of one million). Consequently, as shown by the shaded lines illustrated in FIG. 5 , defective devices due to a breakdown in the gate insulating film were found at the central portion and periphery of the wafer, resulting in up to a yield of 45%.
  • the inventors employed CHARM®-2 wafer (Wafer Charging Monitors, Inc.) for monitoring charging of wafer to determine the percentage of defective devices resulting from charging damage to each device.
  • the CHARM®-2 wafer includes a potential sensor (see FIG. 6A ), a current sensor (see FIG. 6B ), and a UV sensor.
  • Each sensor has a CCE (Charging Collection Electrode) on its surface and an EEPROM serving as the storage portion of each sensor that is initially set to a predetermined potential.
  • CCE Charge Collection Electrode
  • the current sensor showed that a positive current flew through the periphery of the wafer, while a negative current flew through the central portion, thereby causing the breakdown of the gate insulating film to occur in the periphery and the central portion of the wafer.
  • a wafer having MOS devices was plasma processed to determine the relation between the duration of wafer processing and the amount of charges (electric current) supplied from the plasma to the MOS device.
  • the relation was found to be expressed by the model indicated by the alternate long and short dashed lines shown in FIG. 7 .
  • the current from point A to D can be integrated with respect to time to obtain the amount of charging of the device.
  • point A indicates the time of application of high-frequency power
  • point B indicating the time of igniting
  • point C indicating the time of plasma extinction resulting from the high-frequency power being ceased
  • point D indicating the time of the plasma processing being terminated
  • the interval between points B and C indicating the duration of plasma processing.
  • a plasma processing apparatus 10 employed in this embodiment includes a chamber 11 made of a conductive material such as aluminum, an upper electrode 12 disposed on the upper surface in the chamber 11 , a lower electrode 13 for placing a wafer W thereon, the lower electrode 13 being disposed below the upper electrode 12 so as to oppose it, and a lift mechanism (e.g., an air cylinder) 14 for adjusting the spacing between the lower electrode 13 and the upper electrode 12 by raising or lowering the lower electrode 13 .
  • a lift mechanism e.g., an air cylinder
  • the upper electrode 12 having a plurality of holes 12 A formed on the entire lower surface thereof, serves as a showerhead for supplying process gases.
  • the center hole on the upper surface of the upper electrode 12 is connected with a gas supply pipe 15 , which is in turn connected with a gas source 16 via a mass flow controller 17 , to supply a process gas from the gas source 16 into the chamber 11 while the flow of the process gas is being controlled by the mass flow controller 17 .
  • the upper electrode 12 is also connected with a first high-frequency power supply 18 via a matching device 19 , allowing the first high-frequency power supply 18 to apply first high-frequency power to the upper electrode 12 , e.g., at 13.56 to 150 MHz.
  • temperature control means 20 such as a cooling jacket, which sets the wafer W held on the lower electrode 13 to the desired processing temperature.
  • the temperature control means 20 has a supply pipe 21 and an exhaust pipe 22 for circulating a coolant through the cooling jacket. This configuration allows the coolant controlled at a predetermined temperature to be supplied through the supply pipe 21 into the cooling jacket as well as a heat-exchanged coolant to be exhausted outwardly through the exhaust pipe 22 .
  • the lower electrode 13 is connected with a second high-frequency power supply 23 via another matching device 24 , allowing the second high-frequency power supply 23 to apply second high-frequency power (bias) to the lower electrode 13 , e.g., at 400 kHz to 13.56 MHz.
  • the lower electrode 13 may also be provided therein with a heater or a Peltier device instead of the cooling jacket.
  • the electrostatic chuck 25 has a tungsten electrode plate 25 A interposed in between ceramic layers formed by sintering or spray forming.
  • the tungsten electrode plate 25 A is connected with a variable DC voltage source 26 via a filter 27 and a lead wire 28 .
  • the variable DC voltage source 26 applies a high DC voltage to the tungsten electrode plate 25 A, thereby causing the wafer W placed on the lower electrode 13 to be electrostatically attracted to the ceramic layers.
  • an annular focus ring 29 which is adapted to surround the wafer W held electrostatically on the electrostatic chuck 25 .
  • the focus ring 29 selectively made of an insulating or conductive material depending on the process, serves to confine or spread reactive ions.
  • an exhaust ring 30 disposed between the chamber 11 and the lower electrode 13 is an exhaust ring 30 having a plurality of ventilating holes bored therein.
  • the exhaust ring 30 is disposed at a level lower than the upper surface of the lower electrode 13 to surround the lower electrode 13 . This exhaust ring 30 puts the exhaust flow into order and optimally confines the plasma in between the upper electrode 12 and the lower electrode 13 .
  • a flow path (not shown) for supplying therethrough a thermally conductive gas (e.g., He gas) as a backside gas.
  • a thermally conductive gas e.g., He gas
  • the gas flow path having a plurality of openings at the central portion and the peripheral edge of the wafer W, supplies the backside gas to between the electrostatic chuck 25 and the wafer W to enhance the thermal conductivity between the lower electrode 13 and the wafer W, thereby making it possible to quickly control the wafer W at a predetermined temperature.
  • the gas source 16 has a plurality of gas sources, each of which supplies as an etchant gas, e.g., fluorocarbon-based gases such as C 4 F 8 , a carbon monoxide (CO) gas, an oxygen (O 2 ) gas, or rare gases such as an argon (Ar) gas.
  • an etchant gas e.g., fluorocarbon-based gases such as C 4 F 8 , a carbon monoxide (CO) gas, an oxygen (O 2 ) gas, or rare gases such as an argon (Ar) gas.
  • FIGS. 2 and 3 a plasma processing method that employs the plasma processing apparatus 10 will be explained with reference to FIGS. 2 and 3 in accordance with an embodiment of the present invention.
  • a 300 mm wafer W is etched.
  • the temperatures of the inner circumferential surface of the chamber 11 , the upper electrode 12 , and the lower electrode 13 are pre-set to 50° C., 30° C., and 10° C., respectively.
  • the spacing between the upper electrode 12 and the lower electrode 13 in the chamber 11 is first set to a spacing (e.g., 22 mm) greater than the optimum spacing (e.g., 17 mm) employed for etching the wafer W.
  • a gate valve (not shown) is opened to place the wafer W on the lower electrode 13 in the chamber 11 , and the gate valve is then closed.
  • variable DC voltage source 26 applies a high DC voltage to the tungsten electrode plate 25 A in order to securely attract the wafer W to the lower electrode 13 in an electrostatic manner.
  • a backside gas e.g., He gas
  • the backside gas is set to pressures of 12 Torr at the central portion of the wafer W as well as to 20 Torr at the circumferential edge of the wafer W.
  • the temperature control means 20 in the lower electrode 13 maintains the wafer W at the predetermined temperature.
  • the first high-frequency power supply 18 applies the first high-frequency power of 2000W to the upper electrode 12 at 27 MHz to cause a glow discharge between the upper electrode 12 and the lower electrode 13 for plasma igniting.
  • the second high-frequency power supply 23 applies the second high-frequency power of 1400W to the lower electrode 13 at 800 kHz, thereby generating a bias potential on the lower electrode 13 .
  • the timing of applying the second high-frequency power to the lower electrode 13 is delayed by about 0.2 to 3 seconds with respect to the timing of applying the first high-frequency power to the upper electrode 12 , thereby allowing the matching device 24 to provide a smooth matching to the second high-frequency power.
  • the second high-frequency power is delayed, thereby allowing the matching device to provide a smooth matching.
  • the lift mechanism 14 is actuated to raise the lower electrode 13 .
  • the lift mechanism 14 stops when the spacing between the lower electrode 13 and the upper electrode 12 has reached the optimum spacing of 17 mm. Under this condition, the first and second high-frequency powers are stabilized at 2000W and 1400W, respectively, to etch the wafer W.
  • the lift mechanism 14 is actuated to lower the lower electrode 13 .
  • the spacing between the upper electrode 12 and the lower electrode 13 is increased to reach 22 mm to provide a larger spacing to between the upper and lower electrodes 12 , 13 , allowing the lift mechanism 14 to stop.
  • the first high-frequency power supply 18 is turned off, and the second high-frequency power supply 23 is turned off 0.1 seconds thereafter to cause plasma extinction, thereby terminating the etching.
  • the variable DC voltage source 26 is turned off to release the electrostatic attraction of the wafer W provided by the electrostatic chuck 25 .
  • the wafer W is then taken out of the chamber 11 . No defective devices caused by charging damage were found in this wafer W resulting in a yield of 100%.
  • a wafer W was etched in the same manner as the aforementioned embodiment except that the plasma extinction was provided while the spacing between the upper electrode 12 and the lower electrode 13 was held at the optimum value of 17 mm without lowering the lower electrode 13 .
  • the yield of the devices slightly decreased to 99%.
  • a wafer W was etched in the same manner as the aforementioned embodiment except that the spacing between the upper electrode 12 and the lower electrode 13 was set at the optimum value of 17 mm with the lower electrode 13 being fixed throughout the etching. This resulted in a yield of only 77%.
  • plasma extinction is provided through a step-down sequence in which the first high-frequency power supply 18 is turned off in two stages to prevent particles from adhering to the wafer W when etched.
  • the present invention will be described in accordance with an embodiment incorporating the step-down sequence.
  • the plasma igniting and the plasma processing are carried out in the same manner as in the aforementioned embodiment except that the plasma extinction is carried out through the step-down sequence. That is, by way of example, to provide plasma extinction through the use of the step-down sequence, the spacing between the upper electrode 12 and the lower electrode 13 is increased from the optimum spacing of 17 mm to 25 mm. Then, as shown in FIG. 4 , the first high-frequency power is decreased from 2000W to 200W, and the second high-frequency power is turned off 0.1 seconds thereafter.
  • the flow of the Ar gas in the etchant gas is decreased from 550 sccm to 500 sccm, while the pressure of the chamber 11 is increased from 40 mTorr to 200 mTorr.
  • the wafer W is processed for 21 seconds. Thereafter, the first high-frequency power is completely turned off to provide plasma extinction.
  • the processes following the plasma extinction are the same as those of the aforementioned embodiment.
  • the wafer W processed through the step-down sequence provides a yield of 100% to the devices without any defective devices caused by charging damage.
  • the timings ⁇ circle over ( 1 ) ⁇ to ⁇ circle over ( 4 ) ⁇ shown in FIG. 4 correspond to the timings ⁇ circle over ( 1 ) ⁇ to ⁇ circle over ( 4 ) ⁇ shown in FIG. 3 , respectively.
  • the first high-frequency power was turned off through two stages (2000W ⁇ 200W ⁇ 40W) in accordance with the step-down sequence to provide plasma extinction while the spacing between the upper electrode 12 and the lower electrode 13 was being held at the optimum value of 17 mm without increasing the spacing at the time of plasma extinction.
  • defective devices due to charging damage were found, causing a decrease in their yield down to 44%.
  • the lower electrode 13 is lowered, during the plasma igniting (the time from point A to point B in FIG. 3 ) and the plasma extinction (the time from point C to point D in FIG. 3 ), thereby causing the spacing between the upper electrode 12 and the lower electrode 13 to become larger than the optimum distance therebetween provided during the plasma processing (the time from point B to point C in FIG. 3 ).
  • This makes it possible to reduce the amount of charges deposited on the wafer W during the plasma igniting and the plasma extinction, thereby preventing charging damage to the wafer W.
  • the first high-frequency power is turned off after the second high-frequency power is turned off. This ensures particularly that the plasma extinction is carried out smoothly to reduce charges to be deposited on the wafer W and particles are prevented from adhering to the wafer W.
  • the present invention is not limited thereto.
  • the method of the present invention can also employs a plasma processing apparatus for applying high-frequency power to one of the upper and lower electrodes to generate plasma or a plasma processing apparatus of an ECR (with a magnetic field) type.
  • the plasma processing method of the present invention can also employ a plasma processing apparatus including other plasma generating means.
  • the plasma processing method of the present invention can be applied to plasma processing other than etching, such as CVD.
  • the present invention is intended to reduce the amount of charges deposited on an object to be processed at least during plasma extinction when a plasma processing apparatus employing plasma generating means to provide plasma igniting is used for plasma processing of the object to be processed.
  • a plasma processing apparatus and a method for plasma processing which can prevent charging damage to objects to be processed by reducing the amount of charges deposited thereon during plasma processing and preventing an imbalance between the amounts of positive and negative charges on the surface thereof.

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  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Plasma & Fusion (AREA)
  • Chemical & Material Sciences (AREA)
  • Analytical Chemistry (AREA)
  • Drying Of Semiconductors (AREA)
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Cited By (9)

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US20060054090A1 (en) * 2004-09-15 2006-03-16 Applied Materials, Inc. PECVD susceptor support construction
US20070048882A1 (en) * 2000-03-17 2007-03-01 Applied Materials, Inc. Method to reduce plasma-induced charging damage
US20080057738A1 (en) * 2006-08-31 2008-03-06 Dongbu Hitek Co., Ltd. Atomic layer deposition apparatus and method for manufacturing semiconductor device using the same
US20090215274A1 (en) * 2008-02-26 2009-08-27 Tokyo Electron Limited Plasma processing apparatus and plasma processing method
CN102592986A (zh) * 2012-03-09 2012-07-18 上海集成电路研发中心有限公司 通孔形成方法
US20180003338A1 (en) * 2015-03-20 2018-01-04 4th DIMENSION DEVELOPMENTS PTY LTD Device for holding and supporting articles
US20190287770A1 (en) * 2018-03-16 2019-09-19 Hitachi High-Technologies Corporation Plasma processing apparatus
US11037762B2 (en) * 2009-03-30 2021-06-15 Tokyo Electron Limited Plasma processing apparatus
US11107694B2 (en) * 2016-01-04 2021-08-31 Hitachi High-Tech Corporation Method for releasing sample and plasma processing apparatus using same

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CN101560652B (zh) * 2008-04-18 2011-04-27 群康科技(深圳)有限公司 等离子辅助化学气相沉积装置
KR20230055254A (ko) * 2021-10-18 2023-04-25 삼성전자주식회사 플라즈마 식각 장치 및 이의 동작 방법

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US20070048882A1 (en) * 2000-03-17 2007-03-01 Applied Materials, Inc. Method to reduce plasma-induced charging damage
US20060054090A1 (en) * 2004-09-15 2006-03-16 Applied Materials, Inc. PECVD susceptor support construction
US20080057738A1 (en) * 2006-08-31 2008-03-06 Dongbu Hitek Co., Ltd. Atomic layer deposition apparatus and method for manufacturing semiconductor device using the same
US20090215274A1 (en) * 2008-02-26 2009-08-27 Tokyo Electron Limited Plasma processing apparatus and plasma processing method
US11037762B2 (en) * 2009-03-30 2021-06-15 Tokyo Electron Limited Plasma processing apparatus
CN102592986A (zh) * 2012-03-09 2012-07-18 上海集成电路研发中心有限公司 通孔形成方法
US20180003338A1 (en) * 2015-03-20 2018-01-04 4th DIMENSION DEVELOPMENTS PTY LTD Device for holding and supporting articles
US11107694B2 (en) * 2016-01-04 2021-08-31 Hitachi High-Tech Corporation Method for releasing sample and plasma processing apparatus using same
US11664233B2 (en) 2016-01-04 2023-05-30 Hitachi High-Tech Corporation Method for releasing sample and plasma processing apparatus using same
US20190287770A1 (en) * 2018-03-16 2019-09-19 Hitachi High-Technologies Corporation Plasma processing apparatus

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JP4336124B2 (ja) 2009-09-30
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CN1531012B (zh) 2010-09-01
JP2004273797A (ja) 2004-09-30

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