US20040040491A1 - Silicon single crystal wafer for particle monitor - Google Patents

Silicon single crystal wafer for particle monitor Download PDF

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Publication number
US20040040491A1
US20040040491A1 US10/601,576 US60157603A US2004040491A1 US 20040040491 A1 US20040040491 A1 US 20040040491A1 US 60157603 A US60157603 A US 60157603A US 2004040491 A1 US2004040491 A1 US 2004040491A1
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United States
Prior art keywords
wafer
single crystal
silicon single
particles
particle monitor
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Abandoned
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US10/601,576
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English (en)
Inventor
Hiroki Murakami
Masahiko Okui
Hiroshi Asano
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Sumco Corp
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Sumitomo Mitsubishi Silicon Corp
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Assigned to SUMITOMO MITSUBISHI SILICON CORPORATION reassignment SUMITOMO MITSUBISHI SILICON CORPORATION ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: ASANO, HIROSHI, OKUI, MASAHIKO, MURAKAMI, HIROKI
Publication of US20040040491A1 publication Critical patent/US20040040491A1/en
Priority to US12/153,726 priority Critical patent/US7837791B2/en
Abandoned legal-status Critical Current

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    • C—CHEMISTRY; METALLURGY
    • C30—CRYSTAL GROWTH
    • C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B29/00—Single crystals or homogeneous polycrystalline material with defined structure characterised by the material or by their shape
    • C30B29/02—Elements
    • C30B29/06—Silicon
    • C—CHEMISTRY; METALLURGY
    • C30—CRYSTAL GROWTH
    • C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B15/00—Single-crystal growth by pulling from a melt, e.g. Czochralski method
    • C30B15/20—Controlling or regulating
    • C30B15/203—Controlling or regulating the relationship of pull rate (v) to axial thermal gradient (G)

Definitions

  • the present invention relates to a silicon single crystal wafer for a particle monitor, which is used as a semiconductor material, and more specifically to a silicon single crystal wafer for a particle monitor, which has an extremely small surface density of light point defects (hereinafter referred to as “LPDs”) on the wafer surface, even when it is repeatedly used.
  • LPDs light point defects
  • the Czochralski method (hereinafter referred to as “the CZ method”), the floating-zone method (the FZ method) or the like is employed.
  • the CZ method a method for growing a single crystal with the CZ method is most frequently employed.
  • FIG. 2 is a schematic sectional view of a conventional apparatus for producing a silicon single crystal with the CZ method. A method for growing a single crystal by utilizing the single crystal producing apparatus shown in FIG. 2 will be described as follows:
  • a polycrystalline silicon material is put in a quartz crucible 3 which is mounted in a graphite crucible 4 surrounded by a thermal insulator 6 , and then the silicon material is heated by a heater 5 to form a molten silicon material in the quartz crucible. Thereafter, a seed (seed crystal) 1 is immersed into the molten silicon material, and the seed is pulled up in the state in which the seed and crucible are rotated. By the pulling a silicon single crystal 2 is grown in a state in which it is surrounded by a thermal shield 7 . In this case, the crucibles 3 and 4 are rotated either in the same direction as that of the single crystal or in the direction opposite thereto.
  • a seed diameter reduction i.e., the process of reducing the diameter of the seed crystal
  • the shoulder part is formed so as to grow the single crystal having a predetermined diameter at the body portion, i.e., the body diameter.
  • the single crystal having a fixed body diameter is grown.
  • a tail portion is formed in the single crystal such that the diameter thereof is reduced. Then, the process of growing the single crystal 2 is finished.
  • Wafers for an integrated circuit device of semiconductor are prepared by slicing the silicon single crystal thus produced.
  • the design rule of 0.13 ⁇ m size (the pattern width is 0.13 ⁇ m) is applied to the current devices, and the quality demands of silicon wafer for producing such a device becomes significantly severe.
  • the speed of growing the single crystal is decreased to confine annular oxidation-induced stacking faults (hereinafter referred to as “annular OSFs”) in the single crystal.
  • annular OSFs annular oxidation-induced stacking faults
  • a method for decreasing the number of particles which may be counted by a particle monitor, together with a decrease in the size of COPs by doping a single crystal with nitrogen during the crystal growth.
  • Japanese Patent Application Laid-open No. 2000-53489 discloses a method for producing a silicon single crystal wafer for a particle monitor, wherein the single crystal is grown with the CZ method by doping a single crystal rod with nitrogen at a nitrogen concentration of 1 ⁇ 10 10 -5 ⁇ 10 15 atoms/cm 3 .
  • LPD density the number of LPDs per unit wafer surface
  • the size of COPs may be decreased, if the time period of the silicon single crystal ingot passing a temperature range from 1150° C. to 1070 ° C. is within 20 min. Furthermore, the generation of BMDs is suppressed, if the time period of the silicon single crystal passing a temperature range from 900° C. to 800 ° C. is within 40 min.
  • the present invention is provided on the basis of the above-mentioned facts (a)-(d), and the gist of the present invention resides in the following silicon single crystal wafers (1) to (4) which are grown with the CZ method:
  • a silicon single crystal wafer for a particle monitor is provided, wherein said wafer is prepared by slicing a silicon single crystal ingot grown by the Czochralski method,
  • said wafer includes an area in which crystal originated particles are generated
  • a surface density of particles having a particle size of not less than 0.12 ⁇ m on the wafer surface is not more than 15 counts/cm 2 , even after repeating the Standard Cleaning-1.
  • a surface density of particles having a particle size of not less than 0.12 ⁇ m on the wafer surface is not more than 1 count/cm 2 , even after repeating the Standard Cleaning-1.
  • a silicon single crystal wafer for a particle monitor is provided, wherein said wafer is prepared by slicing a silicon single crystal ingot grown by the Czochralski method,
  • a surface density of particles having a particle size of not less than 0.12 ⁇ m on the wafer surface is not more than 15 counts/cm 2 , even after repeating the Standard Cleaning-1.
  • a silicon single crystal wafer for a particle monitor is provided, wherein said wafer is prepared by slicing a silicon single crystal ingot grown by the Czochralski method,
  • a surface density of particles having a particle size of not less than 0.12 ⁇ m on the wafer surface is not more than 1 count/cm 2 , even after repeating the Standard Cleaning-1.
  • the term “the number of particles per unit surface area of the wafer” used herein means that the value is determined by dividing the number of particles observed on the wafer surface with a particle counter by the unit surface area of the wafer.
  • FIG. 1 is a schematic sectional view of an apparatus for manufacturing a silicon single crystal in accordance with the invention.
  • FIG. 2 is a schematic sectional view of an apparatus for manufacturing a silicon single crystal in the prior art.
  • FIG. 3 is a diagram showing the relationship between the cleaning period and the density of LPDs after the cleaning, applying the SC-1 cleaning thereto.
  • the nitrogen doping in the invention can be carried out with a conventional method, such as, for instance, the addition of nitride either to an initial material of polycrystalline silicon or to a molten silicon material, the growth of a single crystal under a nitrogen or nitrogen compound gas atmosphere, the spraying of nitrogen or nitrogen compound gas onto a polycrystalline silicon material before melting, or the like.
  • a conventional method such as, for instance, the addition of nitride either to an initial material of polycrystalline silicon or to a molten silicon material, the growth of a single crystal under a nitrogen or nitrogen compound gas atmosphere, the spraying of nitrogen or nitrogen compound gas onto a polycrystalline silicon material before melting, or the like.
  • the silicon single crystal wafer for a particle monitor according to the invention is prepared from a silicon single crystal ingot by slicing an area in which COPs are generated. This is due to the fact that the manufacture of a single crystal including the generated COP areas makes it possible to eliminate annular OSFs at the center of the crystal plane, and therefore the pulling rate can be significantly increased, compared with the manufacture of a single crystal including areas in which COPs are not generated.
  • the ratio V/G of the crystal growth speed V (mm/min) to the temperature gradient G (° C./min) at the center of the crystal in the crystal pulling axis from the melting point of silicon to 1350° C. should be not less than 0.20 (mm 2 /min/° C.).
  • the oxygen concentration in a single crystal wafer is not more than 13 ⁇ 10 17 atoms/cm 3 to suppress the generation of BMDs and therefore to suppress the generation of oxygen precipitates on the wafer surface.
  • a method for regulating the speed of revolution for a crucible, a method for regulating the pressure in the pulling furnace, or the others can be employed to decrease the oxygen concentration in the single crystal.
  • FIG. 1 is a schematic sectional view of an apparatus for producing a silicon single crystal with the CZ method, and the apparatus was used to realize the present invention.
  • the procedure for growing the single crystal using the apparatus shown in FIG. 1 was as follows:
  • a polycrystalline silicon material was put in a quartz crucible 3 , and heated by a heater 5 to produce a molten silicon material in the quartz crucible 3 . Thereafter, a seed 1 was immersed in the molten silicon, and then pulled up so as to grow a silicon single crystal 2 under the conditions that the seed 1 and crucible 3 were both rotated.
  • a rapid cooling system 8 was disposed in the inside of a thermal shield 7 in such a way that the silicon single crystal thus pulled was partially cooled in a compulsive manner.
  • a cooling medium was circulated therein so as to provide a predetermined temperature distribution for the silicon single crystal in the axial direction.
  • the rapid cooling system 8 was equipped with a function for controlling the time duration of passing a specified area in the temperature distribution.
  • a high purity polycrystalline silicon having a weight of 140 kg was put in the crucible 3 shown in FIG. 1, and further boron (B) for a p type dopant was added thereto so as to obtain a single crystal having an electrical resistance of 10 ⁇ cm.
  • the inside of the apparatus was maintained under an argon reduced pressure atmosphere (argon partial pressure: not more than 1.33 ⁇ 10 4 Pa), and the silicon material was molten by the heater 5 .
  • a seed crystal 1 mounted to a seed chuck was immersed into the molten silicon material, and the seed 1 was pulled up in the state in which the crucible 3 and the pulling axis were both rotated.
  • the crystal orientation ⁇ 100> was selected and, in order to obtain a dislocation free single crystal, the diameter of the crystal at the seed was reduced to form a shoulder portion. Subsequently, the shape of the shoulder was altered so as to obtain a single crystal having a target body diameter.
  • the pulling rate in the crystal growth was adjusted to be 1.3 mm/min at a body length of 100 mm, and finally an 8-inch diameter single crystal having a body length of 1700 mm was produced.
  • the temperature gradient in the axial direction of the single crystal center was 5.5° C./min during a temperature-decreasing phase from the melting point to 1350° C. in the pulling state.
  • the time period for passing the temperature range from 1150° C. to 1070° C. was 13 min and the time period for passing the temperature range from 900° C. to 800° C. was 28 min.
  • the growth of a single crystal doped with nitrogen was carried out under the same pulling conditions.
  • the doping of nitrogen in the single crystal was carried out by doping the molten silicon material with nitrogen such that the nitrogen concentration at the top of the body of the single crystals became 1 ⁇ 10 14 atoms/cm 3 .
  • wafer samples were prepared by slicing each of the wafers at three axial positions of 300 mm, 500 mm and 1000 mm in the body of the single crystals and by performing predetermined wafer finishing processes, such as chamfering, lapping, etching, mirror grinding and others.
  • test samples 1-1, 1-2 and 1-3 were prepared and from the wafers with nitrogen doping test samples 1-4, 1-5 and 1-6 were prepared.
  • the oxygen concentration in these wafer samples was not more than 13 ⁇ 10 17 atoms/cm 3 (old ASTM).
  • the surface density of LPDs having a particle diameter of not smaller than 0.12 ⁇ m is not more than 0.05 counts/cm 2 for all of the wafer samples 1-1 to 1-6 independent of the amount of nitrogen contained in the single crystal. It is also found that the surface density of LPDs having a particle diameter of not smaller than 0.12 ⁇ m is not more than 1 count/cm 2 for all of the wafer samples 1-1 to 1-6 when the cleaning is three times carried out (the total cleaning time: 30 min).
  • the surface density of LPDs having a particle diameter of not less than 0.12 ⁇ m is 10 counts/cm 2 or so for wafer samples 1-1 to 1-3, which are prepared from the single crystal containing no nitrogen.
  • these wafer samples can be effectively used as a wafer for a particle monitor, which has such an excellent quality as in a surface density of not more than 15 counts/cm 2 .
  • the surface density of LPDs having a particle diameter of not more than 0.12 ⁇ m is not more than 1 count/cm 2 for the wafer samples 1-4 to 1-6, which are prepared from the single crystal containing nitrogen. It can be stated, therefore, that these wafer samples can be used as a wafer for a particle monitor, which has much more excellent quality.
  • each wafer sample was subjected to a heat treatment for precipitation evaluation under an oxygen atmosphere for one hour at 800° C. and for 16 hours at 1000° C. Thereafter, the wafer sample was cleaved along a surface perpendicular to the wafer surface, and the surface thus cleaved was etched by immersing the wafer into a wright etchant (a mixed solution of HF+HNO 3 +CrO 3 +Cu(NO 3 ) 2 +H 2 O+CH 3 COOH) for 3 min, and then, using an optical microsope, BMDs on the cleavage surface were observed at a magnification of ⁇ 40 to determine the number of BMDs per unit surface area (hereinafter referred to as “the BMD density”).
  • a wright etchant a mixed solution of HF+HNO 3 +CrO 3 +Cu(NO 3 ) 2 +H 2 O+CH 3 COOH
  • test numbers 2-1 to 2-4 pertain to the comparative example, where either the time period of passing the temperature range from 1150° C. to 1070° C. or the time period of passing the temperature range from 900° C. to 800° C. resides outside the range defined by the present invention, whereas specimens of test numbers 2-5 to 2-7 pertain to the inventive example, where the above-mentioned two time periods reside in the range defined by the present invention.
  • test numbers 2-1 to 2-4 in the comparative example exhibit LPD densities of more than 15 counts/cm 2 after cleaning with the SC-1 cleaning solution for 60 min.
  • the specimens of test numbers 2-5 to 2-7 in the inventive example exhibit LPD densities of not more than 15 counts/cm 2 and a small BMD density in the inside of the wafer. It can be stated, therefore, that these specimens are used as a wafer for a particle monitor.
  • the initial surface density of LPDs observed on the wafer surface is extremely small, and further the surface density of LPDs may still be maintained sufficiently small even after repeating the SC-1 cleanings.
  • a high quality wafer for a particle monitor can be produced and can be applied to the manufacture of a wafer having a reduced amount of defects, which wafer is suitable for manufacturing devices.

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  • Chemical & Material Sciences (AREA)
  • Engineering & Computer Science (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Materials Engineering (AREA)
  • Metallurgy (AREA)
  • Organic Chemistry (AREA)
  • Crystals, And After-Treatments Of Crystals (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)
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Cited By (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20040063298A1 (en) * 1999-10-14 2004-04-01 Shin-Etsu Handotai Co., Ltd. Method for producing SOI wafer and SOI wafer
US20060005761A1 (en) * 2004-06-07 2006-01-12 Memc Electronic Materials, Inc. Method and apparatus for growing silicon crystal by controlling melt-solid interface shape as a function of axial length
US20060172508A1 (en) * 2005-01-31 2006-08-03 Christophe Maleville Process for transfer of a thin layer formed in a substrate with vacancy clusters
US20060254499A1 (en) * 2005-05-10 2006-11-16 Jun Furukawa Method For Manufacturing Nitrogen-Doped Silicon Single Crystal
WO2006137174A1 (ja) 2005-06-20 2006-12-28 Sumco Corporation シリコン単結晶の育成方法及びその方法により育成されたシリコン単結晶
US20070227442A1 (en) * 2004-12-30 2007-10-04 Memc Electronic Materials, Inc. Controlling melt-solid interface shape of a growing silicon crystal using a variable magnetic field
US20080113510A1 (en) * 2005-02-11 2008-05-15 Shin-Etsu Handotai Co., Ltd. Semiconductor Wafer Fabricating Method and Semiconductor Wafer Mirror Edge Polishing Method
CN102102219A (zh) * 2011-03-16 2011-06-22 常州天合光能有限公司 一种可提高单晶炉生长速度的冷却装置
US20160293712A1 (en) * 2015-03-30 2016-10-06 Infineon Technologies Ag Semiconductor wafer and manufacturing method
US9738988B2 (en) 2011-11-01 2017-08-22 Shin-Etsu Handotai Co., Ltd. Method for manufacturing single crystal using a graphite component having 30 ppb or less nickel

Families Citing this family (3)

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Publication number Priority date Publication date Assignee Title
JP4442446B2 (ja) 2005-01-27 2010-03-31 信越半導体株式会社 選択エッチング方法
US8907494B2 (en) 2013-03-14 2014-12-09 International Business Machines Corporation Electrical leakage reduction in stacked integrated circuits having through-silicon-via (TSV) structures
US11987900B2 (en) * 2020-11-11 2024-05-21 Globalwafers Co., Ltd. Methods for forming a silicon substrate with reduced grown-in nuclei for epitaxial defects and methods for forming an epitaxial wafer

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US6120598A (en) * 1997-10-17 2000-09-19 Shin-Etsu Handotai Co., Ltd. Method for producing a silicon single crystal having few crystal defects, and a silicon single crystal and silicon wafers produced by the method
US6139625A (en) * 1998-03-09 2000-10-31 Shin-Etsu Handotai Co., Ltd. Method for producing a silicon single crystal wafer and a silicon single crystal wafer
US6413310B1 (en) * 1998-08-31 2002-07-02 Shin-Etsu Handotai Co., Ltd. Method for producing silicon single crystal wafer and silicon single crystal wafer

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JP3621290B2 (ja) 1998-06-02 2005-02-16 信越半導体株式会社 パーティクルモニター用シリコン単結晶ウエーハの製造方法およびパーティクルモニター用シリコン単結晶ウエーハ
US6284384B1 (en) * 1998-12-09 2001-09-04 Memc Electronic Materials, Inc. Epitaxial silicon wafer with intrinsic gettering
JP2001278692A (ja) * 2000-03-29 2001-10-10 Shin Etsu Handotai Co Ltd シリコンウエーハおよびシリコン単結晶の製造方法
WO2002059400A2 (en) * 2001-01-26 2002-08-01 Memc Electronic Materials, Inc. Low defect density silicon substantially free of oxidation induced stacking faults having a vacancy-dominated core

Patent Citations (4)

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US5931662A (en) * 1996-06-28 1999-08-03 Sumitomo Sitix Corporation Silicon single crystal wafer annealing method and equipment and silicon single crystal wafer and manufacturing method related thereto
US6120598A (en) * 1997-10-17 2000-09-19 Shin-Etsu Handotai Co., Ltd. Method for producing a silicon single crystal having few crystal defects, and a silicon single crystal and silicon wafers produced by the method
US6139625A (en) * 1998-03-09 2000-10-31 Shin-Etsu Handotai Co., Ltd. Method for producing a silicon single crystal wafer and a silicon single crystal wafer
US6413310B1 (en) * 1998-08-31 2002-07-02 Shin-Etsu Handotai Co., Ltd. Method for producing silicon single crystal wafer and silicon single crystal wafer

Cited By (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7176102B2 (en) 1999-10-14 2007-02-13 Shin-Etsu Handotai Co., Ltd. Method for producing SOI wafer and SOI wafer
US20050042840A1 (en) * 1999-10-14 2005-02-24 Shin-Etsu Handotai Co., Ltd. Method for producing SOI wafer and SOI wafer
US20040063298A1 (en) * 1999-10-14 2004-04-01 Shin-Etsu Handotai Co., Ltd. Method for producing SOI wafer and SOI wafer
US20060005761A1 (en) * 2004-06-07 2006-01-12 Memc Electronic Materials, Inc. Method and apparatus for growing silicon crystal by controlling melt-solid interface shape as a function of axial length
US7611580B2 (en) 2004-12-30 2009-11-03 Memc Electronic Materials, Inc. Controlling melt-solid interface shape of a growing silicon crystal using a variable magnetic field
US20070227442A1 (en) * 2004-12-30 2007-10-04 Memc Electronic Materials, Inc. Controlling melt-solid interface shape of a growing silicon crystal using a variable magnetic field
FR2881573A1 (fr) * 2005-01-31 2006-08-04 Soitec Silicon On Insulator Procede de transfert d'une couche mince formee dans un substrat presentant des amas de lacunes
US7285471B2 (en) 2005-01-31 2007-10-23 S.O.I.Tec Silicon On Insulator Technologies Process for transfer of a thin layer formed in a substrate with vacancy clusters
US20060172508A1 (en) * 2005-01-31 2006-08-03 Christophe Maleville Process for transfer of a thin layer formed in a substrate with vacancy clusters
US20080113510A1 (en) * 2005-02-11 2008-05-15 Shin-Etsu Handotai Co., Ltd. Semiconductor Wafer Fabricating Method and Semiconductor Wafer Mirror Edge Polishing Method
US20060254499A1 (en) * 2005-05-10 2006-11-16 Jun Furukawa Method For Manufacturing Nitrogen-Doped Silicon Single Crystal
WO2006137174A1 (ja) 2005-06-20 2006-12-28 Sumco Corporation シリコン単結晶の育成方法及びその方法により育成されたシリコン単結晶
EP1895026A1 (en) * 2005-06-20 2008-03-05 SUMCO Corporation Method of growing silicon single crystal and silicon single crystal grown by the method
EP1895026A4 (en) * 2005-06-20 2009-06-24 Sumco Corp METHOD FOR PULLING A SILICON CRYSTAL AND THEN RENEWED SILICON INGREDIENT
CN102102219A (zh) * 2011-03-16 2011-06-22 常州天合光能有限公司 一种可提高单晶炉生长速度的冷却装置
US9738988B2 (en) 2011-11-01 2017-08-22 Shin-Etsu Handotai Co., Ltd. Method for manufacturing single crystal using a graphite component having 30 ppb or less nickel
US20160293712A1 (en) * 2015-03-30 2016-10-06 Infineon Technologies Ag Semiconductor wafer and manufacturing method
US10026816B2 (en) * 2015-03-30 2018-07-17 Infineon Technologies Ag Semiconductor wafer and manufacturing method

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US7837791B2 (en) 2010-11-23
JP4192530B2 (ja) 2008-12-10
JP2004083346A (ja) 2004-03-18
US20080236476A1 (en) 2008-10-02

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STCB Information on status: application discontinuation

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