US10754407B2 - Image forming apparatus and program - Google Patents

Image forming apparatus and program Download PDF

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US10754407B2
US10754407B2 US16/192,644 US201816192644A US10754407B2 US 10754407 B2 US10754407 B2 US 10754407B2 US 201816192644 A US201816192644 A US 201816192644A US 10754407 B2 US10754407 B2 US 10754407B2
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cores
cpus
executed
post
forming apparatus
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US20190155356A1 (en
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Munetoshi Eguchi
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Konica Minolta Inc
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Konica Minolta Inc
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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/12Digital output to print unit, e.g. line printer, chain printer
    • G06F3/1201Dedicated interfaces to print systems
    • G06F3/1202Dedicated interfaces to print systems specifically adapted to achieve a particular effect
    • G06F3/1211Improving printing performance
    • G06F3/1212Improving printing performance achieving reduced delay between job submission and print start
    • G06F3/1213Improving printing performance achieving reduced delay between job submission and print start at an intermediate node or at the final node
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26Power supply means, e.g. regulation thereof
    • G06F1/32Means for saving power
    • G06F1/3203Power management, i.e. event-based initiation of a power-saving mode
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/12Digital output to print unit, e.g. line printer, chain printer
    • G06F3/1201Dedicated interfaces to print systems
    • G06F3/1202Dedicated interfaces to print systems specifically adapted to achieve a particular effect
    • G06F3/1211Improving printing performance
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/12Digital output to print unit, e.g. line printer, chain printer
    • G06F3/1201Dedicated interfaces to print systems
    • G06F3/1202Dedicated interfaces to print systems specifically adapted to achieve a particular effect
    • G06F3/1218Reducing or saving of used resources, e.g. avoiding waste of consumables or improving usage of hardware resources
    • G06F3/1221Reducing or saving of used resources, e.g. avoiding waste of consumables or improving usage of hardware resources with regard to power consumption
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/12Digital output to print unit, e.g. line printer, chain printer
    • G06F3/1201Dedicated interfaces to print systems
    • G06F3/1223Dedicated interfaces to print systems specifically adapted to use a particular technique
    • G06F3/1229Printer resources management or printer maintenance, e.g. device status, power levels
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/12Digital output to print unit, e.g. line printer, chain printer
    • G06F3/1201Dedicated interfaces to print systems
    • G06F3/1223Dedicated interfaces to print systems specifically adapted to use a particular technique
    • G06F3/1237Print job management
    • G06F3/1244Job translation or job parsing, e.g. page banding
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N1/00Scanning, transmission or reproduction of documents or the like, e.g. facsimile transmission; Details thereof
    • H04N1/00885Power supply means, e.g. arrangements for the control of power supply to the apparatus or components thereof
    • H04N1/00904Arrangements for supplying power to different circuits or for supplying power at different levels
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N1/00Scanning, transmission or reproduction of documents or the like, e.g. facsimile transmission; Details thereof
    • H04N1/21Intermediate information storage
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N1/00Scanning, transmission or reproduction of documents or the like, e.g. facsimile transmission; Details thereof
    • H04N1/32Circuits or arrangements for control or supervision between transmitter and receiver or between image input and image output device, e.g. between a still-image camera and its memory or between a still-image camera and a printer device
    • H04N1/32358Circuits or arrangements for control or supervision between transmitter and receiver or between image input and image output device, e.g. between a still-image camera and its memory or between a still-image camera and a printer device using picture signal storage, e.g. at transmitter
    • H04N1/32459Circuits or arrangements for control or supervision between transmitter and receiver or between image input and image output device, e.g. between a still-image camera and its memory or between a still-image camera and a printer device using picture signal storage, e.g. at transmitter for changing the arrangement of the stored data
    • H04N1/32475Changing the format of the data, e.g. parallel to serial or vice versa
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02DCLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00Energy efficient computing, e.g. low power processors, power management or thermal management

Definitions

  • the present disclosure relates to an image forming apparatus and a program.
  • a plurality of cores is adopted as a central processing unit (CPU) mounted in an image forming apparatus such as a multi-function peripheral (MFP), instead of one whose number of cores is one, and processes are executed using the plurality of cores.
  • a technology that activates all the cores at an upper limit action frequency such that the upper limit action frequency of a low priority core is reduced when an abnormal temperature is detected.
  • JP 2017-046084 A there has been proposed a technology that allots software processes to cores according to the load of each job action such that supply of power to an unnecessary core is stopped.
  • JP 2012-111210 A there has been proposed a technology that shortens a raster image processor (RIP) process by performing division on a band basis and parallelizing a rendering process while advancing language analysis.
  • RIP raster image processor
  • the present disclosure has been made in view of such situations and it is intended to achieve a shortened overall processing time.
  • FIG. 1 is a block diagram illustrating a configuration example of an image forming apparatus according to an embodiment of the present disclosure
  • FIG. 2 is a block diagram illustrating an example of a CPU and another CPU in a case where the number of cores is four, according to the embodiment of the present disclosure
  • FIG. 3 is a diagram illustrating an example of uniformly supplying electric power to each core, according to the embodiment of the present disclosure
  • FIG. 4 is a diagram illustrating an example of supplying electric power to a part of cores among multiple cores, while stopping the supply of electric power to another part of cores, according to the embodiment of the present disclosure
  • FIG. 5 is a diagram for explaining an outline of a RIP process according to the embodiment of the present disclosure.
  • FIG. 6 is a diagram illustrating an example of load apportionment to cores in a first process using all cores, according to the embodiment of the present disclosure
  • FIG. 7 is a diagram illustrating an example of load apportionment to cores in a second process in which an upper limit action frequency of a specific core is raised, according to the embodiment of the present disclosure
  • FIG. 8 is a diagram illustrating an example of a load that varies between a pre-process and a post-process depending on documents, according to the embodiment of the present disclosure
  • FIG. 9 is a diagram illustrating an example of execution times required for each of the first process and the second process depending on documents, according to the embodiment of the present disclosure.
  • FIG. 10 is a diagram illustrating an example of the execution time required for the first process for a document of which the load of language analysis, which is a pre-process, is light and the load of rasterization, which is a post-process, is heavy, according to the embodiment of the present disclosure;
  • FIG. 11 is a diagram illustrating an example of the execution time required for the second process for a document of which the load of language analysis, which is a pre-process, is light and the load of rasterization, which is a post-process, is heavy, according to the embodiment of the present disclosure;
  • FIG. 12 is a diagram illustrating an example of the execution time required for the first process for a document of which the load of language analysis, which is a pre-process, is heavy and the load of rasterization, which is a post-process, is light, according to the embodiment of the present disclosure;
  • FIG. 13 is a diagram illustrating an example of the execution time required for the second process for a document of which the load of language analysis, which is a pre-process, is heavy and the load of rasterization, which is a post-process, is light, according to the embodiment of the present disclosure.
  • FIG. 14 is a flowchart for explaining a control example according to the embodiment of the present disclosure.
  • FIG. 1 is a block diagram illustrating a configuration example of an image forming apparatus 1 according to an embodiment of the present disclosure.
  • the image forming apparatus 1 is a combined machine such as an MFP or a printer and, as illustrated in FIG. 1 , includes a CPU 31 , a read only memory (ROM) 32 , a random access memory (RAM) 33 , an input/output buffer 12 , a memory 13 , a network interface (I/F) 14 , an input/output (I/O) controller 15 , a memory controller 16 , a CPU core manager 17 , a scanner 21 , a facsimile (FAX) controller 22 , an image converter 23 , an image former 24 , and an operation display 25 .
  • ROM read only memory
  • RAM random access memory
  • I/F network interface
  • I/O input/output
  • a memory controller 16 a CPU core manager 17
  • scanner 21 a facsimile (FAX) controller 22
  • FAX facsimile
  • the CPU 31 , the ROM 32 , and the RAM 33 constitute a processor 11 .
  • the CPU 31 is a data processing device that performs computation in accordance with a program and includes a plurality of cores.
  • the ROM 32 records a program for controlling the overall action of the image forming apparatus 1 , font data, and the like.
  • the RAM 33 stores data necessary for control by the CPU 31 and data that needs to be temporarily stored at the time of control action.
  • the plurality of cores may be the same type of cores having the same scale, configuration, and processing capability, or may be different types of cores having different scales, configurations, and processing capabilities.
  • the image forming apparatus 1 is provided with the processor 11 including a plurality of the CPUs 31 each including the plurality of cores and processes are executed by the CPUs 31 .
  • the input/output buffer 12 is for temporarily storing data that has been input or data to be output and, for example, stores image data output from the scanner 21 or FAX image data transmitted and received using the FAX controller 22 , and the like.
  • the memory 13 is constituted by a semiconductor memory or a hard disk drive and saves therein print data acquired from an external computer device (not illustrated) (page description language (PDL) data described in a page description language such as printer job language (PJL), PostScript (PS), or printer control language (PCL)), portable document format (PDF) data, intermediate data (display list) generated from print data, image data generated from a display list, and the like.
  • PDL page description language
  • PDF portable document format
  • the network I/F 14 is a modem for connecting to a telephone line, a network interface card (NIC) for connecting to a local area communication network such as a local area network (LAN), and the like and enables FAX communication with a FAX device connected via a telephone line or communication with a computer device connected via a local area communication network.
  • NIC network interface card
  • the scanner 21 is a component that optically reads image data from a document placed on a document platen.
  • the scanner 21 is constituted by a light source that scans the document, an image sensor such as a charge coupled device (CCD) that converts light reflected from the document into an electrical signal, an analog-to-digital (A/D) converter that A/D-converts the electrical signal, and the like and outputs image data read from the document to the input/output buffer 12 or the image converter 23 .
  • CCD charge coupled device
  • A/D analog-to-digital converter
  • the FAX controller 22 controls the network I/F 14 to execute a number display response, a normal reception process, transmission and reception of FAX image data, and the like and outputs the received FAX image data to the input/output buffer 12 , the image converter 23 , or the image former 24 .
  • the image converter 23 performs an image process such as an edge emphasis process, a smoothing process, or a color conversion process on the image data of the document read by the scanner 21 or the FAX image data received by the FAX controller 22 .
  • the image converter 23 rasterizes each page included in the print data to generate image data of every page and performs the image process as described above on the generated image data.
  • the image converter 23 outputs the image data after the image process to the image former 24 .
  • the image former 24 performs a printing process on a sheet based on the image data on which the image process has been performed by the image converter 23 .
  • an electrostatic latent image is formed by irradiating a photosensitive drum charged by a charging device with light according to image data from an exposure device; a toner image generated by development after attaching toner charged by a developing device is primarily transferred to a transfer belt, secondarily transferred from the transfer belt to a sheet, and additionally the toner image on the sheet is fixed by a fixing device.
  • the operation display 25 is constituted by a touch panel in which an operation member such as a touch sensor made up of lattice-shaped transparent electrodes is arranged on a display member such as a liquid crystal display (LCD), a hard key, and the like.
  • the operation display 25 presents an operation screen for the image forming apparatus 1 , accepts an operation from a user, and outputs a signal according to the operation to the processor 11 .
  • the I/O controller 15 controls transmission and reception of various types of signals between the processor 11 and the scanner 21 , the FAX controller 22 , the image converter 23 , the image former 24 , and the operation display 25 .
  • the memory controller 16 controls transmission and reception of various types of signals between the processor 11 and the memory 13 .
  • the CPU core manager 17 manages the plurality of cores and decides the allocation to cores according to a process to be executed.
  • the CPU core manager 17 may be configured as hardware or may be configured as a program that causes the processor 11 to function as the CPU core manager 17 such that this program is executed by at least a part of cores included in at least a part of the CPUs 31 among the plurality of CPUs 31 .
  • FIG. 2 is a block diagram illustrating an example of a CPU 31 _ 1 and a CPU 31 _ 2 in a case where the number of cores is four, according to the embodiment of the present disclosure.
  • two CPUs 31 are mounted in one processor 11 as the CPU 31 _ 1 and the CPU 31 _ 2 and a plurality of cores is mounted in each CPU 31 as indicated as a core ( 1 ), a core ( 2 ), a core ( 3 ), and a core ( 4 ).
  • the CPU 31 _ 1 and the CPU 31 _ 2 access a use area 131 and a use area 132 included in the memory 13 via the memory controller 16 , but illustration of the memory controller 16 is omitted in FIG. 2 .
  • FIG. 3 is a diagram illustrating an example of uniformly supplying electric power to each core, according to the embodiment of the present disclosure.
  • electric power is supplied from a power supplier 41 to the cores ( 1 ) to ( 4 ) via switches 42 _ 1 to 42 _ 4 .
  • each of the cores ( 1 ) to ( 4 ) is activated at an upper limit action frequency of 2 GHz and none is activated at an upper limit action frequency exceeding 2 GHz.
  • the switches 42 _ 1 to 42 _ 4 are collectively referred to as switches 42 .
  • FIG. 4 is a diagram illustrating an example of supplying electric power to a part of cores among multiple cores, while stopping the supply of electric power to another part of cores, according to the embodiment of the present disclosure.
  • the switch 42 _ 1 since the switch 42 _ 1 is in an ON state, electric power is supplied from the power supplier 41 to the core ( 1 ).
  • the switches 42 _ 2 to 42 _ 4 are in an OFF state, the supply of electric power from the power supplier 41 to the cores ( 2 ) to ( 4 ) is stopped. In this case, only the core ( 1 ) is activated at an upper limit action frequency of 4 GHz. In other words, in response to stopping the supply of electric power to the cores ( 2 ) to ( 4 ), the upper limit action frequency of the core ( 1 ) alone is raised.
  • FIG. 5 is a diagram for explaining an outline of a RIP process according to the embodiment of the present disclosure.
  • the RIP process is separated into a pre-process for performing language analysis and a post-process for performing a rasterizing process. Since the language analysis is sequential processing, parallel processing cannot be performed and the execution time depends on the action frequency. Since parallel processing can be performed for rasterization and use of a plurality of cores can further shorten the execution time, the execution time depends on the number of cores to which the process is allocated.
  • the respective loads of language analysis and rasterization are not constant but depend on documents. Therefore, there are cases where the load of language analysis is heavy and cases where the load of rasterization is heavy.
  • FIG. 6 is a diagram illustrating an example of load apportionment to cores in a first process using all cores, according to the embodiment of the present disclosure.
  • the first process all the cores are allocated.
  • the core ( 1 ) of the CPU 31 _ 1 is allocated to language analysis and all the remaining cores are allocated to rasterization.
  • FIG. 7 is a diagram illustrating an example of load apportionment to cores in a second process in which the upper limit action frequency of a specific core is raised, according to the embodiment of the present disclosure.
  • the second process allocates the load to cores so as to raise the upper limit action frequency only for a specific core in order to speed up the process of language analysis.
  • the pre-process is language analysis, which analyzes input data in a page description language format to generate intermediate data in an intermediate language format.
  • image processes including the rasterizing process is performed on the intermediate data in the intermediate language format generated by the pre-process to generate print data in a bitmap format and page assignment is performed on the generated print data in the bitmap format to generate printing data therefrom.
  • the CPU core manager 17 causes either one of the first process or the second process to be executed.
  • the CPU core manager 17 allocates the pre-process in which sequential processing is performed to a part of cores among the plurality of cores and allocates the post-process in which parallel processing can be performed to another part of cores.
  • the CPU core manager 17 allocates the pre-process to a part of cores among the plurality of cores while causing electric power to be supplied thereto and causes the supply of electric power to another part of cores to be stopped.
  • the CPU core manager 17 allocates the post-process to at least a part of the plurality of cores while causing electric power to be uniformly supplied to the plurality of cores.
  • FIG. 8 is a diagram illustrating an example of a load that varies between the pre-process and the post-process depending on documents, according to the embodiment of the present disclosure.
  • a document ( 1 ) has a light pre-process load and a heavy post-process load. For example, what is drawn in a raster format is assumed as such a document.
  • a document ( 2 ) has a heavy pre-process load and a light post-process load. For example, what is drawn in a vector format is assumed as such a document.
  • FIG. 9 is a diagram illustrating an example of execution times required for each of the first process and the second process depending on documents, according to the embodiment of the present disclosure.
  • FIG. 10 is a diagram illustrating an example of the execution time required for the first process for a document of which the load of language analysis, which is a pre-process, is light and the load of rasterization, which is a post-process, is heavy, according to the embodiment of the present disclosure.
  • a plurality of cores is allocated to the post-process.
  • FIG. 11 is a diagram illustrating an example of the execution time required for the second process for a document of which the load of language analysis, which is a pre-process, is light and the load of rasterization, which is a post-process, is heavy, according to the embodiment of the present disclosure.
  • the upper limit action frequency of the core ( 1 ) is raised, it does not contribute to shortening the execution time of the RIP process as a whole because the load of the pre-process is light.
  • FIG. 11 although the upper limit action frequency of the core ( 1 ) is raised, it does not contribute to shortening the execution time of the RIP process as a whole because the load of the pre-process is light.
  • FIG. 12 is a diagram illustrating an example of the execution time required for the first process for a document of which the load of language analysis, which is a pre-process, is heavy and the load of rasterization, which is a post-process, is light, according to the embodiment of the present disclosure.
  • the load is allocated to all the cores, it does not contribute to shortening the execution time of the RIP process as a whole because the load of the language analysis, which is a pre-process, is heavy.
  • FIG. 13 is a diagram illustrating an example of the execution time required for the second process for a document of which the load of language analysis, Which is a pre-process, is heavy and the load of rasterization, which is a post-process, is light, according to the embodiment of the present disclosure.
  • the upper limit action frequency of the core ( 1 ) is raised. This contributes to shortening the execution time of the pre-process because the load of pre-process is heavy and as a result, the post-process can be started earlier. Therefore, it contributes to shortening the execution time of the RIP process as a whole.
  • the CPU core manager 17 increases the number of cores to which the load is allocated if parallelism is inherent in the process and, if the parallelism is not inherent in the process or the process has a large amount of sequential processing, causes the supply of electric power to at least a part of the cores to be stopped so as to raise the upper limit action frequency.
  • the hardware resource can be optimally allocated according to the logical characteristics of the input data, such that the overall processing time can be shortened.
  • the CPU core manager 17 causes either one of the first process or the second process to be executed based on the file type or attribute.
  • the file type or attribute is the raster format.
  • the raster format is utilized in drawing, color and density information is recorded for each pixel and accordingly, the load of computation is light but rasterization requires a substantial load. Therefore, the first process that allocates the load to all the cores is preferable.
  • the file type or attribute is the vector format. When the vector format is utilized in drawing, an image is stored by mathematical expressions and accordingly, computation, that is, language analysis likely to require a substantial load. Therefore, the second process in which the upper limit action frequency liar the pre-process is raised is preferable.
  • FIG. 14 is a flowchart for explaining a control example according to the embodiment of the present disclosure. Note that processes from step S 12 to step S 14 correspond to the first process. Meanwhile, processes from step S 16 to step S 18 correspond to the second process.
  • step S 11 the CPU core manager 17 determines whether to cause the first process to be executed. When determining to cause the first process to be executed (step S 11 ; Y), the CPU core manager 17 shifts to a process in step S 12 . When determining not to cause the first process to be executed (step S 11 ; N), the CPU core manager 17 shifts to a process in step S 15 . In step S 12 , the CPU core manager 17 allocates the pre-process to a part of the cores of a part of the CPUs 31 .
  • step S 13 the CPU core manager 17 allocates the post-process to another part of the cores of the part of the CPUs 31 .
  • step S 14 the CPU core manager 17 allocates the post-process to at least a part of the cores of another part of the CPUs 31 and the process is terminated.
  • step S 15 the CPU core manager 17 determines whether to cause the second process to be executed.
  • step S 15 ; Y the CPU core manager 17 shifts to a process in step S 16 .
  • step S 15 ; N the CPU core manager 17 shifts to a process in step S 19 .
  • step S 16 the CPU core manager 17 allocates the pre-process to at least a part of the cores of a part of the CPUs 31 .
  • step S 17 the CPU core manager 17 stops the supply of electric power to at least another part of the cores of the part of the CPUs 31 .
  • step S 18 the CPU core manager 17 allocates the post-process to at least a part of the cores of another part of the CPUs 31 and the process is terminated.
  • step S 19 the CPU core manager 17 determines whether the current printing is reprinting. When determining that the current printing is not reprinting (step S 19 ; N), the CPU core manager 17 shifts to a process in step S 20 . When determining that the current printing is reprinting (step S 19 ; Y), the CPU core manager 17 shifts to a process in step S 21 . In step S 20 , the CPU core manager 17 determines whether the file size is equal to or greater than a threshold size. When determining that the file size is equal to or greater than the threshold size (step S 20 ; Y), the CPU core manager 17 shifts to the process in step S 12 .
  • the CPU core manager 17 shifts to the process in step S 16 .
  • the file size tends to be large.
  • the file size is 10 Mbytes or more, preferably 50 Mbytes or more, there is a high possibility that a raster format image is inserted in the document and accordingly, it is assumed that rasterization will have a substantial load, Therefore, in this case, it is preferable to select the first process that allocates the load to all the cores.
  • the CPU core manager 17 is adapted to cause either one of the first process or the second process to be executed based on the file size.
  • the first process is executed when the file size is equal to or greater than the threshold size.
  • the second process is executed when the file size is less than the threshold size.
  • step S 21 the CPU core manager 17 selects either one of the first process or the second process based on the respective execution times of the pre-process and the post-process, the number of CPUs 31 , and the number of cores of each CPU 31 .
  • step S 22 the CPU core manager 17 determines whether the first process has been selected. When determining that the first process has been selected (step S 22 ; Y), the CPU core manager 17 shifts to the process in step S 12 . When determining that the first process has not been selected (step S 22 ; N), the CPU core manager 17 shifts to the process in step S 16 .
  • the CPU core manager 17 causes either one of the first process or the second process to be executed based on the respective execution times of the pre-process and the post-process, the number of CPUs 31 , and the number of cores included in each of the CPUs 31 .
  • a first RIP process is executed in either one of the first process or the second process and, when the printing data as a result of the RIP process is saved, the respective execution times of the pre-process and the post-process are saved together.
  • the CPU core manager 17 causes either one of the first process or the second process to be executed on the second and subsequent pages based on the respective execution times of the pre-process and post-process for the first page. In other words, by determining the processing tendency as to which one of the pre-process and the post-process is heavier on the first page, it is possible to achieve the optimum load allocation to the resource on and after the second page.
  • the CPU core manager 17 selects one of the first process and the second process with a shorter execution time, using a part of the CPUs 31 .
  • a part of the resource can be used for an execution time determination process.
  • the CPU core manager 17 designates the time required from the start of the pre-process to the completion of the last item of the post-process as the execution time of each of the first process and the second process. In other words, since one of the processes is selected depending on the execution time required for the RIP process, it is possible to select a process capable of shortening the time of the RIP process.
  • the CPU core manager 17 causes a part of the CPUs 31 to count the execution time of each of the first process and the second process. With this configuration, a part of the resource can be used for an execution time counting process.
  • the CPU core manager 17 causes a part of the plurality of cores to count the execution time of each of the first process and the second process. Therefore, since the time counting process can be executed concurrently with the execution of either one of the pre-process or the post-process, the productivity can be enhanced as a whole.
  • each process described above may be executed on a per-process basis in terms of software, but it is preferable that the process be executed on a thread basis.
  • the present embodiment has described an example of the memory 13 having the centralized shared memory architecture but is not particularly restricted thereto.
  • the memory 13 may have the distributed shared memory architecture.
  • the present embodiment has described an example of the first process and the second process that are the RIP process but is not particularly restricted thereto.
  • the first process and the second process may be an image process performed on the FAX image data described above.
  • the first process and the second process may be an image process for displaying on the operation display 25 .
  • the first process and the second process may be a process that converts a hypertext markup language (HTML) file into a format used to output to a monitor of a computer device (not illustrated), or the like.
  • HTML hypertext markup language
  • the first process and the second process can be any process as long as the output of the process is associated with images.
  • the present embodiment has described an example in which the supply of electric power to the cores ( 2 ) to ( 4 ) is stopped when the second process is executed but is not particularly restricted thereto.
  • the supply of electric power to the cores ( 2 ) and ( 3 ) may be stopped.

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