US10559479B2 - Semiconductor manufacturing apparatus and manufacturing method of semiconductor device - Google Patents
Semiconductor manufacturing apparatus and manufacturing method of semiconductor device Download PDFInfo
- Publication number
- US10559479B2 US10559479B2 US16/129,319 US201816129319A US10559479B2 US 10559479 B2 US10559479 B2 US 10559479B2 US 201816129319 A US201816129319 A US 201816129319A US 10559479 B2 US10559479 B2 US 10559479B2
- Authority
- US
- United States
- Prior art keywords
- semiconductor substrate
- manufacturing apparatus
- semiconductor manufacturing
- semiconductor
- lid member
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67011—Apparatus for manufacture or treatment
- H01L21/67017—Apparatus for fluid treatment
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
- H01L21/02227—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
- H01L21/0223—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate
- H01L21/02233—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
- H01L21/02227—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
- H01L21/02255—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by thermal treatment
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67011—Apparatus for manufacture or treatment
- H01L21/67098—Apparatus for thermal treatment
- H01L21/67115—Apparatus for thermal treatment mainly by radiation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67011—Apparatus for manufacture or treatment
- H01L21/67155—Apparatus for manufacturing or treating in a plurality of work-stations
- H01L21/6719—Apparatus for manufacturing or treating in a plurality of work-stations characterized by the construction of the processing chambers, e.g. modular processing chambers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L21/687—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches
- H01L21/68714—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support
- H01L21/68785—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support characterised by the mechanical construction of the susceptor, stage or support
Definitions
- An embodiment of the present invention provides a semiconductor manufacturing apparatus and a manufacturing method of a semiconductor device that can suppress warpage of a semiconductor substrate.
- FIG. 1 is a schematic diagram illustrating a configuration of a semiconductor manufacturing apparatus according to an embodiment
- FIG. 2 is a flowchart of heat treatment of the semiconductor manufacturing apparatus according to the embodiment
- FIG. 3 is a schematic diagram illustrating an example of a method of carrying a semiconductor substrate
- FIG. 4 is a schematic diagram illustrating an example of a method of carrying a lid member
- FIG. 5 is a schematic diagram illustrating an example of the method of carrying a lid member
- FIG. 6 is a side view and a plan view illustrating a configuration of relevant parts of a semiconductor manufacturing apparatus according to a second embodiment
- FIG. 7A is a side view illustrating a modification of a mask
- FIG. 7B is a side view illustrating another modification of a mask.
- FIG. 8 is a perspective view illustrating a configuration of relevant parts of a fixing table.
- FIG. 1 is a schematic diagram illustrating a configuration of a semiconductor manufacturing apparatus according to a first embodiment.
- a semiconductor manufacturing apparatus 1 illustrated in FIG. 1 is a single-wafer heat treatment device for oxidizing a surface 100 a and a back 100 b of a semiconductor substrate 100 .
- the semiconductor manufacturing apparatus 1 includes a heat source 11 , a lid member 12 , a support member 13 , a rotating body 14 , a driving mechanism 15 , an oxidation resistant member 16 , a reflecting plate 17 , a chamber 18 , a thermometer 19 , a controller 20 , gas introducing members 21 to 24 , and valves 31 to 34 .
- the heat source 11 applies heat to the semiconductor substrate 100 .
- the heat source 11 is a light source that radiates lamp light towards the semiconductor substrate 100 .
- the heat source 11 is not limited to a light source, but can be a heating element, for example.
- the lid member 12 is opposed to the surface 100 a of the semiconductor substrate 100 .
- the lid member 12 is located between the heat source 11 and the semiconductor substrate 100 .
- the lid member 12 is a member for preventing oxidation of the surface 100 a when the back 100 b is oxidized. Therefore, the plane area of the lid member 12 is larger than the plane area of the semiconductor substrate 100 .
- the lid member 12 is a light transmitting member that allows light of the light source to pass therethrough.
- the support member 13 includes a lower end portion 13 a that supports the semiconductor substrate 100 and an upper end portion 13 b that supports the lid member 12 .
- the planar shape of the lower end portion 13 a and the upper end portion 13 b is annular, for example. In this case, the opening diameter of the upper end portion 13 b is larger than the opening diameter of the lower end portion 13 a.
- the rotating body 14 is attached to the support member 13 .
- the driving mechanism 15 rotates and moves the rotating body 14 based on control by the controller 20 , the rotating force of the rotating body 14 is transmitted to the semiconductor substrate 100 and the lid member 12 via the support member 13 . With this configuration, the semiconductor substrate 100 and the lid member 12 are rotated.
- the driving mechanism 15 generates a magnetic force to drive the rotating body 14 .
- the principle of driving the rotating body 14 can be another type of force other than a magnetic force, such as a gas.
- the oxidation resistant member 16 is opposed to the back 100 b of the semiconductor substrate 100 .
- the oxidation resistant member 16 contains quartz or chrome (Cr), for example.
- the oxidation resistant member 16 is provided on the reflecting plate 17 . Therefore, oxidation of the reflecting plate 17 can be avoided when the back 100 b is oxidized.
- the reflecting plate 17 reflects light radiated from the heat source 11 as a light source towards the semiconductor substrate 100 . Therefore, it is possible to efficiently use the light of the light source for heating the semiconductor substrate 100 .
- a member covered by the oxidation resistant member 16 on the back 100 b of the semiconductor substrate 100 is not limited to the reflecting plate 17 , but can be a heat source such as a lamp or a heating wire. Also in this case, it is possible to efficiently heat the semiconductor substrate 100 .
- the chamber 18 accommodates therein the lid member 12 , the support member 13 , the rotating body 14 , the driving mechanism 15 , the oxidation resistant member 16 , and the reflecting plate 17 therein.
- the thermometer 19 measures the temperature of the reflecting plate 17 and outputs the measurement result to the controller 20 . Although a plurality of thermometers 19 are used in the present embodiment, the number of the thermometers 19 is not specifically limited to any number.
- the controller 20 performs various control operations.
- the gas introducing member 21 introduces an oxidizing system gas 201 into the chamber 18 .
- the oxidizing system gas 201 flows between the back 100 b of the semiconductor substrate 100 and the oxidation resistant member 16 . Therefore, the back 100 b is oxidized.
- the valve 31 is attached to the gas introducing member 21 .
- the oxidizing system gas 201 contains oxidizing species such as oxygen (O2), water vapor, oxygen radical (O), or hydroxyl radical (HO). Oxygen radical and hydroxyl radical can be generated in the chamber 18 or outside the chamber 18 .
- the gas introducing member 22 introduces an inert gas 202 into the chamber 18 .
- the inert gas 202 also flows between the back 100 b of the semiconductor substrate 100 and the oxidation resistant member 16 .
- the inert gas 202 is introduced for preventing oxidation of the back 100 b of the semiconductor substrate 100 at the time of oxidizing the surface 100 a .
- nitrogen can be applied as the inert gas 202 .
- the gas introducing member 23 introduces an inert gas 203 into the chamber 18 .
- the inert gas 203 flows between the heat source 11 and the lid member 12 .
- the inert gas 203 is introduced to prevent oxidation of the surface 100 a of the semiconductor substrate 100 at the time of oxidizing the back 100 b .
- nitrogen can be applied as the inert gas 203 .
- the gas introducing member 24 introduces an oxidizing system gas 204 into the chamber 18 .
- the oxidizing system gas 204 flows on the surface 100 a of the semiconductor substrate 100 . With this configuration, the surface 100 a is oxidized.
- the oxidizing system gas 204 also contains oxidizing species such as oxygen, water vapor, oxygen radical, or hydroxyl radical. Further, oxygen radical and hydroxyl radical can be generated in the chamber 18 or outside the chamber 18 .
- the valves 31 to 34 are provided in the respective gas introducing members described above. Each of the valves is opened and closed based on control by the controller 20 . Introduction of each gas is controlled by an opening/closing operation of each valve.
- FIG. 2 is a flowchart of heat treatment of the semiconductor manufacturing apparatus 1 according to the present embodiment.
- the semiconductor substrate 100 is carried into the chamber 18 (Step S 1 ).
- Step S 1 is described with reference to FIG. 3 .
- FIG. 3 is a schematic diagram illustrating an example of a method of carrying the semiconductor substrate 100 .
- a transfer arm 40 moves down while holding the semiconductor substrate 100 .
- a lift pin 41 projects from the oxidation resistant member 16 .
- a tip of the lift pin 41 is at a position higher than the support member 13 .
- the transfer arm 40 moves down to a position at which the lift pin 41 comes into contact with the semiconductor substrate 100 .
- the lift pin 41 then moves down or is shortened because of the own weight of the semiconductor substrate 100 .
- the semiconductor substrate 100 is supported by the lower end portion 13 a of the support member 13 .
- the method of carrying the semiconductor substrate 100 is not limited to the method described above.
- Step S 2 a surface oxidation process of oxidizing the surface 100 a of the semiconductor substrate 100 is performed (Step S 2 ).
- the temperature of the reflecting plate 17 rises due to the heat of the heat source 11 .
- This temperature is measured by the thermometer 19 and is input to the controller 20 .
- the controller 20 opens the valves 32 and 34 . Therefore, the oxidizing system gas 204 is introduced from the gas introducing member 24 into the chamber 18 , so that the surface 100 a of the semiconductor substrate 100 is oxidized.
- the inert gas 202 is also introduced from the gas introducing member 22 into the chamber 18 and therefore oxidation of the back 100 b of the semiconductor substrate 100 can be avoided.
- Step S 3 the lid member 12 is carried into the chamber 18 (Step S 3 ).
- Step S 3 is described with reference to FIGS. 4 and 5 .
- FIGS. 4 and 5 are schematic diagrams illustrating an example of a method of carrying the lid member 12 .
- the transfer arm 40 moves down while holding the lid member 12 .
- a lift pin 42 projects from the upper end portion 13 b of the support member 13 .
- the transfer arm 40 moves down to a position at which the lift pin 42 comes into contact with the lift member 12 .
- the lift pin 42 then moves down or is shortened because of the own weight of the lid member 12 .
- the lid member 12 is supported by the upper end portion 13 b of the support member 13 .
- the method of carrying the lid member 12 is not limited to the method described above.
- alteration to a conventional heat treatment device can be minimized to addition of the lid member 12 and the oxidation resistant member 16 . Accordingly, increase of the device size can be suppressed.
- FIG. 6 is a side view and a plan view illustrating a configuration of relevant parts of a semiconductor manufacturing apparatus according to a second embodiment.
- the plan view illustrations of the lid member 12 are omitted.
- differences between the first embodiment and the second embodiment are mainly described.
- the lid member 12 is supported by an upper-level portion of a support member 60 in the present embodiment. Further, the semiconductor substrate 100 is supported by a middle-level portion of the support member 60 . In addition, a groove 61 is formed in a lower-level portion of the support member 60 . In the groove 61 , a plurality of masks 101 are supported while being in contact with the back 100 b of the semiconductor substrate 100 .
- the masks 101 extend in an X-direction to spread over an opening provided at a center of the support member 60 that is annular. Also, the masks 101 are arranged to be spaced from each other in a Y-direction.
- the X-direction and the Y-direction are two directions that are in-plane directions parallel to the back 100 b of the semiconductor substrate 100 and are perpendicular to each other.
- each mask 101 is formed of a heat-resistant material such as quartz.
- Each mask 101 is used when a back oxidation process of oxidizing the back 100 b of the semiconductor substrate 100 is performed. In a case where a temperature condition for the back oxidation process is not a high temperature, the material of each mask 101 does not need to be a heat-resistant material.
- the back oxidation process When the back oxidation process is performed, a portion of the back 100 b that is in contact with the mask 101 is not oxidized, but a portion of the back 100 b that is not in contact with the mask 101 is oxidized. Therefore, when the semiconductor substrate 100 is convex upward as illustrated in FIG. 6 , for example, the amount of oxidation of the back 100 b can be controlled with regard to the X-direction and the Y-direction by partially oxidizing the back 100 b by using the masks 101 . Accordingly, it is possible to reduce the difference of the amount of warpage between the X-direction and the Y-direction.
- a spacer 70 is provided between the masks 101 in the groove 61 .
- the spacer 70 is a block of a rectangular prism or a cube, for example.
- a fixing table 80 that fixes each mask 101 thereto is provided. The structure of the fixing table 80 is described here with reference to FIG. 8 .
- FIG. 8 is a perspective view illustrating a configuration of relevant parts of the fixing table 80 .
- the fixing table 80 illustrated in FIG. 8 has a pedestal 81 and a plurality of stoppers 82 .
- the mask 101 is placed on the pedestal 81 .
- the stoppers 82 are provided to be spaced from each other in the Y-direction on the pedestal 81 .
- the mask 101 is arranged between the stoppers 82 .
- Y-direction movement of the mask 101 is restricted by the spacer 70 described above and the fixing table 80 . Accordingly, it is possible to prevent the mask 101 from moving out of place. In a case where fixing of the mask 101 is ensured, it is not necessary to provide both the spacer 70 and the fixing table 80 , and it is permissible that only one of them is provided.
Abstract
Description
Claims (16)
Applications Claiming Priority (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2018033594 | 2018-02-27 | ||
JP2018-033594 | 2018-02-27 | ||
JP2018168057A JP2019149536A (en) | 2018-02-27 | 2018-09-07 | Semiconductor manufacturing apparatus and semiconductor device manufacturing method |
JP2018-168057 | 2018-09-07 |
Publications (2)
Publication Number | Publication Date |
---|---|
US20190267259A1 US20190267259A1 (en) | 2019-08-29 |
US10559479B2 true US10559479B2 (en) | 2020-02-11 |
Family
ID=67684699
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US16/129,319 Active US10559479B2 (en) | 2018-02-27 | 2018-09-12 | Semiconductor manufacturing apparatus and manufacturing method of semiconductor device |
Country Status (1)
Country | Link |
---|---|
US (1) | US10559479B2 (en) |
Citations (15)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5271648A (en) | 1975-12-11 | 1977-06-15 | Meidensha Electric Mfg Co Ltd | Power transmission line simulator |
JPS5610328A (en) | 1979-07-06 | 1981-02-02 | Mitsubishi Chem Ind Ltd | Constant pressure type deoxidizer |
JPS61206232A (en) | 1985-03-11 | 1986-09-12 | Hitachi Ltd | Sheet type annealing apparatus |
US5834363A (en) | 1996-03-28 | 1998-11-10 | Shin-Etsu Handotai Co., Ltd. | Method of manufacturing semiconductor wafer, semiconductor wafer manufactured by the same, semiconductor epitaxial wafer, and method of manufacturing the semiconductor epitaxial wafer |
JP3344205B2 (en) | 1996-03-28 | 2002-11-11 | 信越半導体株式会社 | Method for manufacturing silicon wafer and silicon wafer |
US20060102210A1 (en) * | 2002-07-25 | 2006-05-18 | Yasuhiro Chouno | Substrate processing container |
US20100081094A1 (en) * | 2008-09-29 | 2010-04-01 | Tokyo Electron Limited | Mask pattern forming method, fine pattern forming method, and film deposition apparatus |
JP5271648B2 (en) | 2008-09-22 | 2013-08-21 | 株式会社ニューフレアテクノロジー | Semiconductor manufacturing method and semiconductor manufacturing apparatus |
JP5610328B1 (en) | 2013-03-14 | 2014-10-22 | 富士電機株式会社 | Manufacturing method of semiconductor device |
JP2015207733A (en) | 2014-04-23 | 2015-11-19 | ルネサスエレクトロニクス株式会社 | Method for manufacturing reverse conducting igbt |
US20160233085A1 (en) * | 2013-09-27 | 2016-08-11 | Hitachi Kokusai Electric Inc. | Method of manufacturing semiconductor device, substrate processing apparatus and non-transitory computer-readable recording medium |
JP2016213232A (en) | 2015-04-30 | 2016-12-15 | 株式会社Sumco | Method for manufacturing epitaxial silicon wafer |
US20170178889A1 (en) * | 2014-09-08 | 2017-06-22 | Hitachi Kokusai Electric Inc. | Method of manufacturing semiconductor device |
US20180337031A1 (en) * | 2017-05-19 | 2018-11-22 | Hitachi Kokusai Electric Inc. | Method of manufacturing semiconductor device, substrate processing apparatus, and recording medium |
US10388524B2 (en) * | 2016-12-15 | 2019-08-20 | Tokyo Electron Limited | Film forming method, boron film, and film forming apparatus |
-
2018
- 2018-09-12 US US16/129,319 patent/US10559479B2/en active Active
Patent Citations (18)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5271648A (en) | 1975-12-11 | 1977-06-15 | Meidensha Electric Mfg Co Ltd | Power transmission line simulator |
JPS5610328A (en) | 1979-07-06 | 1981-02-02 | Mitsubishi Chem Ind Ltd | Constant pressure type deoxidizer |
JPS61206232A (en) | 1985-03-11 | 1986-09-12 | Hitachi Ltd | Sheet type annealing apparatus |
US5834363A (en) | 1996-03-28 | 1998-11-10 | Shin-Etsu Handotai Co., Ltd. | Method of manufacturing semiconductor wafer, semiconductor wafer manufactured by the same, semiconductor epitaxial wafer, and method of manufacturing the semiconductor epitaxial wafer |
JP3344205B2 (en) | 1996-03-28 | 2002-11-11 | 信越半導体株式会社 | Method for manufacturing silicon wafer and silicon wafer |
US20060102210A1 (en) * | 2002-07-25 | 2006-05-18 | Yasuhiro Chouno | Substrate processing container |
US9552983B2 (en) | 2008-09-22 | 2017-01-24 | Nuflare Technology, Inc. | Manufacturing method for semiconductor device |
JP5271648B2 (en) | 2008-09-22 | 2013-08-21 | 株式会社ニューフレアテクノロジー | Semiconductor manufacturing method and semiconductor manufacturing apparatus |
US20100081094A1 (en) * | 2008-09-29 | 2010-04-01 | Tokyo Electron Limited | Mask pattern forming method, fine pattern forming method, and film deposition apparatus |
JP5610328B1 (en) | 2013-03-14 | 2014-10-22 | 富士電機株式会社 | Manufacturing method of semiconductor device |
US9922858B2 (en) | 2013-03-14 | 2018-03-20 | Fuji Electric Co., Ltd. | Semiconductor device manufacturing method |
US20160233085A1 (en) * | 2013-09-27 | 2016-08-11 | Hitachi Kokusai Electric Inc. | Method of manufacturing semiconductor device, substrate processing apparatus and non-transitory computer-readable recording medium |
JP2015207733A (en) | 2014-04-23 | 2015-11-19 | ルネサスエレクトロニクス株式会社 | Method for manufacturing reverse conducting igbt |
US20170178889A1 (en) * | 2014-09-08 | 2017-06-22 | Hitachi Kokusai Electric Inc. | Method of manufacturing semiconductor device |
JP2016213232A (en) | 2015-04-30 | 2016-12-15 | 株式会社Sumco | Method for manufacturing epitaxial silicon wafer |
US20180087184A1 (en) | 2015-04-30 | 2018-03-29 | Sumco Corporation | Method for manufacturing epitaxial silicon wafer |
US10388524B2 (en) * | 2016-12-15 | 2019-08-20 | Tokyo Electron Limited | Film forming method, boron film, and film forming apparatus |
US20180337031A1 (en) * | 2017-05-19 | 2018-11-22 | Hitachi Kokusai Electric Inc. | Method of manufacturing semiconductor device, substrate processing apparatus, and recording medium |
Also Published As
Publication number | Publication date |
---|---|
US20190267259A1 (en) | 2019-08-29 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
KR101874673B1 (en) | Support mechanism and substrate processing apparatus | |
US4958061A (en) | Method and apparatus for heat-treating a substrate | |
KR101168102B1 (en) | Heating device, heating method, coating apparatus and storage medium | |
KR102072525B1 (en) | Method of manufacturing semiconductor device, substrate processing apparatus and program | |
JP2002353110A (en) | Heating processor | |
US10559479B2 (en) | Semiconductor manufacturing apparatus and manufacturing method of semiconductor device | |
JP2006222124A (en) | Heat treatment apparatus | |
JP4811860B2 (en) | Heat treatment method, program thereof, and heat treatment apparatus | |
KR20090045984A (en) | Heating apparatus enhanced in temperature uniformity on substrate and chemical vapor deposition apparatus using the same | |
KR102099116B1 (en) | Apparatus and Method for treating substrate | |
WO2006085527A1 (en) | Temperature setting method for heat treating plate, temperature setting device for heat treating plate, program and computer-readable recording medium recording program | |
JP2009152635A (en) | Single-wafer processing apparatus | |
JP2019149536A (en) | Semiconductor manufacturing apparatus and semiconductor device manufacturing method | |
JP4323764B2 (en) | Heat treatment equipment | |
JP2003059852A (en) | Heat treatment device for wafer | |
JP5559736B2 (en) | Substrate heating apparatus, coating and developing apparatus including the same, and substrate heating method | |
CN108538752A (en) | Circulator lid | |
JP7014303B2 (en) | Board processing method and board processing equipment | |
KR20220014475A (en) | Apparatus for treating substrate | |
KR102403200B1 (en) | Unit for supporting substrate, Apparatus for treating substrate, and Method for treating substrate | |
KR102136130B1 (en) | Apparatus for treating substrate | |
KR20200110122A (en) | Substrate processing apparatus, method of manufacturing semiconductor device, and recording medium | |
KR102277549B1 (en) | Apparatus and Method for treating a substrate | |
JP2001307981A (en) | Heating device and its method | |
US20220413397A1 (en) | Support unit, bake apparatus and substrate treating apparatus including the same |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
FEPP | Fee payment procedure |
Free format text: ENTITY STATUS SET TO UNDISCOUNTED (ORIGINAL EVENT CODE: BIG.); ENTITY STATUS OF PATENT OWNER: LARGE ENTITY |
|
AS | Assignment |
Owner name: TOSHIBA MEMORY CORPORATION, JAPAN Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNORS:SAKANO, NOZOMI;NISHIDA, DAISUKE;SIGNING DATES FROM 20180921 TO 20181001;REEL/FRAME:047348/0839 |
|
STPP | Information on status: patent application and granting procedure in general |
Free format text: NON FINAL ACTION MAILED |
|
STPP | Information on status: patent application and granting procedure in general |
Free format text: RESPONSE TO NON-FINAL OFFICE ACTION ENTERED AND FORWARDED TO EXAMINER |
|
STPP | Information on status: patent application and granting procedure in general |
Free format text: NOTICE OF ALLOWANCE MAILED -- APPLICATION RECEIVED IN OFFICE OF PUBLICATIONS |
|
STPP | Information on status: patent application and granting procedure in general |
Free format text: PUBLICATIONS -- ISSUE FEE PAYMENT VERIFIED |
|
STCF | Information on status: patent grant |
Free format text: PATENTED CASE |
|
AS | Assignment |
Owner name: KIOXIA CORPORATION, JAPAN Free format text: CHANGE OF NAME AND ADDRESS;ASSIGNOR:TOSHIBA MEMORY CORPORATION;REEL/FRAME:055669/0001 Effective date: 20191001 |
|
MAFP | Maintenance fee payment |
Free format text: PAYMENT OF MAINTENANCE FEE, 4TH YEAR, LARGE ENTITY (ORIGINAL EVENT CODE: M1551); ENTITY STATUS OF PATENT OWNER: LARGE ENTITY Year of fee payment: 4 |