US10431440B2 - Methods and apparatus for processing a substrate - Google Patents

Methods and apparatus for processing a substrate Download PDF

Info

Publication number
US10431440B2
US10431440B2 US14/975,793 US201514975793A US10431440B2 US 10431440 B2 US10431440 B2 US 10431440B2 US 201514975793 A US201514975793 A US 201514975793A US 10431440 B2 US10431440 B2 US 10431440B2
Authority
US
United States
Prior art keywords
targets
shield
process chamber
chamber
chamber body
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active, expires
Application number
US14/975,793
Other languages
English (en)
Other versions
US20170178877A1 (en
Inventor
Rongjun Wang
Anantha K. Subramani
Chi Hong Ching
Xianmin Tang
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Applied Materials Inc
Original Assignee
Applied Materials Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Applied Materials Inc filed Critical Applied Materials Inc
Priority to US14/975,793 priority Critical patent/US10431440B2/en
Assigned to APPLIED MATERIALS, INC. reassignment APPLIED MATERIALS, INC. ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: CHING, CHI HONG, SUBRAMANI, ANANTHA K., TANG, XIANMIN, WANG, RONGJUN
Priority to PCT/US2016/066080 priority patent/WO2017112439A1/en
Priority to SG11201804855SA priority patent/SG11201804855SA/en
Priority to EP16879880.9A priority patent/EP3391406A4/en
Priority to JP2018550653A priority patent/JP7066626B2/ja
Priority to KR1020187020862A priority patent/KR102663848B1/ko
Priority to CN201680074710.6A priority patent/CN108604533B/zh
Priority to TW105141667A priority patent/TWI778947B/zh
Publication of US20170178877A1 publication Critical patent/US20170178877A1/en
Publication of US10431440B2 publication Critical patent/US10431440B2/en
Application granted granted Critical
Active legal-status Critical Current
Adjusted expiration legal-status Critical

Links

Images

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/32—Gas-filled discharge tubes
    • H01J37/34—Gas-filled discharge tubes operating with cathodic sputtering
    • H01J37/3411—Constructional aspects of the reactor
    • H01J37/3441—Dark space shields
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C14/00—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
    • C23C14/06—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material characterised by the coating material
    • C23C14/08—Oxides
    • C23C14/082—Oxides of alkaline earth metals
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C14/00—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
    • C23C14/22—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material characterised by the process of coating
    • C23C14/34—Sputtering
    • C23C14/3407—Cathode assembly for sputtering apparatus, e.g. Target
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C14/00—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
    • C23C14/22—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material characterised by the process of coating
    • C23C14/34—Sputtering
    • C23C14/3464—Sputtering using more than one target
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/32—Gas-filled discharge tubes
    • H01J37/32431—Constructional details of the reactor
    • H01J37/32458—Vessel
    • H01J37/32477—Vessel characterised by the means for protecting vessels or internal parts, e.g. coatings
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/32—Gas-filled discharge tubes
    • H01J37/34—Gas-filled discharge tubes operating with cathodic sputtering
    • H01J37/3411—Constructional aspects of the reactor
    • H01J37/3414—Targets
    • H01J37/3426—Material
    • H01J37/3429—Plural materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/32—Gas-filled discharge tubes
    • H01J37/34—Gas-filled discharge tubes operating with cathodic sputtering
    • H01J37/3411—Constructional aspects of the reactor
    • H01J37/3447—Collimators, shutters, apertures
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02172—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides
    • H01L21/02175—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides characterised by the metal
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
    • H01L21/02263—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
    • H01L21/02266—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by physical ablation of a target, e.g. sputtering, reactive sputtering, physical vapour deposition or pulsed laser deposition

Definitions

  • Embodiments of the present disclosure generally relate to methods and apparatus for processing a substrate.
  • PVD Physical vapor deposition
  • Dielectric PVD sputtering has many applications in the semiconductor industry, such as, for example, hafnium oxide, tantalum oxide, aluminum oxide for Resistive random-access memory (ReRAM) and conductive-bridging random-access memory (CBRAM) filaments, magnesium oxide for STT-RAM barrier layers, tantalum oxide and titanium oxide for antireflection layers for image sensors, etc.
  • Dielectric materials may be deposited using reactive sputtering, where a metallic conductive target is used and reacts with an oxygen or nitrogen plasma to deposit dielectric, or using a composite non-conductive target with RF power (either capacitive or inductive coupling) to directly sputter the target materials onto the substrate.
  • the second method is typically used for applications in which substrate oxidation or nitridation during the dielectric deposition is not desirable, barring the use of reactive gases in such applications.
  • an angled multicathode chamber is used.
  • a dielectric target is connected to an RF power supply, and a metallic target is connected to a DC power supply.
  • a rotating shield is used to avoid cross-contamination between the targets during sputtering.
  • the purpose of the metallic target is to paste the shield to recover the deposition rate due to grounding loss caused by dielectric coating. The metallic paste also helps prevent the peeling and flaking of dielectric particles on the shield.
  • a process chamber includes: a chamber body defining an interior volume; a substrate support to support a substrate within the interior volume; a plurality of cathodes coupled to the chamber body and having a corresponding plurality of targets to be sputtered onto the substrate; and a shield rotatably coupled to an upper portion of the chamber body and having at least one hole to expose at least one of the plurality of targets to be sputtered and at least one pocket disposed in a backside of the shield to accommodate and cover at least another one of the plurality of targets not to be sputtered, wherein the shield is configured to rotate about and linearly move along a central axis of the process chamber.
  • a method for processing a substrate disposed on a substrate support in a process chamber includes: rotating a shield disposed within the process chamber to expose a dielectric target through a hole in the shield; moving the shield up along a central axis of the process chamber away from the substrate support to a retracted position; depositing dielectric material from the dielectric target onto the substrate; removing the substrate from the process chamber; moving the shield down along the central axis towards the substrate support; rotating the shield to expose a metallic target through the hole in the shield; pasting metallic material from the metallic target onto interior surfaces of the process chamber; and flowing oxygen into the process chamber to oxidize the pasted metallic material.
  • FIG. 3 depicts a schematic view of an upper portion of a multi-cathode processing chamber in accordance with some embodiments of the present disclosure.
  • FIG. 5 depicts a bottom view of a shield disposed in the multi-cathode processing chamber of FIG. 3 in accordance with some embodiments of the present disclosure.
  • FIG. 6 is a flowchart illustrating a method of processing a substrate in accordance with some embodiments of the present disclosure.
  • Embodiments of methods and apparatus for processing a substrate are provided herein.
  • the disclosed methods and apparatus may advantageously improve target life, prolong the time period needed before cleaning, and alleviate deposition rate drifting while substantially minimizing or eliminating cross-contamination between targets.
  • a multi cathode-PVD chamber (i.e. process chamber 100 ) includes a plurality of cathodes 102 having a corresponding plurality of targets (at least one dielectric target 104 and at least one metallic target 106 ), (for example, 5 cathodes) attached to the chamber body (for example, via a chamber body adapter 108 ).
  • the metallic target(s) may be formed of metals such as, for example, tantalum, aluminum, titanium, molybdenum, tungsten, and/or magnesium or of a conductive metal oxide such as, for example, titanium oxide, titanium magnesium oxide, and/or tantalum magnesium oxide.
  • other metals and/or conductive metal oxides may alternatively be used.
  • the processing chamber includes a substrate support 132 having a support surface 134 to support a substrate 136 .
  • the process chamber 100 includes an opening 150 (e.g., a slit valve) through which an end effector (not shown) may extend to place the substrate 136 onto lift pins (not shown) for lowering the substrate onto the support surface 134 .
  • an opening 150 e.g., a slit valve
  • An actuator 124 is coupled to the shaft 122 opposite the shield 116 .
  • the actuator 124 is configured to rotate the shield 116 , as indicated by arrow 126 , and move the shield 116 up and down along the central axis 130 of the process chamber 100 , as indicated by arrow 128 .
  • the inventors have observed that when the shield 116 is moved up into a retracted position so that a face of the shield surrounding the hole 118 is behind a face of the target (e.g., dielectric target 104 ) facing the substrate 136 , materials sputtered in a dark space surrounding the target (e.g., on a sidewall of the hole 118 ) are advantageously minimized. As a result, materials sputtered from one target (e.g.
  • the shield 116 may be provided with a pocket 120 to house a target not being sputtered.
  • the pocket advantageously prevents scattering of the sputtered target from being deposited on the target not being sputtered. Although such scattering is inevitable, the pocket 120 ensures that the scattering does not contaminate the sputtered surface of the non-sputtered target. As a result, contamination of the target not being sputtered is further reduced.
  • the process chamber 100 includes a plurality of grounding rings 144 to provide improved grounding of the shield 116 to the grounded chamber body adapter 108 when the shield is in the retracted position.
  • the RF grounding rings 144 advantageously prevent the shield 116 from getting negatively charged by minimizing the energy between the plasma and the shield. As a result, the chances of the shield being sputtered are further reduced.
  • the process chamber 100 further includes a process gas supply 146 to supply a predetermined process gas to an interior volume 105 of the process chamber 100 .
  • the process chamber 100 may also include an exhaust pump 148 fluidly coupled to the interior volume 105 to exhaust the process gas from the process chamber 100 .
  • the process gas supply 146 may supply oxygen to the interior volume 105 after the metallic target 106 has been sputtered.
  • the inventors have observed that flowing oxygen into the process chamber 100 after the metallic paste advantageously reduces the sputter yield of the pasted metallic material because the sputter yield of a metallic oxide (e.g., tantalum oxide) is significantly less than that of the metal (e.g., tantalum). As a result, contamination of the substrate 136 is further reduced.
  • a metallic oxide e.g., tantalum oxide
  • FIG. 2 depicts a bottom view of the shield 116 of FIG. 1 .
  • the plurality targets 104 , 106 are illustrated as five targets, more or fewer targets may be utilized for example, as shown in FIG. 4 and described below.
  • the shield 116 may include one hole 118 and four pockets 120 .
  • the shield 116 may alternatively include more than one hole 118 to expose more than one target to be sputtered.
  • FIG. 3 depicts a close-up of an upper portion of a process chamber in accordance with some embodiments of the present disclosure.
  • the elements of the process chamber in FIG. 3 that are the same or similar to corresponding elements of the process chamber 100 of FIG. 1 will be referred to with the same reference characters. As such, a description of these elements will be omitted here.
  • a shield 316 having a flat orientation may alternatively be used instead of the angled shield 116 in the process chamber 100 shown in FIG. 1 .
  • the targets 104 , 106 are parallel to the support surface 134 .
  • the shield 316 includes one or more holes 318 to expose one or more targets 104 , 106 to be sputtered.
  • the shield 316 also includes one or more pockets 320 to house one or more targets that are not being sputtered.
  • the hole 318 differs from the hole 118 of the angled shield 116 in that the hole 318 has a width 302 that is smaller than that of the hole 118 . Because the targets 104 , 106 are angled with respect to the support surface 134 , the hole 118 is large enough to allow the target being sputtered to pass through the hole 118 when the shield 116 is moved to a retracted position.
  • the width 302 of the hole 318 is only slightly larger than a width of the target. Because the gap between the target being sputtered (e.g., dielectric target 104 ) and the shield is smaller than that of the angled shield and targets shown in FIG. 1 , contamination is further reduced because less material is deposited on the sidewalls of the holes 318 .
  • the target being sputtered e.g., dielectric target 104
  • the inventors have discovered the flat orientation of the shield 316 and the targets 104 , 106 shown in FIG. 3 advantageously further improves the RA uniformity from less than 5% using the angled shield 116 of FIG. 1 to about 2-3% with the flat shield 316 .
  • the shield 316 is flat, more cathodes 102 may be used than with the angled shield 116 , assuming the same overall shield diameter.
  • the plurality of targets may include six targets: three dielectric targets 104 and three metallic targets 106 .
  • the shield 316 includes three non-adjacent holes 318 and three non-adjacent pockets 320 . Because the three non-adjacent holes 318 expose three targets to be co-sputtered, the throughput of the process chamber is increased three times over a single sputtered target because the deposition rate is three times that of the single sputter target. In addition, the overall target life is increased since the amount of material sputtered from each target is 2 ⁇ 3 less than a single sputtered target.
  • FIG. 4 Another advantage of the embodiment shown in FIG. 4 is that there is less deposition on the dark space of the shield surrounding each target (i.e., 2 ⁇ 3 less than that of a single sputtered target). As a result, contamination is further reduced and 2 ⁇ 3 less paste material is needed.
  • FIG. 5 depicts a configuration of a shield 516 in accordance with some embodiments of the present disclosure.
  • the shield 516 is substantially similar to the shield 316 depicted in FIGS. 3 and 4 except that the shield 516 includes two adjacent holes 518 and four pockets 520 .
  • the plurality of targets includes two adjacent dielectric targets 104 , two adjacent first metallic targets 106 formed of a first metal, and two adjacent second metallic targets 507 formed of a second metal.
  • the two adjacent second metallic targets 507 may be a formed of a second dielectric material different than that of the dielectric targets 104 .
  • the shield 516 may advantageously facilitate a stacked deposition process.
  • the two adjacent dielectric targets 104 may be formed of magnesium oxide
  • the two adjacent first metallic targets 106 may be formed of tantalum
  • the two adjacent second metallic targets 507 may be formed of magnesium.
  • direct sputtering of magnesium oxide from the two adjacent dielectric targets 104 or sputtering of magnesium from the two adjacent second metallic targets 507 and subsequent oxidization may alternatively be performed in the same chamber.
  • the sputtering of the two adjacent second metallic targets 507 and subsequent oxidization may be advantageous over direct sputtering of the dielectric targets 104 because the metal pasting needed after sputtering of the two adjacent second metallic targets 507 is less than that needed for the direct sputtering of the dielectric targets 104 .
  • FIG. 6 is a flowchart illustrating a method 600 of processing a substrate 136 in accordance with some embodiments of the present disclosure.
  • the shield 116 , 316 is rotated to expose the dielectric target 104 .
  • the shield is moved up along the central axis 130 of the process chamber 100 to a retracted position so that a face of the shield 116 , 316 surrounding the dielectric target 104 is behind a face of the target.
  • the dielectric material is deposited on the substrate 136 .
  • the substrate 136 is removed from the process chamber 100 .
  • the shield 116 , 316 is moved down along the central axis 130 of the process chamber 100 to an original position.
  • the shield is rotated to expose the metallic target 106 .
  • the shield 116 , 316 is moved up along the central axis 130 of the process chamber 100 to a retracted position so that a face of the shield 116 , 316 surrounding the metallic target 106 is behind a face of the target.
  • the metallic target 106 is sputtered to paste the shield 116 , 316 and the chamber 100 with the metallic material.
  • oxygen is flowed from the process gas supply 146 into the interior volume 105 to oxidize the pasted metallic material.

Landscapes

  • Chemical & Material Sciences (AREA)
  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Plasma & Fusion (AREA)
  • Analytical Chemistry (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Materials Engineering (AREA)
  • Organic Chemistry (AREA)
  • Metallurgy (AREA)
  • Mechanical Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Optics & Photonics (AREA)
  • Physical Vapour Deposition (AREA)
  • Manufacturing Of Printed Circuit Boards (AREA)
US14/975,793 2015-12-20 2015-12-20 Methods and apparatus for processing a substrate Active 2036-06-15 US10431440B2 (en)

Priority Applications (8)

Application Number Priority Date Filing Date Title
US14/975,793 US10431440B2 (en) 2015-12-20 2015-12-20 Methods and apparatus for processing a substrate
JP2018550653A JP7066626B2 (ja) 2015-12-20 2016-12-12 基板を処理するための方法および装置
SG11201804855SA SG11201804855SA (en) 2015-12-20 2016-12-12 Methods and apparatus for processing a substrate
EP16879880.9A EP3391406A4 (en) 2015-12-20 2016-12-12 METHOD AND DEVICE FOR PROCESSING A SUBSTRATE
PCT/US2016/066080 WO2017112439A1 (en) 2015-12-20 2016-12-12 Methods and apparatus for processing a substrate
KR1020187020862A KR102663848B1 (ko) 2015-12-20 2016-12-12 기판을 프로세싱하기 위한 방법들 및 장치
CN201680074710.6A CN108604533B (zh) 2015-12-20 2016-12-12 用于处理基板的方法和设备
TW105141667A TWI778947B (zh) 2015-12-20 2016-12-16 用於處理基板的方法與設備

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US14/975,793 US10431440B2 (en) 2015-12-20 2015-12-20 Methods and apparatus for processing a substrate

Publications (2)

Publication Number Publication Date
US20170178877A1 US20170178877A1 (en) 2017-06-22
US10431440B2 true US10431440B2 (en) 2019-10-01

Family

ID=59066539

Family Applications (1)

Application Number Title Priority Date Filing Date
US14/975,793 Active 2036-06-15 US10431440B2 (en) 2015-12-20 2015-12-20 Methods and apparatus for processing a substrate

Country Status (8)

Country Link
US (1) US10431440B2 (ko)
EP (1) EP3391406A4 (ko)
JP (1) JP7066626B2 (ko)
KR (1) KR102663848B1 (ko)
CN (1) CN108604533B (ko)
SG (1) SG11201804855SA (ko)
TW (1) TWI778947B (ko)
WO (1) WO2017112439A1 (ko)

Families Citing this family (42)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI811037B (zh) 2016-07-27 2023-08-01 美商應用材料股份有限公司 具多層吸收劑的極紫外遮罩坯料及製造方法
US11011357B2 (en) * 2017-02-21 2021-05-18 Applied Materials, Inc. Methods and apparatus for multi-cathode substrate processing
JP7001448B2 (ja) * 2017-12-05 2022-01-19 東京エレクトロン株式会社 Ｐｖｄ処理方法およびｐｖｄ処理装置
US10815561B2 (en) 2018-03-10 2020-10-27 Applied Materials, Inc. Method and apparatus for asymmetric selective physical vapor deposition
US20190287772A1 (en) * 2018-03-14 2019-09-19 Applied Materials, Inc. Method and apparatus of forming structures by symmetric selective physical vapor deposition
US11275300B2 (en) 2018-07-06 2022-03-15 Applied Materials Inc. Extreme ultraviolet mask blank defect reduction
TW202026770A (zh) 2018-10-26 2020-07-16 美商應用材料股份有限公司 用於極紫外線掩模吸收劑的ta-cu合金材料
CN109735822B (zh) * 2018-11-14 2021-04-09 北京北方华创微电子装备有限公司 反应腔室和半导体设备
US10927450B2 (en) * 2018-12-19 2021-02-23 Applied Materials, Inc. Methods and apparatus for patterning substrates using asymmetric physical vapor deposition
US11194244B2 (en) 2018-12-21 2021-12-07 Applied Materials, Inc. Extreme ultraviolet mask absorber and processes for manufacture
TW202035792A (zh) 2019-01-31 2020-10-01 美商應用材料股份有限公司 極紫外光遮罩吸收體材料
US11249390B2 (en) 2019-01-31 2022-02-15 Applied Materials, Inc. Extreme ultraviolet mask absorber materials
TWI828843B (zh) 2019-01-31 2024-01-11 美商應用材料股份有限公司 極紫外線（ｅｕｖ）遮罩素材及其製造方法
US11639544B2 (en) * 2019-03-01 2023-05-02 Applied Materials, Inc. Physical vapor deposition system and processes
TWI818151B (zh) * 2019-03-01 2023-10-11 美商應用材料股份有限公司 物理氣相沉積腔室及其操作方法
TW202043905A (zh) 2019-03-01 2020-12-01 美商應用材料股份有限公司 物理氣相沉積系統與處理
US11327394B2 (en) 2019-04-19 2022-05-10 Applied Materials Inc. Graded interface in bragg reflector
TWI836073B (zh) 2019-05-22 2024-03-21 美商應用材料股份有限公司 極紫外光遮罩坯體及其製造方法
TW202104666A (zh) 2019-05-22 2021-02-01 美商應用材料股份有限公司 極紫外光遮罩吸收劑材料
TW202104667A (zh) 2019-05-22 2021-02-01 美商應用材料股份有限公司 極紫外光遮罩吸收材料
TWI836072B (zh) 2019-05-22 2024-03-21 美商應用材料股份有限公司 具有嵌入吸收層之極紫外光遮罩
US11275304B2 (en) 2019-05-22 2022-03-15 Applied Materials Inc. Extreme ultraviolet mask absorber matertals
US11385536B2 (en) 2019-08-08 2022-07-12 Applied Materials, Inc. EUV mask blanks and methods of manufacture
KR102077976B1 (ko) * 2019-10-15 2020-02-14 주식회사 기가레인 어댑터 및 이를 포함하는 플라즈마 처리 장치
TW202122909A (zh) * 2019-10-25 2021-06-16 美商應用材料股份有限公司 減少極紫外遮罩毛坯缺陷之方法
US11630385B2 (en) 2020-01-24 2023-04-18 Applied Materials, Inc. Extreme ultraviolet mask absorber materials
TWI817073B (zh) 2020-01-27 2023-10-01 美商應用材料股份有限公司 極紫外光遮罩坯體硬遮罩材料
TW202131087A (zh) 2020-01-27 2021-08-16 美商應用材料股份有限公司 極紫外光遮罩吸收劑材料
TW202129401A (zh) 2020-01-27 2021-08-01 美商應用材料股份有限公司 極紫外線遮罩坯體硬遮罩材料
US11615958B2 (en) 2020-03-24 2023-03-28 Tokyo Electron Limited Methods to reduce microbridge defects in EUV patterning for microelectronic workpieces
TW202141165A (zh) 2020-03-27 2021-11-01 美商應用材料股份有限公司 極紫外光遮罩吸收材料
TWI836207B (zh) 2020-04-17 2024-03-21 美商應用材料股份有限公司 極紫外光遮罩吸收材料
US11300871B2 (en) 2020-04-29 2022-04-12 Applied Materials, Inc. Extreme ultraviolet mask absorber materials
US11227751B1 (en) * 2020-07-01 2022-01-18 Applied Materials, Inc. Plasma chamber target for reducing defects in workpiece during dielectric sputtering
US11609490B2 (en) 2020-10-06 2023-03-21 Applied Materials, Inc. Extreme ultraviolet mask absorber materials
US11513437B2 (en) 2021-01-11 2022-11-29 Applied Materials, Inc. Extreme ultraviolet mask absorber materials
US11592738B2 (en) 2021-01-28 2023-02-28 Applied Materials, Inc. Extreme ultraviolet mask absorber materials
US11578402B2 (en) * 2021-05-26 2023-02-14 Taiwan Semiconductor Manufacturing Company, Ltd. Film forming apparatus and method for reducing arcing
US11762278B2 (en) 2021-06-16 2023-09-19 Applied Materials, Inc. Multilayer extreme ultraviolet reflectors
US11815803B2 (en) 2021-08-30 2023-11-14 Applied Materials, Inc. Multilayer extreme ultraviolet reflector materials
JP7298029B1 (ja) 2021-08-31 2023-06-26 キヤノンアネルバ株式会社 スパッタ装置および膜形成方法
US11782337B2 (en) 2021-09-09 2023-10-10 Applied Materials, Inc. Multilayer extreme ultraviolet reflectors

Citations (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3864239A (en) * 1974-04-22 1975-02-04 Nasa Multitarget sequential sputtering apparatus
US4952295A (en) * 1988-04-15 1990-08-28 Matsushita Electric Industrial Co., Ltd. Method of producing a deposition film of composite material
US5167789A (en) * 1991-03-20 1992-12-01 Leybold Aktiengesellschaft Apparatus for coating a substrate
JPH05179438A (ja) 1991-12-28 1993-07-20 Sumitomo Metal Ind Ltd スパッタ装置
US6051113A (en) * 1998-04-27 2000-04-18 Cvc Products, Inc. Apparatus and method for multi-target physical-vapor deposition of a multi-layer material structure using target indexing
JP2001107228A (ja) 1999-10-07 2001-04-17 Anelva Corp 反応性スパッタリング装置
US20040231980A1 (en) 2003-05-14 2004-11-25 Nobuyuki Takahashi Sputtering device
US20070080059A1 (en) 2005-10-06 2007-04-12 Nobuyuki Takahashi Sputtering device
US20090068450A1 (en) 2005-07-15 2009-03-12 Wolf-Dieter Muenz Method and Apparatus for Multi-Cathode PVD Coating and Substrate with PVD Coating
US7815782B2 (en) 2006-06-23 2010-10-19 Applied Materials, Inc. PVD target
US20110147199A1 (en) 2009-12-22 2011-06-23 Canon Anelva Corporation Sputtering apparatus and electronic device manufacturing method
JP2011168828A (ja) 2010-02-17 2011-09-01 Hitachi Kokusai Electric Inc 基板処理装置及び半導体装置の製造方法
US20110209986A1 (en) 2008-12-26 2011-09-01 Canon Anelva Corporation Sputtering apparatus, sputtering method, and electronic device manufacturing method
US8173248B2 (en) 2005-04-27 2012-05-08 Sheffield Hallam University PVD coated substrate
US20120164354A1 (en) * 2010-12-28 2012-06-28 Canon Anelva Corporation Sputtering apparatus and manufacturing method of electronic device
US20130048494A1 (en) 2010-03-29 2013-02-28 Ulvac, Inc. Sputtering device
US8679301B2 (en) * 2007-08-01 2014-03-25 HGST Netherlands B.V. Repeatability for RF MgO TMR barrier layer process by implementing Ti pasting
US20140102889A1 (en) * 2011-09-09 2014-04-17 Canon Anelva Corporation Film-forming apparatus
US9017535B2 (en) 2007-10-04 2015-04-28 Canon Anelva Corporation High-frequency sputtering device
US20150259788A1 (en) 2014-03-13 2015-09-17 Makoto Nagamine Sputtering apparatus and manufacturing method of magnetoresistive element
US20150279635A1 (en) 2014-03-31 2015-10-01 Applied Materials, Inc. Deposition system with multi-cathode and method of manufacture thereof

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05171436A (ja) * 1991-12-19 1993-07-09 Sony Corp マグネトロンスパッタリング装置
US5914018A (en) * 1996-08-23 1999-06-22 Applied Materials, Inc. Sputter target for eliminating redeposition on the target sidewall
KR100322330B1 (ko) * 1997-04-21 2002-03-18 히가시 데츠로 재료의 이온 스퍼터링 방법 및 장치
JPH11302841A (ja) * 1998-04-24 1999-11-02 Victor Co Of Japan Ltd スパッタ装置
JP2010226136A (ja) * 2004-08-31 2010-10-07 Tokyo Univ Of Agriculture & Technology 半導体薄膜製造方法
JP2008063637A (ja) * 2006-09-11 2008-03-21 Canon Inc 成膜方法
JP5190316B2 (ja) * 2007-10-04 2013-04-24 キヤノンアネルバ株式会社 高周波スパッタリング装置
KR102134276B1 (ko) * 2008-04-16 2020-07-15 어플라이드 머티어리얼스, 인코포레이티드 웨이퍼 프로세싱 증착 차폐 컴포넌트들
KR20180049208A (ko) * 2009-08-31 2018-05-10 램 리써치 코포레이션 무선 주파수 (ｒｆ) 접지 복귀 장치들
US8795487B2 (en) * 2010-03-31 2014-08-05 Applied Materials, Inc. Physical vapor deposition chamber with rotating magnet assembly and centrally fed RF power
US9834840B2 (en) * 2010-05-14 2017-12-05 Applied Materials, Inc. Process kit shield for improved particle reduction
TW201224185A (en) * 2010-09-10 2012-06-16 Ulvac Inc Sputtering apparatus
JP5922761B2 (ja) * 2012-03-14 2016-05-24 キヤノンアネルバ株式会社 スパッタ装置

Patent Citations (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3864239A (en) * 1974-04-22 1975-02-04 Nasa Multitarget sequential sputtering apparatus
US4952295A (en) * 1988-04-15 1990-08-28 Matsushita Electric Industrial Co., Ltd. Method of producing a deposition film of composite material
US5167789A (en) * 1991-03-20 1992-12-01 Leybold Aktiengesellschaft Apparatus for coating a substrate
JPH05179438A (ja) 1991-12-28 1993-07-20 Sumitomo Metal Ind Ltd スパッタ装置
US6051113A (en) * 1998-04-27 2000-04-18 Cvc Products, Inc. Apparatus and method for multi-target physical-vapor deposition of a multi-layer material structure using target indexing
JP2001107228A (ja) 1999-10-07 2001-04-17 Anelva Corp 反応性スパッタリング装置
US20040231980A1 (en) 2003-05-14 2004-11-25 Nobuyuki Takahashi Sputtering device
US8173248B2 (en) 2005-04-27 2012-05-08 Sheffield Hallam University PVD coated substrate
US20090068450A1 (en) 2005-07-15 2009-03-12 Wolf-Dieter Muenz Method and Apparatus for Multi-Cathode PVD Coating and Substrate with PVD Coating
US20070080059A1 (en) 2005-10-06 2007-04-12 Nobuyuki Takahashi Sputtering device
US7815782B2 (en) 2006-06-23 2010-10-19 Applied Materials, Inc. PVD target
US8679301B2 (en) * 2007-08-01 2014-03-25 HGST Netherlands B.V. Repeatability for RF MgO TMR barrier layer process by implementing Ti pasting
US9017535B2 (en) 2007-10-04 2015-04-28 Canon Anelva Corporation High-frequency sputtering device
US20110209986A1 (en) 2008-12-26 2011-09-01 Canon Anelva Corporation Sputtering apparatus, sputtering method, and electronic device manufacturing method
US20110147199A1 (en) 2009-12-22 2011-06-23 Canon Anelva Corporation Sputtering apparatus and electronic device manufacturing method
JP2011168828A (ja) 2010-02-17 2011-09-01 Hitachi Kokusai Electric Inc 基板処理装置及び半導体装置の製造方法
US20130048494A1 (en) 2010-03-29 2013-02-28 Ulvac, Inc. Sputtering device
US20120164354A1 (en) * 2010-12-28 2012-06-28 Canon Anelva Corporation Sputtering apparatus and manufacturing method of electronic device
US20140102889A1 (en) * 2011-09-09 2014-04-17 Canon Anelva Corporation Film-forming apparatus
US20150259788A1 (en) 2014-03-13 2015-09-17 Makoto Nagamine Sputtering apparatus and manufacturing method of magnetoresistive element
US20150279635A1 (en) 2014-03-31 2015-10-01 Applied Materials, Inc. Deposition system with multi-cathode and method of manufacture thereof

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
European Search Report for EP16879880 dated Jun. 12, 2019.
International Search Report and Written Opinion dated Mar. 20, 2017 for PCT Application No. PCT/US2016/066080.

Also Published As

Publication number Publication date
WO2017112439A1 (en) 2017-06-29
CN108604533B (zh) 2023-08-15
EP3391406A1 (en) 2018-10-24
US20170178877A1 (en) 2017-06-22
TWI778947B (zh) 2022-10-01
JP7066626B2 (ja) 2022-05-13
KR20180087449A (ko) 2018-08-01
SG11201804855SA (en) 2018-07-30
CN108604533A (zh) 2018-09-28
EP3391406A4 (en) 2019-07-24
TW201732063A (zh) 2017-09-16
JP2019502030A (ja) 2019-01-24
KR102663848B1 (ko) 2024-05-03

Similar Documents

Publication Publication Date Title
US10431440B2 (en) Methods and apparatus for processing a substrate
TWI756401B (zh) 用於在介電質濺射期間減少工件中的缺陷的電漿腔室靶材
EP3586353B1 (en) Apparatus for multi-cathode substrate processing and a shield for said apparatus
EP3337914B1 (en) Method and apparatus for co-sputtering multiple targets
TWI828618B (zh) 在沉積腔室中執行糊貼的方法
JP2019099882A (ja) Ｐｖｄ処理方法およびｐｖｄ処理装置
JP2020506300A5 (ko)
US11227751B1 (en) Plasma chamber target for reducing defects in workpiece during dielectric sputtering
TW201408803A (zh) 用於方向性材料沉積的pvd設備、方法及工件
US20180327897A1 (en) Re-deposition free sputtering system
US20210327692A1 (en) Multi-cathode processing chamber with dual rotatable shields
US20180073150A1 (en) Single oxide metal deposition chamber
US20190378699A1 (en) Methods and apparatus for magnetron assemblies in semiconductor process chambers

Legal Events

Date Code Title Description
AS Assignment

Owner name: APPLIED MATERIALS, INC., CALIFORNIA

Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNORS:WANG, RONGJUN;SUBRAMANI, ANANTHA K.;CHING, CHI HONG;AND OTHERS;REEL/FRAME:037420/0933

Effective date: 20160104

STPP Information on status: patent application and granting procedure in general

Free format text: RESPONSE AFTER FINAL ACTION FORWARDED TO EXAMINER

STPP Information on status: patent application and granting procedure in general

Free format text: ADVISORY ACTION MAILED

STPP Information on status: patent application and granting procedure in general

Free format text: RESPONSE AFTER FINAL ACTION FORWARDED TO EXAMINER

STPP Information on status: patent application and granting procedure in general

Free format text: NOTICE OF ALLOWANCE MAILED -- APPLICATION RECEIVED IN OFFICE OF PUBLICATIONS

STPP Information on status: patent application and granting procedure in general

Free format text: AWAITING TC RESP., ISSUE FEE NOT PAID

STPP Information on status: patent application and granting procedure in general

Free format text: PUBLICATIONS -- ISSUE FEE PAYMENT VERIFIED

STCF Information on status: patent grant

Free format text: PATENTED CASE

MAFP Maintenance fee payment

Free format text: PAYMENT OF MAINTENANCE FEE, 4TH YEAR, LARGE ENTITY (ORIGINAL EVENT CODE: M1551); ENTITY STATUS OF PATENT OWNER: LARGE ENTITY

Year of fee payment: 4