US10319610B2 - Package carrier - Google Patents
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- US10319610B2 US10319610B2 US15/828,334 US201715828334A US10319610B2 US 10319610 B2 US10319610 B2 US 10319610B2 US 201715828334 A US201715828334 A US 201715828334A US 10319610 B2 US10319610 B2 US 10319610B2
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- heat conducting
- conducting element
- insulating material
- layer
- substrate
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W74/00—Encapsulations, e.g. protective coatings
- H10W74/01—Manufacture or treatment
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0201—Thermal arrangements, e.g. for cooling, heating or preventing overheating
- H05K1/0203—Cooling of mounted components
- H05K1/0204—Cooling of mounted components using means for thermal conduction connection in the thickness direction of the substrate
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W76/00—Containers; Fillings or auxiliary members therefor; Seals
- H10W76/10—Containers or parts thereof
- H10W76/12—Containers or parts thereof characterised by their shape
- H10W76/15—Containers comprising an insulating or insulated base
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
- H10P72/70—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping
- H10P72/74—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W40/00—Arrangements for thermal protection or thermal control
- H10W40/10—Arrangements for heating
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W40/00—Arrangements for thermal protection or thermal control
- H10W40/20—Arrangements for cooling
- H10W40/22—Arrangements for cooling characterised by their shape, e.g. having conical or cylindrical projections
- H10W40/226—Arrangements for cooling characterised by their shape, e.g. having conical or cylindrical projections characterised by projecting parts, e.g. fins to increase surface area
- H10W40/228—Arrangements for cooling characterised by their shape, e.g. having conical or cylindrical projections characterised by projecting parts, e.g. fins to increase surface area the projecting parts being wire-shaped or pin-shaped
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W40/00—Arrangements for thermal protection or thermal control
- H10W40/20—Arrangements for cooling
- H10W40/25—Arrangements for cooling characterised by their materials
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
- H10W70/01—Manufacture or treatment
- H10W70/05—Manufacture or treatment of insulating or insulated package substrates, or of interposers, or of redistribution layers
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
- H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
- H10W70/62—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their interconnections
- H10W70/65—Shapes or dispositions of interconnections
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
- H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
- H10W70/67—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their insulating layers or insulating parts
- H10W70/68—Shapes or dispositions thereof
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
- H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
- H10W70/67—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their insulating layers or insulating parts
- H10W70/68—Shapes or dispositions thereof
- H10W70/685—Shapes or dispositions thereof comprising multiple insulating layers
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W76/00—Containers; Fillings or auxiliary members therefor; Seals
- H10W76/10—Containers or parts thereof
- H10W76/12—Containers or parts thereof characterised by their shape
- H10W76/15—Containers comprising an insulating or insulated base
- H10W76/157—Containers comprising an insulating or insulated base having interconnections parallel to the insulating or insulated base
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
- H10P72/70—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping
- H10P72/74—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support
- H10P72/743—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support used as a support during manufacture of interconnect decals or build up layers
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W40/00—Arrangements for thermal protection or thermal control
- H10W40/20—Arrangements for cooling
- H10W40/25—Arrangements for cooling characterised by their materials
- H10W40/253—Semiconductors
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W40/00—Arrangements for thermal protection or thermal control
- H10W40/20—Arrangements for cooling
- H10W40/25—Arrangements for cooling characterised by their materials
- H10W40/259—Ceramics or glasses
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
- H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
- H10W70/67—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their insulating layers or insulating parts
- H10W70/68—Shapes or dispositions thereof
- H10W70/682—Shapes or dispositions thereof comprising holes having chips therein
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/851—Dispositions of multiple connectors or interconnections
- H10W72/874—On different surfaces
- H10W72/884—Die-attach connectors and bond wires
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W74/00—Encapsulations, e.g. protective coatings
- H10W74/10—Encapsulations, e.g. protective coatings characterised by their shape or disposition
- H10W74/111—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed
- H10W74/114—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed by a substrate and the encapsulations
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/731—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
- H10W90/734—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between a chip and a stacked insulating package substrate, interposer or RDL
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/731—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
- H10W90/736—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between a chip and a stacked lead frame, conducting package substrate or heat sink
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
- H10W90/754—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked insulating package substrate, interposer or RDL
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/4913—Assembling to base an electrical component, e.g., capacitor, etc.
Definitions
- the present invention relates to a carrier structure, and particularly relates to a package carrier.
- the package carrier is mainly constructed by multiple patterned conductive layers and at least one insulation layer, wherein the insulation layer is disposed between two adjacent patterned conductive layers to achieve the insulation effect.
- a heat dissipation block is usually fixed to the lower surface of the package carrier via an adhesive layer, such that the heat generated by the electronic elements on the package carrier can transfer through the patterned conductive layer and the insulation layer to the heat dissipation block so as to perform thermal conductivity.
- the adhesive layer and the insulation layer generally have a poor thermal conductivity, the thermal resistance is increased when the heat generated by the electronic elements transfers through the insulation layer and the adhesive layer to the heat dissipation block, so as to result in poor heat dissipation.
- using the heat dissipation block fixed to the package carrier also increase the thickness of the package carrier so that the light and thin requirements for current products are unable to be fulfilled.
- the invention provides a package carrier, which is adapted to carry at least one heat generating element.
- the invention also provides a manufacturing method of the package carrier, which is adapted to manufacture the above-mentioned package carrier.
- the package carrier of the invention includes a substrate, at least one heat conducting element, an insulating material, a first patterned circuit layer, and a second patterned circuit layer.
- the substrate has an upper surface and a lower surface opposite to each other, and a through hole connecting the upper surface and the lower surface.
- the heat conducting element is disposed inside the through hole and has a first surface and a second surface opposite to each other.
- the thickness of the heat conducting element is smaller than the thickness of the substrate.
- the insulating material is located between the heat conducting element and the inner wall of the through hole, and the heat conducting element is fixed in the through hole by the insulating material.
- the insulating material has a top surface and a bottom surface opposite to each other.
- the top surface of the insulating material and the upper surface of the substrate are approximately coplanar.
- the bottom surface of the insulating material, the lower surface of the substrate, and the second surface of the heat conducting element are approximately coplanar.
- the insulating material and the heat conducting element define at least one cavity extending from the top surface of the insulating material to the heat conducting element, and the cavity exposes a portion of the first surface of the heat conducting element.
- the first patterned circuit layer is disposed on the upper surface of the substrate and the top surface of the insulating material, and exposes portions of the substrate and the top surface.
- the second patterned circuit layer is disposed on the lower surface of the substrate and the bottom surface of the insulating material, and exposes portions of the substrate and the bottom surface.
- materials of the heat conducting element include ceramic, silicon, silicon carbide, diamond, metal, or a lamination layer formed by a combination thereof.
- the heat conducting element includes a first metal layer, a second metal layer, and a heat conducting material layer.
- the heat conducting material layer is disposed between the first metal layer and the second metal layer, and the first metal layer and the second metal layer have the first surface and the second surface respectively.
- the package carrier further includes a first solder mask layer and a second solder mask layer.
- the first solder mask layer is at least disposed on a portion of the first patterned circuit layer and the substrate exposed by the first patterned circuit layer.
- the second solder mask layer is at least disposed on the substrate exposed by the second patterned circuit layer.
- the package carrier further includes a first surface treatment layer and a second surface treatment layer.
- the first surface treatment layer is at least disposed on the first patterned circuit layer.
- the second surface treatment layer is disposed on the second patterned circuit layer.
- the first patterned circuit layer is further disposed on the inner wall of the cavity and the first surface of the heat conducting element exposed by the cavity.
- the first surface treatment layer is further disposed on the first surface of the heat conducting element exposed by the cavity.
- the at least one heat conducting element includes a first heat conducting element and a second heat conducting element.
- the at least one cavity includes a first cavity and a second cavity.
- the first cavity exposes a portion of the first heat conducting element and the second cavity exposes a portion of the second heat conducting element.
- the thickness of the first heat conducting element is smaller than the thickness of the second heat conducting element, and the depth of the first cavity is greater than the depth of the second cavity.
- the invention provides the manufacturing method of the package carrier, which includes following steps. Providing a substrate, wherein the substrate has an upper surface and a lower surface opposite to each other, and a through hole connecting the upper surface and the lower surface. Disposing at least one heat conducting element inside the through hole of the substrate, wherein the thickness of the heat conducting element is smaller than the thickness of the substrate.
- the heat conducting element is fixed in the through hole by an insulating material, and the insulating material is located between the heat conducting element and the inner wall of the through hole.
- the insulating material has a top surface and a bottom surface opposite to each other
- the heat conducting element has a first surface and a second surface opposite to each other
- the top surface of the insulating material and the upper surface of the substrate are approximately coplanar
- the bottom surface of the insulating material, the lower surface of the substrate, and the second surface of the heat conducting element are approximately coplanar.
- steps for disposing the heat conducting element inside the through hole of the substrate comprise: providing an adhesive layer on the lower surface of the substrate, wherein the adhesive layer and the through hole of the substrate define an accommodating space; disposing the heat conducting element on the adhesive layer and inside the accommodating space; filling the accommodating space with the insulating material to encapsulate the heat conducting element and to fix the heat conducting element in the through hole; and removing the adhesive layer to expose the lower surface of the substrate and the bottom surface of the insulating material.
- steps for forming the first patterned circuit layer and the second patterned circuit layer comprise: forming a first circuit layer and a second circuit layer, wherein the first circuit layer is formed on the upper surface of the substrate and the top surface of the insulating material, and the second circuit layer is formed on the lower surface of the substrate and the bottom surface of the insulating material; and patterning the first circuit layer and the second circuit layer to form the first patterned circuit layer and the second patterned circuit layer.
- steps after forming the cavity extending from the top surface of the insulating material to the heat conducting element further comprise: forming a first solder mask layer, wherein the first solder mask layer is at least disposed on a portion of the first patterned circuit layer and the substrate exposed by the first patterned circuit layer; and forming a second solder mask layer, wherein the second solder mask layer is at least disposed on the substrate exposed by the second patterned circuit layer.
- steps after forming the cavity extending from the top surface of the insulating material to the heat conducting element further comprise: forming a first surface treatment layer, wherein the first surface treatment layer is at least disposed on the first patterned circuit layer; and forming a second surface treatment layer, wherein the second surface treatment layer is disposed on the second patterned circuit layer.
- the first patterned circuit layer is further disposed on the inner wall of the cavity and the first surface of the heat conducting element exposed by the cavity.
- the first surface treatment layer is further disposed on the first surface of the heat conducting element exposed by the cavity.
- materials of the heat conducting element include ceramic, silicon, silicon carbide, diamond, metal, or a lamination layer formed by a combination thereof.
- the heat conducting element includes a first metal layer, a second metal layer, and a heat conducting material layer.
- the heat conducting material layer is disposed between the first metal layer and the second metal layer, and the first metal layer and the second metal layer have the first surface and the second surface respectively.
- the at least one heat conducting element includes a first heat conducting element and a second heat conducting element.
- the at least one cavity includes a first cavity and a second cavity.
- the first cavity exposes a portion of the first heat conducting element and the second cavity exposes a portion of the second heat conducting element.
- the thickness of the first heat conducting element is smaller than the thickness of the second heat conducting element, and the depth of the first cavity is greater than the depth of the second cavity.
- the heat conducting element of the package carrier of the invention is fixed in the through hole of the substrate by the insulating material, and the cavity of the insulating material exposes a portion of the first surface of the heat conducting element. Therefore, subsequently, when the package carrier carries a heat generating element, the heat generating element can be disposed in the cavity of the insulating material, can directly contact the heat conducting element, and can electrically connect with the first surface treatment layer by the wire. As a result, in the package carrier of the invention, except that the heat generated by the heat conducting element can effectively transfer to the external environment, the wiring path is also shortened effectively, so as to reduce the thickness of the package structure.
- FIG. 1A to FIG. 1G are cross-sectional schematic views depicting a manufacturing method of a package carrier of one embodiment of the invention.
- FIG. 2 is a cross-sectional schematic view depicting a package carrier of one embodiment of the invention.
- FIG. 3 is a cross-sectional schematic view depicting a package carrier of one embodiment of the invention.
- FIG. 4 is a cross-sectional schematic view depicting the package carrier in FIG. 1G carrying a heat generating element.
- FIG. 5 is a cross-sectional schematic view depicting the package carrier in FIG. 2 carrying a heat generating element.
- FIG. 6 depicts a package carrier carrying two heat generating elements according to one embodiment of the invention.
- FIG. 1A to FIG. 1G are cross-sectional schematic views depicting a manufacturing method of a package carrier of one embodiment of the invention.
- the substrate 110 of the present embodiment can be, for example, a single layer circuit board, a double layer circuit board, or a multi-layer circuit board.
- the substrate 110 is a double layer circuit board which is constructed by a dielectric layer 112 and circuit layers 114 , 116 located at two opposite sides of the dielectric layer 112 , but the invention is not limited thereto.
- a through hole H connecting the upper surface 111 and the lower surface 113 is formed in the substrate 110 by punching, routing, mechanical drilling, laser drilling, or other appropriate methods.
- the adhesive layer 115 is only adhered to the lower surface 113 of the substrate 110 temporarily to serve as a supporting element for a subsequent heat conducting element 120 .
- the heat conducting element 120 is disposed on the adhesive layer 115 and located inside the accommodating space S, wherein the thickness of the heat conducting element 120 is smaller than the thickness of the substrate 110 , the thickness of the heat conducting element 120 is, for example, from one tenth to nine-tenths of the thickness of the substrate 110 , and will not be limited thereto.
- the heat conducting element 120 has a first surface 122 and a second surface 124 opposite to each other, and the second surface 124 directly contacts the adhesive layer 115 .
- materials of the heat conducting element 120 include ceramic, silicon, silicon carbide, diamond, metal, or a lamination layer formed by a combination thereof.
- an insulating material 130 fills the accommodating space S so as to encapsulate the heat conducting element 120 and to fix the heat conducting element 120 in the through hole H of the substrate 110 , wherein the insulating material 130 has a top surface 132 and a bottom surface 134 opposite to each other.
- the heat conducting element 120 is fixed in the through hole H of the substrate 110 by the insulating material 130 , and the insulating material 130 is located between the heat conducting element 120 and the inner wall of the through hole H.
- the insulating material 130 is used to fix the relative position between the heat conducting element 120 and the substrate 110 .
- first circuit layer 140 ′ and a second circuit layer 150 ′ framing a first circuit layer 140 ′ and a second circuit layer 150 ′, wherein the first circuit layer 140 ′ is formed on the upper surface 111 of the substrate 110 and the top surface 132 of the insulating material 130 , and the second circuit layer 150 ′ is formed on the lower surface 113 of the substrate 110 and the bottom surface 134 of the insulating material 130 .
- the method to form the first circuit layer 140 ′ and the second circuit layer 150 ′ is, for example, electroplating method.
- the first circuit layer 140 ′ and the second circuit layer 150 ′ patterning the first circuit layer 140 ′ and the second circuit layer 150 ′, so as to form a first patterned circuit layer 140 and a second patterned circuit layer 150 .
- the first patterned circuit layer 140 is formed on the upper surface 111 of the substrate 110 and the top surface 132 of the insulating material 130 , and exposes a portion of the dielectric layer 112 of the substrate 110 and a portion of the top surface 132 of the insulating material 130 .
- the second patterned circuit layer 150 is formed on the lower surface 113 of the substrate 110 and the bottom surface 134 of the insulating material 130 , and exposes a portion of the dielectric layer 112 of the substrate 110 and a portion of the bottom surface 134 of the insulating material 130 .
- the first patterned circuit layer 140 serving as a mask, forming at least one cavity C extending from the top surface 132 of the insulating material 130 to the heat conducting element 120 , wherein the cavity C exposes a portion of the first surface 122 of the heat conducting element 120 .
- the first patterned circuit layer 140 can serve as the mask to form the cavity C by laser ablation or routing method.
- first solder mask layer 160 is at least disposed on a portion of the first patterned circuit layer 140 and the dielectric layer 112 , which is exposed by the first patterned circuit layer 140 , of the substrate 110
- second solder mask layer 170 is at least disposed on the dielectric layer 112 , which is exposed by the second patterned circuit layer 150 , of the substrate 110 .
- first surface treatment layer 180 and a second surface treatment layer 190 in order to maintain the structural properties of the exposed first patterned circuit layer 140 and the exposed second patterned circuit layer 150 , forming a first surface treatment layer 180 and a second surface treatment layer 190 , wherein the first surface treatment layer 180 is at least disposed on the first patterned circuit layer 140 exposed by the first solder mask layer 160 , and the second surface treatment layer 190 is disposed on the second patterned circuit layer 150 .
- the first surface treatment layer 180 is further disposed on the first surface 122 , which is exposed by the cavity C, of the heat conducting element 120 .
- the material of the first surface treatment layer 180 and the second surface treatment layer 190 in the present embodiment is, for example, nickel, palladium, gold, or alloys of the said materials, so as to prevent the first patterned circuit layer 140 and the second patterned circuit layer 150 from being oxidized or being subject to the external contamination. So far, the package carrier 100 a is completely manufactured.
- the package carrier 100 a of the present embodiment includes the substrate 110 , the heat conducting element 120 , the insulating material 130 , the first patterned circuit layer 140 , and the second patterned circuit layer 150 .
- the substrate 110 has the upper surface 111 and the lower surface 113 opposite to each other, and the through hole H connecting the upper surface 111 and the lower surface 113 .
- the heat conducting element 120 is disposed inside the through hole H and has a first surface 122 and a second surface 124 opposite to each other. The thickness of the heat conducting element 120 is smaller than the thickness of the substrate 110 .
- the insulating material 130 is located between the heat conducting element 120 and the inner wall of the through hole H, and the heat conducting element 120 is fixed in the through hole H by the insulating material 130 .
- the insulating material 130 has the top surface 132 and the bottom surface 134 opposite to each other.
- the top surface 132 of the insulating material 130 and the upper surface 111 of the substrate 110 are approximately coplanar.
- the bottom surface 134 of the insulating material 130 , the lower surface 113 of the substrate 110 , and the second surface 124 of the heat conducting element 120 are approximately coplanar.
- the insulating material 130 and the heat conducting element 120 define at least one cavity C extending from the top surface 132 of the insulating material 130 to the heat conducting element 120 , and the cavity C exposes a portion of the first surface 122 of the heat conducting element 120 .
- the first patterned circuit layer 140 is disposed on the upper surface 111 of the substrate 110 and the top surface 132 of the insulating material 130 , and exposes a portion of the dielectric layer 112 of the substrate 110 and a portion of the top surface 132 of the insulating material 130 .
- the second patterned circuit layer 150 is disposed on the lower surface 113 of the substrate 110 and the bottom surface 134 of the insulating material 130 , and exposes a portion of the dielectric layer 112 of the substrate 110 and a portion of the bottom surface 134 of the insulating material 130 .
- the package carrier 100 a of the present embodiment further includes the first solder mask layer 160 and the second solder mask layer 170 , wherein the first solder mask layer 160 is at least disposed on a portion of the first patterned circuit layer 140 and the dielectric layer 112 , which is exposed by the first patterned circuit layer 140 , of the substrate 110 , and the second solder mask layer 170 is at least disposed on the dielectric layer 112 , which is exposed by the second patterned circuit layer 150 , of the substrate 110 .
- the package carrier 100 a of the present embodiment further includes the first surface treatment layer 180 and the second surface treatment layer 190 , wherein the first surface treatment layer 180 is disposed on the first patterned circuit layer 140 exposed by the first solder mask layer 160 , and the second surface treatment layer 190 is disposed on the second patterned circuit layer 150 .
- the heat conducting element 120 of the package carrier 100 a of the present embodiment is fixed in the through hole H of the substrate 110 by the insulating material 130 , and the cavity C of the insulating material 130 exposes a portion of the first surface 122 of the heat conducting element 120 . Therefore, referring to FIG. 4 , subsequently, when the package carrier 100 a carries the heat generating element 210 , the heat generating element 210 can be disposed in the cavity C of the insulating material 130 , can directly contact the first surface treatment layer 180 located on the first surface 122 of the heat conducting element 120 , and can electrically connect with the first surface treatment layer 180 located on the first patterned circuit layer 140 by a plurality of wires 220 .
- the heat generating element 210 , the wire 220 , and the first solder mask layer 160 and the first surface treatment layer 180 of the package carrier 100 a are encapsulated by a molding compound 230 so as to form a package structure 10 .
- the wiring path of the wire 220 is also shortened effectively because of the configurational position of the heat conducting element 210 , so as to effectively reduce the thickness of the package structure 10 that is formed.
- the present embodiment is not limited to the forming sequence of the cavity C of the insulating material 130 , the first patterned circuit layer 140 , and the second patterned circuit layer 150 .
- the cavity C of the insulating material 130 is formed after the first patterned circuit layer 140 and the second patterned circuit layer 150
- the cavity C of the insulating material 130 of the package carrier 100 b can also be formed before the first patterned circuit layer 140 a and the second patterned circuit layer 150 a , and therefore the first patterned circuit layer 140 a is further disposed on the inner wall of the cavity C and the first surface 122 of the heat conducting element 120 exposed by the cavity C.
- the first surface treatment layer 180 a that is subsequently formed can further disposed on the first patterned circuit layer 140 a on the first surface 122 of the heat conducting element 120 exposed by the cavity C.
- at least the first patterned circuit layer 140 a and the first surface treatment layer 180 a located on the first patterned circuit layer 140 a are disposed on the cavity C of the insulating material 130 .
- the heat generating element 210 can be disposed in the cavity C of the insulating material 130 , can directly contact the first surface treatment layer 180 a , and can electrically connect with the first surface treatment layer 180 a located on the first patterned circuit layer 140 a by the wire 220 .
- the heat generating element 210 , the wire 220 , and the first solder mask layer 160 and the first surface treatment layer 180 a of the package carrier 100 b are encapsulated by the molding compound 230 so as to form a package structure 20 .
- the wiring path of the wire 220 is also shortened effectively because of the configurational position of the heat conducting element 210 , so as to effectively reduce the thickness of the package structure 20 that is formed.
- the present embodiment is also not limited to the structure type of the heat conducting element 120 .
- the heat conducting element 120 is embodied as a block structure having arc-shaped corners so as to increase the adhesion force between the heat conducting element 120 and the insulating material 130 , but in another embodiment, referring to FIG.
- the heat conducting element 120 a of the package carrier 100 c in the present embodiment can also be formed by a first metal layer 121 , a second metal layer 123 , and a heat conducting material layer 125 , wherein the heat conducting material layer 125 is disposed between the first metal layer 121 and the second metal layer 123 , and the first metal layer 121 and the second metal layer 123 have the first surface 122 and the second surface 124 respectively.
- materials of the heat conducting material layer 125 include ceramic, silicon, silicon carbide, diamond, etc., the ceramic material is, for example, alumina, aluminum nitride, etc., but the invention is not be limited thereto.
- the invention is not limited to the quantity of cavity C of the insulating material 130 , and to the quantity of each of the heat conducting elements 120 , 120 a disposed in the package carriers 100 a , 100 b , 100 c .
- the quantity of the cavity C of the insulating material 130 is one, and the quantity of each of the heat conducting elements 120 , 120 a disposed in the package carriers 100 a , 100 b , 100 c is also one.
- the package carrier 100 d of the present embodiment has two heat conducting elements, namely a first heat conducting element 120 b and a second heat conducting element 120 c
- the insulating material 130 ′ has a first cavity C 1 and a second cavity C 2 .
- the first cavity C 1 exposes a portion of the first heat conducting element 120 b and the second cavity C 2 exposes a portion of the second heat conducting element 120 c .
- the thickness T 1 of the first heat conducting element 120 b is smaller than the thickness T 2 of the second heat conducting element 120 c
- the depth D 1 of the first cavity C 1 is greater than the depth D 2 of the second cavity C 2 .
- the package carrier 100 d is adapted to carry two heat generating elements 210 a , 210 b.
- the heat generating elements 210 a , 210 b can be respectively disposed in the first cavity C 1 and the second cavity C 2 of the insulating material 130 ′, can directly contact the first surface treatment layer 180 , and can electrically connect with the first surface treatment layer 180 located on the first patterned circuit layer 140 on the upper surface 111 of the substrate 110 by the wire 220 .
- the heat generating elements 210 a , 210 b , the wire 220 , and the first solder mask layer 160 and the first surface treatment layer 180 of the package carrier 100 d are encapsulated by the molding compound 230 so as to form a package structure 30 .
- the wiring path of the wire 220 is also shortened effectively because of the configurational position of the heat conducting elements 210 a , 210 b , so as to simultaneously reduce the wiring cost and to effectively reduce the thickness of the package structure 30 that is formed.
- the heat conducting element of the package carrier of the invention is fixed in the through hole of the substrate by the insulating material, and the cavity of the insulating material exposes a portion of the first surface of the heat conducting element. Therefore, subsequently, when the package carrier carries a heat generating element, the heat generating element can be disposed in the cavity of the insulating material, can directly contact the heat conducting element, and can electrically connect with the first surface treatment layer by the wire.
- the wiring path is also shortened effectively, so as to reduce cost and to reduce the thickness of the package structure.
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Abstract
A package carrier includes a substrate, at least one heat conducting element, an insulating material, a first patterned circuit layer and a second patterned circuit layer. The substrate has an upper surface, a lower surface and a through hole. The heat conducting element is disposed inside the through hole and has a first surface and a second surface. The insulating material has a top surface, a bottom surface and at least one cavity extending from the top surface to the heat conducting element. The heat conducting element is fixed in the through hole by the insulating material, and the cavity exposes a portion of the first surface of the heat conducting element. The first patterned circuit layer is disposed on the upper surface and the top surface, and the second patterned circuit layer is disposed on the lower surface and the bottom surface.
Description
This application is a divisional application of and claims the priority benefit of U.S. application Ser. No. 15/000,034, filed on Jan. 19, 2016, now allowed, which claims the priority benefit of Taiwan application serial no. 104130526, filed on Sep. 16, 2015. The entirety of each of the above-mentioned patent applications is hereby incorporated by reference herein and made a part of specification.
The present invention relates to a carrier structure, and particularly relates to a package carrier.
In general, the package carrier is mainly constructed by multiple patterned conductive layers and at least one insulation layer, wherein the insulation layer is disposed between two adjacent patterned conductive layers to achieve the insulation effect. In order to enhance the heat dissipation effect, a heat dissipation block is usually fixed to the lower surface of the package carrier via an adhesive layer, such that the heat generated by the electronic elements on the package carrier can transfer through the patterned conductive layer and the insulation layer to the heat dissipation block so as to perform thermal conductivity. Because the adhesive layer and the insulation layer generally have a poor thermal conductivity, the thermal resistance is increased when the heat generated by the electronic elements transfers through the insulation layer and the adhesive layer to the heat dissipation block, so as to result in poor heat dissipation. In addition, using the heat dissipation block fixed to the package carrier also increase the thickness of the package carrier so that the light and thin requirements for current products are unable to be fulfilled.
The invention provides a package carrier, which is adapted to carry at least one heat generating element.
The invention also provides a manufacturing method of the package carrier, which is adapted to manufacture the above-mentioned package carrier.
The package carrier of the invention includes a substrate, at least one heat conducting element, an insulating material, a first patterned circuit layer, and a second patterned circuit layer. The substrate has an upper surface and a lower surface opposite to each other, and a through hole connecting the upper surface and the lower surface. The heat conducting element is disposed inside the through hole and has a first surface and a second surface opposite to each other. The thickness of the heat conducting element is smaller than the thickness of the substrate. The insulating material is located between the heat conducting element and the inner wall of the through hole, and the heat conducting element is fixed in the through hole by the insulating material. The insulating material has a top surface and a bottom surface opposite to each other. The top surface of the insulating material and the upper surface of the substrate are approximately coplanar. The bottom surface of the insulating material, the lower surface of the substrate, and the second surface of the heat conducting element are approximately coplanar. The insulating material and the heat conducting element define at least one cavity extending from the top surface of the insulating material to the heat conducting element, and the cavity exposes a portion of the first surface of the heat conducting element. The first patterned circuit layer is disposed on the upper surface of the substrate and the top surface of the insulating material, and exposes portions of the substrate and the top surface. The second patterned circuit layer is disposed on the lower surface of the substrate and the bottom surface of the insulating material, and exposes portions of the substrate and the bottom surface.
In one embodiment of the invention, materials of the heat conducting element include ceramic, silicon, silicon carbide, diamond, metal, or a lamination layer formed by a combination thereof.
In one embodiment of the invention, the heat conducting element includes a first metal layer, a second metal layer, and a heat conducting material layer. The heat conducting material layer is disposed between the first metal layer and the second metal layer, and the first metal layer and the second metal layer have the first surface and the second surface respectively.
In one embodiment of the invention, the package carrier further includes a first solder mask layer and a second solder mask layer. The first solder mask layer is at least disposed on a portion of the first patterned circuit layer and the substrate exposed by the first patterned circuit layer. The second solder mask layer is at least disposed on the substrate exposed by the second patterned circuit layer.
In one embodiment of the invention, the package carrier further includes a first surface treatment layer and a second surface treatment layer. The first surface treatment layer is at least disposed on the first patterned circuit layer. The second surface treatment layer is disposed on the second patterned circuit layer.
In one embodiment of the invention, the first patterned circuit layer is further disposed on the inner wall of the cavity and the first surface of the heat conducting element exposed by the cavity.
In one embodiment of the invention, the first surface treatment layer is further disposed on the first surface of the heat conducting element exposed by the cavity.
In one embodiment of the invention, the at least one heat conducting element includes a first heat conducting element and a second heat conducting element. The at least one cavity includes a first cavity and a second cavity. The first cavity exposes a portion of the first heat conducting element and the second cavity exposes a portion of the second heat conducting element. The thickness of the first heat conducting element is smaller than the thickness of the second heat conducting element, and the depth of the first cavity is greater than the depth of the second cavity.
The invention provides the manufacturing method of the package carrier, which includes following steps. Providing a substrate, wherein the substrate has an upper surface and a lower surface opposite to each other, and a through hole connecting the upper surface and the lower surface. Disposing at least one heat conducting element inside the through hole of the substrate, wherein the thickness of the heat conducting element is smaller than the thickness of the substrate. The heat conducting element is fixed in the through hole by an insulating material, and the insulating material is located between the heat conducting element and the inner wall of the through hole. The insulating material has a top surface and a bottom surface opposite to each other, the heat conducting element has a first surface and a second surface opposite to each other, the top surface of the insulating material and the upper surface of the substrate are approximately coplanar, and the bottom surface of the insulating material, the lower surface of the substrate, and the second surface of the heat conducting element are approximately coplanar. Forming a first patterned circuit layer and a second patterned circuit layer. The first patterned circuit layer is at least formed on the upper surface of the substrate and the top surface of the insulating material and exposes portions of the substrate and the top surface. The second patterned circuit layer is formed on the lower surface of the substrate and the bottom surface of the insulating material and exposes portions of the substrate and the bottom surface. Forming at least one cavity extending from the top surface of the insulating material to the heat conducting element, wherein the cavity exposes a portion of the first surface of the heat conducting element.
In one embodiment of the invention, steps for disposing the heat conducting element inside the through hole of the substrate comprise: providing an adhesive layer on the lower surface of the substrate, wherein the adhesive layer and the through hole of the substrate define an accommodating space; disposing the heat conducting element on the adhesive layer and inside the accommodating space; filling the accommodating space with the insulating material to encapsulate the heat conducting element and to fix the heat conducting element in the through hole; and removing the adhesive layer to expose the lower surface of the substrate and the bottom surface of the insulating material.
In one embodiment of the invention, steps for forming the first patterned circuit layer and the second patterned circuit layer comprise: forming a first circuit layer and a second circuit layer, wherein the first circuit layer is formed on the upper surface of the substrate and the top surface of the insulating material, and the second circuit layer is formed on the lower surface of the substrate and the bottom surface of the insulating material; and patterning the first circuit layer and the second circuit layer to form the first patterned circuit layer and the second patterned circuit layer.
In one embodiment of the invention, steps after forming the cavity extending from the top surface of the insulating material to the heat conducting element further comprise: forming a first solder mask layer, wherein the first solder mask layer is at least disposed on a portion of the first patterned circuit layer and the substrate exposed by the first patterned circuit layer; and forming a second solder mask layer, wherein the second solder mask layer is at least disposed on the substrate exposed by the second patterned circuit layer.
In one embodiment of the invention, steps after forming the cavity extending from the top surface of the insulating material to the heat conducting element further comprise: forming a first surface treatment layer, wherein the first surface treatment layer is at least disposed on the first patterned circuit layer; and forming a second surface treatment layer, wherein the second surface treatment layer is disposed on the second patterned circuit layer.
In one embodiment of the invention, the first patterned circuit layer is further disposed on the inner wall of the cavity and the first surface of the heat conducting element exposed by the cavity.
In one embodiment of the invention, the first surface treatment layer is further disposed on the first surface of the heat conducting element exposed by the cavity.
In one embodiment of the invention, materials of the heat conducting element include ceramic, silicon, silicon carbide, diamond, metal, or a lamination layer formed by a combination thereof.
In one embodiment of the invention, the heat conducting element includes a first metal layer, a second metal layer, and a heat conducting material layer. The heat conducting material layer is disposed between the first metal layer and the second metal layer, and the first metal layer and the second metal layer have the first surface and the second surface respectively.
In one embodiment of the invention, the at least one heat conducting element includes a first heat conducting element and a second heat conducting element. The at least one cavity includes a first cavity and a second cavity. The first cavity exposes a portion of the first heat conducting element and the second cavity exposes a portion of the second heat conducting element. The thickness of the first heat conducting element is smaller than the thickness of the second heat conducting element, and the depth of the first cavity is greater than the depth of the second cavity.
Based on the above, the heat conducting element of the package carrier of the invention is fixed in the through hole of the substrate by the insulating material, and the cavity of the insulating material exposes a portion of the first surface of the heat conducting element. Therefore, subsequently, when the package carrier carries a heat generating element, the heat generating element can be disposed in the cavity of the insulating material, can directly contact the heat conducting element, and can electrically connect with the first surface treatment layer by the wire. As a result, in the package carrier of the invention, except that the heat generated by the heat conducting element can effectively transfer to the external environment, the wiring path is also shortened effectively, so as to reduce the thickness of the package structure.
In order to make the aforementioned and other features and advantages of the invention more comprehensible, embodiments accompanying figures are described in detail below.
The accompanying drawings are included to provide a further understanding of the invention, and are incorporated in and constitute a part of this specification. The drawings illustrate embodiments of the invention and, together with the description, serve to explain the principles of the invention.
Subsequently, referring to FIG. 1B , a through hole H connecting the upper surface 111 and the lower surface 113 is formed in the substrate 110 by punching, routing, mechanical drilling, laser drilling, or other appropriate methods.
Subsequently, referring to FIG. 1C , providing an adhesive layer 115 on the lower surface 113 of the substrate 110, wherein the adhesive layer 115 and the through hole H of the substrate 110 define an accommodating space S. It should be noted here, the adhesive layer 115 is only adhered to the lower surface 113 of the substrate 110 temporarily to serve as a supporting element for a subsequent heat conducting element 120. Subsequently, the heat conducting element 120 is disposed on the adhesive layer 115 and located inside the accommodating space S, wherein the thickness of the heat conducting element 120 is smaller than the thickness of the substrate 110, the thickness of the heat conducting element 120 is, for example, from one tenth to nine-tenths of the thickness of the substrate 110, and will not be limited thereto. The heat conducting element 120 has a first surface 122 and a second surface 124 opposite to each other, and the second surface 124 directly contacts the adhesive layer 115. Herein, materials of the heat conducting element 120 include ceramic, silicon, silicon carbide, diamond, metal, or a lamination layer formed by a combination thereof.
Subsequently, referring to FIG. 1C , an insulating material 130 fills the accommodating space S so as to encapsulate the heat conducting element 120 and to fix the heat conducting element 120 in the through hole H of the substrate 110, wherein the insulating material 130 has a top surface 132 and a bottom surface 134 opposite to each other. At this time, as shown in FIG. 1C , the heat conducting element 120 is fixed in the through hole H of the substrate 110 by the insulating material 130, and the insulating material 130 is located between the heat conducting element 120 and the inner wall of the through hole H. In other words, the insulating material 130 is used to fix the relative position between the heat conducting element 120 and the substrate 110.
Subsequently, referring to FIG. 1C and FIG. 1D simultaneously, removing the adhesive layer 115 to expose the lower surface 113 of the substrate 110 and the bottom surface 134 of the insulating material 130. At this time, the top surface 132 of the insulating material 130 and the upper surface 111 of the substrate 110 are approximately coplanar, and the bottom surface 134 of the insulating material 130, the lower surface 113 of the substrate 110, and the second surface 124 of the heat conducting element 120 are approximately coplanar, it means a package carrier 100 a which is subsequently formed (referring to FIG. 1G ) can have a better surface flatness. At this point, steps for disposing the heat conducting element 120 inside the through hole H of the substrate 110 are completed.
Subsequently, referring to FIG. 1D , framing a first circuit layer 140′ and a second circuit layer 150′, wherein the first circuit layer 140′ is formed on the upper surface 111 of the substrate 110 and the top surface 132 of the insulating material 130, and the second circuit layer 150′ is formed on the lower surface 113 of the substrate 110 and the bottom surface 134 of the insulating material 130. Herein, the method to form the first circuit layer 140′ and the second circuit layer 150′ is, for example, electroplating method.
Next, referring to FIG. 1E , patterning the first circuit layer 140′ and the second circuit layer 150′, so as to form a first patterned circuit layer 140 and a second patterned circuit layer 150. At this time, the first patterned circuit layer 140 is formed on the upper surface 111 of the substrate 110 and the top surface 132 of the insulating material 130, and exposes a portion of the dielectric layer 112 of the substrate 110 and a portion of the top surface 132 of the insulating material 130. The second patterned circuit layer 150 is formed on the lower surface 113 of the substrate 110 and the bottom surface 134 of the insulating material 130, and exposes a portion of the dielectric layer 112 of the substrate 110 and a portion of the bottom surface 134 of the insulating material 130.
After that, referring to FIG. 1F , the first patterned circuit layer 140 serving as a mask, forming at least one cavity C extending from the top surface 132 of the insulating material 130 to the heat conducting element 120, wherein the cavity C exposes a portion of the first surface 122 of the heat conducting element 120. Herein, the first patterned circuit layer 140 can serve as the mask to form the cavity C by laser ablation or routing method. In addition, after forming the cavity C, optionally forming a first solder mask layer 160 and a second solder mask layer 170, wherein the first solder mask layer 160 is at least disposed on a portion of the first patterned circuit layer 140 and the dielectric layer 112, which is exposed by the first patterned circuit layer 140, of the substrate 110, and the second solder mask layer 170 is at least disposed on the dielectric layer 112, which is exposed by the second patterned circuit layer 150, of the substrate 110.
Finally, referring to FIG. 1G , in order to maintain the structural properties of the exposed first patterned circuit layer 140 and the exposed second patterned circuit layer 150, forming a first surface treatment layer 180 and a second surface treatment layer 190, wherein the first surface treatment layer 180 is at least disposed on the first patterned circuit layer 140 exposed by the first solder mask layer 160, and the second surface treatment layer 190 is disposed on the second patterned circuit layer 150. Herein, the first surface treatment layer 180 is further disposed on the first surface 122, which is exposed by the cavity C, of the heat conducting element 120. The material of the first surface treatment layer 180 and the second surface treatment layer 190 in the present embodiment is, for example, nickel, palladium, gold, or alloys of the said materials, so as to prevent the first patterned circuit layer 140 and the second patterned circuit layer 150 from being oxidized or being subject to the external contamination. So far, the package carrier 100 a is completely manufactured.
In above structure, referring to FIG. 1G , the package carrier 100 a of the present embodiment includes the substrate 110, the heat conducting element 120, the insulating material 130, the first patterned circuit layer 140, and the second patterned circuit layer 150. The substrate 110 has the upper surface 111 and the lower surface 113 opposite to each other, and the through hole H connecting the upper surface 111 and the lower surface 113. The heat conducting element 120 is disposed inside the through hole H and has a first surface 122 and a second surface 124 opposite to each other. The thickness of the heat conducting element 120 is smaller than the thickness of the substrate 110. The insulating material 130 is located between the heat conducting element 120 and the inner wall of the through hole H, and the heat conducting element 120 is fixed in the through hole H by the insulating material 130. The insulating material 130 has the top surface 132 and the bottom surface 134 opposite to each other. The top surface 132 of the insulating material 130 and the upper surface 111 of the substrate 110 are approximately coplanar. The bottom surface 134 of the insulating material 130, the lower surface 113 of the substrate 110, and the second surface 124 of the heat conducting element 120 are approximately coplanar. The insulating material 130 and the heat conducting element 120 define at least one cavity C extending from the top surface 132 of the insulating material 130 to the heat conducting element 120, and the cavity C exposes a portion of the first surface 122 of the heat conducting element 120. The first patterned circuit layer 140 is disposed on the upper surface 111 of the substrate 110 and the top surface 132 of the insulating material 130, and exposes a portion of the dielectric layer 112 of the substrate 110 and a portion of the top surface 132 of the insulating material 130. The second patterned circuit layer 150 is disposed on the lower surface 113 of the substrate 110 and the bottom surface 134 of the insulating material 130, and exposes a portion of the dielectric layer 112 of the substrate 110 and a portion of the bottom surface 134 of the insulating material 130.
In addition, the package carrier 100 a of the present embodiment further includes the first solder mask layer 160 and the second solder mask layer 170, wherein the first solder mask layer 160 is at least disposed on a portion of the first patterned circuit layer 140 and the dielectric layer 112, which is exposed by the first patterned circuit layer 140, of the substrate 110, and the second solder mask layer 170 is at least disposed on the dielectric layer 112, which is exposed by the second patterned circuit layer 150, of the substrate 110. Otherwise, in order to maintain the structural properties of the exposed first patterned circuit layer 140 and the exposed second patterned circuit layer 150, the package carrier 100 a of the present embodiment further includes the first surface treatment layer 180 and the second surface treatment layer 190, wherein the first surface treatment layer 180 is disposed on the first patterned circuit layer 140 exposed by the first solder mask layer 160, and the second surface treatment layer 190 is disposed on the second patterned circuit layer 150.
The heat conducting element 120 of the package carrier 100 a of the present embodiment is fixed in the through hole H of the substrate 110 by the insulating material 130, and the cavity C of the insulating material 130 exposes a portion of the first surface 122 of the heat conducting element 120. Therefore, referring to FIG. 4 , subsequently, when the package carrier 100 a carries the heat generating element 210, the heat generating element 210 can be disposed in the cavity C of the insulating material 130, can directly contact the first surface treatment layer 180 located on the first surface 122 of the heat conducting element 120, and can electrically connect with the first surface treatment layer 180 located on the first patterned circuit layer 140 by a plurality of wires 220. In addition, the heat generating element 210, the wire 220, and the first solder mask layer 160 and the first surface treatment layer 180 of the package carrier 100 a are encapsulated by a molding compound 230 so as to form a package structure 10. As a result, in the package carrier 100 a of the present embodiment, except that the heat generated by the heat conducting element 210 can effectively and rapidly transfer sequentially through the first surface treatment layer 180, the heat conducting element 120, the second patterned circuit layer 150, and the second surface treatment layer 190 to the external environment, the wiring path of the wire 220 is also shortened effectively because of the configurational position of the heat conducting element 210, so as to effectively reduce the thickness of the package structure 10 that is formed.
It should be noted here, the present embodiment is not limited to the forming sequence of the cavity C of the insulating material 130, the first patterned circuit layer 140, and the second patterned circuit layer 150. In the above-mentioned embodiment, although the cavity C of the insulating material 130 is formed after the first patterned circuit layer 140 and the second patterned circuit layer 150, in another embodiment, referring to FIG. 2 , the cavity C of the insulating material 130 of the package carrier 100 b can also be formed before the first patterned circuit layer 140 a and the second patterned circuit layer 150 a, and therefore the first patterned circuit layer 140 a is further disposed on the inner wall of the cavity C and the first surface 122 of the heat conducting element 120 exposed by the cavity C. In addition, the first surface treatment layer 180 a that is subsequently formed can further disposed on the first patterned circuit layer 140 a on the first surface 122 of the heat conducting element 120 exposed by the cavity C. In other words, at least the first patterned circuit layer 140 a and the first surface treatment layer 180 a located on the first patterned circuit layer 140 a are disposed on the cavity C of the insulating material 130.
Referring to FIG. 5 , subsequently, when the package carrier 100 b carries the heat generating element 210, the heat generating element 210 can be disposed in the cavity C of the insulating material 130, can directly contact the first surface treatment layer 180 a, and can electrically connect with the first surface treatment layer 180 a located on the first patterned circuit layer 140 a by the wire 220. In addition, the heat generating element 210, the wire 220, and the first solder mask layer 160 and the first surface treatment layer 180 a of the package carrier 100 b are encapsulated by the molding compound 230 so as to form a package structure 20. As a result, in the package carrier 100 b of the present embodiment, except that the heat generated by the heat conducting element 210 can effectively and rapidly transfer sequentially through the first surface treatment layer 180 a, the first patterned circuit layer 140 a, the heat conducting element 120, the second patterned circuit layer 150, and the second surface treatment layer 190 to the external environment, the wiring path of the wire 220 is also shortened effectively because of the configurational position of the heat conducting element 210, so as to effectively reduce the thickness of the package structure 20 that is formed.
In addition, the present embodiment is also not limited to the structure type of the heat conducting element 120. In above-mentioned embodiment, although the heat conducting element 120 is embodied as a block structure having arc-shaped corners so as to increase the adhesion force between the heat conducting element 120 and the insulating material 130, but in another embodiment, referring to FIG. 3 , the heat conducting element 120 a of the package carrier 100 c in the present embodiment can also be formed by a first metal layer 121, a second metal layer 123, and a heat conducting material layer 125, wherein the heat conducting material layer 125 is disposed between the first metal layer 121 and the second metal layer 123, and the first metal layer 121 and the second metal layer 123 have the first surface 122 and the second surface 124 respectively. Herein, materials of the heat conducting material layer 125 include ceramic, silicon, silicon carbide, diamond, etc., the ceramic material is, for example, alumina, aluminum nitride, etc., but the invention is not be limited thereto.
In addition, it should be noted here, the invention is not limited to the quantity of cavity C of the insulating material 130, and to the quantity of each of the heat conducting elements 120, 120 a disposed in the package carriers 100 a, 100 b, 100 c. In above-mentioned embodiment, the quantity of the cavity C of the insulating material 130 is one, and the quantity of each of the heat conducting elements 120, 120 a disposed in the package carriers 100 a, 100 b, 100 c is also one. However, in other embodiments, referring to FIG. 6 , the package carrier 100 d of the present embodiment has two heat conducting elements, namely a first heat conducting element 120 b and a second heat conducting element 120 c, and the insulating material 130′ has a first cavity C1 and a second cavity C2. The first cavity C1 exposes a portion of the first heat conducting element 120 b and the second cavity C2 exposes a portion of the second heat conducting element 120 c. The thickness T1 of the first heat conducting element 120 b is smaller than the thickness T2 of the second heat conducting element 120 c, and the depth D1 of the first cavity C1 is greater than the depth D2 of the second cavity C2. Because the insulating material 130′ of the present embodiment has the first cavity C1 and the second cavity C2, the package carrier 100 d is adapted to carry two heat generating elements 210 a, 210 b.
Referring to FIG. 6 , subsequently, when the package carrier 100 d carries the heat generating elements 210 a, 210 b, the heat generating elements 210 a, 210 b can be respectively disposed in the first cavity C1 and the second cavity C2 of the insulating material 130′, can directly contact the first surface treatment layer 180, and can electrically connect with the first surface treatment layer 180 located on the first patterned circuit layer 140 on the upper surface 111 of the substrate 110 by the wire 220. In addition, the heat generating elements 210 a, 210 b, the wire 220, and the first solder mask layer 160 and the first surface treatment layer 180 of the package carrier 100 d are encapsulated by the molding compound 230 so as to form a package structure 30. As a result, in the package carrier 100 d of the present embodiment, except that the heat generated by the heat conducting elements 210 a, 210 b can effectively and rapidly transfer through the first surface treatment layer 180, the first heat conducting element 120 b, the second heat conducting element 120 b, the second patterned circuit layer 150, and the second surface treatment layer 190 to the external environment, the wiring path of the wire 220 is also shortened effectively because of the configurational position of the heat conducting elements 210 a, 210 b, so as to simultaneously reduce the wiring cost and to effectively reduce the thickness of the package structure 30 that is formed.
In summary, the heat conducting element of the package carrier of the invention is fixed in the through hole of the substrate by the insulating material, and the cavity of the insulating material exposes a portion of the first surface of the heat conducting element. Therefore, subsequently, when the package carrier carries a heat generating element, the heat generating element can be disposed in the cavity of the insulating material, can directly contact the heat conducting element, and can electrically connect with the first surface treatment layer by the wire. As a result, in the package carrier of the invention, except that the heat generated by the heat conducting element can effectively transfer to the external environment, the wiring path is also shortened effectively, so as to reduce cost and to reduce the thickness of the package structure.
Although the present invention has been described with reference to the above embodiments, it will be apparent to one of the ordinary skill in the art that modifications to the described embodiments may be made without departing from the spirit of the invention. Accordingly, the scope of the invention is defined by the attached claims not by the above detailed descriptions.
Claims (9)
1. A package carrier, adapted to carry at least one heat generating element, and the package carrier comprising:
a substrate, having an upper surface and a lower surface opposite to each other, and a through hole connecting the upper surface and the lower surface;
at least one heat conducting element, disposed inside the through hole and having a first surface and a second surface opposite to each other, wherein a thickness of the heat conducting element is smaller than a thickness of the substrate;
an insulating material, located between the heat conducting element and an inner wall of the through hole, wherein the heat conducting element is fixed in the through hole by the insulating material, the insulating material has a top surface and a bottom surface opposite to each other, the top surface of the insulating material and the upper surface of the substrate are approximately coplanar, and the bottom surface of the insulating material, the lower surface of the substrate and the second surface of the heat conducting element are approximately coplanar, and the insulating material and the heat conducting element define at least one cavity having a depth and extending from the top surface of the insulating material to the heat conducting element and the cavity exposes a portion of the first surface of the heat conducting element, and the first surface of the heat conducting element is lower than the top surface of the insulating material;
a first patterned circuit layer, disposed on the upper surface of the substrate and the top surface of the insulating material, and exposing portions of the substrate and the top surface; and
a second patterned circuit layer, disposed on the lower surface of the substrate and the bottom surface of the insulating material, and exposing portions of the substrate and the bottom surface.
2. The package carrier as recited in claim 1 , wherein materials of the heat conducting element comprise ceramic, silicon, silicon carbide, diamond, metal, or a lamination layer formed by a combination thereof.
3. The package carrier as recited in claim 1 , wherein the heat conducting element comprises a first metal layer, a second metal layer, and a heat conducting material layer, the heat conducting material layer is disposed between the first metal layer and the second metal layer, and the first metal layer and the second metal layer have the first surface and the second surface respectively.
4. The package carrier as recited in claim 1 , further comprising:
a first solder mask layer, at least disposed on a portion of the first patterned circuit layer and the substrate exposed by the first patterned circuit layer; and
a second solder mask layer, at least disposed on the substrate exposed by the second patterned circuit layer.
5. The package carrier as recited in claim 1 , further comprising:
a first surface treatment layer, at least disposed on the first patterned circuit layer; and
a second surface treatment layer, disposed on the second patterned circuit layer.
6. The package carrier as recited in claim 5 , wherein the first patterned circuit layer is further disposed on an inner wall of the cavity and the first surface of the heat conducting element exposed by the cavity.
7. The package carrier as recited in claim 5 , wherein the first surface treatment layer is further disposed on the first surface of the heat conducting element exposed by the cavity.
8. The package carrier as recited in claim 1 , wherein the at least one heat conducting element comprises a first heat conducting element and a second heat conducting element, the at least one cavity comprises a first cavity and a second cavity, the first cavity exposes a portion of the first heat conducting element, the second cavity exposes a portion of the second heat conducting element, and a thickness of the first heat conducting element is smaller than a thickness of the second heat conducting element and a depth of the first cavity is greater than a depth of the second cavity.
9. A package carrier, comprising:
a substrate, having an upper surface and a lower surface opposite to each other, and having a first through hole and a second through hole connecting the upper surface and the lower surface;
a first heat conducting element, disposed inside the first through hole and having a first surface and a second surface opposite to each other, wherein a thickness of the first heat conducting element is smaller than a thickness of the substrate;
a second heat conducting element, disposed inside the second through hole and having a third surface and a fourth surface opposite to each other, wherein a thickness of the second heat conducting element is smaller than the thickness of the substrate, and the thickness of the first heat conducting element is smaller than the thickness of the second heat conducting element;
an insulating material, located between the first heat conducting element and an inner wall of the first through hole, and located between the second heat conducting element and an inner wall of the second through hole, the insulating material having a top surface and a bottom surface opposite to each other, wherein the insulating material and the first heat conducting element define a first cavity having a first depth and extending from the top surface of the insulating material to the first heat conducting element and the first cavity exposes a portion of the first surface of the heat conducting element, and the insulating material and the second heat conducting element define a second cavity having a second depth and extending from the top surface of the insulating material to the second heat conducting element and the second cavity exposes a portion of the first surface of the heat conducting element, and wherein the first depth of the first cavity is greater than the second depth of the second cavity;
a first patterned circuit layer, disposed on the upper surface of the substrate and the top surface of the insulating material, and exposing portions of the substrate and the top surface of the insulating material; and
a second patterned circuit layer, disposed on the lower surface of the substrate and the bottom surface of the insulating material, and exposing portions of the substrate and the bottom surface of the insulating material.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US15/828,334 US10319610B2 (en) | 2015-09-16 | 2017-11-30 | Package carrier |
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| TW104130526 | 2015-09-16 | ||
| TW104130526A | 2015-09-16 | ||
| TW104130526A TWI584420B (en) | 2015-09-16 | 2015-09-16 | Package carrier board and manufacturing method thereof |
| US15/000,034 US9870931B2 (en) | 2015-09-16 | 2016-01-19 | Package carrier and manufacturing method thereof |
| US15/828,334 US10319610B2 (en) | 2015-09-16 | 2017-11-30 | Package carrier |
Related Parent Applications (1)
| Application Number | Title | Priority Date | Filing Date |
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| US15/000,034 Division US9870931B2 (en) | 2015-09-16 | 2016-01-19 | Package carrier and manufacturing method thereof |
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| US20180090339A1 US20180090339A1 (en) | 2018-03-29 |
| US10319610B2 true US10319610B2 (en) | 2019-06-11 |
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| US15/828,334 Active 2036-03-06 US10319610B2 (en) | 2015-09-16 | 2017-11-30 | Package carrier |
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| JP (1) | JP6286477B2 (en) |
| CN (1) | CN106548985A (en) |
| TW (1) | TWI584420B (en) |
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| WO2016080333A1 (en) * | 2014-11-21 | 2016-05-26 | 株式会社村田製作所 | Module |
| TWI611538B (en) * | 2016-10-25 | 2018-01-11 | Subtron Technology Co., Ltd. | Package carrier board and manufacturing method thereof |
| US10658264B2 (en) * | 2017-09-01 | 2020-05-19 | Analog Devices, Inc. | Diamond-based heat spreading substrates for integrated circuit dies |
| JP6440917B1 (en) * | 2018-04-12 | 2018-12-19 | 三菱電機株式会社 | Semiconductor device |
| TWI722533B (en) * | 2019-08-12 | 2021-03-21 | 旭德科技股份有限公司 | Heat dissipation substrate and manufacturing method thereof |
| CN110621123A (en) * | 2019-09-19 | 2019-12-27 | 生益电子股份有限公司 | Manufacturing method of heat-conducting PCB and PCB |
| CN114203889B (en) * | 2020-09-18 | 2024-09-24 | 欣兴电子股份有限公司 | Circuit board and method for manufacturing the same |
| CN114258184B (en) * | 2020-09-23 | 2023-11-10 | 鹏鼎控股(深圳)股份有限公司 | Method for manufacturing circuit board and circuit board |
| EP4700828A1 (en) * | 2024-08-19 | 2026-02-25 | Industrial Technology Research Institute | Heat sink, thermal module and electronic device |
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| US20120181696A1 (en) * | 2011-01-19 | 2012-07-19 | Subtron Technology Co. Ltd. | Package carrier and manufacturing method thereof |
| US20150364400A1 (en) * | 2014-06-17 | 2015-12-17 | Micron Technology, Inc. | Semiconductor structures and die assemblies including conductive vias and thermally conductive elements and methods of forming such structures |
| US20160230286A1 (en) * | 2015-02-11 | 2016-08-11 | Subtron Technology Co., Ltd. | Package substrate and manufacturing method thereof |
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| JPS5932191A (en) * | 1982-08-18 | 1984-02-21 | イビデン株式会社 | Printed circuit board and method of producing same |
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| JPS59217385A (en) * | 1983-05-25 | 1984-12-07 | イビデン株式会社 | Printed circuit board |
| JPH0316195A (en) * | 1989-01-25 | 1991-01-24 | Matsushita Electric Works Ltd | Printed wiring board |
| JPH07106466A (en) * | 1993-09-30 | 1995-04-21 | Toppan Printing Co Ltd | Printed wiring board for mounting multi-chip module |
| TWI235464B (en) * | 2004-10-12 | 2005-07-01 | Phoenix Prec Technology Corp | Carried structure of integrated electronic element and method for fabricating the same |
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| CN101853818B (en) * | 2009-04-02 | 2013-09-11 | 欣兴电子股份有限公司 | Package substrate structure with cavity and manufacturing method thereof |
| US9398694B2 (en) * | 2011-01-18 | 2016-07-19 | Sony Corporation | Method of manufacturing a package for embedding one or more electronic components |
| TWI408837B (en) * | 2011-02-08 | 2013-09-11 | 旭德科技股份有限公司 | Package carrier board and manufacturing method thereof |
| TWI437930B (en) * | 2011-05-03 | 2014-05-11 | 旭德科技股份有限公司 | Package carrier board and manufacturing method thereof |
| TWI489918B (en) * | 2012-11-23 | 2015-06-21 | 旭德科技股份有限公司 | Package carrier |
| SG10201400390YA (en) * | 2014-03-05 | 2015-10-29 | Delta Electronics Int L Singapore Pte Ltd | Package structure |
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2015
- 2015-09-16 TW TW104130526A patent/TWI584420B/en active
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2016
- 2016-01-19 US US15/000,034 patent/US9870931B2/en active Active
- 2016-02-05 CN CN201610081018.8A patent/CN106548985A/en active Pending
- 2016-05-24 JP JP2016103197A patent/JP6286477B2/en active Active
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20120181696A1 (en) * | 2011-01-19 | 2012-07-19 | Subtron Technology Co. Ltd. | Package carrier and manufacturing method thereof |
| US20150364400A1 (en) * | 2014-06-17 | 2015-12-17 | Micron Technology, Inc. | Semiconductor structures and die assemblies including conductive vias and thermally conductive elements and methods of forming such structures |
| US20160230286A1 (en) * | 2015-02-11 | 2016-08-11 | Subtron Technology Co., Ltd. | Package substrate and manufacturing method thereof |
Also Published As
| Publication number | Publication date |
|---|---|
| US20170079128A1 (en) | 2017-03-16 |
| JP2017059812A (en) | 2017-03-23 |
| JP6286477B2 (en) | 2018-02-28 |
| US20180090339A1 (en) | 2018-03-29 |
| TWI584420B (en) | 2017-05-21 |
| CN106548985A (en) | 2017-03-29 |
| US9870931B2 (en) | 2018-01-16 |
| TW201712816A (en) | 2017-04-01 |
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