TWM615443U - Printed circuit board structure featuring low cost and high process capability - Google Patents
Printed circuit board structure featuring low cost and high process capability Download PDFInfo
- Publication number
- TWM615443U TWM615443U TW110202072U TW110202072U TWM615443U TW M615443 U TWM615443 U TW M615443U TW 110202072 U TW110202072 U TW 110202072U TW 110202072 U TW110202072 U TW 110202072U TW M615443 U TWM615443 U TW M615443U
- Authority
- TW
- Taiwan
- Prior art keywords
- copper
- circuit board
- printed circuit
- board structure
- layer
- Prior art date
Links
Images
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
- H05K3/18—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material
- H05K3/188—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material by direct electroplating
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/22—Secondary treatment of printed circuits
- H05K3/24—Reinforcing the conductive pattern
- H05K3/241—Reinforcing the conductive pattern characterised by the electroplating method; means therefor, e.g. baths or apparatus
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/07—Treatments involving liquids, e.g. plating, rinsing
- H05K2203/0703—Plating
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing Of Printed Wiring (AREA)
- Coupling Device And Connection With Printed Circuit (AREA)
Abstract
本創作屬於印刷電路板製造技術領域,涉及一種低成本及高製程能力的印刷電路板結構,包括電鍍銅、介質層壓合、拆板和後序加工。本創作通過先將銅電鍍在金屬導電板的表面,然後銅面粗糙化處理或鍵合劑後貼到介質層上,不僅保證了結合力,而且降低了成本及提高製程能力。This creation belongs to the technical field of printed circuit board manufacturing, and relates to a low-cost and high-process-capable printed circuit board structure, including copper electroplating, dielectric lamination, de-boarding and subsequent processing. In this creation, copper is first electroplated on the surface of the metal conductive plate, and then the copper surface is roughened or bonded to the dielectric layer, which not only ensures the bonding force, but also reduces the cost and improves the process capability.
Description
本創作涉及印刷電路板製造技術領域,特別涉及一種低成本及高製程能力的印刷電路板結構。This creation relates to the technical field of printed circuit board manufacturing, in particular to a low-cost and high-process capability printed circuit board structure.
一直以來,多層印刷線路板會利用介質層疊銅箔的覆銅層壓板來製造。這種覆銅層壓板是通過在基板半固化(B-stage)樹脂材料(絕緣薄膜)表面上進行熱壓銅箔加工而獲得的。Traditionally, multilayer printed circuit boards have been manufactured using copper clad laminates with dielectric laminated copper foils. This copper-clad laminate is obtained by hot-pressing copper foil processing on the surface of the B-stage resin material (insulating film) of the substrate.
一般為達成微細線路而使用3um薄銅箔熱壓的成本相對較高,而且外購的銅箔形狀一般為卷帶狀,需要剪裁後使用,會有較大的浪費。Generally, the cost of using 3um thin copper foil for hot pressing to achieve fine lines is relatively high, and the copper foil purchased out is generally in the shape of a coil, which needs to be cut and used, which will cause greater waste.
因此有必要開發一種新的印刷電路板製造方法來解決以上問題。Therefore, it is necessary to develop a new printed circuit board manufacturing method to solve the above problems.
本創作的主要目的在於提供一種低成本及高製程能力的印刷電路板結構,能夠減少銅箔的成本及提高製程能力,而且能夠保證結合力。The main purpose of this creation is to provide a low-cost and high-process-capable printed circuit board structure, which can reduce the cost of copper foil and improve the process capability, and can ensure the bonding force.
本創作通過如下技術方案實現上述目的:一種低成本及高製程能力的印刷電路板製造方法,其步驟包括:This creation achieves the above-mentioned purpose through the following technical solutions: a low-cost and high-process-capable printed circuit board manufacturing method, the steps of which include:
①電鍍銅:在金屬導電板的表面電鍍1~10um厚度的銅層;①Plating copper: electroplating a copper layer with a thickness of 1-10um on the surface of the metal conductive plate;
②介質層壓合:在銅面上進行粗糙化處理或塗鍵合劑後,讓銅面與介質層熱壓結合;②Media lamination: After roughening the copper surface or applying bonding agent, let the copper surface and the dielectric layer be hot-compressed;
③拆板:拆離金屬導電板,讓銅層留在介質層的表面;③Removing the board: Remove the metal conductive board, and leave the copper layer on the surface of the dielectric layer;
④後序加工:對銅層進行盲孔、鑽孔、去膠、盲孔AOI、去膠化銅、圖形線路、圖形電鍍、線路蝕刻工藝,而形成新的線路層。④ Subsequent processing: blind holes, drilling, degumming, blind AOI, degumming copper, pattern wiring, pattern plating, and wiring etching processes are performed on the copper layer to form a new wiring layer.
本創作通過如下技術方案實現上述目的:一種低成本及高製程能力的印刷電路板結構,包括:一銅層,該銅層之厚度為1~10um,在該銅層之銅面上進行粗糙化處理或塗鍵合劑;以及一介質層,該介質層與該銅面熱壓結合,且對該銅層進行盲孔、鑽孔、去膠、盲孔AOI、去膠化銅、圖形線路、圖形電鍍、線路蝕刻工藝,而形成新的線路層。更包括一金屬導電板,在該金屬導電板的表面電鍍該銅層。This creation achieves the above objectives through the following technical solutions: a low-cost and high-process-capable printed circuit board structure, including: a copper layer, the thickness of the copper layer is 1-10um, and the copper surface of the copper layer is roughened Processing or coating bonding agent; and a dielectric layer, the dielectric layer and the copper surface are hot-compressed, and the copper layer is blind hole, drilled, glued, blind hole AOI, debonded copper, patterned circuit, pattern Electroplating and circuit etching process to form a new circuit layer. It further includes a metal conductive plate, and the copper layer is electroplated on the surface of the metal conductive plate.
具體的,該步驟②的粗糙化處理包括棕化、黑化、超粗化、中粗化或微蝕。Specifically, the roughening treatment in
進一步的,該銅面的粗糙度控制:Ra值0.1~0.4um、Rz值1.0~5.0um。Further, the roughness of the copper surface is controlled: Ra value is 0.1~0.4um, Rz value is 1.0~5.0um.
具體的,塗抹該鍵合劑的溫度控制在25~90℃,厚度1~100nm。Specifically, the temperature of applying the bonding agent is controlled at 25-90° C., and the thickness is 1-100 nm.
具體的,該介質層是PP、PI、環氧樹脂、LCP、陶瓷基板的半固化樹脂膠片及固化樹脂膠片。Specifically, the dielectric layer is a semi-cured resin film and a cured resin film of PP, PI, epoxy resin, LCP, and ceramic substrate.
採用上述技術方案,本創作技術方案的有益效果是:Using the above technical solution, the beneficial effects of this creative technical solution are:
本創作通過先將銅電鍍在金屬導電板的表面,然後銅面粗糙化或鍵合劑後貼到介質層上,不僅保證了結合力,而且降低了成本及提高製程能力。In this creation, copper is first electroplated on the surface of the metal conductive plate, and then the copper surface is roughened or bonded to the dielectric layer, which not only ensures the bonding force, but also reduces the cost and improves the process capability.
下面結合具體實施例,對本創作作進一步詳細說明。The creation will be further described in detail below in conjunction with specific embodiments.
實施例1:Example 1:
按照如下步驟製造印刷電路板:Follow the steps below to manufacture printed circuit boards:
①在金屬導電板1的表面電鍍1~10um厚度的銅層2。如圖1所示,因為銅層2會附著於金屬導電板1的表面上,所以金屬導電板1的結構可以根據線路板的結構設計,在電鍍過後生成的銅層2結構就可以跟介質層4的結構匹配。①Plating a
②對銅層2表面塗上鍵合劑3(偶聯劑),如圖2(a)所示,然後將鍵合劑3的銅面與介質層4熱壓結合,如圖2(b)所示。低成本的金屬表面處理,而得到可靠的結合力。② Apply bonding agent 3 (coupling agent) to the surface of the
③拆離金屬導電板1,讓銅層2留在介質層4的表面。如圖2(c)所示,壓合過後的金屬導電板1屬於多餘部分,可以從線路板上分離回收處理,然後再進行新一輪的電鍍製程。③Remove the metal
④對銅層2進行盲孔、鑽孔、去膠、盲孔AOI、去膠化銅、圖形線路、圖形電鍍、線路蝕刻等工藝,而形成新的線路層。已經附有銅層2的線路板按照常規的線路工藝進行線路的加工。④ Perform blind holes, drilling, degumming, blind AOI, degumming copper, pattern wiring, pattern electroplating, wiring etching and other processes on the
以上介質層4的材料可包括但不僅限於PP(環氧樹脂加玻璃纖維布或環氧樹脂的半固化樹脂膠片,俗稱Pre-pregnant)、PI(聚醯亞胺薄膜,polyimide film)、環氧樹脂、LCP(液晶聚合物,Liquid Crystal Polymer)、陶瓷基板的半固化(B-stage)樹脂膠片及固化(C-stage)樹脂膠片。The material of the above
實施例2:Example 2:
按照如下步驟製造印刷電路板:Follow the steps below to manufacture printed circuit boards:
①金屬導電板1的表面電鍍1~10um厚度的銅層2,如圖1所示。① The surface of the metal
②對銅層2表面進行棕化、粗化反應,形成粗糙的表面,銅面與介質層4熱壓結合。粗糙度控制:Ra值0.1~0.4um、Rz值1.0~5.0um。這樣銅面的粗糙度能達到要求,又不至於讓銅面變得過於不均勻,影響線路的品質。如圖3(a)所示,棕化令電鍍後生成的銅層2表面呈現細小的凹凸結構,這樣在熱壓的時候就能提高與介質層4的結合力,如圖3(b)所示。② Carry out browning and roughening reactions on the surface of the
③拆離金屬導電板1,讓銅層2留在介質層4的表面,如圖3(c)所示。③Remove the metal
④對銅層2進行盲孔、鑽孔、去膠、盲孔AOI、去膠化銅、圖形線路、圖形電鍍、線路蝕刻等工藝,而形成新的線路層。④ Perform blind holes, drilling, degumming, blind AOI, degumming copper, pattern wiring, pattern electroplating, wiring etching and other processes on the
步驟②的目的在於獲得具有一定粗糙度的銅面,所以也可以用黑化、超粗化、中粗化或微蝕等方式取代。The purpose of
實施例3:Example 3:
按照如下步驟製造印刷電路板:Follow the steps below to manufacture printed circuit boards:
①在金屬導電板1的表面電鍍1~10um厚度的銅層2,如圖1所示。①Plating a
②對銅層2表面進行棕化反應,形成粗糙的表面,粗糙度控制:Ra值0.1~0.4um、Rz值1.0~5.0um。如圖4(a)所示,棕化令電鍍後生成的銅層2表面呈現細小的凹凸結構,這樣有助於提高鍵合劑3與銅面之間結合面積,保證壓合後的結合力。② Carry out browning reaction on the surface of the
③在棕化表面塗上鍵合劑3,如圖4(b)所示,然後將鍵合劑3的銅面與介質層4結合,如圖4(c)所示。③ Coat the
④拆離金屬導電板1,讓銅層2留在介質層4的表面,如圖4(d)所示。④Remove the metal
⑤對銅層2進行盲孔、鑽孔、去膠、盲孔AOI、去膠化銅、圖形線路、圖形電鍍、線路蝕刻等工藝,而形成新的線路層。⑤ Perform blind holes, drilling, degumming, blind AOI, degumming copper, pattern wiring, pattern electroplating, wiring etching and other processes on the
本方法免去了在介質層4上熱壓銅箔的過程,而是將所需要的銅層2先電鍍到金屬導電板1上,然後銅面棕化或塗鍵合劑3後,再轉移到介質層4上。這樣增加銅層2的成本只相當於熱壓3um薄銅箔的1/5~1/4,顯著降低了投入。銅層2與介質層4的結合力能通過銅面的粗糙化處理或鍵合劑來保證,低成本地實現了銅層2在介質層4上的附著。This method dispenses with the process of hot pressing copper foil on the
以上所述的僅是本創作的一些實施方式。對於本領域的普通技術人員來說,在不脫離本創作創造構思的前提下,還可以做出若干變形和改進,這些都屬於本創作的保護範圍。The above are just some implementations of this creation. For those of ordinary skill in the art, without departing from the creative concept of this creation, several modifications and improvements can be made, and these all fall within the protection scope of this creation.
1:金屬導電板 2:銅層 3:鍵合劑 4:介質層1: Metal conductive plate 2: Copper layer 3: Bonding agent 4: Dielectric layer
圖1為金屬導電板電鍍銅後的截面示意圖。 圖2(a)為實施例1銅面塗上鍵合劑後的截面示意圖。 圖2(b)為實施例1介質層壓合過後的截面示意圖。 圖2(c)為實施例1金屬導電板拆板後線路板的截面圖。 圖3(a)為實施例2銅面粗糙化後的截面示意圖。 圖3(b)為實施例2介質層壓合過後的截面示意圖。 圖3(c)為實施例2金屬導電板拆板後線路板的截面圖。 圖4(a)為實施例3銅面粗糙化後的截面示意圖。 圖4(b)為實施例3銅面塗上鍵合劑後的截面示意圖。 圖4(c)為實施例3介質層壓合過後的截面示意圖。 圖4(d)為實施例3金屬導電板拆板後線路板的截面圖。 Figure 1 is a schematic cross-sectional view of a metal conductive plate after copper electroplating. Figure 2(a) is a schematic cross-sectional view of the copper surface of Example 1 after being coated with a bonding agent. Figure 2(b) is a schematic cross-sectional view of Example 1 after the media is laminated. Figure 2(c) is a cross-sectional view of the circuit board after the metal conductive plate of Example 1 is removed. Fig. 3(a) is a schematic cross-sectional view of the copper surface of Example 2 after roughening. Figure 3(b) is a schematic cross-sectional view of Example 2 after the media is laminated. Fig. 3(c) is a cross-sectional view of the circuit board after the metal conductive plate of Example 2 is disassembled. 4(a) is a schematic cross-sectional view of the copper surface of Example 3 after roughening. Fig. 4(b) is a schematic cross-sectional view of the copper surface of Example 3 after being coated with a bonding agent. Figure 4(c) is a schematic cross-sectional view of Example 3 after the media is laminated. Fig. 4(d) is a cross-sectional view of the circuit board after the metal conductive plate of Example 3 is removed.
1:金屬導電板 1: Metal conductive plate
2:銅層 2: Copper layer
3:鍵合劑 3: Bonding agent
4:介質層 4: Dielectric layer
Claims (6)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN202010149921.X | 2020-03-06 | ||
CN202010149921.XA CN111328206B (en) | 2020-03-06 | 2020-03-06 | Method for manufacturing printed circuit board |
Publications (1)
Publication Number | Publication Date |
---|---|
TWM615443U true TWM615443U (en) | 2021-08-11 |
Family
ID=71171856
Family Applications (2)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
TW110106767A TWI788791B (en) | 2020-03-06 | 2021-02-25 | Printed circuit board manufacturing method and structure thereof with low cost and high process capability |
TW110202072U TWM615443U (en) | 2020-03-06 | 2021-02-25 | Printed circuit board structure featuring low cost and high process capability |
Family Applications Before (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
TW110106767A TWI788791B (en) | 2020-03-06 | 2021-02-25 | Printed circuit board manufacturing method and structure thereof with low cost and high process capability |
Country Status (2)
Country | Link |
---|---|
CN (1) | CN111328206B (en) |
TW (2) | TWI788791B (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
TWI788791B (en) * | 2020-03-06 | 2023-01-01 | 大陸商柏承科技(昆山)股份有限公司 | Printed circuit board manufacturing method and structure thereof with low cost and high process capability |
Family Cites Families (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN102413639B (en) * | 2011-07-27 | 2015-04-15 | 深南电路有限公司 | Manufacturing method of circuit board |
CN104113994A (en) * | 2013-04-22 | 2014-10-22 | 上海美维科技有限公司 | Method for manufacturing printed circuit board by using novel and improved semi-additive process |
CN107105578A (en) * | 2017-04-17 | 2017-08-29 | 复旦大学 | It is a kind of to prepare two-sided and multilayer circuit plating stripping technology |
CN109601025A (en) * | 2017-07-31 | 2019-04-09 | 卢森堡电路箔片股份有限公司 | Copper-clad laminate and printed circuit board including the copper-clad laminate |
KR102661275B1 (en) * | 2017-10-26 | 2024-04-29 | 미쓰이금속광업주식회사 | Ultra-thin copper foil, ultra-thin copper foil with carrier, and method for manufacturing printed wiring board |
CN108566734B (en) * | 2018-06-05 | 2021-10-22 | 上海美维科技有限公司 | Method for manufacturing printed circuit board by using imprinting process |
CN111328206B (en) * | 2020-03-06 | 2022-08-09 | 柏承科技(昆山)股份有限公司 | Method for manufacturing printed circuit board |
-
2020
- 2020-03-06 CN CN202010149921.XA patent/CN111328206B/en active Active
-
2021
- 2021-02-25 TW TW110106767A patent/TWI788791B/en active
- 2021-02-25 TW TW110202072U patent/TWM615443U/en unknown
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
TWI788791B (en) * | 2020-03-06 | 2023-01-01 | 大陸商柏承科技(昆山)股份有限公司 | Printed circuit board manufacturing method and structure thereof with low cost and high process capability |
Also Published As
Publication number | Publication date |
---|---|
CN111328206A (en) | 2020-06-23 |
TWI788791B (en) | 2023-01-01 |
CN111328206B (en) | 2022-08-09 |
TW202135609A (en) | 2021-09-16 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US6107003A (en) | Method for producing multi-layer printed wiring boards having blind vias | |
US4830691A (en) | Process for producing high-density wiring board | |
JPH0281627A (en) | Circuit substrate and manufacture thereof | |
JP2009295850A (en) | Method of manufacturing multi-layer circuit board, multi-layer circuit board obtained by the same, semiconductor chip-mounted substrate, and semiconductor package using this substrate | |
WO2021184231A1 (en) | Low-cost and high-process-capability printed circuit board manufacturing method | |
JPH1154934A (en) | Multilayered printed wiring board and its manufacture | |
TWM615443U (en) | Printed circuit board structure featuring low cost and high process capability | |
JP2002076578A (en) | Printed wiring board and manufacturing method therefor | |
JP4436946B2 (en) | Method for manufacturing single-sided circuit board and method for manufacturing multilayer printed wiring board | |
JPH1027960A (en) | Manufacture of multi-layer printed wiring board | |
CN113630986A (en) | Ceramic-embedded PCB and manufacturing method and application thereof | |
TWI656819B (en) | Flexible circuit board manufacturing method | |
JP2004363364A (en) | Metal surface processing method, method of manufacturing multilayer circuit substrate, method of manufacturing semiconductor chip mounting substrate, method of manufacturing semiconductor package and semiconductor package | |
US6884944B1 (en) | Multi-layer printed wiring boards having blind vias | |
JP2003273509A (en) | Wiring board and its manufacturing method | |
JP4742409B2 (en) | Method for manufacturing printed wiring board | |
JP4718031B2 (en) | Printed wiring board and manufacturing method thereof | |
TWI423742B (en) | Printed wiring board with copper foil and the use of its layered body | |
JPH081987B2 (en) | Manufacturing method of wiring board | |
JPH05243742A (en) | Multilayer printed wiring board and its manufacture | |
JPS61140194A (en) | Multilayer circuit board and manufacture thereof | |
JP3665036B2 (en) | Printed wiring board manufacturing method and printed wiring board | |
JPS6318693A (en) | Manufacture of printed circuit board | |
CN112272447A (en) | Back-drilling composite cover plate for controlling drilling depth of circuit board and machining method | |
JPH11266080A (en) | Manufacture of multilayer printed wiring board |