CN104113994A - Method for manufacturing printed circuit board by using novel and improved semi-additive process - Google Patents

Method for manufacturing printed circuit board by using novel and improved semi-additive process Download PDF

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Publication number
CN104113994A
CN104113994A CN201310139462.7A CN201310139462A CN104113994A CN 104113994 A CN104113994 A CN 104113994A CN 201310139462 A CN201310139462 A CN 201310139462A CN 104113994 A CN104113994 A CN 104113994A
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China
Prior art keywords
copper foil
layer
hole
circuit board
conductive layer
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Inventor
付海涛
罗永红
赵丽
程凡雄
陈培峰
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SHANGHAI MEADVILLE ELECTRONICS CO Ltd
Shanghai Meadville Science and Technology Co Ltd
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SHANGHAI MEADVILLE ELECTRONICS CO Ltd
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Priority to CN201310139462.7A priority Critical patent/CN104113994A/en
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Abstract

The invention relates to a method for manufacturing a printed circuit board by using a novel and improved semi-additive process. The method includes the following steps that: a) a dielectric layer is prepared, and copper foil is pressed on the dielectric layer, so that a copper foil conductive layer can be formed, and as a result, a composite structure substrate can be formed, the roughness of the rough surface of the copper foil being smaller than 4 microns; b) the thickness of the copper foil conductive layer is reduced to 0.2 to 5 microns; c) through holes or blind holes are formed in the dielectric layer and the copper foil conductive layer; d) conductive treatment is performed on the copper foil conductive layer and the hole walls of the blind holes or through holes, so that a seed layer can be formed; e) a photosensitive film is bonded on the surface of the substrate, and an electroplating barrier layer is formed on the substrate through pattern transfer; f) electroplating is performed on the substrate; g) a metal protective layer is formed on the surface of a circuit pattern through using a chemical plating or electroplating method; h) the electroplating barrier layer is removed; i) the bare seed layer and copper foil conductive layer are removed through adopting a flash rusting method, and the circuit pattern formed through electroplating is reserved; j) the metal protective layer is removed; and k) processing in steps from a) to j) is performed on the circuit board repeatedly, so that a multi-layer circuit board can be formed.

Description

A kind of method that adopts new and improved semi-additive process to make printed circuit board
Technical field
The present invention relates to the manufacture method of printed circuit board, particularly a kind of method that adopts new and improved semi-additive process to make printed circuit board (containing IC support plate).
Background technology
Along with electronic product is to compact future development, also more and more higher to the become more meticulous requirement of degree of product.In the making of printed circuit board, except reducing via aperture, dwindling wire sizes is also to improve product density, has reduced an important directions of board size.
In making process of circuit board, three kinds of typical figure transfer techniques are: subtractive process, fully-additive process and semi-additive process at present.
(1) subtractive process
In subtractive process, generally adopt light sensitivity erosion resistant to complete figure and shift, and the region that utilizes this material protection not need etching to remove, adopt subsequently acidity or alkali etching liquid medicine by the not copper layer removal of protection zone.For subtractive process technique, maximum shortcoming is: in etching process, exposed copper layer is also to side etching (being lateral erosion) in etched process down, and due to the existence of lateral erosion, the application of subtractive process in fine-line is made is restricted.
(2) fully-additive process
Fully-additive process technique refers to the insulated substrate adopting containing light-sensitive catalyst, after press line pattern and exposing, sinks copper obtain the technique of conductor fig by selective chemical.Fully-additive process technique is relatively applicable to making fine-line, but because it all has specific (special) requirements to base material, electroless copper plating, the wiring board factory that adopts at present this technique to produce is few.
(3) semi-additive process
Semi-additive process refers to and on substrate, carries out chemical copper, forms resist pattern thereon, through electroplating technology, by figure thickening on substrate, removes resist pattern, and then through dodging erosion (Flash etching), unnecessary chemical copper layer is removed.Half addition process route chart is as shown in Fig. 1~Fig. 5.
Semi-additive process is the main method of producing fine-line at present, and its feature is that figure forms mainly by electroplating and dodging and lose.Before dodging erosion, remove on anti-plate barrier layer, dodges while losing and the copper layer of chemical copper layer and graphic plating is carried out to etching simultaneously, and because etched chemical copper layer is very thin, so etching period is very short, to line side to etching very little.When dodging erosion, must adopt special sudden strain of a muscle to lose the shape that liquid medicine is controlled circuit after etching, adopt common DES, SES or microetch liquid medicine all cannot meet above-mentioned requirements.Compare with subtractive process, adopt the width of the method circuit can not be subject to the thick impact of electro-coppering, than being easier to, control, improved rate of finished products.But the conductive layer on semi-additive process medium layer is the method formationization copper layer by chemical plating, then on change copper layer, by the method for electroplating thickening, obtain.Adhesion between chemical copper layer and dielectric material is generally poor, particularly all the more so for the FR4 material generally using at present.Carrying out components and parts while mounting, wiring board generally will be through the high temperature of 230-260 degree Celsius of left and right, if adhesion is poor, is very easy to occur separated between copper layer and dielectric layer, and the wiring board thermal reliability after finally having caused is performed poor.
The in-problem method of adhesion solving between half additive process medium layer material and conductor layer at present has following several:
First, dielectric material does not adopt traditional FR-4 epoxy resin, RCC, BT material, and adopt special material (as ABF, Japan Ajinomoto company produces), this dielectric material is (Desmear) in the process of desmearing, be easily snapped erosion and form even, coarse surface, and the hot property of this material is stable, with the adhesion between copper is good, be not easy to produce layering.The shortcoming of this method is: must use special material, as ABF, and this special material is than traditional FR-4, the material expensive such as RCC many, so cost of manufacture is very high.
Second, the mode that adopts carrier copper foil lamination, this Copper Foil only has 1.5 μ m-3 μ m, because so thin Copper Foil is easily wrinkling, therefore this carrier copper foil is to increase at the Copper Foil back side of 1.5-3 μ m the effect that a metallic carrier plays support, is beneficial to the operations such as carrying.But this Copper Foil is owing to having increased metallic carrier, and price is also more expensive, only in high value-added product, use, as IC support plate, and use seldom on general printed circuit board.
For the problems referred to above, the making of half additive process that the method for Chinese patent (200910045924.2) employing lamination conductive layer improves, cost compare is low, and its process route is as shown in Fig. 6~Figure 13.But this patent still has following problem to need to solve:
(1) the common Copper Foil conductive layer of lamination, the roughness of this Copper Foil matsurface is large, and root of the tooth larger (as shown in figure 14) is difficult for etching in sudden strain of a muscle erosion process clean, easily occurs the defects such as short circuit.If increased, dodge erosion amount, the etching of copper tooth energy is clean, but because etch quantity is large, the problem by occurring that circuit is meticulous or circuit bottom lateral erosion increases, is unfavorable for the making of fine-line.
(2) in sudden strain of a muscle erosion process, owing to dodging erosion liquid medicine, not only exposed Seed Layer and the conductive layer under it are had to etching action, the copper wire of graphic plating is also had to etching action, therefore, after sudden strain of a muscle has been lost, the copper thickness of graphic plating obviously declines.As shown in figure 13, the copper wire of graphic plating is after sudden strain of a muscle erosion, and copper thickness obviously declines.And client has clear and definite regulation for the copper thickness of circuit, therefore in order to meet customer requirement, when graphic plating, just need to increase electroplating time, the thickness of increase circuit, has increased cost like this.
(3) in addition,, in dodging erosion process, sudden strain of a muscle erosion liquid medicine also has etching action for aperture and the hole wall copper of through hole, and to dodge the liquid medicine flow velocity of erosion large due to through hole, liquid medicine exchange, than very fast, causes the copper of place, through hole aperture and hole wall to be thinned, copper thickness obviously declines, the reliability decrease of circuit board.In actual production, attempt solving this problem by a kind of method, that is: before dodging erosion, at lead to the hole site, stick film against corrosion, prevent from dodging the etching of erosion liquid medicine to aperture and hole wall copper, but there are two problems in this method: first: while pasting film against corrosion, relate to contraposition problem, be difficult to the exposure position of film against corrosion and lead to the hole site to aim at; Second: through hole sticks after film against corrosion, because Nei He hole, hole external pressure is inconsistent, film is easy to breakage, once breakage of thin film applied, the electrodeposited coating of through hole hole wall angle of spot hole can not get protection, can cause again the copper electroplating layer thickness of through hole aperture and hole wall to reduce.
Summary of the invention
The object of the present invention is to provide a kind of (containing IC support plate) method that adopts new and improved semi-additive process to make printed circuit board, make can make live width 20um in this way, the above fine-line of distance between centers of tracks 20 μ m, is easy to again circuit and the thick control of hole wall copper simultaneously.
For achieving the above object, technical scheme of the present invention is:
Method for manufacturing printed circuit board of the present invention; half addition method based on improvement; the Copper Foil conductive layer that laminating surface roughness is low; attenuate; and after graphic plating; adopt chemical plating or electro-cladding to protect circuit and through hole, after dodging erosion, remove this protective layer, and not Damage Medium layer and copper layer.
Particularly, the method that the new and improved semi-additive process of employing of the present invention is made printed circuit board, comprises the steps:
A) prepare a dielectric layer, on dielectric layer, the roughness of lamination matsurface (Rz) is less than the Copper Foil formation Copper Foil conductive layer of 4 μ m, forms the substrate of the composite construction that comprises dielectric layer and Copper Foil conductive layer:
B) by the thickness reduction to 0.2 of Copper Foil conductive layer~5 μ m;
C) on dielectric layer and Copper Foil conductive layer, produce through hole or blind hole;
D) hole wall at Copper Foil conductive layer and blind hole or through hole carries out conductive treatment, forms Seed Layer;
E) at substrate surface, paste photosensitive film, by figure, shift to form on substrate and electroplate barrier layer;
F) to above-mentioned, containing the substrate of electroplating barrier layer, electroplate, when forming line pattern, also logical, blind hole are electroplated, or logical, blind hole forms solid conductive pole by electroplating to fill;
G), with chemical plating or electric plating method, at circuit patterned surface, form coat of metal;
H) remove above-mentioned plating barrier layer;
I) with sudden strain of a muscle etching method, remove exposed Seed Layer and the Copper Foil conductive layer under it, retain and electroplate the line pattern forming;
J) remove coat of metal;
K) repeat in the circuit board above step a)~j), make multilayer circuit board.
Further, the Copper Foil of step described in a) is without crest line Copper Foil, low crest line Copper Foil or reversion Copper Foil.
Step b) by the method for the thickness reduction to 0.2 of Copper Foil conductive layer~5 μ m, be: adopt method mechanical, chemical or that both combine, wherein mechanical means comprises: nog plate, polishing; Chemical method is attenuate, etching, super alligatoring, brown or Darkening process.
Step c), in, adopt the mode of machinery or laser drill to form through hole or blind hole.
Steps d), in, adopt the method for chemical deposition or physical deposition to form conductive seed layer on the hole wall of through hole or blind hole.
Steps d), in, before deposition, hole wall is carried out to clean.
Step f), in, only electroplate and carry out on exposed Copper Foil conductive layer.
Step e) in, complete conductor growth simultaneously and fill and electroplate with blind hole in graphic plating, logical, blind hole can form solid conductive pole by electroplating to fill, and solid conductive pole can be in order to realize folded hole.
Step g), in, coat of metal is selected a kind of in palladium, silver, nickel, tin, or selects nickel-phosphorus alloy, leypewter.
Step h), in, adopt sudden strain of a muscle etching method to remove exposed Seed Layer and the Copper Foil conductive layer under it.
Step j) method of removing coat of metal in is: employing level is sprayed or equipment and the selective etch liquid medicine of vertical immersion, uses copper dissolution littlely, and the liquid medicine that coat of metal solubility is large is removed to coat of metal, and copper wire figure is exposed.
Described selective etch liquid medicine comprises palladium liquid medicine, removes silver-colored liquid medicine, removes nickel and nickel-phosphorus alloy liquid medicine or detin and leypewter liquid medicine.
The present invention's advantage is compared with prior art:
1. the present invention's Copper Foil that lamination surface roughness is low on dielectric layer forms Copper Foil conductive layer, the roughness of Copper Foil (Rz) is less than 4 μ m, is conducive to dodge the processing of erosion liquid medicine to copper layer, is conducive to reduce the erosion amount of dodging, be applicable to making fine-line (live width 20um, more than distance between centers of tracks 20 μ m).
2. the present invention can reduce the thickness of electrodeposited coating in graphic plating.
In half additive process; electrodeposited coating without metal coating needs to lose a part of line pattern copper thickness in dodging erosion process; therefore in graphic plating process, need many plating a period of times; to supplement, dodge etched copper in erosion, and graphic plating coating is thicker, its uniformity is poorer; the extreme difference of electrodeposited coating thickness is larger; making to fine-line is unfavorable, and because the inhomogeneous meeting of the copper thickness thickness ununiformity that causes being situated between is even, and then causes the large and integrity problem of the resistance difference of printed wiring board.The present invention utilizes chemical plating or electric plating method, at circuit patterned surface, forms coat of metal, makes circuit in dodging erosion process, can not dodged erosion liquid medicine and corrodes, and the height of line pattern can not reduce.
3. the present invention can protect the copper in through hole hole wall and aperture thick.
In dodging erosion process; the liquid medicine exchange of through hole is more abundant; therefore fast to the etching speed of the etching meeting specific surface in through hole hole wall and aperture; especially large on the impact in through hole hole wall and aperture; if do not added protection, probably can cause through hole hole wall electrodeposited coating to cross thin or electrodeposited coating by the integrity problem that etches away completely and cause.Adopt the inventive method, aperture and the hole wall of through hole are all protected, and can not occur by the partially thin integrity problem causing of through hole hole wall aperture copper thickness.
Accompanying drawing explanation
Fig. 1~Fig. 5 is the fabrication processing figure of existing semi-additive process.
Fig. 1 is the generalized section of chemical copper layer 2a and base material 1a;
Fig. 2 is for form electroplating chemical copper layer 2a after the 3a of barrier layer and the generalized section of base material 1a;
Fig. 3 is copper layer 4a after graphic plating and the generalized section of base material 1a;
Fig. 4 removes the copper electroplating layer 4a electroplating after the 3a of barrier layer, chemical copper layer 2a and base material 1a generalized section;
Fig. 5 is for removing conductor fig after unnecessary chemical copper layer and the generalized section of base material 1a.
Fig. 6~Figure 13 is the process chart of Chinese patent 200910045924.2.
Wherein, 1b is substrate, and 2b is dielectric layer, 3b is common Copper Foil conductive layer, and 3b ' is the common Copper Foil conductive layer after attenuate, and 4b is Seed Layer, 5b is for electroplating barrier layer, 6b is the copper layer of graphic plating, and 7b is internal layer via, and 8b is blind hole, 9b is through hole, 91b is the aperture of through hole, the hole wall that 92b is through hole, and 10b is solid conductive pole.
Figure 14 is the cross sectional representation that the common Copper Foil tooth root of Chinese patent 200910045924.2 uses divides.
Figure 15 is the cross sectional representation that Rz that the present invention uses is less than the Copper Foil root of the tooth part of 4 μ m.
Figure 16~Figure 25 is process chart of the present invention.
Figure 24 is for removing exposed Seed Layer and unnecessary conductive layer, and reserved line and conductive via, form needed conductive pattern schematic diagram.
Figure 25 is for removing coat of metal schematic diagram with chemical method selective etch.
Embodiment
Below in conjunction with drawings and Examples, manufacture method of the present invention is described further.
Embodiment 1
Referring to Figure 16~Figure 25; the present invention is based on half addition method of improvement; (Copper Foil has light face and matsurface to the Copper Foil of the roughness low (Rz is less than 4 μ m) of lamination matsurface; wherein matsurface and dielectric layer lamination); be thinned to 0.2~5 μ m, the Rz forming after attenuate is less than 4 μ m Copper Foils, and after graphic plating; adopt coat of metal to protect line pattern and through hole, after dodging erosion, remove this protective layer.
Concrete steps are:
The 1st step, as shown in figure 16, first prepares a dielectric layer 1, and on dielectric layer 1, hot pressing one Rz is less than the Copper Foil conductive layer 2 of 4 μ m.Described dielectric layer 1 can be produced on the composite base plate that comprises insulating carrier and surface conductance layer, also can directly prepare on conductive layer.In the present embodiment, select and become dielectric layer 1 and Copper Foil conductive layer 2 with the substrate 3 upper strata swagings of conductive layer comprising dielectric layer.Wherein, dielectric layer 1 is the epoxide resin material containing glass cloth, and Copper Foil conductive layer 2 thickness are low crest line Copper Foils of 12 μ m, Rz=2 μ m; 31 is internal layer via.
The 2nd step, referring to Figure 17, carries out reduced thickness processing by above-mentioned Copper Foil conductive layer 2, forms the Copper Foil conductive layer 2 ' after attenuate.In this step, reduction processing can adopt mechanical milling tech, chemical etching process or the method that both combine.In the present embodiment, adopting the method for chemical etching is 2 μ m by thickness reduction.
The 3rd step, referring to Figure 18, forms blind hole 4 on the Copper Foil conductive layer 2 ' after above-mentioned attenuate and dielectric layer 1.The method that forms blind hole can adopt the mode of laser drill also can adopt the mode of machine drilling, or the mode of using plasma etching or sensitization pore-forming.In the present embodiment, adopt the mode of laser drill to form blind hole.In the present embodiment, this step also adopts the mode of machine drilling to form the aperture that through hole 5,51 is through hole, 52 hole walls that are through hole.
The 4th step, referring to Figure 19, carries out conductive treatment at the hole wall of above-mentioned through hole, forms Seed Layer 6.Seed Layer in this processing procedure can adopt the mode of chemical deposition, or uses sputter mode; This Seed Layer can be to take the conductive carrier that copper is main component, can be also the structure of other metallic conductor.In the present embodiment, preferentially adopt the method for chemical depositing copper layer to make the Seed Layer 6 of conduction, the thickness of chemical depositing copper is 0.8 μ m.
The 5th step referring to Figure 20, attaches photosensitive film in the Seed Layer 6 of above-mentioned conduction, shifts to form electroplate barrier layer 7 by figure, exposes line pattern.Adopt in the present embodiment photosensitive film material, and through pad pasting, exposure and the formation needed plating barrier layer 7 of developing.
The 6th step, referring to Figure 21, electroplates containing the substrate 3 of electroplating barrier layer 7 above-mentioned, and when forming line pattern, blind hole forms solid conductive pole 8 by electroplating to fill, and as shown in figure 21, wherein, 9 is the electrodeposited coating of line pattern and through hole 5.Graphic plating adopts the plating filling perforation liquid medicine of DOW Chemical, and wherein concentration of copper sulfate is 220g/L, and sulfuric acid concentration is 45ml/L.
The 7th step; to proceeding chemical plating containing the substrate 3 of electroplating barrier layer 7; on the electrodeposited coating 9 of line pattern and through hole 5, plate again layer of metal protective layer 10--palladium; as shown in figure 22; the palladium that coat of metal 10 is chemical plating; liquid medicine is colloid palladium liquid medicine, and flow process is: microetch, preimpregnation, activation, shortization.
The 8th step, referring to Figure 23, removes and electroplates barrier layer 7.
The 9th step, referring to Figure 24, removes exposed Seed Layer and unnecessary Copper Foil conductive layer, reserved line figure and through hole.The method of removing exposed Seed Layer and Copper Foil conductive layer adopts the mode of chemical etching.In the present embodiment, adopt the method for dodging erosion to remove exposed Seed Layer and Copper Foil conductive layer, dodging erosion liquid medicine is sulfuric acid and hydrogen peroxide mixture and corresponding additive.
The 10th step, referring to Figure 25, removes coat of metal 10 (palladium) with chemical method selective etch, adopts and removes palladium liquid medicine in the present embodiment, with this, removes the palladium in line pattern and through hole 5, little to the etch quantity of the copper in line pattern and through hole.
The 11st step, according to the needs of lamination, repeats above step 1-10 and makes last layer circuit, realizes inter-level interconnects and the fine-line of folded pore structure and makes.
Embodiment 2
The 1st step~6th step, in the same manner as in Example 1.
The 7th step, referring to Figure 22, to proceeding to electroplate containing the substrate 3 of electroplating barrier layer 7, re-plating layer of metal protective layer 10-bright nickel on line pattern and on through hole, as shown in figure 22, and the bright nickel of coat of metal 10 for electroplating, the thickness of bright nickel is 3 μ m.
The 8th step, referring to Figure 23, removes and electroplates barrier layer 7.
The 9th step, referring to Figure 24, removes exposed Seed Layer and unnecessary Copper Foil conductive layer, and reserved line figure and through hole 5, form needed conductive pattern.The method of removing exposed Seed Layer and Copper Foil conductive layer adopts the mode of chemical etching.In the present embodiment, adopt the method for dodging erosion to remove exposed Seed Layer and conductive layer, dodging erosion liquid medicine is sulfuric acid and hydrogen peroxide mixture and corresponding additive.
The 10th step; referring to Figure 25; with chemical method selective etch, remove coat of metal 10 (bright nickel); adopt and remove nickel liquid medicine in the present embodiment; this liquid medicine is that the HN-256 that Xiamen Mai Te new science and technology Co., Ltd produces takes off nickel agent; with this, remove the nickel coating in line pattern and through hole, little to the etch quantity of the copper in line pattern and through hole.
The 11st step, according to the needs of lamination, repeats above step 1-10 and makes last layer circuit, realizes inter-level interconnects and the fine-line of folded pore structure and makes.
Embodiment 3
The 1st step~6th step, in the same manner as in Example 1.
The 7th step referring to Figure 22, to proceeding chemical plating containing the substrate 3 of electroplating barrier layer 7, is plated layer of metal protective layer 10--silver on line pattern and on through hole again, as shown in figure 22, the silver that coat of metal 10 is chemical plating, the thickness of silver is 0.15 μ m.
The 8th step, referring to Figure 23, removes and electroplates barrier layer 7.
The 9th step, referring to Figure 24, removes exposed Seed Layer and unnecessary Copper Foil conductive layer, and reserved line figure and through hole 5, form needed line pattern.The method of removing exposed Seed Layer and Copper Foil conductive layer adopts the mode of chemical etching.In the present embodiment, adopt the method for dodging erosion to remove exposed Seed Layer and Copper Foil conductive layer, dodging erosion liquid medicine is sulfuric acid and hydrogen peroxide mixture and corresponding additive.
The 10th step; referring to Figure 25; with chemical method selective etch, remove coat of metal 10 (silver); adopt and remove silver-colored liquid medicine in the present embodiment; this liquid medicine is that the production DSE-22 of Shenzhen Di Sien Science and Technology Ltd. moves back silvering solution; with this, remove the silver in line pattern and through hole, go line pattern and the surfacing of through hole copper after silver smooth, little to the etch quantity of the copper in line pattern and through hole.
The 11st step, according to the needs of lamination, repeats above step 1-10 and makes last layer circuit, realizes inter-level interconnects and the fine-line of folded pore structure and makes.
The present invention is based on half addition method of improvement; the Copper Foil conductive layer that laminating surface roughness is low; attenuate; and after graphic plating; adopt chemical plating or electro-cladding to protect line pattern and through hole; after dodging erosion, remove this protective layer, be applicable to the making of printed circuit board and IC base plate for packaging.

Claims (10)

1. adopt new and improved semi-additive process to make a method for printed circuit board, comprise the steps:
A) prepare a dielectric layer, on dielectric layer, the roughness of lamination matsurface (Rz) is less than the Copper Foil formation Copper Foil conductive layer of 4 μ m, forms the substrate of the composite construction that comprises dielectric layer and Copper Foil conductive layer;
B) by the thickness reduction to 0.2 of Copper Foil conductive layer~5 μ m;
C) on dielectric layer and Copper Foil conductive layer, produce through hole or blind hole;
D) hole wall at Copper Foil conductive layer and blind hole or through hole carries out conductive treatment, forms Seed Layer;
E) at substrate surface, paste photosensitive film, by figure, shift to form on substrate and electroplate barrier layer;
F) to above-mentioned, containing the substrate of electroplating barrier layer, electroplate, when forming line pattern, through hole, blind hole hole wall are electroplated, or through hole, blind hole form solid conductive pole by electroplating to fill;
G), with chemical plating or electric plating method, at circuit patterned surface, form coat of metal;
H) remove above-mentioned plating barrier layer;
I) with sudden strain of a muscle etching method, remove exposed Seed Layer and the Copper Foil conductive layer under it, retain and electroplate the line pattern forming, form line pattern;
J) remove coat of metal;
K) repeat in the circuit board above step a)~j), make multilayer printed wiring board.
2. the method that the new and improved semi-additive process of employing as claimed in claim 1 is made printed circuit board, it is characterized in that, the Copper Foil of step described in a) is that the roughness of this kind of Copper Foil matsurface (Rz) is less than 4 μ m without crest line Copper Foil, low crest line Copper Foil or reversion Copper Foil.
3. the method that the new and improved semi-additive process of employing as claimed in claim 1 is made printed circuit board, is characterized in that step b) by the method for the thickness reduction to 0.2 of Copper Foil conductive layer~5 μ m, be: method mechanical, chemical or that both combine adopted; Wherein, mechanical means comprises: nog plate, polishing; Chemical method is attenuate, etching, super alligatoring, brown or Darkening process.
4. the method that the new and improved semi-additive process of employing as claimed in claim 1 is made printed circuit board, is characterized in that step c) in, adopt the mode of machinery or laser drill to form through hole or blind hole.
5. the method that the new and improved semi-additive process of employing as claimed in claim 1 is made printed circuit board, is characterized in that steps d) in, adopt the method for chemical deposition or physical deposition to form conductive seed layer on the hole wall of through hole or blind hole.
6. the method that the new and improved semi-additive process of employing as claimed in claim 5 is made printed circuit board, is characterized in that steps d) in, before deposition, hole wall is carried out to the clean such as desmearing, oil removing, microetch.
7. the method that the new and improved semi-additive process of employing as claimed in claim 1 is made printed circuit board, is characterized in that step f) in, only electroplate and carry out on exposed Copper Foil conductive layer.
8. the method that the new and improved semi-additive process of employing as claimed in claim 1 is made printed circuit board; it is characterized in that; step g) in chemical plating or electric plating method; the coat of metal forming at circuit patterned surface is selected a kind of in palladium, silver, nickel, tin, or selects nickel-phosphorus alloy, leypewter.
9. the method that the new and improved semi-additive process of employing as claimed in claim 1 is made printed circuit board; it is characterized in that; step j) method of removing coat of metal in is: equipment and the selective etch liquid medicine of the sprinkling of employing level or vertical immersion; use little to copper dissolution degree, the large liquid medicine of coat of metal solubility is removed to coat of metal, copper wire figure is exposed.
10. the method that the new and improved semi-additive process of employing as claimed in claim 9 is made printed circuit board, is characterized in that, described selective etch liquid medicine comprises palladium liquid medicine, removes silver-colored liquid medicine, removes nickel and nickel-phosphorus alloy liquid medicine or detin and leypewter liquid medicine.
CN201310139462.7A 2013-04-22 2013-04-22 Method for manufacturing printed circuit board by using novel and improved semi-additive process Pending CN104113994A (en)

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CN106304668A (en) * 2016-10-31 2017-01-04 安捷利电子科技(苏州)有限公司 A kind of manufacture method using enhancement mode semi-additive process to make printed wiring board
CN106852003A (en) * 2017-04-06 2017-06-13 宜兴硅谷电子科技有限公司 A kind of preparation method without resist layer fine-line plate
CN107295753A (en) * 2016-05-31 2017-10-24 昆山群安电子贸易有限公司 The method that circuit board is made using semi-additive process
CN107295754A (en) * 2016-05-31 2017-10-24 昆山群安电子贸易有限公司 The method that semi-additive process makes printed circuit board
CN108112178A (en) * 2017-12-25 2018-06-01 广州兴森快捷电路科技有限公司 Circuit board fabrication method
CN109195363A (en) * 2018-11-13 2019-01-11 生益电子股份有限公司 A kind of production method and PCB of the PCB of Z-direction interconnection
CN109195341A (en) * 2018-09-12 2019-01-11 安捷利(番禺)电子实业有限公司 A kind of preparation method for the precise printed circuit board improving route copper layer thickness and width
TWI669031B (en) * 2017-06-05 2019-08-11 亞洲電材股份有限公司 Composite metal substrate and method for manufacturing the same and circuit board
CN111328206A (en) * 2020-03-06 2020-06-23 柏承科技(昆山)股份有限公司 Method for manufacturing printed circuit board with low cost and high processing capacity
CN112074089A (en) * 2020-08-31 2020-12-11 珠海智锐科技有限公司 Method for manufacturing bonding pad
CN112134007A (en) * 2020-08-12 2020-12-25 光臻精密制造(苏州)有限公司 Method for preparing 5G antenna oscillator conductive pattern through selective thickening and differential etching
CN112235951A (en) * 2020-10-20 2021-01-15 盐城维信电子有限公司 Method for manufacturing circuit boards with different copper thicknesses
CN112333926A (en) * 2020-10-20 2021-02-05 盐城维信电子有限公司 Method for manufacturing circuit board with metal layers with different thicknesses
CN113811093A (en) * 2021-08-09 2021-12-17 广州方邦电子股份有限公司 Metal foil, copper-clad laminated board, circuit board and preparation method of circuit board
CN114051542A (en) * 2019-05-01 2022-02-15 朗姆研究公司 Protection of seed layers during metal electrodeposition in semiconductor device fabrication
CN115643696A (en) * 2022-08-23 2023-01-24 宁波华远电子科技有限公司 Preparation process of circuit board
TWI823176B (en) * 2021-04-28 2023-11-21 大陸商宏恆勝電子科技(淮安)有限公司 Circuit board with heat dissipation function and the making method

Cited By (22)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104411105A (en) * 2014-11-21 2015-03-11 深圳崇达多层线路板有限公司 Method for improving excessive circuit etching of circuit board
CN107295753A (en) * 2016-05-31 2017-10-24 昆山群安电子贸易有限公司 The method that circuit board is made using semi-additive process
CN107295754A (en) * 2016-05-31 2017-10-24 昆山群安电子贸易有限公司 The method that semi-additive process makes printed circuit board
CN106304668A (en) * 2016-10-31 2017-01-04 安捷利电子科技(苏州)有限公司 A kind of manufacture method using enhancement mode semi-additive process to make printed wiring board
CN106304668B (en) * 2016-10-31 2019-03-05 广州市安旭特电子有限公司 A kind of production method using enhanced semi-additive process production printed wiring board
CN106852003A (en) * 2017-04-06 2017-06-13 宜兴硅谷电子科技有限公司 A kind of preparation method without resist layer fine-line plate
TWI669031B (en) * 2017-06-05 2019-08-11 亞洲電材股份有限公司 Composite metal substrate and method for manufacturing the same and circuit board
CN108112178A (en) * 2017-12-25 2018-06-01 广州兴森快捷电路科技有限公司 Circuit board fabrication method
CN109195341A (en) * 2018-09-12 2019-01-11 安捷利(番禺)电子实业有限公司 A kind of preparation method for the precise printed circuit board improving route copper layer thickness and width
CN109195363A (en) * 2018-11-13 2019-01-11 生益电子股份有限公司 A kind of production method and PCB of the PCB of Z-direction interconnection
CN114051542A (en) * 2019-05-01 2022-02-15 朗姆研究公司 Protection of seed layers during metal electrodeposition in semiconductor device fabrication
CN111328206A (en) * 2020-03-06 2020-06-23 柏承科技(昆山)股份有限公司 Method for manufacturing printed circuit board with low cost and high processing capacity
CN111328206B (en) * 2020-03-06 2022-08-09 柏承科技(昆山)股份有限公司 Method for manufacturing printed circuit board
CN112134007A (en) * 2020-08-12 2020-12-25 光臻精密制造(苏州)有限公司 Method for preparing 5G antenna oscillator conductive pattern through selective thickening and differential etching
CN112074089A (en) * 2020-08-31 2020-12-11 珠海智锐科技有限公司 Method for manufacturing bonding pad
CN112235951A (en) * 2020-10-20 2021-01-15 盐城维信电子有限公司 Method for manufacturing circuit boards with different copper thicknesses
CN112333926A (en) * 2020-10-20 2021-02-05 盐城维信电子有限公司 Method for manufacturing circuit board with metal layers with different thicknesses
CN112333926B (en) * 2020-10-20 2022-05-31 盐城维信电子有限公司 Method for manufacturing circuit board with metal layers with different thicknesses
TWI823176B (en) * 2021-04-28 2023-11-21 大陸商宏恆勝電子科技(淮安)有限公司 Circuit board with heat dissipation function and the making method
CN113811093A (en) * 2021-08-09 2021-12-17 广州方邦电子股份有限公司 Metal foil, copper-clad laminated board, circuit board and preparation method of circuit board
CN115643696A (en) * 2022-08-23 2023-01-24 宁波华远电子科技有限公司 Preparation process of circuit board
CN115643696B (en) * 2022-08-23 2024-02-13 宁波华远电子科技有限公司 Preparation process of circuit board

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